Printed circuit board

Abstract

The present disclosure provides a printed circuit board including: a plurality of insulating layers; a plurality of wiring layers; a plurality of via layers; a glass substrate having upper and lower surfaces, first and second side surfaces, and third and fourth side surfaces, and at least partially disposed between the plurality of insulating layers; and a protective material covering the first side surface to the fourth side surface of the glass substrate, and each of the upper surface and the lower surface of the glass substrate has a peripheral portion connected to the first side surface to the fourth side surface and a central portion surrounded by the peripheral portion, and the protective material is spaced apart from a central portion of the upper surface and a central portion of the lower surface of the glass substrate, respectively.

Description

[0001] This application claims the benefit of priority to Korean Patent Application No. 10-2024-0112000, filed on August 21, 2024, with the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference. Technical Field

[0002] This disclosure relates to a printed circuit board. Background Technology

[0003] Efforts to improve the performance of electronic products are expanding from semiconductors to packaging technologies, with products utilizing glass substrates gaining attention as next-generation technologies. Glass substrates can outperform organic substrates formed using epoxy resin materials in terms of heat dissipation, warp control, large-area expansion, and microcircuit implementation. However, glass substrates may have problems inherent in the initiation and propagation of cracks during their processing or transportation. In such cases, glass particles can enter the product through various pathways, such as processing equipment or chemicals, leading to product defects. Therefore, addressing the problem of glass cracking or breakage may be necessary. Summary of the Invention

[0004] One aspect of this disclosure is to provide a printed circuit board including a protective material, thereby effectively preventing glass from cracking or breaking.

[0005] One of the various solutions proposed in this disclosure is to use a protective material on the edge surface (side surface) of a glass substrate to form a damper of various shapes to provide protection and absorb external impacts, thereby preventing the glass from cracking or breaking.

[0006] For example, a printed circuit board according to an example embodiment may include: a plurality of insulating layers; a plurality of wiring layers disposed on or within the plurality of insulating layers; a plurality of via layers, each of the plurality of via layers penetrating at least one of the plurality of insulating layers and each of the plurality of via layers connected to at least one of the plurality of wiring layers; a glass substrate having a first surface and a second surface opposite to each other in a first direction, a first side surface and a second side surface opposite to each other in a second direction perpendicular to the first direction, and a third side surface and a fourth side surface opposite to each other in a third direction perpendicular to the first and second directions, the glass substrate being at least partially disposed between the plurality of insulating layers in the first direction; and a protective material covering the first side surface to the fourth side surface of the glass substrate, each of the first surface and the second surface of the glass substrate may have a peripheral portion connected to the first side surface to the fourth side surface and a central portion surrounded by the peripheral portion, and the protective material may be spaced apart from the central portions of the first surface and the second surface of the glass substrate, respectively.

[0007] For example, a printed circuit board according to an example embodiment may include: a glass substrate having a first surface and a second surface opposite to each other in a first direction, a first side surface and a second side surface opposite to each other in a second direction perpendicular to the first direction, and a third side surface and a fourth side surface opposite to each other in a third direction perpendicular to the first and second directions; a protective material covering the first side surface to the fourth side surface of the glass substrate; and a wiring structure disposed on at least one of the first surface and the second surface of the glass substrate, wherein each of the first surface and the second surface of the glass substrate may have a peripheral portion connected to the first side surface to the fourth side surface and a central portion surrounded by the peripheral portion, the protective material may further cover at least a portion of the peripheral portion of the first surface and at least a portion of the peripheral portion of the second surface of the glass substrate, and the protective material may be spaced apart from the central portion of each of the first surface and the second surface of the glass substrate.

[0008] One of the various effects of this disclosure is to provide a printed circuit board that includes a glass substrate and is able to effectively prevent cracks or breakage of the glass. Attached Figure Description

[0009] The above and other aspects, features, and advantages of this disclosure will be more clearly understood through the following detailed embodiments, taken in conjunction with the accompanying drawings, in which: Figure 1It is a block diagram that schematically illustrates an example of an electronic device system; Figure 2 It is a perspective view schematically illustrating an example of an electronic device; Figure 3 This is a perspective view schematically showing an example of a glass substrate on which a protective material is formed; Figures 4A to 4C Each is shown schematically. Figure 3 An enlarged cross-sectional view of an example of region A of a glass substrate on which a protective material is formed; Figure 5 This is a process cross-sectional view schematically illustrating various examples of the process of forming a protective material on the edge surface of a glass substrate; Figure 6 This is a schematic cross-sectional view illustrating an example of a printed circuit board; and Figure 7 This is a schematic cross-sectional view illustrating another example of a printed circuit board. Detailed Implementation

[0010] The present disclosure will be described below with reference to the accompanying drawings. In the drawings, the shape and size of the elements may be enlarged or reduced for clarity.

[0011] Electronic devices Figure 1 This is a block diagram that schematically illustrates an example of an electronic device system.

[0012] Reference Figure 1 The electronic device 1000 houses a motherboard 1010. Chip-related components 1020, network-related components 1030, and other components 1040 are physically and / or electrically connected to the motherboard 1010. These electronic components can be connected to other electronic components described below via various signal lines 1090.

[0013] Chip-related components 1020 may include: memory chips, such as volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM, flash memory), etc.; application processor chips, such as central processing units (e.g., central processing units (CPUs)), graphics processing units (e.g., graphics processing units (GPUs)), digital signal processors, cryptographic processors, microprocessors, microcontrollers, etc.; and logic chips, such as analog-to-digital converters (ADCs), application-specific integrated circuits (ASICs), etc. However, chip-related components 1020 are not limited to these and may also include other types of chip-related components. Furthermore, chip-related components 1020 may be combined with each other. Chip-related components 1020 may be in the form of a package including the aforementioned chips or electronic components.

[0014] Network-related components 1030 may include components compatible with or operating under protocols such as: Wi-Fi (such as the IEEE 802.11 series), WiMAX (such as the IEEE 802.16 series), IEEE 802.20, LTE, Ev-DO, HSPA+, HSDPA+, HSUPA+, GSM+, EDGE+, GPS, GPRS, CDMA, TDMA, DECT, Bluetooth, LAN, 3G, 4G, and 5G protocols, as well as any other wireless or wired standards or protocols specified herein. However, network-related component 1030 is not limited to this, and may also include components that are compatible with or operate according to any of several other wireless standards or protocols and wired standards or protocols. Furthermore, network-related component 1030 may be combined with chip-related component 1020.

[0015] Other components 1040 may include high-frequency inductors, ferrite inductors, power inductors, ferrite beads, low-temperature co-fired ceramic (LTCC) components, electromagnetic interference (EMI) filters, multilayer ceramic capacitors (MLCCs), etc. However, other components 1040 are not limited to these and may also include passive components in the form of chip modules for various other purposes. Furthermore, other components 1040 may be combined with chip-related components 1020 and / or network-related components 1030.

[0016] Depending on the type of electronic device 1000, it may include other electronic components that are physically and / or electrically connected to the motherboard 1010 or not physically and / or electrically connected to the motherboard 1010. These other electronic components may include, for example, a camera 1050, an antenna 1060, a display 1070, and a battery 1080. However, these other electronic components are not limited to these and may also include audio codecs, video codecs, power amplifiers, compasses, accelerometers, gyroscopes, speakers, mass storage devices (e.g., hard disk drives), optical discs (CDs), digital versatile optical discs (DVDs), etc. In addition, depending on the type of electronic device 1000, it may also include other electronic components for various purposes.

[0017] Electronic device 1000 can be a smartphone, personal digital assistant, digital video camera, digital camera, network system, computer, monitor, tablet PC, laptop PC, netbook PC, television, video game console, smartwatch, automotive components, etc. However, electronic device 1000 is not limited to these and can be any other electronic device capable of processing data.

[0018] Figure 2 It is a perspective view schematically showing an example of an electronic device.

[0019] Reference Figure 2 The electronic device may be, for example, a smartphone 1100. A motherboard 1110 may be housed in the smartphone 1100, and various components 1120 may be physically and / or electrically connected to the motherboard 1110. Furthermore, other electronic components (such as a camera module 1130 and / or a speaker 1140) that are physically and / or electrically connected to the motherboard 1110 or not physically and / or electrically connected to the motherboard 1110 may be housed in the smartphone 1100. Some of the components 1120 may be the aforementioned chip-related components, such as component packages 1121, but this disclosure is not limited thereto. Component packages 1121 may be in the form of a printed circuit board on which electronic components (including active and / or passive components) are surface-mounted. Alternatively, component packages 1121 may be in the form of a printed circuit board in which electronic components (including active and / or passive components) are embedded. The electronic device is not necessarily limited to the smartphone 1100, but may be other electronic devices as described above.

[0020] Printed Circuit Board Figure 3 This is a perspective view schematically showing an example of a glass substrate on which a protective material is formed.

[0021] Figures 4A to 4C Each is shown schematically. Figure 3 An enlarged cross-sectional view of an example of region A of a glass substrate on which a protective material is formed.

[0022] Reference Figure 3 and Figures 4A to 4CThe glass substrate 110 may have an upper surface (first surface) M1 and a lower surface (second surface) M2 opposite to each other in a first direction, a first side surface S1 and a second side surface S2 opposite to each other in a second direction perpendicular to the first direction, and a third side surface S3 and a fourth side surface S4 opposite to each other in a third direction perpendicular to the first and second directions, respectively. The upper surface M1 of the glass substrate 110 may have a peripheral portion R2 connected to the first side surface S1, the second side surface S2, the third side surface S3 and the fourth side surface S4, and a central portion R1 surrounded by the peripheral portion R2. The boundary dividing the central portion R1 and the peripheral portion R2 is not particularly limited and may have any shape, as long as the peripheral portion R2 has a predetermined area connected to the first side surface S1, the second side surface S2, the third side surface S3 and the fourth side surface S4 and surrounding the central portion R1. The lower surface M2 of the glass substrate 110 may also have a peripheral portion connected to the first side surface S1, the second side surface S2, the third side surface S3 and the fourth side surface S4, and a central portion surrounded by the peripheral portion, and the above description can also be applied to the peripheral portion and the central portion of the lower surface M2.

[0023] The glass substrate 110 may include glass (an amorphous solid). The glass may include, for example, pure silica (about 100% SiO2), soda-lime glass, borosilicate glass, and aluminosilicate glass. However, this disclosure is not limited thereto, and the glass may include alternative glass materials (e.g., fluorine glass, phosphate glass, chalcogenide glass, etc.). Furthermore, other additives may be included to form a glass with specific physical properties. These additives may include magnesium, calcium, manganese, aluminum, lead, boron, iron, chromium, potassium, sulfur, and antimony, as well as carbonates (e.g., calcium carbonate (e.g., lime) and sodium carbonate (e.g., soda ash) and / or oxides of these elements and other elements. The glass substrate 110 may be distinguished from organic insulating materials (e.g., copper-clad laminates (CCL) or prepregs (PPG)) that include glass fibers (e.g., glass fabrics such as glass cloth). For example, the glass substrate 110 may include a glass plate.

[0024] The protective material 150 can cover the first side surface S1, the second side surface S2, the third side surface S3, and the fourth side surface S4 of the glass substrate 110, and can be spaced apart from the central portion R1 of the upper surface M1 and the central portion R3 of the lower surface M2 of the glass substrate 110, respectively. The protective material 150 can have various shapes, sizes, curvatures, etc. For example, such as... Figure 4AAs shown, the protective material 150 may be spaced apart from the peripheral portions R2 of the upper surface M1 and R4 of the lower surface M2 of the glass substrate 110, and may protrude in a generally rounded shape from each of the first side surface S1, the second side surface S2, the third side surface S3, and the fourth side surface S4 of the glass substrate 110 based on a second or third direction. In this case, the glass substrate 110 on which the protective material 150 is more compactly formed can be embedded in a printed circuit board. Optionally, as Figure 4B As shown, the protective material 150 may extend to the peripheral portion R2 of the upper surface M1 and the peripheral portion R4 of the lower surface M2 of the glass substrate 110, and may protrude in a generally rounded shape from each of the first side surface S1, the second side surface S2, the third side surface S3, and the fourth side surface S4 of the glass substrate 110 based on a second or third direction. In this case, impact on the surface can be effectively prevented, and scratches due to friction during stacking can be effectively prevented. As used herein, the term "generally rounded" may mean that the protrusion has an arc connecting the two farthest portions of the protrusion, and this arc may be part of a circular or elliptical circumference. The arc may be symmetrical or asymmetrical along a longitudinal axis passing through the center of the glass substrate 110. The symmetry of the arc can be determined by scanning microscopy. Even if not described in this disclosure, other methods and / or tools understood by those skilled in the art can be used to determine the symmetry of the arc. Optionally, as Figure 4C As shown, the protective material 150 may extend to the peripheral portion R2 of the upper surface M1 and the peripheral portion R4 of the lower surface M2 of the glass substrate 110, and may protrude at approximately right angles from each of the first side surface S1, the second side surface S2, the third side surface S3, and the fourth side surface S4 of the glass substrate 110 based on a second or third direction. In this case, impact on the surface is effectively prevented, and scratches due to friction during stacking are also effectively prevented. As used herein, the term "approximately right angle" may mean that the protrusions have edges intersecting at an angle of 89° to 91°. This angle can be determined using a scanning microscope. Even if not described in this disclosure, this angle may be determined using other methods and / or tools understood by those skilled in the art.

[0025] The protective material 150 may include various inorganic and / or organic materials capable of absorbing external impacts. For example, the protective material 150 may include sealant-based materials and / or synthetic rubber-based materials. Sealant-based materials may include one or more of epoxy resins, silicones, acrylics, and / or urethanes. The protective material 150 may include elastomers. Synthetic rubber-based materials may include one or more of rubber and polyethylene. However, this disclosure is not limited thereto, and other types of insulating materials having the above-described functions may be used.

[0026] The glass substrate 110 may be a panel substrate comprising multiple unit regions prior to singulation, and a protective material 150 may be formed on the edge surface of the panel substrate. Alternatively, the glass substrate 110 may be a single unit substrate after singulation, and the protective material 150 may be formed on the edge surface of each of the single unit substrates.

[0027] In this way, since the protective material 150 can be formed on the edge of the glass substrate 110 in various damper shapes, cracks or breakage of the glass can be effectively prevented. For example, cracks and breakage due to micro-notches or specific impacts can be effectively prevented, which may occur at the edge of the glass substrate 110 due to repeated contact, thermal shock, pressure, vibration, friction, etc., that may occur during the process. In addition, the formation of notches and particles can be effectively prevented, which may occur when the glass substrate 110 is mounted in the cavity of the printed circuit board. Furthermore, the protective material 150 can be used as a guide to improve adhesion when mounted in the cavity, which is expected to improve yield, increase design freedom by removing alignment marks, and reduce costs.

[0028] Figure 5 This is a process cross-sectional view schematically illustrating various examples of the process of forming a protective material on the edge surface of a glass substrate.

[0029] Reference Figure 5 First, multiple glass substrates 110 can be arranged. Next, a protective material 150 can be formed on the edge of each glass substrate 110. The protective material 150 can be formed, for example, by adsorbing an epoxy resin ink sponge 150-1 onto the edge of the glass substrate 110. The epoxy resin ink sponge 150-1 can be formed on a substrate 150-2. However, the material of the protective material 150 is not limited to epoxy resin ink. Next, dampers of various shapes can be determined according to the adsorption method. For example, damper structures of the various shapes described above can be formed. Other contents are basically the same as those described above, therefore, redundant descriptions will be omitted.

[0030] Figure 6 This is a schematic cross-sectional view illustrating an example of a printed circuit board.

[0031] Reference Figure 6The printed circuit board 500A according to an example embodiment may include: a plurality of insulating layers 211, 212 and 213; a plurality of wiring layers 221, 222, 223, 224 and 225 disposed on or within the plurality of insulating layers 211, 212 and 213; a plurality of via layers 231, 232 and 233, each of the plurality of via layers 231, 232 and 233 penetrating at least one of the plurality of insulating layers 211, 212 and 213 and connected to at least one of the plurality of wiring layers 221, 222, 223, 224 and 225; a glass substrate 110 at least partially disposed between the plurality of insulating layers 211, 212 and 213 in a first direction; and a protective material 150 covering the side surface of the glass substrate 110. The structure, including at least one of a plurality of insulating layers 211, 212, and 213, at least one of a plurality of wiring layers 221, 222, 223, 224, and 225, and at least one of a plurality of via layers 231, 232, and 233, can be, for example, a wiring structure. Each of the plurality of insulating layers 211, 212, and 213 may contact at least a portion of the central portion of the upper surface and at least a portion of the central portion of the lower surface of the glass substrate 110. Microcircuits may be formed on the glass substrate 110. The glass substrate 110 may be embedded in the printed circuit board 500A in the form of an interposer or an interconnect bridge.

[0032] The plurality of insulating layers 211, 212, and 213 may include a core insulating layer 211 and a plurality of stacked insulating layers 212 and 213 stacked on the upper surface (first surface) of the core insulating layer 211. In this case, the glass substrate 110 and the protective material 150 may be embedded in at least one of the core insulating layer 211 and the plurality of stacked insulating layers 212 and 213. For example, the core insulating layer 211 may have a cavity C penetrating at least a portion of the core insulating layer 211 from the upper surface of the core insulating layer 211 in a first direction, the glass substrate 110 and the protective material 150 may be disposed in the cavity C, and the plurality of stacked insulating layers 212 and 213 may cover at least a portion of each of the glass substrate 110 and the protective material 150, and the plurality of stacked insulating layers 212 and 213 may fill at least a portion of the cavity C.

[0033] The plurality of wiring layers 221, 222, 223, 224, and 225 may include a first core wiring layer 221 disposed on the upper surface of the core insulating layer 211, a second core wiring layer 222 disposed on the lower surface (second surface) of the core insulating layer 211, a wiring layer (interconnect wiring layer) 223 disposed on the upper surface of the glass substrate 110, and a plurality of stacked wiring layers 224 and 225 disposed on or within the plurality of stacked insulating layers 212 and 213. If desired, other wiring layers may be formed inside the glass substrate 110 and / or on the lower surface of the glass substrate 110.

[0034] The plurality of via layers 231, 232, and 233 may include: a through-hole layer 231 connecting a first core wiring layer 221 and a second core wiring layer 222 in a core insulating layer 211; and a plurality of connecting via layers 232 and 233 connecting a plurality of stacked wiring layers 224 and 225 in a plurality of stacked insulating layers 212 and 213, connecting the plurality of stacked wiring layers 224 and 225 to wiring layer 223, and connecting the plurality of stacked wiring layers 224 and 225 to the first core wiring layer 221. If desired, a through-hole layer or the like connected to wiring layer 223 may also be formed in the glass substrate 110.

[0035] A first passivation layer 241 covering the uppermost (outermost) stacked wiring layer 225 of a plurality of stacked wiring layers 224 and 225 may be disposed on the upper surface of a stacked insulating layer 213, which is disposed on the uppermost (outermost) of a plurality of stacked insulating layers 212 and 213. The first passivation layer 241 may have a plurality of first openings h1, each exposing at least a portion of the uppermost stacked wiring layer 225 of the plurality of stacked wiring layers 224 and 225. Additionally, a second passivation layer 242 covering the second core wiring layer 222 may be disposed on the lower surface of the core insulating layer 211. The second passivation layer 242 may have a plurality of second openings h2, each exposing at least a portion of the second core wiring layer 222.

[0036] In the following description, the components of the printed circuit board 500A according to an exemplary embodiment will be described in more detail with reference to the accompanying drawings.

[0037] The glass substrate 110 and the protective material 150 are substantially the same as those described above, therefore, redundant descriptions will be omitted.

[0038] The core insulation layer 211 may include an organic insulating material. The organic insulating material may include thermosetting resins such as epoxy resins, thermoplastic resins such as polyimides, or materials prepared by impregnating inorganic fillers, organic fillers, and / or glass fibers (such as glass cloth, for example) in a resin. For example, the organic insulating material may be copper-clad laminate (CCL), prepreg (PPG), etc., but this disclosure is not limited thereto. The core insulation layer 211 may be thicker than each of the plurality of stacked insulating layers 212 and 213. The core insulation layer 211 may be divided into multiple layers as needed.

[0039] Each of the plurality of stacked insulating layers 212 and 213 may include an organic insulating material. The organic insulating material may include thermosetting resins such as epoxy resins, thermoplastic resins such as polyimides, or materials prepared by impregnating inorganic fillers, organic fillers, and / or glass fibers (such as glass fabrics, for example, glass cloth) in a resin. For example, the organic insulating material may be a prepreg (PPG), an ajinomoto laminate (ABF), a photosensitive dielectric (PID), etc., but this disclosure is not limited thereto. The plurality of stacked insulating layers 212 and 213 may be formed using substantially the same material, but this disclosure is not limited thereto.

[0040] Each of the first wiring layer 221, the second wiring layer 222, and the interconnect wiring layer 223 may include a metal. The metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. Preferably, the metal may include copper (Cu), but this disclosure is not limited thereto. Each of the first wiring layer 221, the second wiring layer 222, and the interconnect wiring layer 223 may perform various functions according to the design. For example, the first wiring layer 221, the second wiring layer 222, and the interconnect wiring layer 223 may include signal patterns, power patterns, and ground patterns. Each pattern may have various shapes such as lines, planes, and pads. Each of the first wiring layer 221, the second wiring layer 222, and the interconnect wiring layer 223 may include a seed layer and a plating layer. The seed layer may be formed by electroless plating (e.g., electroless copper plating) or, if desired, by a sputtering process. Alternatively, both electroless plating and sputtering processes may be used to form the seed layer. The coating can be formed by electroplating (e.g., electroplating copper).

[0041] Each of the plurality of stacked wiring layers 224 and 225 may include a metal. The metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. Preferably, the metal may include copper (Cu), but this disclosure is not limited thereto. Each of the plurality of stacked wiring layers 224 and 225 may perform various functions depending on the design. For example, stacked wiring layers 224 and 225 may include signal patterns, power patterns, and ground patterns. These patterns may have various shapes such as lines, planes, and pads. Each of the plurality of stacked wiring layers 224 and 225 may include a seed layer and a plating layer. The seed layer may be formed by electroless plating (e.g., electroless copper plating), or, if desired, by a sputtering process. Alternatively, both electroless plating and sputtering processes may be used to form the seed layer. The plating layer may be formed by electrolytic plating (e.g., electrolytic copper plating).

[0042] The through-hole layer 231 may include a metal. The metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. Preferably, the metal may include copper (Cu), but this disclosure is not limited thereto. The through-hole layer 231 may include a plurality of through-holes penetrating between the upper and lower surfaces of the core insulating layer 211, thereby providing an electrical connection path in a first direction within the core insulating layer 211. Each of the plurality of through-holes may perform various functions depending on the design. For example, the plurality of through-holes may include signal vias, power vias, and ground vias. The through-hole layer 231 may include a seed layer and a plating layer. The seed layer may be formed by electroless plating (e.g., electroless copper plating), or, if desired, by a sputtering process. Alternatively, both electroless plating and sputtering processes may be used to form the seed layer. The plating layer may be formed by electrolytic plating (e.g., electrolytic copper plating).

[0043] Each of the plurality of connection via layers 232 and 233 may include a metal. The metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. Preferably, the metal may include copper (Cu), but this disclosure is not limited thereto. Each of the plurality of connection via layers 232 and 233 may include a plurality of connection vias penetrating at least a portion of each of the plurality of stacked insulating layers 212 and 213, thereby providing an electrical connection path in a first direction in each of the plurality of stacked insulating layers 212 and 213. Each of the plurality of connection vias may perform various functions according to design. For example, connection vias may include signal vias, power vias, and ground vias. The plurality of connection vias may include filled vias in which the vias are filled with metal, but may also include conformal vias in which the metal is disposed along the wall surface of the via. Each of the plurality of connection vias may have a tapered shape in cross-section. For example, the plurality of connection vias may have a tapered shape in which the width of the upper surface of the plurality of connection vias is wider than the width of the lower surface of the plurality of connection vias. The plurality of connection via layers 232 and 233 may include the same seed layer and plating layer as those included in the plurality of wiring layers 224 and 225, but this disclosure is not limited thereto.

[0044] Each of the first passivation layer 241 and the second passivation layer 242 may include an organic insulating material. The organic insulating material may include a thermosetting resin such as epoxy resin, a thermoplastic resin such as polyimide, or a material prepared by impregnating inorganic fillers, organic fillers, and / or glass fibers (such as glass fabric, for example, glass cloth) in a resin. For example, the organic insulating material may be an ajinomoto deposit film (ABF), solder resist (SR), etc., but this disclosure is not limited thereto. The first passivation layer 241 and the second passivation layer 242 may each have a plurality of first openings h1 and a plurality of second openings h2. The pad patterns exposed through the plurality of first openings h1 and the plurality of second openings h2 may be in the form of solder mask defined (SMD) and / or non-solder mask defined (NSMD), but this disclosure is not limited thereto.

[0045] Figure 7 This is a schematic cross-sectional view illustrating another example of a printed circuit board.

[0046] Reference Figure 7According to another example embodiment, the printed circuit board 500B may include: a plurality of insulating layers 311, 312, 313, 314, 315, and 316; a plurality of wiring layers 321, 322, 323, 324, 325, and 326, respectively disposed on or within the plurality of insulating layers 311, 312, 313, 314, 315, and 316; and a plurality of via layers 331, 332, 333, 334, 335, and 326. 36, which penetrates at least one of a plurality of insulating layers 311, 312, 313, 314, 315, and 316 and is connected to at least one of a plurality of wiring layers 321, 322, 323, 324, 325, and 326 respectively; a glass substrate 110, which is at least partially disposed between the plurality of insulating layers 311, 312, 313, 314, 315, and 316 in a first direction; a protective material 150, which covers the side surface of the glass substrate 110; and a through-hole layer 330, which penetrates the glass substrate 110. The structure including at least one of a plurality of insulating layers 311, 312, 313, 314, 315, and 316, at least one of a plurality of wiring layers 321, 322, 323, 324, 325, and 326, and at least one of a plurality of through-hole layers 331, 332, 333, 334, 335, and 336 can be, for example, a wiring structure. Each of the plurality of insulating layers 311, 312, 313, 314, 315, and 316 may contact at least a portion of the central portion of the upper surface and at least a portion of the central portion of the lower surface of the glass substrate 110. Microcircuits may be formed on the glass substrate 110. The glass substrate 110 may be included as the core insulating layer of a multilayer printed circuit board.

[0047] The plurality of insulating layers 311, 312, 313, 314, 315, and 316 may include a plurality of first insulating layers 311, 312, and 313 stacked on the upper surface of the glass substrate 110 and a plurality of second insulating layers 314, 315, and 316 disposed on the lower surface of the glass substrate 110. Side surfaces of the glass substrate 110 may protrude from at least one of the side surfaces of the plurality of first insulating layers 311, 312, and 313 and the plurality of second insulating layers 314, 315, and 316 based on a second or third direction. Protective material 150 may extend to the upper and lower surfaces of the glass substrate 110, thereby covering at least a portion of the side surfaces of at least one of the plurality of first insulating layers 311, 312, and 313 and the plurality of second insulating layers 314, 315, and 316.

[0048] The plurality of wiring layers 321, 322, 323, 324, 325, and 326 may include a plurality of first wiring layers 321, 322, and 323 respectively disposed on or within a plurality of first insulating layers 311, 312, and 313, and a plurality of second wiring layers 324, 325, and 326 respectively disposed on or within a plurality of second insulating layers 314, 315, and 316. If desired, the wiring layers may also be formed inside the glass substrate 110. Additionally, if desired, the wiring layers may also be formed on the upper and / or lower surfaces of the glass substrate 110.

[0049] The plurality of via layers 331, 332, 333, 334, 335, and 336 may include a plurality of first via layers 331, 332, and 333 configured to be connected to at least one of the first wiring layers 321, 322, and 323 in a plurality of first insulating layers 311, 312, and 313, respectively, and a plurality of second via layers 334, 335, and 336 configured to be connected to at least one of the plurality of second wiring layers 324, 325, and 326 in a plurality of second insulating layers 314, 315, and 316, respectively. A through-hole layer 330 may be disposed inside the glass substrate 110, and the through-hole layer 330 is configured to connect the first via layer 331 disposed on the lowermost (innermost) side of the plurality of first via layers 331, 332, and 333 and the second via layer 334 disposed on the uppermost (innermost) side of the plurality of second via layers 334, 335, and 336.

[0050] A third passivation layer 341 covering the uppermost first wiring layer 323 of the plurality of first wiring layers 321, 322, and 323 may be disposed on the upper surface of the uppermost first insulating layer 313 of the plurality of first insulating layers 311, 312, and 313. The third passivation layer 341 may have a plurality of third openings h3, each of which exposes at least a portion of the uppermost first wiring layer 323 of the plurality of first wiring layers 321, 322, and 323. Additionally, a fourth passivation layer 342 covering the lowermost (outermost) second wiring layer 326 of the plurality of second insulating layers 314, 315, and 316 may be disposed on the lower surface of the lowermost (outermost) second insulating layer 316 of the plurality of second wiring layers 324, 325, and 326. The fourth passivation layer 342 may have a plurality of fourth openings h4, which expose at least a portion of the lowermost second wiring layer 326 of the plurality of second wiring layers 324, 325 and 326 respectively.

[0051] In the following description, the components of a printed circuit board 500B according to another exemplary embodiment will be described in more detail with reference to the accompanying drawings.

[0052] The glass substrate 110 and the protective material 150 are substantially the same as those described above, therefore, redundant descriptions will be omitted.

[0053] Each of the first insulating layers 311, 312, and 313 and the second insulating layers 314, 315, and 316 may comprise an organic insulating material. The organic insulating material may comprise a thermosetting resin such as epoxy resin, a thermoplastic resin such as polyimide, or a material prepared by impregnating inorganic fillers, organic fillers, and / or glass fibers (such as glass fabric, for example, glass cloth) in a resin. For example, the organic insulating material may be a prepreg (PPG), an ajinomoto laminate (ABF), a photosensitive dielectric (PID), etc., but this disclosure is not limited thereto. The plurality of first insulating layers 311, 312, and 313 and the plurality of second insulating layers 314, 315, and 316 may be formed using substantially the same material, but this disclosure is not limited thereto. The plurality of first insulating layers 311, 312, and 313 and the plurality of second insulating layers 314, 315, and 316 may have the same number of layers as each other, but this disclosure is not limited thereto.

[0054] Each of the plurality of first wiring layers 321, 322, 323 and the plurality of second wiring layers 324, 325, and 326 may include a metal. The metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. Preferably, the metal may include copper (Cu), but this disclosure is not limited thereto. The plurality of wiring layers 321, 322, 323, 324, 325, and 326 may perform various functions according to design. For example, the first wiring layers 321, 322, 323 and the second wiring layers 324, 325, and 326 may include signal patterns, power patterns, and ground patterns. These patterns may have various shapes such as lines, planes, and pads. The plurality of first wiring layers 321, 322, 323 and the plurality of second wiring layers 324, 325, and 326 may each include a seed layer and a plating layer. The seed layer can be formed by electroless plating (e.g., electroless copper plating) or, if desired, by sputtering. Alternatively, both electroless plating and sputtering processes can be used to form the seed layer. The plating layer can be formed by electrolytic plating (e.g., electrolytic copper plating).

[0055] The through-hole layer 330 may include a metal. The metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. Preferably, the metal may include copper (Cu), but this disclosure is not limited thereto. The through-hole layer 330 may include a plurality of through-holes extending between the upper and lower surfaces of the glass substrate 110, thereby providing an electrical connection path in a first direction within the glass substrate 110. Each of the plurality of through-holes may perform various functions depending on the design. For example, the plurality of through-holes may include signal vias, power vias, and ground vias. The through-hole layer 330 may include a seed layer and a plating layer. The seed layer may be formed by electroless plating (e.g., electroless copper plating), or, if desired, by a sputtering process. Alternatively, both electroless plating and sputtering processes may be used to form the seed layer. The plating layer may be formed by electrolytic plating (e.g., electrolytic copper plating).

[0056] Each of the first via layers 331, 332, 333 and the second via layers 334, 335, and 336 may include a metal. The metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. Preferably, the metal may include copper (Cu), but this disclosure is not limited thereto. The plurality of first via layers and the plurality of second via layers 331, 332, 334, 335, and 336 may include a plurality of connection vias penetrating at least a portion of each of the plurality of first insulating layers 311, 312, and 313 and the plurality of second insulating layers 314, 315, and 316, thereby providing an electrical connection path in a first direction in each of the plurality of first insulating layers 311, 312, and 313 and the plurality of second insulating layers 314, 315, and 316. The plurality of connection vias may perform various functions according to the design. For example, connection vias may include signal vias, power vias, and ground vias. The plurality of connection vias may include filled vias in which the vias are filled with metal, but may also include conformal vias in which the metal is disposed along the wall surface of the vias. Each of the plurality of connection vias may have a tapered shape in cross-section. For example, the plurality of connection vias in the plurality of first via layers 331, 332 and 333 may have a tapered shape in which the width of their upper surface is wider than the width of their lower surface, and the plurality of connection vias in the plurality of second via layers 334, 335 and 336 may have a tapered shape in which the width of their lower surface is wider than the width of their upper surface. Each of the plurality of first via layers 331, 332 and 333 and the plurality of second via layers 334, 335 and 336 may include the same seed layer and plating as those included in the plurality of first wiring layers 321, 322 and 323 and the plurality of second wiring layers 324, 325 and 326, but this disclosure is not limited thereto.

[0057] Each of the third passivation layer 341 and the fourth passivation layer 342 may include an organic insulating material. The organic insulating material may include thermosetting resins such as epoxy resins, thermoplastic resins such as polyimides, or materials prepared by impregnating inorganic fillers, organic fillers, and / or glass fibers (such as glass fabrics, for example, glass cloth) in a resin. For example, the organic insulating material may be an ajinomoto deposit film (ABF), solder resist (SR), etc., but this disclosure is not limited thereto. The third passivation layer 341 and the fourth passivation layer 342 may each have a plurality of third openings h3 and a plurality of fourth openings h4. The pad patterns exposed through the plurality of third openings h3 and the plurality of fourth openings h4 may be in the form of solder mask defined (SMD) and / or non-solder mask defined (NSMD), but this disclosure is not limited thereto.

[0058] In this disclosure, the term "cover" can include covering at least a portion and covering the entirety, and can also include not only direct coverage but also indirect coverage. Furthermore, the term "fill" can include not only complete filling but also partial filling, in other words, substantial filling. For example, this could include the presence of holes or gaps. Additionally, the term "surround" can include not only complete surrounding but also partial and substantial surrounding. Furthermore, the term "expose" can include not only complete exposure but also partial exposure, and exposure can mean exposure from the component's filling. For example, exposing pads through openings can mean exposing pads from a resist layer, and surface treatment layers, etc., can be further disposed on the exposed pads.

[0059] In this disclosure, the placement within the through portion or cavity can include not only the case where the object is completely placed within the through portion or cavity, but also the case where the object protrudes upward or downward in the cross section.

[0060] In this disclosure, determination can be performed by including process errors, positional deviations, and measurement errors, which may substantially occur in the manufacturing process. For example, a generally circular shape may include not only a perfectly circular shape but also a generally circular shape. Similarly, a generally right-angled shape may include not only a perfectly right-angled shape but also an approximately right-angled shape with some corners. This can be determined, for example, based on the overall shape as the general shape.

[0061] In this disclosure, "the same insulating material" can mean not only that the insulating material is identical, but also that it includes the same type of insulating material. Therefore, the composition of the insulating materials is substantially the same, but their specific composition ratios may differ slightly.

[0062] In this disclosure, the term "section" can refer to a section when an object is cut vertically, or a section when the object is viewed from a side view. Furthermore, the term "plane" can refer to a plane when an object is cut horizontally, or a plane when the object is viewed from a top or bottom view.

[0063] In this disclosure, for convenience, the term "lower" in "lower side," "lower part," and "lower surface" refers to the downward direction relative to the cross-section in the drawings, and the term "upper side," "upper part," and "upper surface" refers to the opposite direction. However, this definition of direction is for ease of explanation, and the scope of the claims is not specifically limited by the description of the direction, and the concepts of upper / lower can be changed at any time.

[0064] In this disclosure, "connection" includes not only direct connections but also indirect connections such as those via adhesive layers. Furthermore, expressions such as "first" and "second" are used to distinguish one component from another and do not limit the order and / or importance of the components. In some instances, without departing from the scope of the claims, the first component may be referred to as the second component, or similarly, the second component may be referred to as the first component.

[0065] In this disclosure, thickness, width, length, depth, linewidth, gap, pitch, spacing, surface roughness, etc., can be measured using scanning electron microscopy, optical microscopy, etc., based on a cross-section of a polished or cut printed circuit board. The cross-section can be a vertical or horizontal cross-section, and each value can be measured based on the desired cross-section. For example, the width of the upper and / or lower portion of a via can be measured on a cross-section that has been cut along the central axis of the via. In this case, when the value is not constant, it can be determined as the average of the values ​​measured at any five points.

[0066] The term "example embodiment" as used in this disclosure does not imply the same embodiment, but is provided to illustrate different unique features. However, the example embodiments presented above do not preclude implementation through combinations of features with other example embodiments. For example, even if matters described in a particular example embodiment are not described in other example embodiments, they may be understood as descriptions relating to other example embodiments, unless there are descriptions that contradict or contradict matters in other example embodiments.

[0067] The terminology used in this disclosure is for describing exemplary embodiments only and is not intended to limit the disclosure. In this context, singular expressions include plural expressions unless they are explicitly distinguished in the context.

Claims

1. A printed circuit board, comprising: Multiple insulating layers; Multiple wiring layers are respectively disposed on or within the multiple insulating layers; A plurality of via layers, each of the plurality of via layers penetrating at least one of the plurality of insulating layers, and each of the plurality of via layers being connected to at least one of the plurality of wiring layers; A glass substrate has a first surface and a second surface opposite to each other in a first direction, a first side surface and a second side surface opposite to each other in a second direction perpendicular to the first direction, and a third side surface and a fourth side surface opposite to each other in a third direction perpendicular to the first and second directions, wherein the glass substrate is at least partially disposed between the plurality of insulating layers in the first direction. as well as A protective material covers the first side surface to the fourth side surface of the glass substrate. Each of the first and second surfaces of the glass substrate has a peripheral portion connected to the first side surface to the fourth side surface and a central portion surrounded by the peripheral portion. The protective material is spaced apart from the central portions of the first surface and the second surface of the glass substrate, respectively.

2. The printed circuit board according to claim 1, in, The protective material is spaced apart from the peripheral portions of the first surface and the second surface of the glass substrate, and The protective material protrudes in a generally rounded shape from each of the first side surface to the fourth side surface of the glass substrate based on the second direction or the third direction.

3. The printed circuit board according to claim 1, in, The protective material extends to the peripheral portions of the first surface and the second surface of the glass substrate, and The protective material protrudes in a generally rounded shape from each of the first side surface to the fourth side surface of the glass substrate based on the second direction or the third direction.

4. The printed circuit board according to claim 1, in, The protective material extends to the peripheral portions of the first surface and the second surface of the glass substrate, and The protective material protrudes in a generally right-angled shape from each of the first side surface to the fourth side surface of the glass substrate based on the second direction or the third direction.

5. The printed circuit board according to claim 1, in, One of the plurality of insulating layers and another of the plurality of insulating layers are in contact with at least a portion of the central portion of the first surface and at least a portion of the central portion of the second surface of the glass substrate, respectively.

6. The printed circuit board according to claim 1, in, The protective material includes one or more of sealant-based materials and synthetic rubber-based materials. The sealant-based material includes one or more of epoxy resin, silicone, acrylic acid, and urethane. The synthetic rubber-based material includes one or more of rubber and polyethylene.

7. The printed circuit board according to claim 1, in, The protective material includes epoxy resin.

8. The printed circuit board according to claim 1, in, The protective material includes materials based on synthetic rubber, and The synthetic rubber-based material includes one or more of rubber and polyethylene.

9. The printed circuit board according to claim 1, wherein, The glass substrate is a panel substrate or a single unit substrate.

10. The printed circuit board according to claim 1, in, The plurality of insulating layers includes a core insulating layer and a plurality of stacked insulating layers stacked on a first surface of the core insulating layer, and The glass substrate and the protective material are embedded in at least one of the core insulating layer and the plurality of stacked insulating layers.

11. The printed circuit board according to claim 10, in, The core insulating layer has a cavity extending through at least a portion of the core insulating layer from the first surface in the first direction. The glass substrate and the protective material are disposed in the cavity, and At least one of the plurality of stacked insulating layers covers at least a portion of each of the glass substrate and the protective material and fills at least a portion of the cavity.

12. The printed circuit board according to claim 11, in, The plurality of wiring layers includes: a first core wiring layer disposed on the first surface of the core insulating layer; a second core wiring layer disposed on the second surface of the core insulating layer; a wiring layer disposed on the first surface of the glass substrate; and a plurality of stacked wiring layers disposed on or within the plurality of stacked insulating layers. The plurality of via layers includes: a through-via layer that connects the first core wiring layer and the second core wiring layer to each other in the core insulating layer; and a plurality of connecting via layers that connect the plurality of stacked wiring layers, connect the plurality of stacked wiring layers to the wiring layer, and connect the plurality of stacked wiring layers to the first core wiring layer in the plurality of stacked insulating layers.

13. The printed circuit board according to claim 12, further comprising: A first passivation layer is disposed on a first surface of the outermost stacked insulating layer among the plurality of stacked insulating layers. The first passivation layer has a plurality of first openings, each of which exposes at least a portion of the outermost stacked wiring layer among the plurality of stacked wiring layers. A second passivation layer is disposed on the second surface of the core insulation layer and has a plurality of second openings that expose at least a portion of the second core wiring layer.

14. The printed circuit board according to claim 1, wherein, The plurality of insulating layers includes a plurality of first insulating layers stacked on the first surface of the glass substrate and a plurality of second insulating layers disposed on the second surface of the glass substrate. The protective material protrudes from the side surface of at least one of the plurality of first insulating layers and the plurality of second insulating layers based on the second direction or the third direction.

15. The printed circuit board according to claim 14, in, The protective material covers at least a portion of the side surface of at least one of the plurality of first insulating layers and the plurality of second insulating layers.

16. The printed circuit board according to claim 14, in, The plurality of wiring layers includes a plurality of first wiring layers respectively disposed on or within the plurality of first insulating layers, and a plurality of second wiring layers respectively disposed on or within the plurality of second insulating layers. The plurality of via layers includes: a plurality of first via layers, each connected to at least one of the plurality of first wiring layers in the plurality of first insulating layers; a plurality of second via layers, each connected to at least one of the plurality of second wiring layers in the plurality of second insulating layers; and a through via layer, penetrating the glass substrate and connected in the glass substrate to the innermost first via layer and the innermost second via layer among the plurality of first via layers.

17. The printed circuit board of claim 16, further comprising: A third passivation layer is disposed on the first surface of the outermost first insulating layer among the plurality of first insulating layers. The third passivation layer has a plurality of third openings, each of which exposes at least a portion of the outermost first wiring layer among the plurality of first wiring layers. as well as A fourth passivation layer is disposed on the second surface of the outermost second insulating layer among the plurality of second insulating layers, the fourth passivation layer having a plurality of fourth openings, the plurality of fourth openings respectively exposing at least a portion of the outermost second wiring layer among the plurality of second wiring layers.

18. A printed circuit board, comprising: A glass substrate has a first surface and a second surface that are opposite to each other in a first direction, a first side surface and a second side surface that are opposite to each other in a second direction perpendicular to the first direction, and a third side surface and a fourth side surface that are opposite to each other in a third direction perpendicular to the first direction and the second direction. A protective material covers the first side surface to the fourth side surface of the glass substrate; as well as A wiring structure is disposed on at least one of the first surface and the second surface of the glass substrate. Each of the first and second surfaces of the glass substrate has a peripheral portion connected to the first side surface to the fourth side surface and a central portion surrounded by the peripheral portion. The protective material further covers at least a portion of the peripheral portion of the first surface of the glass substrate and at least a portion of the peripheral portion of the second surface of the glass substrate, and The protective material is spaced apart from the central portion of each of the first and second surfaces of the glass substrate.

19. The printed circuit board according to claim 18, in, The wiring structure includes one or more insulating layers, one or more wiring layers disposed on or within the one or more insulating layers, and one or more via layers connecting the one or more wiring layers.

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