Gate driving signal output system and method

Abstract

The invention belongs to the technical field of display driving chips, and particularly discloses a grid driving signal output system and method, and the system comprises a configuration unit and a signal generation unit. The configuration unit receives an offset parameter of a target start position of at least one gate drive signal relative to a reference point, the reference point being set as a timing point associated with a start boundary of a vertical effective display area of the display panel; and the signal generation unit determines a corresponding starting time sequence of each gate driving signal according to the reference point and the offset parameter, and outputs the corresponding gate driving signal based on the starting time sequence. According to the invention, the reference point associated with the starting boundary of the vertical effective display area is matched with the offset parameter, so that flexible and accurate configuration of the gate driving signal starting time sequence is realized, display panels with different vertical blanking time sequences are effectively adapted, the adaptation efficiency is improved, the cost is reduced, and the display stability is ensured.

Description

Technical Field

[0001] This invention belongs to the field of display driver chip technology, and specifically relates to a gate drive signal output system and method. Background Technology

[0002] GOA (Gate Driver on Array) technology, a core driving technology in the flat panel display field, integrates the gate driving circuit onto the display panel substrate, effectively reducing the number of external ICs, lowering production costs, and enabling narrow bezel designs. It has been widely applied in LCD and OLED display panels. Its core principle is to control the conduction and cutoff of TFT transistors in the pixel circuit by outputting a horizontal scanning signal from the gate driving array, achieving precise pixel driving. The key lies in ensuring display smoothness and stability through precise timing control.

[0003] In the existing GOA architecture, the timing configuration of the gate drive signal startup is based on the start of each frame, i.e., the VS position, and the output time is determined according to the number of rows following each signal relative to this reference point. Although this method can configure different toggle start points for different signals and has basic flexibility, when driving display panels with the same glass substrate and core timing but different vertical blanking trailing edge (VBP) lengths, such as screens of different sizes, the reference point and VBP are strongly correlated, requiring a complete redesign of the signal configuration parameters for different VBP parameters.

[0004] This adaptation method significantly increases the R&D and debugging cycle and manpower costs, and frequent parameter adjustments can easily introduce configuration errors, affecting driver stability. As display products develop towards multi-size and customized directions, the demand for adaptation flexibility of the GOA architecture is increasing, and the existing configuration schemes that rely on VBP parameters can no longer meet the industry's needs for efficient adaptation. Summary of the Invention

[0005] To address this issue, the present invention provides a gate drive signal output system and method to solve the aforementioned technical problems.

[0006] According to one aspect of the present invention, a gate drive signal output system is provided for driving control of a display panel, the system comprising a configuration unit and a signal generation unit;

[0007] The configuration unit is configured to: receive a target start position offset parameter relative to a reference point for receiving at least one gate drive signal; wherein the reference point is set as a timing point associated with the starting boundary of the vertical effective display area of ​​the display panel;

[0008] The signal generation unit is configured to: determine the corresponding startup timing of each of the at least one gate drive signal according to the reference point and the offset parameter, and output the corresponding gate drive signal based on the startup timing.

[0009] In one possible implementation, the reference point corresponds to the end point of the vertical blanking trailing edge of the display panel, or the start point of the vertical effective display area, or the effective start point of the data enable signal.

[0010] In one possible implementation, the offset parameter includes a direction identifier and a displacement amount;

[0011] The direction indicator is used to indicate whether the target start position is ahead or behind the reference point in terms of timing.

[0012] The displacement is used to indicate the degree of temporal offset of the target starting position relative to the reference point.

[0013] In one possible implementation, the configuration unit is further configured to: store multiple sets of configuration information, each set of configuration information defining a set of offset parameters of interrelated gate drive signals, and adapt to display panels with different vertical blanking timings by calling different sets of configuration information.

[0014] In one possible implementation, the configuration unit includes a register group for storing the offset parameters and the configuration information group.

[0015] In one possible implementation, the signal generation unit includes a timing controller and / or a gate drive circuit, the timing controller being used to generate a control signal containing the startup timing, and the gate drive circuit generating and outputting the gate drive signal based on the control signal.

[0016] In another aspect, this application also provides a gate drive signal output method, applied to the aforementioned gate drive signal output system, the method comprising:

[0017] Configuration steps: Set a reference point and configure an offset parameter of the target start position of at least one gate drive signal relative to the reference point; wherein the reference point is set as a timing point associated with the start boundary of the vertical effective display area of ​​the display panel;

[0018] Generation and output steps: Based on the reference point and the offset parameter, determine the corresponding startup timing of each of the at least one gate drive signal, and generate and output the corresponding gate drive signal based on the startup timing.

[0019] In one possible implementation, the offset parameter in the configuration step includes a direction identifier and a displacement amount;

[0020] The direction indicator is configured to indicate whether the target start position is ahead or behind the reference point in time.

[0021] The displacement is configured to indicate the degree of temporal offset of the target starting position relative to the reference point.

[0022] In one possible implementation, the configuration step further includes: providing multiple sets of predefined configuration information, each set of configuration information defining a set of interrelated offset parameters for gate drive signals;

[0023] The generation and output steps include: in response to the vertical blanking timing of the display panel to be driven, selecting a corresponding set from the multiple sets of configuration information, and determining the start-up timing of each gate drive signal based on the offset parameter in the selected configuration information and the reference point.

[0024] In one possible implementation, the reference point is the valid starting point of the data enable signal;

[0025] The direction indicator of the offset parameter indicates whether the target start position is before or after the effective start point of the data enable signal;

[0026] Based on the effective start point of the data enable signal, and based on the direction identifier and displacement, the specific start time point of each gate drive signal in the frame timing is calculated and determined.

[0027] This invention eliminates the dependence on VBP in traditional architectures by using a timing point associated with the starting boundary of the vertical effective display area as a reference, thus solving the pain point of needing to reconfigure for different VBP panels. Through offset parameters composed of direction indicators and displacement amounts, it achieves bidirectional and precise adjustment of the gate drive signal before and after the reference point, broadening the adaptation range of the signal start position. Combined with a storage and retrieval mechanism for multiple sets of predefined configuration information groups, it can quickly adapt to display panels with different vertical blanking timings without changing the relative timing of the signals in the effective display area; simply switching configurations is sufficient. This significantly shortens the R&D and debugging cycle, reduces manpower and material costs, and improves the timing stability of the gate drive and the display quality, meeting the efficient adaptation needs of multi-size and customized display products. Attached Figure Description

[0028] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0029] Other features, objects, and advantages of this application will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings:

[0030] Figure 1 A schematic diagram of the drive control system architecture is provided for embodiments of the present invention.

[0031] Figure 2 This is a schematic diagram of the adaptation process provided for an embodiment of the present invention.

[0032] Figure 3 This is a schematic diagram of a gate drive signal output method according to an embodiment of the present invention.

[0033] Figure 4 This is a timing diagram provided for an embodiment of the present invention. Detailed Implementation

[0034] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0035] It should be noted that all user information (including but not limited to user device information, user personal information, object information corresponding to device usage data, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, device usage data, etc.) involved in all embodiments of this disclosure are information and data authorized by the user or fully authorized by all parties.

[0036] According to an embodiment of the present invention, please refer to Figure 1 , Figure 1 A schematic diagram of the drive control system architecture is provided for an embodiment of the present invention. The gate drive signal output system 100 is applied to the drive control of the display panel, such as integrating a gate driver on an array (GOA) on an array substrate. Exemplarily, the gate drive signal output system can be located inside the driver chip, mainly including a configuration unit 101 and a signal generation unit 102.

[0037] Specifically, the configuration unit primarily handles the reception, storage, and management of offset parameters and configuration information groups, while the signal generation unit, based on the reference point and offset parameters provided by the configuration unit, determines the gate drive signal startup timing and generates and outputs the signals. Working together, they ensure the system can efficiently adapt to display panels with different vertical blanking timings, meeting diverse display driving requirements.

[0038] According to an embodiment of the present invention, during the implementation process, the configuration unit first needs to set a reference point, which is the core reference for subsequently determining the target start position of the gate drive signal. Specifically, the reference point is set as a timing point associated with the starting boundary of the vertical effective display area of ​​the display panel. This setting provides a unified reference for the subsequent configuration of offset parameters and calculation of start timing, ensuring the consistency and accuracy of the calculation of different gate drive signal start positions.

[0039] Optionally, in some embodiments, the reference point may correspond to the end point of the vertical blanking trailing edge of the display panel. The vertical blanking trailing edge is the end position of the VBP region, which is a critical timing point for the transition from the vertical blanking region to the vertically active display region. Using it as a reference point can accurately correlate the starting boundary of the vertically active display region, providing a precise reference starting point for the gate drive signal startup timing. In specific implementations, the specific timing position of the reference point can be determined by detecting the end edge of the timing pulse corresponding to the VBP region in the timing signal of the display panel. For example, the falling edge of the timing signal of the VBP region can be captured by a timing detection circuit, and the time corresponding to the falling edge can be determined as the timing position of the reference point.

[0040] Preferably, in other embodiments, the reference point may correspond to the starting point of the vertically active display area. The vertically active display area, i.e., the starting position of the active area, is directly related to the effective display start time of the display panel. Using this as the reference point ensures that the timing of the gate drive signal activation is closely aligned with the effective display process, guaranteeing normal output of the displayed image. Specifically, this can be achieved by identifying the effective start pulse signal corresponding to the active area in the display panel timing, and setting the rising edge of this pulse signal as the timing position of the reference point. This setting method directly correlates to the start of effective display, simplifying the subsequent calculation logic of the activation timing.

[0041] Optionally, in a preferred embodiment of the present invention, the reference point corresponds to the effective start point of the data enable signal. The data enable signal, i.e., the DE signal, has a fixed timing correlation between its effective start point and the starting boundary of the vertical effective display area, and can accurately reflect the starting timing of the vertical effective display area. Using the effective start point of the DE signal as the reference point has the advantages of convenient timing detection and high accuracy, and is easier to implement and more stable in practical applications. In specific implementation, the level change of the DE signal can be monitored in real time by the data enable signal detection circuit. When the DE signal is detected to jump from an invalid level to an effective level, the jump moment is determined as the timing position of the reference point. This detection process is rapid and can accurately capture the timing information of the reference point.

[0042] According to an embodiment of the present invention, the configuration unit is configured to receive an offset parameter of the target start position of at least one gate drive signal relative to a reference point. This offset parameter is key information for determining the specific start position of the gate drive signal. In a specific implementation, the configuration unit can receive the offset parameter through a communication interface with an external control device, such as the main control unit of a display control chip. The communication interface can adopt commonly used serial communication interfaces such as SPI and I2C to ensure the stability and reliability of the offset parameter transmission.

[0043] The external control device determines the offset parameters of each gate drive signal relative to the reference point based on the specific display requirements of the display panel and the design requirements of the gate drive signal. It then sends these parameters to the configuration unit via the communication interface. After receiving the offset parameters, the configuration unit verifies them to ensure their integrity and validity. For example, it verifies whether the parameter format conforms to the preset specifications and whether the parameter value is within a reasonable range. After the verification is successful, the offset parameters are stored in the internal storage module for subsequent use by the signal generation unit.

[0044] According to an embodiment of the present invention, the offset parameter includes a direction identifier and a displacement amount. The direction identifier is used to indicate whether the target start position is ahead or behind the reference point in timing. The configuration of this parameter realizes bidirectional offset adjustment of the gate drive signal start position relative to the reference point, breaking through the limitation of the traditional architecture that the start position can only be adjusted in a single direction.

[0045] In practical implementation, the direction identifier can be represented using binary logic signals. For example, setting the direction identifier to 1 indicates that the target start position is ahead of the reference point in timing; setting the direction identifier to 0 indicates that the target start position is behind the reference point in timing. The binary identifier method is simple and efficient, facilitating logic processing in the configuration unit and timing calculations in the signal generation unit. During configuration, the external control device determines the offset direction of each signal relative to the reference point based on the design requirements of the gate drive signals, and then generates the corresponding direction identifier signal, which is sent to the configuration unit for storage. For example, for gate drive signals that need to start before the reference point, the direction identifier is configured as 1; for gate drive signals that need to start after the reference point, the direction identifier is configured as 0.

[0046] The displacement is used to indicate the degree of timing offset of the target start position relative to the reference point. The configuration of this parameter realizes the quantitative adjustment of the gate drive signal start position. In specific implementation, the displacement can be represented by a digital quantization value, and its quantization unit can be set according to the horizontal frequency or pixel clock cycle of the display panel. For example, using the horizontal cycle of the display panel as the quantization unit, the value of the displacement represents the number of horizontal cycles offset relative to the reference point; or using the pixel clock cycle as the quantization unit, the value of the displacement represents the number of pixel clock cycles offset relative to the reference point.

[0047] This quantization configuration method ensures precise control of the offset, meeting the accuracy requirements of different gate drive signals for the start position. During configuration, the external control device calculates the corresponding displacement value based on the actual timing offset between the gate drive signal and the reference point, combined with the set quantization unit, and sends this value to the configuration unit for storage. For example, if a gate drive signal needs to start 3 row cycles before the reference point, and the displacement is quantized in row cycles, then the displacement of this signal is configured as 3; if a gate drive signal needs to start 5 pixel clock cycles after the reference point, then its displacement is configured as 5.

[0048] According to an embodiment of the present invention, the configuration unit is further configured to store multiple sets of configuration information, each set of configuration information defining a set of interrelated gate drive signal offset parameters, which effectively solves the technical problem that reconfiguration is required when adapting to display panels with different vertical blanking timings in the traditional architecture, and greatly improves the system's adaptation efficiency.

[0049] In practical implementation, the configuration unit internally includes a storage module. Preferably, this storage module is a register group, which features fast read / write speed, convenient access, and high stability, meeting the requirements for rapid storage and retrieval of configuration information. The register group is divided into multiple storage areas, each corresponding to a set of configuration information. Each set of configuration information includes the direction identifier and displacement amount corresponding to the associated gate drive signals. For example, the first storage area in the register group stores the first set of configuration information, including the direction identifier and displacement amount corresponding to gate drive signals S1, S2, and S3; the second storage area stores the second set of configuration information, including the direction identifier and displacement amount corresponding to gate drive signals S4, S5, and S6, and so on.

[0050] Regarding the management of configuration information groups, the configuration unit can receive selection instructions for configuration information groups via external control signals and retrieve the corresponding configuration information group from the register group according to the instructions. For example, when the system needs to adapt to a display panel with a specific vertical blanking timing, the external control device sends the corresponding configuration information group selection instruction to the configuration unit based on the VBP region timing parameters of the panel. After receiving the instruction, the configuration unit parses the address information in the instruction through its internal address decoding circuit to determine the storage address of the corresponding configuration information group in the register group, and then reads the corresponding direction identifier and displacement from that address.

[0051] This method of storing and managing multiple sets of configuration information allows the system to adapt to display panels with different vertical blanking timings by calling different sets of configuration information, without changing the relative timing relationship of the gate drive signals for the vertically active display area. In traditional architectures, when faced with screens of the same glass and timing but different sizes, due to the inconsistency of VBP regions, even if the timing is the same, a new set of parameters still needs to be reconfigured, consuming a lot of time and manpower. This invention, however, stores multiple predefined sets of configuration information in a configuration unit. For display panels with different VBP regions, only the corresponding configuration information set needs to be selected to complete the adaptation, without redesigning and configuring parameters. This greatly shortens the adaptation cycle, reduces adaptation costs, and significantly improves the system's adaptability and flexibility.

[0052] At the hardware implementation level, the configuration unit can be designed using an Application-Specific Integrated Circuit (ASIC) or a Field-Programmable Gate Array (FPGA). If an ASIC is used, functional modules such as the reference point detection module, offset parameter receiving module, parameter verification module, register group, and configuration information group management module can be integrated onto a single chip, achieving miniaturization and low-power design of the configuration unit. If an FPGA is used, the logic description and synthesis implementation of each functional module can be performed using hardware description languages ​​such as Verilog HDL or VHDL, offering advantages such as design flexibility and strong reconfigurability, facilitating subsequent functional expansion and optimization.

[0053] In the specific implementation of the register group, static random access memory (SRAM) can be used as the storage medium. SRAM has the characteristics of fast read and write speed and low access latency, which can meet the requirements of fast read and write of configuration information. The address line width of the register group can be designed according to the number of configuration information groups. For example, if the system supports 16 configuration information groups, the address line width is designed to be 4 bits, which can cover the storage address of all configuration information groups. The data line width is designed according to the number of bits of the offset parameter. For example, if the direction indicator is 1 bit and the displacement is 16 bits, the data line width is designed to be 17 bits to ensure that the offset parameter can be completely stored and transmitted.

[0054] According to an embodiment of the present invention, during the implementation process, the signal generation unit determines the corresponding startup timing of each gate drive signal based on the reference point and the offset parameters provided by the configuration unit.

[0055] In practical implementation, the signal generation unit first reads the timing information of the reference point and the corresponding offset parameters, including the direction identifier and displacement, from the configuration unit. The timing information of the reference point is a fixed time value, for example, based on the system clock, the time value corresponding to the reference point is T0. Subsequently, the start time Ts of the gate drive signal is calculated based on the direction identifier and displacement. The specific calculation logic is as follows:

[0056] When the direction indicator is 1, it indicates that the target's starting position is ahead of the reference point in time. The formula for calculating the starting time Ts is:

[0057]

[0058] in, N represents the time length corresponding to the quantization unit of the displacement, and N is the numerical value of the displacement. For example, if the quantization unit of the displacement is the line period, the time length of each line period is 10 μs, and the displacement N is 5, then... At this time, Ts = T0 - 10μs × 5 = T0 - 50μs, that is, the start time of the gate drive signal is 50μs earlier than the reference point.

[0059] When the direction indicator is 0, it indicates that the target's starting position is delayed in time relative to the reference point. The formula for calculating the starting time Ts is as follows:

[0060]

[0061] Using the example above, if the direction indicator is 0 and the displacement N is 5, then Ts = T0 + 10μs×5 = T0 + 50μs, that is, the start time of the gate drive signal is delayed by 50μs compared to the reference point.

[0062] Therefore, based on the start-up timing calculation method of direction indicator and displacement, the start-up position of the gate drive signal can be precisely adjusted. The start-up time can be flexibly set according to different display requirements, ensuring that the timing requirements of the gate drive signal and the display panel are accurately matched.

[0063] In a preferred embodiment of the present invention, the reference point is the effective starting point of the data enable signal. At this time, the direction indicator of the offset parameter indicates that the target start position is before or after the effective starting point of the data enable signal. The generation and output steps specifically include using the effective starting point of the data enable signal as a reference, and calculating and determining the specific start time point of each gate drive signal in the frame timing according to the direction indicator and the displacement.

[0064] In the specific implementation, the signal generation unit first captures the timing Tde of the effective start point of the DE signal, and then calculates the start time Ts based on the direction identifier and displacement.

[0065] For example, when the direction indicator is 1 (i.e., timing advance), the displacement N is a, the quantization unit is a line period, and the time of each line period is... Then Ts = Tde - a× The start time corresponds to the timing position within the VBP region; when the direction indicator is 0 (i.e., timing is delayed) and the displacement N is b, then Ts = Tde + b × The start time corresponds to the timing position within the active region. This implementation method can precisely correlate the effective start point of the DE signal, ensuring that the start timing of the gate drive signal is closely matched with the effective timing of the data enable signal, thus ensuring the accurate transmission and display of display data.

[0066] According to an embodiment of the present invention, after determining the startup timing of each gate drive signal, the signal generation unit generates and outputs the corresponding gate drive signal based on the startup timing. In a specific implementation, the signal generation unit may include a timing controller and a gate drive circuit, which work together to generate and output the signal.

[0067] The timing controller generates control signals containing the startup timing sequence. Its implementation can be achieved using sequential logic circuit design. Based on the calculated startup time Ts, it generates a corresponding control pulse signal. The rising edge of this control pulse signal corresponds to the startup time of the gate drive signal, and the pulse width and amplitude are set according to the gate drive requirements of the display panel. For example, the timing controller can be implemented using a counter and a comparator, with the system clock as the counting reference. When the counter value reaches the count value corresponding to the startup time Ts, the comparator outputs a high-level control signal, which is the control signal containing the startup timing sequence.

[0068] The gate drive circuit generates and outputs a gate drive signal based on the control signal generated by the timing controller. The gate drive circuit can be implemented using a MOSFET drive circuit or a dedicated gate drive chip. After receiving the control signal from the timing controller, it amplifies the signal to the required drive voltage amplitude for the display panel gate and outputs the gate drive signal to the gate line of the display panel according to the timing of the control signal. For example, when the control signal is high, the gate drive circuit outputs a high-level gate drive signal to turn on the corresponding gate; when the control signal is low, the gate drive circuit outputs a low-level gate drive signal to turn off the corresponding gate, thereby realizing line-by-line scanning drive of the gate and ensuring normal display of the display panel.

[0069] In some embodiments, the signal generation unit may also generate and output signals solely through a gate drive circuit. In this case, the gate drive circuit integrates the function of a timing controller, directly reading the reference point and offset parameters from the configuration unit to complete the calculation of the startup timing and the generation and output of signals. This integrated design simplifies the system architecture, reduces hardware costs, and is suitable for applications with strict requirements on system size and cost.

[0070] In some embodiments, to ensure that the output timing of the gate drive signal is synchronized with other timing signals of the display panel, such as data signals and clock signals, the signal generation unit also has a timing synchronization function during implementation. Specifically, a unified system clock signal can be received through a clock synchronization circuit, and each functional module operates based on this unified clock, ensuring that the calculation of the startup timing, the generation of control signals, and the output of the gate drive signal are all synchronized with the system clock.

[0071] Meanwhile, the timing of the generated gate drive signal can be calibrated in real time through a timing calibration circuit. For example, by detecting the timing signal fed back by the display panel and comparing it with the timing of the generated gate drive signal, if there is a timing deviation, the calculation parameters of the startup timing can be adjusted through the calibration circuit to ensure that the timing of the gate drive signal is consistent with the actual requirements of the display panel and to avoid display abnormalities caused by timing deviations.

[0072] According to an embodiment of the present invention, please refer to Figure 2 , Figure 2 The diagram illustrates the adaptation process provided in this embodiment of the invention. When adapting to display panels with different vertical blanking timings, the gate drive signal output system achieves an efficient and convenient adaptation process through the coordinated work of the configuration unit and the signal generation unit.

[0073] Specifically, in S201, system initialization occurs. After the system is powered on, the configuration unit and signal generation unit perform initialization operations. The configuration unit initializes its internal register group, communication interface, and reference point detection module, while the signal generation unit initializes its internal timing calculation module, control signal generation module, and gate drive circuit to ensure that each module is in normal working condition.

[0074] In S202, the display panel parameters are obtained. The external control device obtains the vertical blanking timing parameters of the display panel to be driven, especially the timing parameters of the VBP area. These parameters are used to determine the configuration information set required to adapt to the display panel.

[0075] In S203, a configuration information group is selected. The external control device selects a corresponding configuration information group from multiple groups stored in the configuration unit based on the VBP area timing parameters of the display panel to be driven, and sends a configuration information group selection command to the configuration unit.

[0076] In S204, configuration parameters are read. After receiving the selection instruction, the configuration unit parses the address information in the instruction, reads the offset parameters (direction identifier and displacement) from the corresponding configuration information group in the register group, and determines the corresponding reference point timing information.

[0077] In S205, the startup timing is calculated. The signal generation unit reads the reference point timing information and offset parameters from the configuration unit, and calculates the startup time Ts of each gate drive signal according to the preset calculation logic based on the direction identifier and displacement.

[0078] In S206, signal generation and output occur. The timing controller of the signal generation unit generates a control signal based on the calculated start-up time. The gate drive circuit generates a gate drive signal based on this control signal and outputs it to the gate line of the display panel to realize the drive control of the display panel.

[0079] In S207, adaptation verification and adjustment are performed. After the system drives the display panel, the display quality is detected by the display effect detection module. If there are display abnormalities such as screen misalignment or flickering, the configuration information group or offset parameters are adjusted through an external control device, and steps 203 to 206 are re-executed until the display effect meets the requirements.

[0080] Therefore, the system can quickly adapt to display panels with different vertical blanking timings without changing the relative timing relationship of the gate drive signals corresponding to the vertical effective display area. Adaptation can be completed simply by selecting the corresponding configuration information group, which significantly improves adaptation efficiency and reduces adaptation costs compared to traditional architectures. For example, when facing two display panels, case1 and case2, with different VBP regions but the same timing, the traditional architecture requires configuring two different sets of parameters, such as d, e, f and x, y, z, respectively. However, the system of this invention only needs to call two corresponding configuration information groups from the configuration unit. Each configuration information group contains the offset parameters required by the panel, such as a and b, to complete the adaptation of the two panels. There is no need to redesign and configure parameters, which significantly saves adaptation time and manpower costs.

[0081] The gate drive signal output process will be further explained below with reference to the method embodiments.

[0082] Please see Figure 3 , Figure 3 This is a schematic diagram of a gate drive signal output method according to an embodiment of the present invention. Applied to the above-mentioned gate drive signal output system, its specific implementation process includes configuration steps and generation and output steps.

[0083] Specifically, in S301, the configuration step involves setting a reference point and configuring an offset parameter of the target start position of at least one gate drive signal relative to the reference point; wherein the reference point is set as a timing point associated with the starting boundary of the vertical effective display area of ​​the display panel;

[0084] In S302, the generation and output step: Based on the reference point and the offset parameter, the corresponding startup timing of each of the at least one gate drive signal is determined, and the corresponding gate drive signal is generated and output based on the startup timing.

[0085] In the configuration step, for the reference point setting, the reference point is first set as a timing point associated with the starting boundary of the vertical effective display area of ​​the display panel. In specific implementation, the specific type of reference point can be selected according to the actual application requirements, such as the end point of the vertical blanking trailing edge, the starting point of the vertical effective display area, or the effective starting point of the data enable signal. The specific setting and implementation process is the same as the reference point setting in the configuration unit, and will not be repeated here.

[0086] Offset Parameter Configuration: After setting the reference point, configure the offset parameter of at least one gate drive signal relative to the reference point for the target start position. The offset parameter includes a direction indicator and a displacement amount. The direction indicator is configured to indicate whether the target start position is ahead or behind the reference point in timing, and the displacement amount is configured to indicate the degree of timing offset of the target start position relative to the reference point. In specific configuration, the external control device determines the direction indicator and displacement amount values ​​of each gate drive signal according to the design requirements of the gate drive signals and the timing requirements of the display panel, and sends them to the configuration unit for storage via the communication interface. The configuration process is consistent with the reception and storage of offset parameters in the configuration unit.

[0087] In some embodiments, the configuration step further includes providing multiple sets of predefined configuration information, each set defining a set of interrelated gate drive signal offset parameters. Specifically, based on the vertical blanking timing characteristics of different types of display panels, multiple sets of configuration information are predefined. Each set of configuration information is for a type or class of display panels with the same or similar vertical blanking timing. These configuration information sets are stored in the register group of the configuration unit to form a configuration information library, providing ready-made configuration support for subsequent adaptation to different display panels. For example, for three types of display panels with 10, 20, and 30 rows of VBP regions, three sets of configuration information are predefined respectively. Each set of configuration information contains the direction identifier and displacement amount of each gate drive signal required for that type of panel. When adapting to that type of panel, the corresponding configuration information set can be directly called.

[0088] In the generation and output steps, if multiple sets of predefined configuration information are provided in the configuration steps, the generation and output steps first include responding to the vertical blanking timing of the display panel to be driven and selecting a corresponding set from the multiple sets of configuration information. Specifically, the external control device detects the vertical blanking timing of the display panel to be driven, especially the timing parameters of the VBP region, compares these parameters with the adaptation conditions corresponding to each predefined configuration information set, selects the configuration information set that matches the adaptation conditions, and sends a selection command to the configuration unit. The configuration unit then reads the corresponding offset parameters according to the command.

[0089] Based on the reference point and the offset parameters in the selected configuration information group, the corresponding startup timing of each gate drive signal is determined. In specific implementation, the signal generation unit reads the timing information and offset parameters of the reference point, and calculates the startup time Ts of each gate drive signal according to the calculation logic of the direction identifier and displacement. The calculation process is consistent with the determination of the startup timing in the signal generation unit.

[0090] Based on a defined startup timing, a corresponding gate drive signal is generated and output. In specific implementation, the timing controller generates a control signal according to the startup time, and the gate drive circuit generates a gate drive signal that meets the gate drive requirements of the display panel based on the control signal, and outputs it to the gate line of the display panel to drive the display panel to display. The implementation process is consistent with the generation and output of the gate drive signal in the signal generation unit.

[0091] In a preferred embodiment of the present invention, the reference point is the effective starting point of the data enable signal, and the generation and output steps specifically include using the effective starting point of the data enable signal as a reference, and calculating and determining the specific start time point of each gate drive signal in the frame timing according to the direction indicator and displacement.

[0092] For example, see Figure 4 , Figure 4 This is a timing diagram provided in an embodiment of the present invention, where VFP is the vertical blanking leading edge and VS is the frame start signal; for the gate drive signal S1, its direction indicator is 0 / 1 and the displacement is 0, so the start time is consistent with the reference point, i.e., Ts=Tde; for the gate drive signal S2, its direction indicator is 1 and the displacement is a, so the start time Ts=Tde-a× This corresponds to the timing position within the VBP region; for the gate drive signal S3, with a direction indicator of 0 and a displacement of b, the startup time Ts = Tde + b × This corresponds to the timing position within the active region. Therefore, precise activation of different gate drive signals at different timing positions is achieved, meeting the driving requirements of the display panel.

[0093] This invention sets the reference point as a timing point associated with the starting boundary of the vertically effective display area of ​​the display panel, rather than the frame start (VS position) in the traditional architecture. This changes the reference point for the gate drive signal initiation position, solving the problem of poor adaptability caused by the strong correlation between the reference point and the VBP region in the traditional architecture. In the traditional architecture, using the VS position as the reference point, the initiation position of the gate drive signal needs to be calculated based on the VS position and the length of the VBP region. When the VBP region changes, the calculation reference for the initiation position also changes, requiring parameter reconfiguration to adapt to new display panels. In contrast, the reference point of this invention is associated with the starting boundary of the vertically effective display area and is independent of the length of the VBP region. When the VBP region changes, the timing position of the reference point remains unchanged, requiring only adjustment of the offset parameters for adaptation, significantly improving the system's adaptability flexibility.

[0094] Preferably, setting the reference point as the effective starting point of the DE signal further improves the stability and ease of detection of the reference point. The effective starting point of the DE signal can accurately reflect the start timing of the vertical effective display area, and its detection process is simple and reliable, not easily affected by external interference, ensuring the accuracy of the reference point timing position. At the same time, the DE signal is directly related to the effective display process of the display panel. Using it as a reference point can make the start timing of the gate drive signal more closely connected with the effective display process, reduce timing deviation, and improve the stability and clarity of the display image.

[0095] The offset parameters of this invention include a direction indicator and a displacement amount, enabling bidirectional flexible adjustment of the gate drive signal's start position relative to a reference point. In traditional architectures, the gate drive signal can only be offset in a timing-delayed direction to the right of the reference point (VS position), which cannot meet the requirement that some gate drive signals need to be started in a timing-advanced direction within the VBP region. This invention, however, uses a direction indicator to indicate the offset direction and a displacement amount to indicate the degree of offset, enabling the gate drive signal to be started at any position with timing advance to the left or delay to the right of the reference point. For example, the start position of some gate drive signals can be set within the VBP region, satisfying the special driving timing requirements of display panels and broadening the system's application scenarios.

[0096] Meanwhile, this quantified offset parameter configuration method ensures the accuracy of the start-up position adjustment. The displacement is represented by a digital quantization value, which can precisely control the degree of offset and avoid the timing deviation problem caused by inaccurate offset in traditional adjustment methods. For example, by setting the quantization unit of the displacement to the pixel clock cycle, nanosecond-level timing adjustment accuracy can be achieved, ensuring that the start-up timing of the gate drive signal is precisely matched with the timing requirements of the display panel, thereby improving the quality of the display image.

[0097] This invention stores multiple predefined configuration information groups in a configuration unit, enabling rapid adaptation to different display panels. This effectively solves the technical problem of reconfiguring parameters when adapting to display panels with different VBP regions in traditional architectures. In traditional architectures, whenever encountering display panels with inconsistent VBP regions, technicians need to redesign and calculate the gate drive signal startup parameters and write new configuration code. This process is time-consuming, labor-intensive, and prone to configuration errors. In contrast, this invention predefines multiple configuration information groups, each targeting a specific type of display panel with a particular VBP region. During adaptation, only the corresponding configuration information group needs to be selected, eliminating the need to redesign parameters, significantly shortening the adaptation cycle and improving adaptation efficiency.

[0098] Furthermore, the management of multiple configuration information groups enhances the system's scalability and maintainability. When adding a new type of display panel, only a corresponding configuration information group needs to be added to the configuration unit, without requiring large-scale modifications to the system's hardware architecture or software logic, thus reducing the difficulty and cost of system expansion. Simultaneously, the centralized storage and management of configuration information groups facilitates subsequent maintenance and updates. When it is necessary to adjust the adaptation parameters of a certain type of display panel, only the corresponding configuration information group needs to be modified, without altering other parts, further improving the system's maintenance convenience.

[0099] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A gate drive signal output system characterized by, The system is applied to driving control of a display panel, and comprises a configuration unit and a signal generation unit. The configuration unit is configured to receive an offset parameter of a target starting position of at least one gate driving signal relative to a reference point; wherein the reference point is set as a timing point associated with a starting boundary of a vertical active display area of the display panel. The signal generation unit is configured to determine a corresponding starting timing of each of the at least one gate driving signal according to the reference point and the offset parameter, and output a corresponding gate driving signal based on the starting timing.

2. The system of claim 1, wherein the reference point corresponds to an ending point of a vertical blanking trailing edge of the display panel, or a starting point of the vertical active display area, or an active starting point of a data enable signal.

3. The system of claim 1, wherein the offset parameter comprises a direction identifier and a displacement amount; the direction identifier is configured to indicate whether the target starting position is ahead of or behind the reference point in timing; and the displacement amount is configured to indicate a degree of offset of the target starting position relative to the reference point in timing.

4. The system of claim 3, wherein the configuration unit is further configured to store a plurality of groups of configuration information, each group of configuration information defining a group of offset parameters of mutually associated gate driving signals, and different groups of configuration information are called to adapt to display panels with different vertical blanking timings. The configuration unit comprises a register group for storing the offset parameters and the groups of configuration information. The signal generation unit comprises a timing controller for generating a control signal containing the starting timing, and / or a gate driving circuit for generating and outputting the gate driving signal based on the control signal. The method is applied to the gate driving signal output system of any one of claims 1 to 6, and comprises: a configuration step of setting a reference point, and configuring an offset parameter of a target starting position of at least one gate driving signal relative to the reference point; wherein the reference point is set as a timing point associated with a starting boundary of a vertical active display area of a display panel; a generation and output step of determining a corresponding starting timing of each of the at least one gate driving signal according to the reference point and the offset parameter, and generating and outputting a corresponding gate driving signal based on the starting timing.

5. The system of claim 4, wherein, In the configuration step, the offset parameter comprises a direction identifier and a displacement amount; 6. The system according to any one of claims 1-5, characterized in that, the direction identifier is configured to indicate whether the target starting position is ahead of or behind the reference point in timing; and 7. A gate drive signal output method characterized by, the displacement amount is configured to indicate a degree of offset of the target starting position relative to the reference point in timing. The configuration step further comprises providing a plurality of groups of predefined configuration information, each group of configuration information defining a group of offset parameters of mutually associated gate driving signals. ​ 8. The method of claim 7, wherein, ​ ​ ​ 9. The method of claim 8, wherein, ​ The generating and outputting step comprises: in response to vertical blanking timing of a display panel to be driven, selecting a corresponding group from the multiple groups of configuration information, and determining starting timing of each gate drive signal based on the offset parameter in the selected configuration information and the reference point.

10. The method of claim 9, wherein, The reference point is an effective starting point of a data enable signal; The direction identifier of the offset parameter indicates that the target starting position is before or after the effective starting point of the data enable signal; Based on the direction identifier and the displacement amount, a specific starting time point of each gate drive signal in frame timing is calculated and determined with the effective starting point of the data enable signal as a reference.

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