Threshold voltage abnormity reason analysis method and improvement method

Abstract

The invention provides an analysis method and an improvement method for threshold voltage abnormity reasons. The analysis method comprises the following steps: determining main factors causing threshold voltage abnormity; determining a sub-factor related to each main factor, classifying the plurality of sub-factors according to the importance degree of the influence of the plurality of sub-factors on the threshold voltage according to a device principle, and respectively determining experiment schemes; and verifying the experimental schemes in sequence according to the importance degrees to determine the sub-factors causing the threshold voltage abnormity. According to the device principle, the sub-factors related to the main factor causing the threshold voltage abnormity are classified according to the importance degree of the influence on the threshold voltage, and the experiment scheme is determined according to the classification and is verified in sequence, so that the sub-factors causing the threshold voltage abnormity can be quickly and accurately confirmed and improved; therefore, manpower, material resources and time cost are saved, and customer satisfaction is improved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a method for analyzing the causes of abnormal threshold voltage and a method for improving threshold voltage. Background Technology

[0002] IGBT (Insulated-Gate Bipolar Transistor) is a composite fully controllable, voltage-driven power semiconductor device composed of BJT (Bipolar Junction Transistor) and MOS (Insulated-Gate Field-Effect Transistor), which has the feature of automatic turn-off.

[0003] As a leading representative of new power semiconductor devices, IGBTs are widely used in industrial, information, new energy, medical, transportation, military, and aerospace fields. With continuous advancements in semiconductor materials and processing technology, the current density, voltage withstand capability, and frequency of IGBTs have been continuously improved. Currently, IGBT devices on the market have a voltage withstand capability of up to 6500V, a single-die current of up to 200A, and a frequency of up to 300kHz. In the high-frequency, high-power field, no other device can currently replace it.

[0004] Currently, after IGBT chip R&D, process finalization, and packaging, to accelerate the verification of the power chip's performance in terms of process and design, it is necessary to conduct HTGB (High-Temperature Gate Bias) reliability testing on the packaged power module. If anomalies occur during reliability testing, such as abnormal threshold voltage (Vth), it is necessary to quickly identify the cause of the anomaly and implement improvements while balancing development speed and human and material costs. Summary of the Invention

[0005] The purpose of this invention is to provide an analysis method and improvement method for the causes of threshold voltage anomalies, which can quickly and accurately identify the sub-factors causing threshold voltage anomalies and make improvements, thereby saving manpower, material resources and time costs.

[0006] To address the aforementioned technical problems, this invention provides a method for analyzing the causes of abnormal threshold voltages, comprising the following steps:

[0007] Identify the main factors causing the abnormal threshold voltage;

[0008] Identify the sub-factors associated with each of the main factors, and classify the multiple sub-factors according to their importance to the threshold voltage based on the device principle, and determine the experimental scheme for each sub-factor.

[0009] The experimental scheme was verified in order of importance to determine the sub-factors causing the threshold voltage anomaly.

[0010] Optionally, the 5M1E analysis method can be used to determine the main factors causing the threshold voltage anomaly, where 5M1E includes people, machines, materials, process conditions, environment, and measurement.

[0011] Optionally, the influence of each main factor on the threshold voltage can be analyzed to determine whether the main factor will cause the threshold voltage to be abnormal; the main factors that cause the threshold voltage to be abnormal include materials and process conditions.

[0012] Optionally, multiple sub-factors can be categorized into strongly correlated sub-factors, correlated sub-factors, slightly correlated sub-factors, and weakly correlated sub-factors according to their importance to the threshold voltage.

[0013] Optionally, the importance of the multiple sub-factors to the threshold voltage can be determined based on the threshold voltage formula.

[0014] Optionally, the strongly correlated sub-factors include gate oxide film thickness and film formation conditions, P-well implantation and push-in conditions; the correlated sub-factors include trench etching morphology and depth, material resistivity and crystal orientation, and Notch orientation; the secondary correlated sub-factors include CS implantation and push-in conditions, NP implantation and push-in conditions; and the weakly correlated sub-factors include P-ring implantation and push-in conditions, protective layer thickness and material, back-side process grinding and implantation conditions.

[0015] Optionally, the experimental scheme includes an experimental scheme for the strongly correlated sub-factors, an experimental scheme for the correlated sub-factors and the secondary correlated sub-factors, an experimental scheme for the weakly correlated sub-factors, and an experimental scheme covering all factors that affect the threshold voltage.

[0016] Optionally, the verification order of the experimental scheme is as follows: experimental scheme for the strongly correlated sub-factors, experimental scheme for the correlated sub-factors and the secondarily correlated sub-factors, and experimental scheme for the weakly correlated sub-factors; if no sub-factor affecting the threshold voltage is found, the verification is repeated according to the above experimental scheme verification order; if a sub-factor affecting the threshold voltage is found, the verification of subsequent experimental schemes is stopped.

[0017] Optionally, sub-factors causing threshold voltage anomalies include the Notch orientation and the gate oxide thickness.

[0018] Accordingly, the present invention also provides a method for improving threshold voltage anomalies, which uses the threshold voltage anomaly cause analysis method described above to analyze the sub-factors causing the threshold voltage anomalies, and improves the sub-factors accordingly.

[0019] Optionally, the threshold voltage can be improved by changing the Notch orientation or increasing the thickness of the gate oxide layer.

[0020] In summary, the method for analyzing and improving the causes of threshold voltage anomalies provided by this invention first identifies the main factors causing the anomaly, then identifies the sub-factors related to each main factor, and classifies these sub-factors according to their importance to the threshold voltage based on device principles. Experimental plans are then determined for each sub-factor, and these plans are verified sequentially according to their importance to identify the sub-factors causing the threshold voltage anomaly. This invention, by classifying the sub-factors related to the main factor causing the threshold voltage anomaly according to their importance to the threshold voltage based on device principles, and then determining and verifying experimental plans accordingly, can quickly and accurately identify and improve the sub-factors leading to the threshold voltage anomaly, thereby saving manpower, resources, and time, while also improving customer satisfaction. Attached Figure Description

[0021] Figure 1 This is a flowchart of a method for analyzing the causes of abnormal threshold voltage provided in an embodiment of the present invention.

[0022] Figure 2 This is a fishbone diagram of the main factors of threshold voltage provided in an embodiment of the present invention.

[0023] Figure 3 This is a fishbone diagram of threshold voltage strongly correlated sub-factors provided in an embodiment of the present invention. Detailed Implementation

[0024] This invention is based on actual production. During product development, it was discovered that in customer-side IGBT products, the reverse threshold voltage decreased by more than 10% after HTGB 168H verification compared to before high-temperature testing. The typical product development process includes: 1. Customer designing the layout and a simplified verification plan; 2. The foundry designing the process flow and implementing the verification plan; 3. The foundry verifying static parameters and sending samples to the customer for packaging; 4. The customer selecting samples based on the static parameters for packaging and testing dynamic and static performance and reliability; 5. The customer and the foundry proposing solutions to optimize dynamic and static parameters and reliability testing plans; 6. Executing the solutions, delivering them to the customer for repackaging and verification, and then proceeding with mass production. When the threshold voltage becomes abnormal after HTGB 168H verification, the factory needs to analyze the cause of the anomaly and perform pull-bias verification on all parameters that may cause the threshold voltage, followed by customer packaging and testing, which requires significant manpower, resources, and time.

[0025] To address the aforementioned problems, this invention provides a method for analyzing the causes of threshold voltage anomalies, comprising: identifying the main factors causing the threshold voltage anomalies; identifying sub-factors related to each main factor, classifying the multiple sub-factors according to their importance to the threshold voltage based on device principles, and determining experimental schemes for each sub-factor; and verifying the experimental schemes in order of importance to determine the sub-factors causing the threshold voltage anomalies.

[0026] Meanwhile, the present invention also provides a method for improving threshold voltage anomalies, which uses the threshold voltage anomaly cause analysis method described above to analyze the sub-factors causing the threshold voltage anomalies, and improves the sub-factors accordingly.

[0027] This invention classifies the sub-factors related to the main factor causing threshold voltage abnormality according to their importance to the threshold voltage based on the device principle, and determines the experimental scheme according to the classification and verifies them in sequence. This can quickly and accurately identify the sub-factors causing threshold voltage abnormality and make improvements, thereby saving manpower, material resources and time costs, while improving customer satisfaction.

[0028] To make the objectives, advantages, and features of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not drawn to scale, and are only used to facilitate and clarify the explanation of the embodiments of this invention. Furthermore, the structures shown in the drawings are often part of the actual structures. In particular, different figures may emphasize different aspects and may sometimes use different scales.

[0029] As used herein, the singular forms “a,” “an,” and “the” include plural objects unless otherwise expressly indicated. As used herein, the term “or” is generally used to include “and / or” unless otherwise expressly indicated. As used herein, the term “a number” is generally used to include “at least one” unless otherwise expressly indicated. As used herein, the term “at least two” is generally used to include “two or more” unless otherwise expressly indicated. Furthermore, the terms “first,” “second,” and “third” are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as “first,” “second,” or “third” may explicitly or implicitly include one or at least two of that feature.

[0030] Figure 1 This is a flowchart illustrating a method for analyzing the causes of abnormal threshold voltages according to an embodiment of the present invention. Please refer to it. Figure 1 As shown, the method for analyzing the causes of threshold voltage anomalies provided in this embodiment of the invention includes the following steps:

[0031] S1: Identify the main factors causing the abnormal threshold voltage;

[0032] S2: Determine the sub-factors related to each of the main factors, and classify the multiple sub-factors according to their importance to the threshold voltage based on the device principle, and determine the experimental scheme for each sub-factor;

[0033] S3: Verify the experimental scheme in order of importance to determine the sub-factors causing the threshold voltage anomaly.

[0034] In step S1, the main factors causing the threshold voltage anomaly are determined. In one embodiment of the present invention, the 5M1E analysis method is used to determine the main factors causing the threshold voltage anomaly. The 5M1E includes Man, Machine, Material, Method, Environment, and Measurement. "Machine" refers to the machine, "Material" refers to the material, "Method" refers to the method or process conditions, "Environment" refers to the environment, and "Measurement" refers to the measurement. In other words, the main factors causing the threshold voltage anomaly are determined from the six main factors: Man, Machine, Material, Process Conditions, Environment, and Measurement.

[0035] In this embodiment, the influence of each main factor on the threshold voltage is analyzed to determine whether the main factor will cause an abnormal threshold voltage. For example, regarding machines, if other products using the same machine do not experience abnormal threshold voltage, it indicates that the machine's influence on the threshold voltage is relatively small, and therefore the machine is not considered a main factor causing the abnormal threshold voltage. Regarding materials, the Notch direction... <110> All physical properties exhibit threshold voltage anomalies, while the Notch direction... <100> If the material was not verified, it indicates that the material may affect the threshold voltage, and the material is determined to be the main factor causing the threshold voltage.

[0036] In one embodiment of the present invention, 5M1E is analyzed in the form of a fishbone diagram to determine the main factors causing the abnormal threshold voltage. The fishbone diagram is used to analyze 5M1E, which is clear and hierarchical, and can intuitively present the main factors causing the abnormal threshold voltage. At the same time, drawing a fishbone diagram itself is not difficult and is easy to operate. Figure 2 This is a fishbone diagram of the principal factors of the threshold voltage provided in an embodiment of the present invention. Please refer to it. Figure 2 As shown, the factors in 5M1E are analyzed using a fishbone diagram. For Man, the product design simulation confirms mass production capability, and developers have confirmed that the tape-out proceeded according to plan without any issues; therefore, this factor has no impact on the threshold voltage. For Machine, static parameters meet standards, and other products on the same platform have not experienced threshold voltage anomalies; therefore, the machine's influence is relatively small. For Material, the resistivity of the zone-melted single crystal is 60 / 90 ohm·cm. 2 Notch direction <110> All showed abnormalities, while 78 / 60 / 90 ohm·cm 2Notch direction <100> The following factors were not verified: 1. Material composition: Material composition may affect the threshold voltage. 2. Method (process conditions): Due to customer design confidentiality, the current process conditions are not yet optimal; therefore, process conditions may also affect the threshold voltage. 3. Environment (environment): Customer standard testing environment; multiple verifications yielded consistent results, thus ruling out environmental influence on the threshold voltage. 4. Measurement (measurement): Multiple tests on different wafers and dies showed a shift in threshold voltage after high temperatures; therefore, measurement influence on the threshold voltage is also ruled out.

[0037] The above analysis shows that materials and process conditions are the main factors causing abnormal threshold voltage.

[0038] In this embodiment of the invention, the 5M1E analysis method is used to remove factors that have no effect on the threshold voltage, and retain the factors that have an effect on the threshold voltage or may have an effect on the threshold voltage as the main factors for subsequent analysis. This can save judgment time and also remove some unnecessary verification.

[0039] In step S2, sub-factors related to each of the main factors are determined, and the multiple sub-factors are classified according to their importance to the threshold voltage based on the device principle, and experimental schemes are determined for each.

[0040] In this embodiment, sub-factors related to each main factor are first determined, that is, sub-factors related to materials and process conditions are determined. For example, sub-factors related to materials include: material resistivity, crystal orientation and Notch orientation (a small groove on the wafer used to mark the direction and crystal orientation of the wafer), which are taken as a sub-factor. There are many sub-factors related to process conditions, such as: (1) gate oxide film thickness and film formation temperature; (2) P-well and push-in conditions; (3) trench etching morphology and depth; (4) CS (carrier storage layer) injection and push-in conditions; (5) NP injection and push-in conditions; (6) P-ring injection and push-in conditions; (7) protective layer (PA) thickness and material; (8) back-side process grinding and injection conditions, and of course, not limited to these.

[0041] If a comprehensive dynamic window verification is performed for all the above sub-factors, a relatively large number of wafers (e.g., 50) are required for pull verification (verification of changing parameter conditions) and customer packaging and testing, which requires a lot of manpower, material resources and time costs.

[0042] In one embodiment of the present invention, the importance of multiple sub-factors to the threshold voltage is determined according to the threshold voltage formula, that is, the multiple sub-factors are classified according to their importance to the threshold voltage based on the threshold voltage formula.

[0043] The threshold voltage formula is:

[0044] Where, ε ox Let be the dielectric constant of the oxide layer, k be the Boltzmann constant, and t be the dielectric constant of the oxide layer. ox Where N is the oxide layer thickness. A ε represents the acceptor impurity doping concentration. s Let n be the dielectric constant of silicon. i Where is the intrinsic carrier concentration, and T is the thermodynamic temperature.

[0045] From the above formula, it can be seen that the threshold voltage (V) th The value increases linearly with increasing oxide layer thickness and approximately linearly with the root mean square of doping concentration.

[0046] Figure 3 This is a fishbone diagram of threshold voltage strongly correlated sub-factors provided in an embodiment of the present invention. Please refer to it. Figure 3 As shown, the sub-factors strongly correlated with the threshold voltage include: gate oxide (mainly the gate oxide thickness THK), P-well ion implantation (PW IMP) (mainly the ion implantation energy and dose), and P-well drive-in (mainly the drive-in time and temperature). Therefore, the threshold voltage is mainly biased by the thickness of the gate oxide and the dose of P-well implantation (the bias is used to determine whether it has an impact on the threshold voltage), while the temperature and time of P-well drive-in affect the threshold voltage through the doping concentration.

[0047] Based on the above analysis, multiple sub-factors are classified into strongly correlated sub-factors, correlated sub-factors, slightly correlated sub-factors, and weakly correlated sub-factors according to their importance to the threshold voltage. In this embodiment, for example, (1) and (2) are determined as strongly correlated sub-factors, that is, the strongly correlated sub-factors include the gate oxide layer thickness and film formation conditions, P-well implantation and push-in conditions; (3) and the material are determined as correlated sub-factors, that is, the correlated sub-factors include the trench etching morphology and depth, the material resistivity and crystal orientation, and the Notch direction; (4) and (5) are determined as slightly correlated sub-factors, that is, the slightly correlated sub-factors include CS implantation and push-in conditions, NP implantation and push-in conditions; (6), (7), and (8) are determined as weakly correlated sub-factors, that is, the weakly correlated sub-factors include P-ring implantation and push-in conditions, the protective layer thickness and material, and the back-side process grinding and implantation conditions.

[0048] In this embodiment, multiple sub-factors are classified according to their importance to the threshold voltage, and then verified according to their importance. That is, the sub-factors that have the most important or most serious impact on the threshold voltage are verified first, so that the influencing factors can be identified as soon as possible, thereby saving manpower, material resources and time costs.

[0049] In one embodiment of the present invention, after classifying the multiple sub-factors, experimental schemes are determined for each sub-factor to verify it. For example, the experimental schemes include experimental schemes for the strongly correlated sub-factors, experimental schemes for the correlated and slightly correlated sub-factors, and experimental schemes for the weakly correlated sub-factors.

[0050] In this embodiment, since there are two related sub-factors and two secondary related sub-factors, which are relatively few in number, the experimental design for the related sub-factors and the secondary related sub-factors can be made together and verified together. It is not necessary to verify the related sub-factors first and then verify the secondary related sub-factors after the verification is completed, thereby saving verification time.

[0051] In one embodiment of the present invention, the verification order of the experimental schemes is as follows: experimental schemes for the strongly correlated sub-factors, experimental schemes for the correlated and secondary correlated sub-factors, experimental schemes for the weakly correlated sub-factors, and experimental schemes covering all factors affecting the threshold voltage; if a sub-factor affecting the threshold voltage is found, the verification of subsequent experimental schemes is stopped. That is, the experimental schemes for the strongly correlated sub-factors are verified first. If no sub-factor affecting the threshold voltage is found, then the experimental schemes for the correlated and secondary correlated sub-factors are verified. Alternatively, the experimental schemes for the correlated sub-factors can be verified first. If no sub-factor affecting the threshold voltage is found, then the experimental schemes for the secondary correlated sub-factors are verified. If no sub-factor affecting the threshold voltage is found, then the experimental schemes for the weakly correlated sub-factors are verified. If no sub-factor affecting the threshold voltage is found, the verification is repeated according to the above experimental scheme verification order. During any of the above verification processes, if a sub-factor affecting the threshold voltage is found, the verification of subsequent experimental schemes should be stopped. For example, if a sub-factor affecting the threshold voltage is found during the verification of an experimental scheme targeting the strongly correlated sub-factor, the verification of subsequent sub-factors can be stopped. Similarly, if a sub-factor affecting the threshold voltage is found during the verification of an experimental scheme targeting the correlated sub-factor, the verification of subsequent sub-factors can be stopped. Of course, if a sub-factor affecting the threshold voltage is found during the verification of an experimental scheme targeting the strongly correlated sub-factor, the verification of subsequent experimental schemes can continue to determine whether there are any other sub-factors affecting the threshold voltage.

[0052] Table 1

[0053]

[0054] Table 1 shows the experimental scheme for strongly correlated sub-factors. Since the materials are defined as correlated sub-factors in this embodiment, the materials remain constant during the verification of the experimental scheme for strongly correlated sub-factors. Here, 90 refers to the resistivity of the zone-melting single crystal. <110> This refers to the Notch direction. In the gate oxide layer, the formation temperature remains constant at 1150℃, but the thickness is varied, with one thickness being... (Thickness under existing conditions), another thickness is (Increasing thickness based on the existing thickness). In P-well implantation, B indicates that the implanted element is boron, 100KEV is the implantation energy, 1.8E13 is the implantation dose, and T7 is the 7° angle between the implantation and the normal. In P-well implantation, only the ion implantation dose is changed, increasing sequentially from 1.8E13 to 3.4E13. The numbers on the right side of the table (1, 7, 12, 15... represent wafer numbers), and the Y below indicates the execution of its corresponding sub-factor. For example, if the material remains unchanged for each wafer, all wafers will execute the material unchanged option. Another example is the gate oxide layer (1150℃, If all three columns (1, 7, and 12) in this row are Y, it means that the gate oxide layer (1150℃) is applied to wafers 1, 7, and 12. This formation condition. For example, the sub-factors executed on wafer 15 include: material remains unchanged, gate oxide layer formation conditions (1150℃, ), P-well injection conditions (B / 100KEV / 1.8E13 / T7).

[0055] Verification of the above experimental scheme revealed that the threshold voltage anomaly still existed, with the gate oxide layer thickness increasing to [missing information]. Subsequently, the threshold voltage shift after high temperature decreased from 12% to 5%, indicating that increasing the thickness of the gate oxide layer can improve the threshold voltage, but the improvement is limited.

[0056] Table 2

[0057]

[0058] Table 2 presents the experimental protocols for relevant and sub-relevant sub-factors. Among these, the material was modified, and the Notch direction was changed from the original... <110> Change to <100> The remaining sub-factors of the materials remained unchanged. In CS implantation, P indicates that the implanted element is phosphorus, 150KEV is the implantation energy, 1E13 is the implantation dose, and "none" indicates that there is no CS implantation item. CS PR removal indicates the removal of the photoresist layer (PR) formed before CS implantation, and "none" means that there is no photoresist layer and it does not need to be removed. In CS push-in, 1150℃, 150min, and "small oxygen" indicate that the push-in temperature is 1150℃, the push-in time is 150min, and "small oxygen" indicates that about 0.2 liters of oxygen are doped into 10 liters of nitrogen during the push-in process, and "none" indicates that there is no CS push-in item. In N+ Mask / PR removal, version A and version B indicate the mask version, where version A is the original version and version B is the improved version, and "none" indicates that there is no photoresist layer (PR) removal item in N+ implantation. In N+ implantation, AS indicates that arsenic is implanted, and AS+P indicates that arsenic and phosphorus are implanted. The meaning of Y is the same as in Table 1. It should be noted that, due to the change in materials, a strongly correlated factor was also included in this experimental design to determine the threshold voltage when both the materials and the strongly correlated factor were changed simultaneously.

[0059] Verification of the above experimental scheme revealed that after changing the material, the threshold voltage shift after high temperature was less than 1%.

[0060] Because sub-factors affecting the threshold voltage were found during the verification of experimental schemes targeting relevant and secondary relevant sub-factors, the verification of subsequent experimental schemes was stopped.

[0061] In this embodiment, the sub-factors causing the abnormal threshold voltage are the gate oxide layer thickness and the Notch direction. Changing both the gate oxide layer thickness and the Notch direction can improve the high-temperature shift of the threshold voltage, with changing the Notch direction being more effective and having no impact on other static parameters. From the perspective of the Notch direction's forming principle... <100> The atomic defect density is lowest in this direction, resulting in a more uniform and stable process for both silicon oxidation to form the gate oxide layer and P-well implantation.

[0062] In summary, the method for analyzing the causes of threshold voltage anomalies provided by this invention first identifies the main factors causing the anomalies, then identifies the sub-factors related to each main factor, and classifies these sub-factors according to their importance to the threshold voltage based on device principles. Experimental plans are then determined for each sub-factor, and these plans are verified sequentially according to their importance to identify the sub-factors causing the threshold voltage anomalies. This invention, by classifying the sub-factors related to the main factors causing the threshold voltage anomalies according to their importance to the threshold voltage based on device principles, and then determining and verifying experimental plans accordingly, can quickly and accurately identify the sub-factors causing the threshold voltage anomalies and make improvements, thereby saving manpower, material resources, and time costs, while improving customer satisfaction.

[0063] Accordingly, the present invention also provides a method for improving threshold voltage anomalies, which uses the threshold voltage anomaly cause analysis method described above to analyze the sub-factors causing the threshold voltage anomalies, and improves the sub-factors accordingly.

[0064] In one embodiment of the present invention, the sub-factors causing the abnormal threshold voltage are the gate oxide layer thickness and the Notch direction. Therefore, one solution to improve the gate oxide layer thickness or the Notch direction is to adjust the original Notch direction. <110> Replace with <100> In terms of orientation, the threshold voltage deviation after high temperature is less than 1%, fully meeting customer requirements. Another solution is to maintain the original Notch orientation. <110> Based on this, optimize the thickness of the gate oxide layer, for example, by reducing the thickness of the gate oxide layer from the original... Modified to If the threshold voltage deviation is less than 5% after high temperature, the customer can accept it. Of course, if the customer cannot accept the threshold voltage deviation of less than 5%, then the first solution needs to be adopted.

[0065] In summary, the threshold voltage anomaly improvement method provided by this invention first identifies the main factors causing the threshold voltage anomaly, then identifies sub-factors related to each main factor, and classifies these sub-factors according to their importance to the threshold voltage based on device principles. Experimental plans are then determined for each sub-factor, and these plans are verified sequentially according to their importance to identify the sub-factors causing the threshold voltage anomaly. This invention, by classifying sub-factors related to the main factors causing the threshold voltage anomaly according to their importance to the threshold voltage based on device principles, and determining and verifying experimental plans accordingly, can quickly and accurately identify and improve the sub-factors causing the threshold voltage anomaly, thereby saving manpower, resources, and time costs, while improving customer satisfaction.

[0066] The above description is merely a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the claims.

Claims

1. A method of analyzing a cause of threshold voltage abnormality, characterized by, The method comprises the following steps: determining the main factor causing the threshold voltage abnormality; determining the sub-factors related to each of the main factors, classifying the sub-factors according to the importance of the influence on the threshold voltage according to the principle of the device, and determining the experimental scheme respectively; sequentially verifying the experimental schemes according to the importance to determine the sub-factors causing the threshold voltage abnormality.

2. The method of claim 1, wherein The 5M1E analysis method is used to determine the main factor causing the threshold voltage abnormality, wherein 5M1E includes human, machine, material, process condition, environment and measurement.

3. The method of claim 2, wherein The influence of each main factor on the threshold voltage is analyzed to determine whether the main factor will cause the threshold voltage abnormality. The main factor causing the threshold voltage abnormality includes material and process condition.

4. The method of claim 1, wherein The sub-factors are classified into strong correlation sub-factors, correlation sub-factors, secondary correlation sub-factors and weak correlation sub-factors according to the importance of the influence on the threshold voltage.

5. The method of claim 4, wherein the threshold voltage abnormality is caused by a change in the threshold voltage of the memory cell. The importance of the sub-factors on the threshold voltage is determined according to the threshold voltage formula.

6. The method of claim 4, wherein the threshold voltage abnormality is caused by a change in a threshold voltage of the memory cell. The strong correlation sub-factors include gate oxide film thickness and film forming condition, P well implantation and push joint condition; the correlation sub-factors include trench etching morphology and depth, material resistivity and crystal direction and Notch direction; the secondary correlation sub-factors include CS implantation and push joint condition, NP implantation and push joint condition; the weak correlation sub-factors include P ring implantation and push joint condition, protective layer thickness and material, back process grinding and implantation condition.

7. The method of claim 6, wherein the threshold voltage abnormality is caused by a change in the threshold voltage of the memory cell. The experimental schemes include the experimental scheme for the strong correlation sub-factors, the experimental scheme for the correlation sub-factors and the secondary correlation sub-factors, the experimental scheme for the weak correlation sub-factors and the experimental scheme covering all the factors influencing the threshold voltage.

8. The method of claim 7, wherein the threshold voltage abnormality is caused by a change in the threshold voltage of the memory cell. The verification sequence of the experimental scheme is: the experimental scheme for the strong correlation sub-factors, the experimental scheme for the correlation sub-factors and the secondary correlation sub-factors, the experimental scheme for the weak correlation sub-factors; if no sub-factor influencing the threshold voltage is found, the verification is repeated according to the above verification sequence of the experimental scheme; if a sub-factor influencing the threshold voltage is found, the verification of the subsequent experimental scheme is stopped.

9. The method of claim 8, wherein the threshold voltage abnormality is caused by a change in the threshold voltage of the memory cell. The sub-factors causing the threshold voltage abnormality include Notch direction and gate oxide thickness.

10. A method for improving threshold voltage abnormality, characterized by, The sub-factors causing the threshold voltage abnormality are analyzed by using the threshold voltage abnormality cause analysis method according to any one of claims 1 to 9, and improvement is made for the sub-factors.

11. The method of improving threshold voltage abnormality according to claim 10, wherein The threshold voltage is improved by changing the Notch direction or increasing the thickness of the gate oxide layer.

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