Ceramic DPC multilayer laminated plate manufacturing method and welding structure
By setting mark holes and through holes on the ceramic DPC multilayer laminate, and using a positioning structure and copper-copper diffusion welding or brazing method, the problem of insufficient pull-out force after welding was solved, thereby improving structural stability and production efficiency.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-17
- Publication Date
- 2026-03-13
AI Technical Summary
Existing ceramic DPC multilayer laminates have insufficient pull-out force after welding, resulting in structural instability and making it difficult to meet the application scenarios with high precision and high heat dissipation requirements.
By setting mark holes and vias on the ceramic substrate, removing burrs and slag, sputtering a seed layer and electroplating copper lines, using a positioning structure to accurately position the multilayer substrate and welding it using copper-copper diffusion soldering or brazing, the stacking is ensured to be accurately aligned.
It improves the pull-out force after welding, ensures the structural stability and welding quality of multilayer laminates, enhances production efficiency, and avoids cracking of ceramic substrates and deviations in bonding strength.
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Figure CN121665477A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of ceramic substrates, and more particularly to a method for manufacturing and welding structure of a ceramic DPC multilayer laminate. Background Technology
[0002] Ceramic DPC multilayer laminates are ceramic substrates fabricated using direct copper plating (DPC) technology. Fine metal lines are formed on the ceramic substrate through sputtering, photolithography, and electroplating techniques, enabling vertical interconnection of multilayer circuits. The core features of ceramic DPC multilayer laminates include high precision, low-temperature processing, and vertical interconnection. Currently, ceramic DPC multilayer laminates are mainly used in high-power LEDs, semiconductor lasers, and power electronic devices, and are particularly suitable for applications requiring high precision and high heat dissipation.
[0003] The existing ceramic DPC multilayer laminate fabrication process requires first preparing a single-layer DPC substrate, then stacking multiple DPC substrates together and fixing them into a single structure. Due to the large number of layers, it is difficult to ensure the neatness of the stacked layers. Furthermore, if the DPC substrates are welded together, the pull-out force after welding is low, resulting in a lack of necessary structural stability between the welded DPC substrates, which fails to meet subsequent application requirements. Summary of the Invention
[0004] The technical problem to be solved by the present invention is to provide a method and welding structure for manufacturing ceramic DPC multilayer laminates that effectively improves the pull-out force of DPC substrates after welding.
[0005] The technical solution adopted by this invention to solve its technical problem is: a method for manufacturing ceramic DPC multilayer laminated plates, comprising the following steps: a. Preliminary preparation: Clean the surface of the ceramic substrate, then drill holes in the ceramic substrate to make mark holes and through holes, and perform ceramic burr removal and slag removal on the mark holes and through holes; b. Perform ceramic cleaning on the ceramic substrate, sputter a seed layer on the ceramic substrate, then electroplat the vias to fill them, grind and polish them and remove the protruding copper on the surface of the vias; c. Through exposure and development, the circuit pattern is transferred onto the photoresist, exposing the pattern area that needs to be electroplated with copper; a copper layer is electroplated on the exposed pattern area to form the circuit, and then the photoresist is removed, the seed layer is etched, and the copper surface of the ceramic substrate is cleaned to complete the DPC substrate fabrication. d. Repeat steps a to c to complete the fabrication of the other DPC substrates; e. A positioning structure is set in the mark hole of the DPC substrate to stack the DPC substrates together, then the DPC substrates are soldered together into a whole structure, and finally the copper surface is ground and surface treated.
[0006] Furthermore, in step e, the welding includes either copper-copper diffusion welding or brazing.
[0007] Furthermore, the copper-copper diffusion welding method includes the following welding conditions: vacuum degree < 10 -3 Pa, inert atmosphere including nitrogen and argon atmosphere, and temperature range of 600°C to 1000°C.
[0008] Furthermore, the brazing method includes the following welding conditions: the solder comprises silver-copper-titanium solder and copper-tin-titanium solder, and the vacuum degree is <10. -3 Pa and temperature range of 600℃ to 920℃.
[0009] Furthermore, in step e, the positioning structure is a positioning pin.
[0010] Furthermore, in step b, the method for sputtering the seed layer is to sputter an adhesion layer, a barrier layer, and a conductive seed layer onto the ceramic substrate using magnetron sputtering.
[0011] Furthermore, the adhesive layer is made of titanium or chromium, and its thickness ranges from 50 nm to 200 nm.
[0012] Furthermore, the barrier layer is made of platinum or palladium, and its thickness ranges from 50 nm to 150 nm.
[0013] Furthermore, the conductive seed layer is made of copper, and the thickness of the conductive layer ranges from 200 nm to 1000 nm.
[0014] The ceramic DPC multilayer laminated board welding structure includes at least two DPC substrates, with mark holes provided at corresponding positions between the DPC substrates. The DPC substrates are stacked one on top of the other, and a positioning pin is provided in the mark hole. The axis of the positioning pin is perpendicular to the DPC substrate.
[0015] The beneficial effects of this invention are: First, by processing individual DPC substrates separately and promptly removing burrs, protrusions, and impurities during the processing, the mark holes between the DPC substrates are aligned, and the multi-layered DPC substrates are fixed using a positioning structure. This creates a ceramic DPC multilayer laminated board welding structure with accurate alignment between upper and lower layers and stable structure between layers during the welding process, effectively improving the welding quality and significantly enhancing the pull-out force after welding.
[0016] Second, by welding individual DPC substrates into a multi-layer integrated structure, the quality control of the lamination process can be effectively achieved, the electroplating time for filling holes can be shortened, and problems such as cracking of ceramic substrates and deviation of bonding strength can be prevented during the preparation process, thereby further improving the efficiency of production preparation.
[0017] This invention is particularly applicable to the manufacturing process of ceramic DPC multilayer laminated boards. Attached Figure Description
[0018] Figure 1 This is a schematic diagram of the patterned area in the middle of the DPC substrate of the present invention and the mark holes around the patterned area.
[0019] Figure 2 This is a schematic diagram showing the alignment of the upper and lower layers of a multilayer DPC substrate and the alignment of the mark holes.
[0020] Figure 3 This is a schematic diagram of inserting a positioning pin into the mark hole to position the multilayer DPC substrate.
[0021] The diagram is labeled as follows: DPC substrate 1, patterned area 11, mark hole 12, DPC substrate side 13, positioning structure 2. Detailed Implementation
[0022] The invention will be further described below with reference to the accompanying drawings.
[0023] like Figure 1 , Figure 2 and Figure 3 The example shown is a welded structure of a ceramic DPC multilayer laminate. Figure 1 In this design, the DPC substrate 1 is a rectangular thin plate structure. The basic structure of the DPC substrate 1 is a ceramic substrate. A rectangular patterned area 11 is located near the center of the DPC substrate 1, and vias are disposed within the patterned area 11. Three mark holes 12 are disposed on the DPC substrate 1 outside the patterned area 11, respectively located near the upper left corner, upper right corner, and lower left corner of the DPC substrate 1. The positions of all three mark holes 12 on the DPC substrate 1 are consistent to facilitate subsequent positioning and alignment. The vias within the patterned area 11 are fabricated together with the mark holes 12 by drilling.
[0024] Figure 2 In this process, the fabricated DPC substrates 1 are stacked one on top of the other, ensuring that the three mark holes 12 on the DPC substrate 1 are aligned with the corresponding mark holes 12 on the other DPC substrate 1 above and below, forming through holes. The DPC substrate sides 13 of the DPC substrates 1 are also aligned to ensure that the structure formed by the stacked layers is in a state of accurate alignment.
[0025] Figure 3 In this process, the positioning structure 2 is inserted into the through hole formed by the aforementioned mark hole 12, thereby fixing the stacking relationship between the multiple stacked DPC substrates 1 and ensuring the structural stability during the subsequent welding process.
[0026] As for the specific production method, it can be carried out according to the following steps: I. Ceramic substrate cleaning. Cleaning methods include horizontal cleaning, which includes degreasing, acid pickling, ultrasonic cleaning, and DI water washing. The degreasing agent concentration is 8% to 12%, the degreasing agent temperature is 30% to 40℃, and the cleaning method is spraying with a spray pressure of 0.1 MPa to 0.3 MPa. The main component of acid pickling is sulfuric acid, with a concentration of 8% to 12%, and a temperature of 30℃ to 40℃. The cleaning method is spraying with a spray pressure of 0.1 MPa to 0.3 MPa. Ultrasonic cleaning has a frequency of 30 kHz to 100 kHz, a cleaning time of 2 to 5 minutes, and a temperature of 30℃ to 40℃. DI water washing (i.e., deionized water cleaning) requires a resistivity ≥18.2 MΩ·cm and is performed by spraying with a spray pressure of 0.1 MPa to 0.3 MPa.
[0027] 2. Drilling marks 12 and vias into the ceramic substrate, followed by ceramic deburring and slag treatment of the marks 12 and vias. The drilling method is laser drilling, with laser energy of 15% to 50%, duty cycle of 15% to 25%, and scribing speed of 10 mm / s to 50 mm / s.
[0028] Third, the slag from drilling is removed by grinding, which is achieved through two grinding cycles using a single-sided grinding machine. The grinding plate uses a ceramic brush to remove the slag from the edges of the holes. The ceramic brush mesh size is 800-2000, the grinding current is 0.1 A-0.5 A, and the grinding speed is 0.2 m / min-1 m / min. During the grinding process, the water washing spray pressure is 0.1 MPa-0.5 MPa, and the operating speed is 0.5 m / min-1 m / min; pure water rinsing is also used. Finally, the plate is dried with hot air at a temperature of 70℃-90℃.
[0029] IV. Pre-sputtering cleaning, which employs a horizontal cleaning method, includes degreasing, acid pickling, ultrasonic cleaning, and DI water rinsing. Degreasing uses an 8%-12% degreasing agent at a temperature of 30℃-40℃, achieved through spraying at a pressure of 0.1MPa-0.3MPa. Acid pickling primarily uses sulfuric acid at a concentration of 8%-12%, at a temperature of 30℃-40℃, also achieved through spraying at a pressure of 0.1MPa-0.3MPa. Ultrasonic cleaning is performed at a frequency of 30 kHz-100 kHz for 2-5 minutes at a temperature of 30℃-40℃. DI water rinsing (i.e., deionized water cleaning) requires a resistivity ≥18.2 MΩ·cm and is achieved through spraying at a pressure of 0.1MPa-0.3MPa.
[0030] V. Sputtering Seed Layer. A seed layer is sputtered onto the ceramic substrate using magnetron sputtering. The seed layer includes an adhesion layer, a barrier layer, and a conductive layer. The adhesion layer is typically made of titanium or chromium, with a thickness of 50nm-200nm. Titanium has excellent affinity with the ceramic substrate and can also form intermetallic compounds with the upper materials. The barrier layer is typically made of platinum or palladium, with a thickness of 50nm-150nm. Its main function is to prevent copper atoms from diffusing to the interface between the adhesion layer and the ceramic substrate after high temperatures, thus reducing the bonding strength. The conductive seed layer is typically made of copper, with a thickness of 200nm-1000nm. Its main function is to provide excellent conductivity, preparing for subsequent copper plating.
[0031] 6. Electroplating to fill the vias: This involves electroplating the vias to fill them with copper. The electroplating solution is copper sulfate-based with additives. The current mode is pulsed current with a current density of 1 ASD-3 ASD, and the temperature is 20℃ to 25℃. The electroplating anode is a phosphorus-containing copper ball.
[0032] 7. Grinding and Polishing. After filling the through holes, use a grinding machine to remove the protrusions on the board surface and grind them. The ceramic brush mesh should be 800-2000, the grinding current should be 0.1 A-0.5 A, and the grinding speed should be 0.2 m / min-1 m / min.
[0033] 8. Pattern Transfer. The area to be plated with copper is exposed through photosensitive emulsion coating, exposure, and development. The photosensitive emulsion coating thickness is 5um-50um, the alignment accuracy of the front and back faces during exposure is ±30um, the development uses an alkaline solution system, the development temperature is 25℃-30℃, the development spray pressure is 0.15Mpa-0.3Mpa, and the development speed is 0.5m / min-1.5m / min.
[0034] 9. Pattern Electroplating. Electroplating is used to plate copper layers of the required thickness onto exposed areas. The electroplating solution is copper sulfate-based, the current mode is direct current, and the current density is 1ASD-5ASD.
[0035] 10. Photoresist Removal. Wet removal is used, which may employ an alkaline removal solution (such as NaOH). The removal temperature is 50℃-80℃, and the soaking time is 5min-20min. Ultrasonic cleaning is performed for 10min-20min. This is followed by DI rinsing and drying at 60℃-90℃.
[0036] XI. Etching the Seed Layer. The etching solution for the copper seed layer can be ammonium persulfate, with an etching temperature above 40℃ and an etching time of 1-5 minutes. The etching solution for the titanium layer can be a mixture of hydrogen peroxide and ammonia, with an etching temperature above 40℃ and an etching time of 0.5-5 minutes.
[0037] 12. Copper Surface Cleaning. A horizontal cleaning line is used, including degreasing, acid pickling, ultrasonic cleaning, and DI water rinsing. The degreasing agent concentration is 8%-12%, the degreasing agent temperature is 30℃-40℃, and the cleaning method is spraying with a spray pressure of 0.1MPa-0.3MPa. The acid pickling mainly uses sulfuric acid, with a sulfuric acid concentration of 8%-12%, a temperature of 30℃-40℃, and the cleaning method is spraying with a spray pressure of 0.1MPa-0.3MPa. Ultrasonic cleaning is performed at a frequency of 30 kHz-100 kHz, a cleaning time of 2 min-5 min, and a temperature of 30℃-40℃. DI water rinsing (i.e., deionized water cleaning) is performed with a resistivity ≥18.2 MΩ·cm, using a spraying method with a spray pressure of 0.1MPa-0.3MPa.
[0038] Thirteen, Multi-layer Lamination. Align the DPC ceramic substrate 1 with the pattern made according to the mark point 12. The pin or positioning pin 12 passes through and limits the alignment. The diameter of the pin or positioning pin 12 is 0.03mm smaller than the size of the mark hole 12. After fixing, the alignment accuracy can be controlled within ±50um.
[0039] XIV. Multi-layer welding. Multi-layer welding employs copper-to-copper diffusion welding or brazing to achieve copper-to-copper bonding. Welding atmosphere: high vacuum, vacuum degree <10. -3 Pa. Welding temperature: 600℃-1000℃. Welding pressure: 5kg-30kg. Welding peel strength ≥15N / mm. Brazing solder: Silver-copper + X system or silver-copper 28 solder or solder sheet.
[0040] The table below shows the pull-out force test results for the copper-copper diffusion welding method and the brazing method, respectively.
[0041] Pull-out force test results of copper-copper diffusion welding method:
[0042] Results of brazing pull-out force test:
[0043] 15. Grinding. The copper surface after welding is treated by grinding to ensure that its appearance and roughness meet the requirements. A ceramic brush or non-woven cloth is used for grinding, with a grinding current of 0.1A-0.5A and a grinding speed of 0.2m / min-1m / min.
[0044] 16. Surface Treatment. Surface treatment options include wet sandblasting, OSP, nickel-gold plating, and nickel-palladium-gold plating.
Claims
1. A method for manufacturing ceramic DPC multilayer laminated plates, characterized in that, Includes the following steps: a. Preliminary preparation: Clean the surface of the ceramic substrate, then drill holes in the ceramic substrate to make mark holes (12) and through holes, and perform ceramic burr treatment and slag treatment on the mark holes (12) and through holes; b. Perform ceramic cleaning on the ceramic substrate, sputter a seed layer on the ceramic substrate, then electroplat the vias to fill them, grind and polish them and remove the protruding copper on the surface of the vias; c. By exposure and development, the circuit pattern is transferred to the photoresist, exposing the pattern area (11) that needs to be electroplated with copper; a copper layer is electroplated in the exposed pattern area (11) to form the circuit, and then the photoresist is removed, the seed layer is etched and the copper surface of the ceramic substrate is cleaned to complete the fabrication of the DPC substrate (1). d. Repeat steps a to c to complete the fabrication of the other DPC substrates; e. A positioning structure (2) is set in the mark hole (12) of the DPC substrate to stack the DPC substrates together, then the DPC substrates are welded together into a whole structure, and finally the copper surface is ground and surface treated.
2. The method for manufacturing ceramic DPC multilayer laminated plates as described in claim 1, characterized in that: In step e, the welding includes either copper-copper diffusion welding or brazing.
3. The method for manufacturing ceramic DPC multilayer laminated plates as described in claim 2, characterized in that: The copper-to-copper diffusion welding method includes the following welding conditions: vacuum degree <10 -3 Pa, inert atmosphere including nitrogen and argon atmosphere, and temperature range of 600°C to 1000°C.
4. The method for manufacturing ceramic DPC multilayer laminated plates as described in claim 2, characterized in that: The brazing method includes the following welding conditions: the solder contains silver-copper-titanium solder and copper-tin-titanium solder, and the vacuum degree is <10. -3 Pa and temperature range of 600℃ to 920℃.
5. The method for manufacturing ceramic DPC multilayer laminated plate as described in claim 1, characterized in that: In step e, the positioning structure (2) is a positioning pin.
6. The method for manufacturing a ceramic DPC multilayer laminated plate as described in any one of claims 1 to 5, characterized in that: In step b, the method for sputtering the seed layer is to sputter an adhesive layer, a barrier layer, and a conductive seed layer onto the ceramic substrate using magnetron sputtering.
7. The method for manufacturing ceramic DPC multilayer laminated plates as described in claim 6, characterized in that: The adhesive layer is made of titanium or chromium, and its thickness ranges from 50 nm to 200 nm.
8. The method for manufacturing ceramic DPC multilayer laminated plate as described in claim 6, characterized in that: The barrier layer is made of platinum or palladium, and its thickness ranges from 50 nm to 150 nm.
9. The method for manufacturing ceramic DPC multilayer laminated plate as described in claim 6, characterized in that: The conductive seed layer is made of copper, and the thickness of the conductive layer ranges from 200 nm to 1000 nm.
10. A ceramic DPC multilayer laminated plate welding structure, comprising at least two DPC substrates (1), characterized in that: Mark holes (12) are provided at corresponding positions between DPC substrates (1). The DPC substrates (1) are stacked one on top of the other. A positioning pin is provided in the mark hole (12). The axis of the positioning pin is perpendicular to the DPC substrate (1).