LED chip assembly and manufacturing method thereof
By evaporating a bonding metal layer and etching an ohmic contact layer on a red epitaxial wafer, the problem of brightness decay in small-sized LED chips was solved, and high-brightness red vertical micro LED manufacturing was achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-23
- Publication Date
- 2026-03-24
AI Technical Summary
As LED chip size shrinks, the brightness of red LED chips suffers severe degradation, especially in the 2-10µm range, where it is difficult to effectively remove the n-GaAs layer without affecting the chip voltage.
By evaporating a bonding metal layer on a red-light epitaxial wafer and bonding it to a temporary substrate, after removing the substrate, ohmic contact metal pads are patterned and evaporated on the ohmic contact layer, and then used as a mask for ICP dry etching to expose the first semiconductor layer and avoid the phenomenon of inner etching.
It improves the brightness of red vertical micro LEDs, avoids etching errors caused by the use of additional masks, and improves chip yield.
Smart Images
Figure CN121728890A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of LED chip technology, and in particular to an LED chip assembly and its manufacturing method. Background Technology
[0002] With the rise of the AR display industry, the market demands increasingly higher pixel counts for chips. This high pixel count is mainly achieved through the miniaturization of vertical LEDs. However, as the size of LEDs shrinks, the brightness of red light chips decreases sharply, primarily due to the following two reasons:
[0003] 1. When the chip pitch is reduced to 2-10µm, the chip brightness will be severely reduced due to the size effect;
[0004] 2. For red LED chips, due to material properties, the n-side can only form ohmic contacts with metal. The ohmic contact metal will block the light emission from the front of the chip, and the n-GaAs layer will also severely absorb light. For large-sized chips, the n-GaAs layer can be removed directly by wet etching without affecting the n-metal. However, for vertical MicroLED chips with a size of 2-10um, it is difficult to control the wet etching time, which may result in the n-GaAs layer under the n-metal being hollowed out, directly affecting the chip voltage. Summary of the Invention
[0005] In view of the shortcomings of the prior art, the purpose of this application is to provide an LED chip component and a method for manufacturing the same, in order to solve at least one of the above problems.
[0006] In a first aspect, this application provides a method for manufacturing an LED chip assembly, comprising: providing a red light epitaxial wafer, wherein the red light epitaxial wafer includes a substrate, and an ohmic contact layer, a first semiconductor layer, a light-emitting layer and a second semiconductor layer sequentially stacked on the substrate;
[0007] A bonding metal layer is deposited on the second semiconductor layer by vapor deposition;
[0008] The red-light epitaxial wafer is bonded to a temporary substrate through the bonding metal layer, and then the substrate is removed.
[0009] An ohmic contact metal pad is patterned and vapor-deposited on the ohmic contact layer;
[0010] The ohmic contact layer is etched using the ohmic contact metal pad as a mask to expose the first semiconductor layer.
[0011] In one possible embodiment, the step of using the ohmic contact metal pad as a mask to etch the ohmic contact layer to expose the first semiconductor layer includes:
[0012] Using the ohmic contact metal pad as a hard mask, the ohmic contact layer is etched using ICP dry etching to expose the first semiconductor layer.
[0013] In one possible embodiment, the etching gas and its ratio for the ICP dry etching process are: Cl2:BCl3 = 40:5.
[0014] In one possible embodiment, the method further includes:
[0015] Thin the ohmic contact metal pad so that the thickness of the ohmic contact metal pad is less than or equal to 150 Å.
[0016] In one possible embodiment, the thickness of the ohmic contact metal pad is 150 Å.
[0017] In one possible embodiment, the method further includes:
[0018] The first semiconductor layer, the light-emitting layer, and the second semiconductor layer are patterned to form a plurality of LED epitaxial structures on the temporary substrate.
[0019] In one possible embodiment, the method further includes:
[0020] Passivation layers are deposited on the epitaxial structures of the multiple LEDs.
[0021] In one possible embodiment, the method further includes:
[0022] An opening is made in the passivation layer to expose the ohmic contact metal pad on each of the LED epitaxial structures.
[0023] In one possible embodiment, the method further includes:
[0024] A transparent conductive layer is deposited by vapor deposition, wherein the transparent conductive layer forms an ohmic contact with the ohmic contact metal pad exposed on each of the LED epitaxial structures;
[0025] A first electrode and a second electrode are deposited on the temporary substrate, and at least one of the first electrode and the second electrode is connected to the transparent conductive layer.
[0026] Secondly, this application also provides an LED chip assembly manufactured using the LED chip assembly manufacturing method described in any one of the first aspects.
[0027] Beneficial effects:
[0028] This application provides an LED chip assembly and its fabrication method. The method involves providing a red epitaxial wafer, which includes a substrate and an ohmic contact layer, a first semiconductor layer, a light-emitting layer, and a second semiconductor layer sequentially stacked on the substrate. A bonding metal layer is deposited on the second semiconductor layer. The red epitaxial wafer is bonded to a temporary substrate through the bonding metal layer, and the substrate is removed. Ohmic contact metal pads are patterned and deposited on the ohmic contact layer. The ohmic contact layer is etched using the ohmic contact metal pads as a mask to expose the first semiconductor layer. This method of using the ohmic contact metal pads as a mask to etch the ohmic contact layer avoids the internal etching of the ohmic contact layer without the need for an additional mask, thereby effectively improving the brightness of the red vertical microLED. Attached Figure Description
[0029] Figure 1 This is a schematic diagram of an LED chip assembly manufacturing method provided in an embodiment of this application;
[0030] Figure 2 This is a schematic diagram of the structure of the red epitaxial wafer in the LED chip assembly fabrication method provided in the embodiments of this application;
[0031] Figure 3 This is a schematic diagram of the structure after the bonding metal layer is deposited in the LED chip assembly fabrication method provided in the embodiments of this application;
[0032] Figure 4 This is a schematic diagram of the epitaxial transfer and substrate peeling process in the LED chip assembly fabrication method provided in the embodiments of this application;
[0033] Figure 5 This is a schematic diagram of the structure of an LED chip assembly fabrication method provided in this application after the ohmic contact metal pad has been vapor-deposited;
[0034] Figure 6 This is a schematic diagram of the structure after etching the ohmic contact layer in an LED chip assembly fabrication method provided in this application embodiment;
[0035] Figure 7 This is a schematic diagram of the structure after Mesa etching in an LED chip assembly fabrication method provided in this application embodiment;
[0036] Figure 8 This is a schematic diagram of the structure after the passivation layer is applied in an LED chip assembly manufacturing method provided in this application embodiment;
[0037] Figure 9 This is a schematic diagram of the structure after the passivation layer is opened in an LED chip assembly manufacturing method provided in this application embodiment;
[0038] Figure 10 This is a schematic diagram of the electrode formation process in an LED chip assembly manufacturing method provided in this application.
[0039] Explanation of reference numerals in the attached figures:
[0040] 10-Substrate; 20-Ohmic contact layer; 30-First semiconductor layer; 40-Light-emitting layer; 50-Second semiconductor layer; 60-Bonding metal layer; 70-Temporary substrate; 80-Ohmic contact metal pad; 90-Passivation layer; 91-Hole; 100-Transparent conductive layer; 110-First electrode; 120-Second electrode. Detailed Implementation
[0041] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.
[0042] This invention discloses many different embodiments or examples for implementing different structures of the invention. To simplify the disclosure, specific examples of components and arrangements are described herein. These are merely examples and are not intended to limit the invention. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. In addition, examples of various specific processes and materials are provided in this invention, but those skilled in the art will recognize the application of other processes and / or the use of other materials.
[0043] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the specification of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. Generally, terms can be understood at least in part according to their usage in accordance with the invention. For example, the term "one or more" as used herein, depending at least in part on the invention, can be used to describe any component, structure, or feature in the singular or in the plural form to describe a combination of components, structures, or features. Similarly, terms such as "a," "an," or "the" can also be understood, depending at least in part on the invention, to convey either a singular or a plural usage. Furthermore, the term "based on..." can be understood not necessarily to convey an exclusive set of factors, but rather, depending at least in part on the invention, can alternatively allow for additional factors that do not necessarily have to be explicitly described.
[0044] It should be readily understood that the meanings of “on,” “above,” and “on top of” in this invention should be interpreted in the broadest sense, such that “on” means not only “directly on something,” but also “on something” including the presence of an intermediate component or layer between the two, and “on something” or “above something” means not only “on something” or “above something,” but also “on something” or “above something” where no intermediate component or layer between the two exists.
[0045] Furthermore, for ease of description, spatial relative terms such as "below," "under," "lower," "above," and "upper" may be used in this invention to describe the relationship of one element or component to another element or component shown in the accompanying drawings. In addition to the orientations described in the figures, the spatial relative terms are also intended to cover different orientations of the device during use or operation. The device may be oriented in other ways, rotated 90°, or otherwise oriented, and the spatial relative descriptive terms used in this invention can be interpreted accordingly.
[0046] As used in this invention, the term "layer" refers to a portion of material comprising a region of a certain thickness. A layer may extend over the entire lower or upper layer structure, or may have a extent smaller than that of the lower or upper layer structure. Furthermore, a layer may be a region of a homogeneous or heterogeneous continuous structure with a thickness less than the thickness of the continuous structure. For example, a layer may be located between the top and bottom surfaces of a continuous structure, or between any pair of horizontal planes therebetween. A layer may extend horizontally, vertically, and / or along a tapered surface. A substrate may be a single layer, which may include one or more layers, and / or may have one or more layers on, above, and / or below it. A single layer may include multiple layers. For example, a semiconductor layer may include one or more doped or undoped semiconductor layers, and may have the same or different materials.
[0047] refer to Figure 1 This is a schematic flowchart of an LED chip assembly manufacturing method provided in an embodiment of this application. The method includes:
[0048] 101: Provide a red-light epitaxial wafer.
[0049] For example, such as Figure 2 The aforementioned red light epitaxial wafer includes a substrate 10, and an ohmic contact layer 20, a first semiconductor layer 30, a light-emitting layer 40, and a second semiconductor layer 50 sequentially stacked on the substrate 10.
[0050] The first semiconductor layer 30 and the second semiconductor layer 50 are doped semiconductor layers of different types.
[0051] The first semiconductor layer 30 can be an N-doped semiconductor layer or a P-doped semiconductor layer, and the second semiconductor layer 50 can be a P-doped semiconductor layer or an N-doped semiconductor layer. The light-emitting layer 40 can be a multiple quantum well (MQW) structure. Specifically, the quantum well or quantum layer can be InGaN, AlGaN, InN, InAlN, AlInGaN, etc., while the quantum barrier alternately stacked with the quantum well layer can be GaN, AlN, AlGaN, AlInGaN, InAlN, etc.; the multiple quantum well structure can include one, two, three, four, five, six, seven, or eight quantum wells (or at least one quantum hole).
[0052] 102: A bonding metal layer is deposited on the second semiconductor layer by vapor deposition.
[0053] For example, such as Figure 3 As shown, a bonding metal layer 60 is deposited on the second semiconductor layer 50.
[0054] For example, the material of the bonding metal layer 60 can be metals such as Au / Sn / In.
[0055] As one implementation, when depositing the bonding metal layer 60, a temporary substrate can be placed together for depositing the bonding metal layer.
[0056] 103: The red epitaxial wafer is bonded to a temporary substrate through the bonding metal layer, and the substrate is removed.
[0057] Optionally, the temporary substrate is a silicon substrate.
[0058] For example, such as Figure 4 As shown, the red epitaxial wafer is transferred to the temporary substrate 70 by bonding the bonding metal layer 60 to the bonding metal on the temporary substrate 70 using a gold-to-gold bonding process. After the transfer is completed, the substrate 10 is peeled off from the red epitaxial wafer by a peeling process (such as laser peeling), thereby exposing the ohmic contact layer 20.
[0059] 104: An ohmic contact metal pad is patterned and vapor-deposited on the ohmic contact layer.
[0060] It is understandable that patterned vapor deposition refers to: creating a light-emitting pattern on the ohmic contact layer, then performing metal vapor deposition, and finally removing the adhesive, thereby achieving patterned metal vapor deposition.
[0061] For example, such as Figure 5 As shown, ohmic contact metal pads 80 are patterned and vapor-deposited on the ohmic contact layer 20.
[0062] Understandably, there are multiple ohmic contact metal pads 80.
[0063] Optionally, the ohmic contact metal pad 8 can be made of metals such as Au, Ge, and Ni.
[0064] 105: Use the ohmic contact metal pad as a mask to etch the ohmic contact layer to expose the first semiconductor layer.
[0065] In one implementation, step 105 includes: using the ohmic contact metal pad as a hard mask, etching the ohmic contact layer using ICP dry etching to expose the first semiconductor layer.
[0066] Optionally, the etching gas and its ratio for the ICP dry etching method are: Cl2:BCl3 = 40:5.
[0067] For example, such as Figure 6 As shown, the ohmic contact layer 10 is etched using ICP dry etching with the patterned ohmic contact metal pad 80 as a hard mask to expose the first semiconductor layer 20.
[0068] It is understandable that by using the ohmic contact metal pad 80 as a hard mask and employing dry etching to remove the ohmic contact layer 10 (n-GaAs) around the ohmic contact metal pad 80, the absorption of red light by n-GaAs can be reduced. In addition, it can also avoid the phenomenon of inner etching, reduce the probability of ohmic contact metal pad 80 falling off, and improve chip yield.
[0069] In one possible embodiment, the method of manufacturing the LED chip assembly further includes: thinning the ohmic contact metal pad so that the thickness of the ohmic contact metal pad is less than or equal to 150 Å.
[0070] Preferably, the thickness of the ohmic contact metal pad is 150 Å.
[0071] Understandably, by thinning the ohmic contact metal pad to 150A, the ohmic contact metal pad can be made semi-transparent, thereby reducing light absorption and reflection, and thus improving brightness.
[0072] It should be noted that the step of thinning the ohmic contact metal pad can be completed either before or after step 105; no specific limitation is made here.
[0073] In one possible embodiment, the method for fabricating the LED chip assembly further includes: patterning the first semiconductor layer, the light-emitting layer, and the second semiconductor layer to form a plurality of LED epitaxial structures on the temporary substrate.
[0074] Among them, the LED epitaxial structure is a red vertical micro-LED.
[0075] The aforementioned patterning refers to forming a predetermined pattern shape from a layer structure through multiple photolithography, etching, and other processes.
[0076] For example, such as Figure 7 As shown, the structure obtained through the aforementioned steps (such as...) Figure 6 Mesa etching is performed (as shown) to form multiple independent LED epitaxial structures.
[0077] It should be noted that during Mesa etching, only the bonding metal layer is etched. In other words, during Mesa etching, the semiconductor layer (i.e., the first semiconductor layer, the light-emitting layer, and the second semiconductor layer) is etched.
[0078] In one possible embodiment, the method for fabricating the LED chip assembly further includes depositing a passivation layer on a plurality of said LED epitaxial structures.
[0079] For example, such as Figure 8 As shown, a passivation layer 90 is deposited on a temporary substrate 70, which covers each LED epitaxial structure.
[0080] Optionally, the thickness of the passivation layer 90 is 200 nm to 500 nm.
[0081] In this embodiment, the passivation layer 90 covers the surface of the LED epitaxial structure to protect it. The passivation layer 90 can be one or more of Al2O3, AlN, SiN, SiO2, and AlON thin films.
[0082] In one possible embodiment, the method of fabricating the LED chip assembly further includes: creating openings in the passivation layer to expose the ohmic contact metal pads on each of the LED epitaxial structures.
[0083] For example, such as Figure 9 As shown, an opening 91 is made in the passivation layer 90 to expose the ohmic contact metal pad 80 on each of the LED epitaxial structures.
[0084] In one possible embodiment, the method for fabricating the LED chip assembly further includes: depositing a transparent conductive layer, the transparent conductive layer forming an ohmic contact with the ohmic contact metal pad exposed on each of the LED epitaxial structures; depositing a first electrode and a second electrode on the temporary substrate, at least one of the first electrode and the second electrode being connected to the transparent conductive layer.
[0085] For example, such as Figure 10As shown, a transparent conductive layer 100 is deposited on a temporary substrate 70, such that the transparent conductive layer 100 forms an ohmic contact with the ohmic contact metal pad 80 exposed on each of the LED epitaxial structures. Then, a first electrode 110 and a second electrode 120 are deposited on the temporary substrate, and at least one of the first electrode 110 and the second electrode 120 is connected to the transparent conductive layer 100.
[0086] Optionally, the transparent conductive layer 100 is ITO.
[0087] Based on the same inventive concept, this application also provides an LED chip assembly manufactured using the above-described method.
[0088] In summary, the LED chip assembly and its fabrication method provided in this application embodiment provide a red light epitaxial wafer, which includes a substrate and an ohmic contact layer, a first semiconductor layer, a light-emitting layer, and a second semiconductor layer sequentially stacked on the substrate; a bonding metal layer is deposited on the second semiconductor layer; the red light epitaxial wafer is bonded to a temporary substrate through the bonding metal layer, and the substrate is removed; ohmic contact metal pads are patterned and deposited on the ohmic contact layer; the ohmic contact layer is etched using the ohmic contact metal pads as a mask to expose the first semiconductor layer. This method of using the ohmic contact metal pads as a mask to etch the ohmic contact layer avoids the internal etching of the ohmic contact layer without the need for an additional mask, thereby effectively improving the brightness of the red vertical micro LED.
[0089] It should be understood that the application of the present invention is not limited to the examples above. Those skilled in the art can make improvements or modifications based on the above description, and all such improvements and modifications should fall within the protection scope of the appended claims.
Claims
1. A method for manufacturing an LED chip assembly, characterized in that, include: A red-light epitaxial wafer is provided, the red-light epitaxial wafer comprising a substrate, and an ohmic contact layer, a first semiconductor layer, a light-emitting layer and a second semiconductor layer sequentially stacked on the substrate; A bonding metal layer is deposited on the second semiconductor layer by vapor deposition; The red-light epitaxial wafer is bonded to a temporary substrate through the bonding metal layer, and then the substrate is removed. An ohmic contact metal pad is patterned and vapor-deposited on the ohmic contact layer; The ohmic contact layer is etched using the ohmic contact metal pad as a mask to expose the first semiconductor layer.
2. The method for manufacturing an LED chip assembly as described in claim 1, characterized in that, The step of using the ohmic contact metal pad as a mask to etch the ohmic contact layer to expose the first semiconductor layer includes: Using the ohmic contact metal pad as a hard mask, the ohmic contact layer is etched using ICP dry etching to expose the first semiconductor layer.
3. The method for manufacturing an LED chip assembly as described in claim 2, characterized in that, The etching gas and its ratio for the ICP dry etching method are: Cl2:BCl3 = 40:
5.
4. The method for manufacturing an LED chip assembly as described in claim 1, characterized in that, The method further includes: Thin the ohmic contact metal pad so that the thickness of the ohmic contact metal pad is less than or equal to 150 Å.
5. The method for manufacturing an LED chip assembly as described in claim 4, characterized in that, The thickness of the ohmic contact metal pad is 150 Å.
6. The method for manufacturing an LED chip assembly as described in any one of claims 1-5, characterized in that, The method further includes: The first semiconductor layer, the light-emitting layer, and the second semiconductor layer are patterned to form a plurality of LED epitaxial structures on the temporary substrate.
7. The method for manufacturing an LED chip assembly as described in claim 6, characterized in that, The method further includes: Passivation layers are deposited on the epitaxial structures of the multiple LEDs.
8. The method for manufacturing an LED chip assembly as described in claim 7, characterized in that, The method further includes: An opening is made in the passivation layer to expose the ohmic contact metal pad on each of the LED epitaxial structures.
9. The method for manufacturing an LED chip assembly as described in claim 8, characterized in that, The method further includes: A transparent conductive layer is deposited by vapor deposition, wherein the transparent conductive layer forms an ohmic contact with the ohmic contact metal pad exposed on each of the LED epitaxial structures; A first electrode and a second electrode are deposited on the temporary substrate, and at least one of the first electrode and the second electrode is connected to the transparent conductive layer.
10. An LED chip assembly, characterized in that, It is manufactured using the LED chip assembly manufacturing method as described in any one of claims 1-9.