Elastic wave device and module

Abstract

The invention discloses an elastic wave device and a module. The elastic wave device includes: a wiring substrate; a device chip mounted on the wiring substrate by flip chip bonding via a plurality of bumps, the device chip having a resonator; a metal pattern formed on an outer edge portion of the wiring substrate; a plurality of bump pads formed on the wiring substrate, the plurality of bump pads including an antenna pad, a transmission pad, a reception pad, and a ground pad; a solder resist layer bonded to the metal pattern and the wiring substrate at the same time; the sealing part is arranged between the wiring substrate and the device chip and penetrates into the space between the wiring substrate and the device chip to hermetically seal the device chip; wherein the solder resist layer is joined to the sealing portion.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of communication devices, and particularly to an elastic wave device and a module including the same. BACKGROUND

[0002] In a mobile communication terminal as a representative of a smartphone and the like, it is required to be able to correspond to a plurality of high frequency bands. Therefore, a front end module in which a plurality of band pass filters for communication through a high frequency band are mounted is used.

[0003] One example related to an elastic wave device is disclosed in Patent Literature 1 (Japanese Patent Application Publication No. 2019-54354).

[0004] In an elastic wave device such as a band pass filter, a duplexer, and the like, a device chip constituting, for example, a SAW filter is mounted on a wiring substrate by flip chip bonding. In order to cause a resonator constituting the SAW filter to generate mechanical vibration, a hollow region is formed, and sealing is performed by a synthetic resin or a material such as metal.

[0005] Since the resonator of the elastic wave device generates heat due to mechanical vibration and the like, a packaging structure having good heat dissipation performance is required. If the heat dissipation is poor, problems such as degradation of device characteristics, reduction in power resistance life, and the like can occur.

[0006] In addition, in order to suppress the intrusion of moisture into the closed hollow region, it is required to have good adhesion between the sealing portion and the wiring substrate. If the adhesion between the sealing portion and the wiring substrate is poor, rusting and the like of the internal metal can easily occur, which causes problems such as degradation of characteristics or reduction in life.

[0007] Further, in some elastic wave devices, in order to improve the adhesion between the sealing portion and the wiring substrate, a metal pattern formed at the outer edge of the wiring substrate is designed in a sawtooth pattern toward the center, at which time the sealing resin more easily penetrates between the wiring substrate and the device chip, which significantly increases the possibility that the resin contacts the resonator portion.

[0008] Further, between a metal pattern that allows an electric signal of a target frequency band to pass and a metal pattern that blocks the electric signal of the target frequency band, it is required to avoid interference such as a coupling phenomenon. If the coupling phenomenon occurs, it also causes degradation of device characteristics. SUMMARY

[0009] An object of the present application is to provide an elastic wave device having good heat dissipation performance, excellent adhesion between a sealing portion and a wiring substrate, and an effective suppression of a coupling phenomenon between a metal pattern that allows an electric signal of a target frequency band to pass and a metal pattern that does not pass, while being able to control the amount of penetration of sealing resin between the wiring substrate and the device chip.

[0010] In some embodiments, the present application provides an elastic wave device, comprising: a wiring substrate; a device chip mounted on the wiring substrate by a plurality of bumps, the device chip having a resonator; a metal pattern formed on an outer edge portion of the wiring substrate; a plurality of bump pads formed on the wiring substrate, the plurality of bump pads including an antenna pad, a transmission pad, a reception pad, and a ground pad; a solder resist layer in contact with the metal pattern and the wiring substrate; a sealing portion provided on the wiring substrate and penetrating therebetween to hermetically seal the device chip; wherein the solder resist layer is in contact with the sealing portion.

[0011] In some embodiments, the solder resist layer has a thermal conductivity of 1.0 W / mK or more.

[0012] In some embodiments, the metal pattern has a concave-convex shape portion or a sawtooth shape portion.

[0013] In some embodiments, at least a portion of the solder resist layer is subjected to roughening treatment.

[0014] In some embodiments, in the metal pattern near the device chip having a resonator, the concave-convex shape portion or the sawtooth shape portion has a tip direction including a region formed toward an outer edge of the wiring substrate, and a region formed with a tip direction toward a center of the wiring substrate.

[0015] In some embodiments, the concave-convex shape portion or the sawtooth shape portion in the metal pattern formed in a peripheral region of the antenna pad, the transmission pad, or the reception pad has a tip direction toward a center of the wiring substrate.

[0016] In some embodiments, the wiring substrate has a substantially rectangular structure having a long side and a short side, and in a region between two bump pads arranged along at least one of the short sides, the concave-convex shape portion or the sawtooth shape portion in the metal pattern near the device chip having a resonator has a length of a region formed with a tip direction toward an outer edge of the wiring substrate that is greater than a length of a region formed with a tip direction toward a center of the wiring substrate.

[0017] In some embodiments, the wiring substrate is a generally rectangular structure with a long side and a short side, and three or more bump pads are arranged along at least one of the long sides. The area between two or more bump pads formed by the arrangement of the three or more bump pads includes the following two types of areas: one is the area formed by the tip direction of the concave-convex or serrated portion of the metal pattern near the device chip with the resonator, which faces the outer edge of the wiring substrate, and its length is greater than the length of the area formed by its tip direction facing the center of the wiring substrate. Secondly, in the metal pattern, the area formed by the tip of the concave-convex or serrated portion toward the outer edge of the wiring substrate has a length that is less than the length of the area formed toward the center of the wiring substrate.

[0018] In one embodiment of the invention, the wiring substrate is a generally rectangular structure having a long side and a short side, and three or more bump pads are arranged along at least one of the long sides. Between two or more bump pads formed by the arrangement of these three or more bump pads, there are two consecutive regions. The feature is that in the metal pattern near the device chip equipped with the resonator, the length of the region formed by the tip direction of the concave-convex or serrated portion toward the outer edge of the wiring substrate is greater than the length of the region formed toward the center of the wiring substrate, and the bump pad formed between the two consecutive regions is a ground pad.

[0019] In some embodiments, the present invention also provides a module comprising the aforementioned elastic wave device.

[0020] Other features and advantages of the invention will be set forth in the following description, and will be apparent in part from the description, or may be learned by practicing the invention. Attached Figure Description

[0021] The accompanying drawings, which are provided to further illustrate this application and form part of this application, illustrate exemplary embodiments of this application and are used to explain this application, but do not constitute an undue limitation of this application.

[0022] Figure 1 This is a cross-sectional view of an elastic wave device 1 disclosed in this embodiment.

[0023] Figure 2 This is a schematic diagram of the metal pattern 7 formed on the wiring substrate 3.

[0024] Figure 3 This is a schematic diagram of the structure of the solder resist layer 10 formed on the wiring substrate 3.

[0025] Figure 4This is a schematic diagram of another configuration of the solder mask layer 10.

[0026] Figure 5 This is a diagram used to illustrate the structure of device chip 5.

[0027] Figure 6 This is a top view showing an embodiment of the elastic wave element 52 as a surface acoustic wave resonator.

[0028] Figure 7 This is a cross-sectional view showing an embodiment of the elastic wave element 52 as a piezoelectric thin film resonator.

[0029] Figure 8 This is a cross-sectional view of module 100 involved in Embodiment 2 of the present invention.

[0030] Figure 9 This is a schematic diagram of the circuit structure of module 100.

[0031] Symbol explanation: 1. Elastic wave device 3,130 Wiring board 5. Device Chips 7 Metal Patterns 9, GND9 bump pad 10 Solder mask layer 11. Roughening section 15 bumps 17,117 Sealing section 31,131 External connection terminals 52 Elastic wave element 54 Wiring Pattern 56 Insulators 60 Chip Substrate 62 Piezoelectric film 64 Lower electrode 66 Upper electrode 68 Cavity 100 modules 101 Common Input Terminal 103 Output Terminal 1 105 Second Output Terminal 111 First Inductor Component 112 Second Inductor Component ANT antenna terminal SW switching circuit BPF1 First Bandpass Filter BPF2 second bandpass filter LNA1 Low Noise Amplifier LNA2 Second Low Noise Amplifier IC (Integrated Circuit) components. Detailed Implementation

[0032] The specific embodiments of the present invention will be described below with reference to the accompanying drawings, thereby more clearly illustrating the content of the present invention.

[0033] Figure 1 This is a cross-sectional view of the elastic wave device 1 involved in this embodiment.

[0034] like Figure 1 As shown, the elastic wave device 1 involved in this embodiment includes a wiring substrate 3 and two device chips 5 mounted on the wiring substrate 3.

[0035] In this embodiment, the elastic wave device shown is an exemplary duplexer with two device chips 5 mounted on it. However, the scope of the invention is not limited to this; it can also be an elastic wave device in the form of a bandpass filter with only one device chip 5 mounted, or a quadplexer with four device chips 5 mounted. Furthermore, functional elements capable of implementing duplexer functions can also be formed on a single device chip.

[0036] The wiring substrate 3 can be, for example, a multilayer substrate made of resin, or a low-temperature co-fired ceramic (LTCC) multilayer substrate made of multiple dielectric layers. Furthermore, the wiring substrate 3 also includes multiple external connection terminals 31.

[0037] The device chip 5 can be made of a piezoelectric single crystal such as lithium tantalate, lithium niobate or crystal, or a substrate made of piezoelectric ceramic.

[0038] Alternatively, the device chip 5 can also be a composite substrate formed by bonding a piezoelectric substrate and a support substrate. The support substrate can be, for example, a sapphire substrate, an alumina substrate, a spinel substrate, or a silicon substrate.

[0039] A metal pattern 7 and a plurality of bump pads 9 are formed on the wiring substrate 3. The metal pattern 7 is formed on the outer edge of the wiring substrate 3. The bump pads 9 are formed on the inner side of the metal pattern 7. The metal pattern 7 and the bump pads 9 can be made of, for example, copper or a copper-containing alloy. Furthermore, the thickness of the metal pattern 7 and the bump pads 9 can be set to, for example, 10 μm to 35 μm.

[0040] A solder resist layer 10 is formed on the metal pattern 7 and the wiring substrate 3. The solder resist layer 10 can be formed of a material such as thermosetting epoxy resin. The thickness of the solder resist layer 10 can be set to, for example, 10 μm to 35 μm. The solder resist layer 10 is formed in a manner that simultaneously bonds the metal pattern 7 and the wiring substrate 3.

[0041] A sealing portion 17 is formed at the location covering the device chip 5. The sealing portion 17 is made of an insulating material such as synthetic resin. The synthetic resin can be epoxy resin, polyimide, or other materials, but is not limited to these. Preferably, epoxy resin is used, and the sealing portion 17 is formed by a low-temperature curing process. During the thermosetting process of forming the sealing portion 17, the sealing resin may seep between the wiring substrate 3 and the device chip 5. During this process, since the metal pattern 7 is made of metal and the sealing portion 17 is made of resin, the bonding strength between the two is low, and there is a risk that the sealing portion 17 will peel off from the wiring substrate 3. Therefore, in conventional wiring substrates without a solder mask layer, the area of ​​the metal pattern 7 is considerably limited to ensure sufficient bonding strength. Although the solder mask layer 10 is made of resin, it has good adhesion to the metal pattern 7. At the same time, since the solder mask layer 10 itself is also made of resin, it also has good adhesion to both the wiring substrate 3 and the sealing portion 17. The adhesion between the solder mask layer 10 and the metal pattern 7 is high. Therefore, by providing the solder mask layer 10, the restrictions on the area of ​​the metal pattern 7 can be relaxed, and the requirements for the peel strength between the wiring board 3 and the sealing part 17 can be reduced, thereby achieving a more flexible design.

[0042] The device chip 5 is mounted on the wiring substrate 3 via bumps 15 using a flip-chip bonding method. The bumps 15 can be, for example, gold bumps. The height of the bumps 15 is, for example, 20 μm to 50 μm.

[0043] The bump pad 9 is electrically connected to the device chip 5 via the bump 15. Here, depending on the thickness of the solder mask 10 and the height of the bump 15, the device chip 5 may come into contact with the solder mask 10 during the flip-chip bonding process. Therefore, as... Figure 1 As shown, it is preferable to ensure that the distance A between the solder mask layer 10 and the device chip 5 is approximately 50 μm to 100 μm.

[0044] Figure 2 This is a schematic diagram showing the structure of the metal pattern 7 formed on the wiring substrate 3.

[0045] like Figure 2 As shown, a metal pattern 7 is formed on the outer edge of the wiring substrate 3. The metal pattern 7 has raised or recessed portions or serrated portions. Furthermore, the metal pattern 7 includes an OUTER region, in which the tips of the raised or recessed portions or serrated portions are formed towards the outer edge of the wiring substrate 3. Additionally, the metal pattern 7 also includes another CENTER region, in which the tips of the raised or recessed portions or serrated portions are formed towards the center of the wiring substrate 3.

[0046] Furthermore, the metal pattern 7 does not have to be a completely continuous pattern; it may also include pattern portions with intermittent structures.

[0047] The area AREA17, defined by the solid line representing the outer edge of the wiring substrate 3 and the solid line representing the outer edge of the device chip 5, represents the bonding area of ​​the sealing portion 17. The bonding area AREA17 of the sealing portion 17 includes a region bonding with the wiring substrate 3 and a region bonding with the metal pattern 7 formed on the wiring substrate 3. In other words, the sealing portion 17 (in...) Figure 2 (Not shown in the diagram) It is simultaneously bonded to the wiring substrate 3 and the metal pattern 7.

[0048] The metal pattern 7 can improve the thermal conductivity between the wiring substrate 3 and the sealing portion 17, thereby improving the heat dissipation performance of the elastic wave device. Furthermore, due to the solder resist layer 10 ( Figure 2 (Not shown) The boundary between the bonding area of ​​the solder mask 10 and the bonding area of ​​the sealing portion 17 and the metal pattern 7 is convex or serrated, thus making the boundary line longer. Furthermore, in the convex structure, the solder mask 10 can extend to the concave region of the metal pattern 7, and in the serrated structure, the solder mask 10 can extend to the valley region of the metal pattern 7. With this structure, an anchoring effect can be obtained, thereby improving the adhesion between the solder mask 10 and the solder mask 3.

[0049] In addition, such as Figure 2 As shown, a plurality of bump pads 9 are formed on the wiring substrate 3. These bump pads 9 include an antenna pad ANT, a transmit pad Tx, a receive pad Rx, and a ground pad GND9. Furthermore, some bump pads, such as the ground pad GND97, are electrically connected to the metal pattern 7 and are formed as bump pads GND9 with a ground potential. This enhances grounding performance.

[0050] In addition, such as Figure 2 As shown, preferably, in the peripheral region of the antenna pad ANT, transmit pad Tx, or receive pad Rx, the tips of the concave-convex or serrated portions of the metal pattern 7 extend toward the center of the wiring substrate. This structure limits the parasitic capacitance between the antenna pad ANT, transmit pad Tx, or receive pad Rx and the metal pattern 7, thereby effectively suppressing coupling phenomena.

[0051] In addition, such as Figure 2 As shown, the wiring substrate 3 is a roughly rectangular structure with a long side and a short side. In the region R1 between the two bump pads arranged along the short side, the length OL of the region formed by the tip direction of the concave-convex or serrated portion of the metal pattern 7 toward the outer edge of the wiring substrate 3 is greater than the length of the region formed by the tip direction toward the center of the wiring substrate 3.

[0052] Since functional elements are typically formed in the region closer to the outer edge of the device chip 5 in the short side direction of the wiring substrate 3, it is preferable to extend the region R1 to a length of OL as much as possible.

[0053] During the process of forming the sealing portion 17, there is a problem that the sealing resin can seep into the space between the wiring substrate 3 and the device chip 5, and come into contact with the functional elements formed on the device chip 5. In the CENTER region formed where the tips of the concave-convex or serrated portions of the metal pattern 7 face the center of the wiring substrate 3, the metal pattern 7 has a considerable height, for example, with a thickness of 10 μm to 35 μm. Therefore, when pressure is applied during the formation of the sealing portion 17, the metal pattern 7 forms a wall, making it easier for the sealing resin to seep into the space between the wiring substrate 3 and the device chip 5.

[0054] Therefore, for resonators on the device chip 5 located near the CENTER region formed by the tips of the concave-convex or serrated portions of the metal pattern facing the center of the wiring substrate 3, it is preferable to form them as far away from the outer edge of the device chip 5 as possible. However, for resonators on the device chip 5 located near the OUTER region formed by the tips of the concave-convex or serrated portions of the metal pattern facing the outer edge of the wiring substrate 3, even if formed close to the outer edge of the device chip 5, the possibility of sealant penetration and contact is low. Therefore, from the perspective of space utilization efficiency, it is preferable to form them close to the outer edge of the device chip 5.

[0055] In addition, such as Figure 2 As shown, four bump pads are arranged along the long side of the wiring substrate 3. This forms three bump pad regions R2, R3, and R4 between them. Region R2 has the following characteristic: the length of the region formed by the tip direction of the concave-convex or serrated portion of the metal pattern 7 toward the outer edge of the wiring substrate 3 is shorter than the length of the region formed by the tip direction toward the center of the wiring substrate 3.

[0056] Regions R3 and R4 have the following characteristics: the length of the region formed by the tip direction of the concave-convex or serrated portion of the metal pattern 7 toward the outer edge of the wiring substrate 3 is greater than the length of the region formed by the tip direction toward the center of the wiring substrate 3.

[0057] Regions R3 and R4 are adjacent to each other and are regions between two consecutive bump pads. In these two regions, the length of the area formed by the tips of the concave / convex or serrated portions of the metal pattern 7 toward the outer edge of the wiring substrate 3 is greater than the length of the area formed toward the center of the wiring substrate 3. The bump pad formed at the intermediate position between regions R3 and R4 is a ground pad GND97. Furthermore, as mentioned above, the ground pad GND97 is electrically connected to the metal pattern 7.

[0058] Figure 3 This is a schematic diagram showing the structure of the solder resist layer 10 formed on the wiring substrate 3. Figure 3 It shows in Figure 2 The example shown depicts a metal pattern 7 with a solder mask layer 10 applied. The overlapping portion of the metal pattern 7 and the solder mask layer 10 is indicated by dashed lines. Figure 3 As shown, the solder mask layer 10 is formed on the outer edge of the wiring substrate 3. The solder mask layer 10 includes a region formed directly on the wiring substrate 3 and a region formed on the metal pattern 7.

[0059] Preferably, a solder resist material with excellent heat dissipation properties is used to form the solder resist layer 10. For example, a solder resist material with excellent heat dissipation properties has a thermal conductivity of 1.0 W / m•K or higher. For example, the PSR® (registered trademark, manufactured by Taiyo Holdings Co., Ltd.)-4000HS series can be used. Furthermore, it is more preferable to use a solder resist material with a thermal conductivity of 3 W / m•K or higher. For reference, the thermal conductivity of conventional solder resist materials is generally about 0.2 to 0.5 W / m•K.

[0060] The solder resist layer 10 preferably uses a solder resist material that exhibits low dielectric properties in the high-frequency (GHz band) region. This means that the dielectric constant (DK) of the solder resist material is, for example, 2.0 to 3.0 at 10 GHz. For example, solder resist materials from the PSR® (registered trademark, manufactured by Taiyo Holdings Co., Ltd.)-4000 series suitable for substrates used in high-frequency components can be used. In contrast, conventional solder resist materials have a dielectric property DK of approximately 4.1 to 4.3 in the high-frequency (GHz band) region.

[0061] Figure 4 This is a diagram showing another structural example of the solder mask layer 10. (See diagram for example.) Figure 4 As shown, it is preferable to roughen the solder resist layer 10 (forming a roughened portion 11). This treatment can further improve its adhesion to the sealing portion 17. The roughening treatment method can be selected from mechanical or chemical methods as needed.

[0062] Figure 5 This is a schematic diagram used to illustrate the structure of device chip 5.

[0063] like Figure 5 As shown, an elastic wave element 52 and a wiring pattern 54 are formed on the device chip 5.

[0064] An insulator 56 is formed on the wiring pattern 54. The insulator 56 may be made of, for example, a polyimide material. The insulator 56 may be formed with a film thickness of, for example, 1000 nm.

[0065] Wiring pattern 54 is also formed on insulator 56, and the wiring structure is constructed in three dimensions by achieving spatial intersection through insulator 56.

[0066] The elastic wave element 52 and the wiring pattern 54 can be made of suitable metals or alloys such as silver, aluminum, copper, titanium, and palladium. Furthermore, these metal patterns can also be formed by a multilayer metal film stacking structure. The thickness of the elastic wave element 52 and the wiring pattern 54 can be set, for example, from 150 nm to 400 nm.

[0067] Wiring pattern 54 includes a wiring structure that constitutes input pad In, output pad Out, and ground pad GND. Furthermore, wiring pattern 54 is electrically connected to elastic wave element 52.

[0068] like Figure 5 As shown, a bandpass filter can be constructed, for example, by forming multiple elastic wave elements 52. The bandpass filter is designed to allow only the electrical signal in the desired frequency band of the electrical signal received by the input pad In to pass through.

[0069] The electrical signal input from the input pad In passes through a bandpass filter, and the electrical signal of the required frequency band is output to the output pad Out.

[0070] The electrical signal output to the output pad Out is output from the external connection terminal 31 on the wiring board 3 through the bump 15 and the bump pad 9.

[0071] Figure 6 This is an example top view showing the elastic wave element 52 as a surface acoustic wave resonator.

[0072] like Figure 6 As shown, an IDT (Interdigital Transducer) 52a for exciting surface acoustic waves and a reflector 52b are formed on the device chip 5. The IDT 52a has a pair of comb-shaped electrodes 52c arranged opposite to each other.

[0073] The comb-shaped electrode 52c has multiple electrode fingers 52d and a busbar 52e for connecting the multiple electrode fingers 52d. Reflectors 52b are disposed on both sides of the IDT 52a.

[0074] The IDT 52a and reflector 52b may be made of, for example, an aluminum-copper alloy. The film thickness of the IDT 52a and reflector 52b may be, for example, a thin film of 150 nm to 400 nm.

[0075] IDT 52a and reflector 52b may also contain other metals, such as titanium, palladium, silver, or suitable metals or alloys thereof, or may be composed of these alloys. Furthermore, IDT 52a and reflector 52b may also be formed by a multilayer metal film stacked structure.

[0076] Figure 7 This is an exemplary cross-sectional view showing that the elastic wave element 52 is a piezoelectric thin film resonator.

[0077] like Figure 7 As shown, a piezoelectric film 62 is disposed on the chip substrate 60. The piezoelectric film 62 is formed by a lower electrode 64 and an upper electrode 66 sandwiched together. A cavity 68 is formed between the lower electrode 64 and the chip substrate 60. The lower electrode 64 and the upper electrode 66 will excite elastic waves with a thickness longitudinal vibration mode in the piezoelectric film 62.

[0078] The chip substrate 60 can be a semiconductor substrate such as silicon, or an insulating substrate such as sapphire, alumina, spinel, or glass. The piezoelectric film 62 can be made of, for example, aluminum nitride.

[0079] The lower electrode 64 and the upper electrode 66 can be made of metal materials such as ruthenium.

[0080] The elastic wave element 52 can be applied to multimode filters or stepped filters as needed to obtain the required bandpass filter characteristics.

[0081] According to one embodiment of the present invention described above, an elastic wave device can be provided, which has good heat dissipation, excellent adhesion between the sealing part and the wiring substrate, and excellent characteristics that make it difficult for coupling to occur between the metal pattern through which the electrical signal of the required frequency band can pass and the metal pattern through which it cannot pass. At the same time, the amount of sealing resin penetrating between the wiring substrate and the device chip can be controlled.

[0082] Example 2 Embodiment 2 of another embodiment of the present invention is described below.

[0083] Figure 8 This is a cross-sectional view of module 100 involved in Embodiment 2 of the present invention.

[0084] like Figure 8 As shown, the elastic wave device 1 is mounted on the main surface of the wiring board 130. The elastic wave device 1 can be, for example, a dual-channel filter consisting of a first bandpass filter BPF1 and a second bandpass filter BPF2 (not shown).

[0085] The wiring board 130 has a plurality of external connection terminals 131. The plurality of external connection terminals 131 are configured to be mounted on the main board of a predetermined mobile communication terminal.

[0086] On the main surface of the wiring board 130, a first inductor 111 and a second inductor 112 are mounted to achieve impedance matching. The module 100 encapsulates multiple electronic components, including the elastic wave device 1, through a sealing portion 117.

[0087] An integrated circuit component IC is mounted inside the wiring board 130. The integrated circuit component IC (not shown) includes a switching circuit SW, a first low-noise amplifier LNA1, and a second low-noise amplifier LNA2.

[0088] Figure 9 This is a diagram illustrating the general circuit structure of module 100.

[0089] like Figure 9 As shown, the common input terminal 101 (external connection terminal 131) of module 100 is connected to the antenna terminal ANT. The first output terminal 103 and the second output terminal 105 (external connection terminal 131) are connected to a signal processing circuit (not shown).

[0090] The signal input from the common input terminal 101 is switched via the switching circuit SW to either a signal via the first bandpass filter BPF1 or a signal via the second bandpass filter BPF2.

[0091] The signal, after being impedance-matched by the first bandpass filter BPF1 and amplified by the first inductor 111, is output from the first output terminal 103. Alternatively, if the first bandpass filter BPF1 is used as a transmitting filter, the first output terminal 103 can function as an input terminal. In this case, the signal, amplified by the first low-noise amplifier LNA1 and impedance-matched by the first inductor 111, is transmitted through the first bandpass filter BPF1 and emitted from the antenna terminal.

[0092] The signal transmitted via the second bandpass filter BPF2 undergoes impedance matching via the second inductor 112, is amplified by the second low-noise amplifier LNA2, and is then output from the second output terminal 105. Alternatively, if the second bandpass filter BPF2 is used as a transmitting filter, the second output terminal 105 can function as an input terminal. In this case, the signal amplified by the second low-noise amplifier LNA2 and impedance matched by the second inductor 112 is transmitted via the second bandpass filter BPF2 and emitted from the antenna terminal.

[0093] The remaining structure is the same as that described in Example 1, so the description is omitted.

[0094] According to the embodiments of the present invention described above, a module can be provided that has an elastic wave device, which has excellent characteristics, including good heat dissipation, excellent adhesion between the sealing part and the wiring substrate, and difficulty in coupling between metal patterns through which the required frequency electrical signal can pass and metal patterns that cannot pass.

[0095] Of course, the present invention is not limited to the embodiments described above, but includes all embodiments that can achieve the purpose of the present invention.

[0096] Furthermore, although several aspects of at least one implementation method have been described above, it should be understood that various modifications, alterations and improvements will readily come to mind for those skilled in the art.

[0097] These modifications, alterations, and improvements are intended to form part of this description and are included within the scope of the invention. It should be understood that embodiments of the methods and apparatus described herein are not limited to the structures and arrangements shown in the foregoing description or drawings. The methods and apparatus can be implemented in other ways and can be carried out or performed in various forms. Specific implementation examples are given for illustrative purposes only and are not intended to constitute limitation.

[0098] Furthermore, the expressions and terms used herein are for illustrative purposes only and should not be considered limiting. The terms "comprising," "including," "possessing," "having," and variations thereof, as used herein, should be understood to cover the listed items and their equivalents, as well as additional items. References to "or" should be understood as any one, any combination of, or all of the listed items. Descriptions of directions such as front / back, left / right, up / down, and horizontal / vertical are for ease of description only and do not imply that the components of the invention are limited to a specific location or spatial orientation. Therefore, the above descriptions and drawings are merely illustrative.

Claims

1. An elastic wave device, characterized in that, include: Wiring board; The device chip is mounted on the wiring substrate by multiple bumps using a flip-chip bonding method, and the device chip has a resonator. A metallic pattern is formed on the outer edge portion of the wiring substrate; Multiple bump pads are formed on the wiring substrate, including antenna pads, transmit pads, receive pads and ground pads; The solder mask layer is simultaneously bonded to the metal pattern and the wiring substrate; A sealing portion is disposed on the wiring substrate and penetrates between the two to provide an airtight seal for the device chip; The solder resist layer is bonded to the sealing portion.

2. The elastic wave device according to claim 1, wherein, The thermal conductivity of the solder resist layer is above 1.0 W / mK.

3. The elastic wave device according to claim 1, wherein, The metal pattern has raised or serrated portions.

4. The elastic wave device according to claim 3, wherein, In the metal pattern near the device chip equipped with the resonator, the tip direction of the concave-convex or serrated portion includes a region formed toward the outer edge of the wiring substrate and a region formed toward the center of the wiring substrate.

5. The elastic wave device according to claim 3, wherein, The raised or serrated portions of the metal pattern formed in the peripheral area of ​​the antenna pad, the transmitting pad, or the receiving pad have their tips pointing toward the center of the wiring substrate.

6. The elastic wave device according to claim 3, wherein, The wiring substrate is a rectangular structure with a long side and a short side. In the region between the two bump pads arranged along at least one of the short sides, the length of the region formed by the tip direction of the concave-convex or serrated portion of the metal pattern near the device chip with the resonator, facing the outer edge of the wiring substrate, is greater than the length of the region formed by the tip direction of the metal pattern facing the center of the wiring substrate.

7. The elastic wave device according to claim 3, wherein, The wiring board is a rectangular structure with a long side and a short side, and three or more bump pads are arranged along at least one of the long sides. In the region between two or more bump pads formed by the arrangement of the three or more bump pads, there are the following two types of regions: First, in the metal pattern near the device chip with the resonator, the region formed with the tip direction of the concave-convex or serrated portion facing the outer edge of the wiring substrate, whose length is greater than the length of the region formed with the tip direction facing the center of the wiring substrate, is a region between bump pads. Second, in the metal pattern near the device chip equipped with the resonator, the area formed with the tip direction of the concave-convex or serrated portion facing the outer edge of the wiring substrate, whose length is less than the length of the area formed with the tip direction facing the center of the wiring substrate, is the area between the bump pads.

8. The elastic wave device according to claim 3, wherein, The wiring substrate is a rectangular structure with a long side and a short side. Three or more bump pads are arranged along at least one of the long sides. Among the two or more bump pad regions formed by the arrangement of the three or more bump pads, there are two consecutive bump pad regions. In these two regions, the length of the region formed by the tip direction of the concave-convex or serrated portion of the metal pattern near the device chip with the resonator, facing the outer edge of the wiring substrate, is greater than the length of the region formed by its tip direction facing the center of the wiring substrate. The bump pad formed between these two consecutive regions is a ground pad.

9. The elastic wave device according to claim 1, wherein, At least a portion of the solder resist layer has been roughened.

10. A module comprising the elastic wave device according to any one of claims 1 to 9.

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