Circuit board

By setting multiple water-blocking layers on the circuit board to prevent liquid or water vapor penetration, the oxidation and corrosion problems of the circuit board circuit layers are solved, thus improving the reliability of the circuit board.

CN121751472APending Publication Date: 2026-03-27CHIPBOND TECH
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-04
Publication Date
2026-03-27

AI Technical Summary

Technical Problem

During the manufacturing, transportation, or storage of existing circuit boards, liquids or moisture can penetrate into the solder resist layer, causing oxidation or corrosion of the circuit layers and affecting the structural and electrical reliability of the circuit board.

Method used

At least one water-blocking layer is used to cover the solder resist layer to prevent liquid or moisture from penetrating into the circuit layer. A combination of multiple water-blocking layers is used to improve the protection effect, including a first water-blocking layer, a second water-blocking layer and an adhesive layer. The moisture permeability and thickness of each layer are controlled within a specific range.

Benefits of technology

It effectively prevents liquids or moisture from penetrating into the solder resist layer and circuit layer, avoiding oxidation or corrosion, and improving the structural and electrical reliability of the circuit board.

✦ Generated by Eureka AI based on patent content.

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  • Figure CN121751472A_ABST
    Figure CN121751472A_ABST
Patent Text Reader

Abstract

A circuit board comprises a carrier plate, a circuit layer, a solder mask layer and at least one waterproof layer, the circuit layer is arranged on the carrier plate, the solder mask layer covers the circuit layer and exposes a plurality of inner pins and a plurality of outer pins of the circuit layer, and the waterproof layer covers the solder mask layer, so that the circuit layer and the solder mask layer are located between the carrier plate and the waterproof layer. The waterproof layer can prevent liquid attached to the waterproof layer or water vapor in the environment from permeating to the solder mask layer and the circuit layer through the waterproof layer to cause corrosion or oxidation of the circuit layer.
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Description

Technical Field

[0001] This invention relates to a circuit board, and more particularly to a circuit board that prevents the circuit layers from being corroded or oxidized. Background Technology

[0002] Please see Figure 1 In a known circuit board 10, a circuit layer 12 is formed on a carrier board 11, and then a solder resist layer 13 is used to cover the circuit layer 12. However, during the manufacturing process, transportation, or storage environment of the circuit board 10, liquid or moisture may adhere to the solder resist layer 13 and penetrate into the circuit layer 12 through the solder resist layer 13, causing the circuit layer 12 to oxidize and thus causing bridging and short circuits in the circuit layer 12. In addition, when the liquid or moisture contains corrosive elements (such as chlorine), the corrosive elements may use the liquid or moisture as a carrier to penetrate into the circuit layer 12 through the solder resist layer 13 and corrode the circuit layer 12, thus causing open circuits in the circuit layer 12, thereby affecting the structural and electrical reliability of the circuit board 10. Summary of the Invention

[0003] The main objective of this invention is to provide a circuit board that prevents liquid or moisture from penetrating into a solder resist layer. The circuit board has at least one water-blocking layer that blocks liquid or moisture from penetrating into the solder resist layer and the circuit layer, thereby avoiding oxidation or corrosion of the circuit layer.

[0004] A circuit board of the present invention includes a carrier board, a circuit layer, a solder resist layer, and at least one first water-blocking layer. The circuit layer is disposed on the carrier board and has a plurality of internal pins and a plurality of external pins. The solder resist layer covers the circuit layer and exposes the internal pins and the external pins. The first water-blocking layer covers the solder resist layer, such that the circuit layer and the solder resist layer are located between the carrier board and the first water-blocking layer. The water vapor transmission rate (WVTR) of the first water-blocking layer is not greater than 1 x 10⁻⁶. -2 g / m 2 ·day.

[0005] In one embodiment of the present invention, the first water-blocking layer has a projection on the carrier plate, the solder resist layer is located in the projection, and the first water-blocking layer completely covers the solder resist layer.

[0006] In one embodiment of the present invention, the thickness of the first water-blocking layer is no greater than 50 μm.

[0007] In one embodiment of the present invention, it further includes a second water-blocking layer, wherein the first water-blocking layer is integrally formed with the second water-blocking layer and the solder resist layer, and the water-transmitting capacity (WVTR) of the second water-blocking layer is not greater than 10 g / m. 2 ·day.

[0008] In one embodiment of the present invention, the second water-blocking layer is viscous.

[0009] In one embodiment of the present invention, the thickness of the second water-blocking layer is no greater than 80 μm.

[0010] In one embodiment of the present invention, it further includes a third water-blocking layer that covers the first water-blocking layer, wherein the water vapor transmission rate (WVTR) of the third water-blocking layer is not greater than 0.6 g / m³. 2 ·day.

[0011] In one embodiment of the present invention, the third water-blocking layer has a projection on the carrier plate, the first water-blocking layer is located in the projection of the third water-blocking layer, and the third water-blocking layer completely covers the first water-blocking layer.

[0012] In one embodiment of the present invention, the thickness of the third water-blocking layer is no greater than 50 μm.

[0013] In one embodiment of the present invention, it includes an adhesive layer, wherein the third water-blocking layer is attached to the first water-blocking layer by the adhesive layer.

[0014] In one embodiment of the present invention, the water vapor transmission rate (WVTR) of the adhesive layer is not greater than 10 g / m. 2 ·day.

[0015] In one embodiment of the present invention, the thickness of the adhesive layer is no greater than 80 μm.

[0016] The present invention uses a first water-blocking layer to prevent liquid or water vapor from penetrating into the solder resist layer, thereby preventing liquid or water vapor or corrosive elements (such as chlorine) carried by liquid or water vapor from penetrating into the solder resist layer and the circuit layer in sequence through the water-blocking layer, causing oxidation or corrosion of the circuit layer, and avoiding affecting the structure and electrical reliability of the circuit board. Attached Figure Description

[0017] Figure 1 A cross-sectional view of a known circuit board;

[0018] Figure 2 This is a schematic diagram of the packaging structure of the present invention;

[0019] Figures 3 to 4 This is a cross-sectional view of the packaging structure of the present invention.

[0020] Figure label:

[0021] 10: Circuit board 11: Carrier board

[0022] 12: Circuit layer 13: Solder resist layer

[0023] 100: Circuit board; 110: Carrier board

[0024] 120: Line layer 121: Internal pin

[0025] 122: External pin; 130: Solder resist layer

[0026] 140: First water-blocking layer 141: Projection

[0027] 150: Second water-blocking layer; 160: Third water-blocking layer

[0028] 161: Projection 170: Adhesive layer Detailed Implementation

[0029] Please see Figure 2 and Figure 3 The present invention provides a circuit board 100 for preventing liquid or moisture from penetrating into the circuit layer 120 of the circuit board 100 and causing the circuit layer 120 to oxidize or be corroded.

[0030] Please see Figure 2 and Figure 3 The circuit board 100 includes a carrier board 110, a circuit layer 120, a solder resist layer 130, and at least one first water-blocking layer 140. The circuit layer 120 is disposed on the carrier board 110 and includes a plurality of internal pins 121 and a plurality of external pins 122. The solder resist layer 130 covers the circuit layer 120 and exposes at least the internal pins 121 and the external pins 122. The internal pins 121 are used to electrically connect to a chip (not shown in the figure), and the external pins 122 are used to electrically connect to another electronic component (not shown in the figure, such as a display panel), but are not limited thereto.

[0031] Please see Figure 2 and Figure 3 The first water-blocking layer 140 covers the solder resist layer 130, such that the circuit layer 120 and the solder resist layer 130 are located between the carrier board 110 and the first water-blocking layer 140, and the water vapor transmission rate (WVTR) of the first water-blocking layer 140 is not greater than 1x10. -2 g / m 2 The thickness of the first water-blocking layer 140 is no greater than 50 μm. The material of the first water-blocking layer 140 can be selected from moisture-proof materials such as copper, aluminum, polyvinylidene fluoride, and tetrafluoroethylene. Preferably, the water vapor transmission rate (WVTR) of the first water-blocking layer 140 is 0.0 g / m². 2 ·day.

[0032] Please see Figure 2 and Figure 3 The first water-blocking layer 140 has a projection 141 on the carrier plate 110, the solder resist layer 130 is located in the projection 141 of the first water-blocking layer, and the first water-blocking layer 140 completely covers the solder resist layer 130.

[0033] Please see Figure 2 and Figure 3 In this embodiment, the circuit board 100 further includes a second water-blocking layer 150, and the first water-blocking layer 140 is integrally formed with the second water-blocking layer 150 and the solder resist layer 130. The water vapor transmission rate (WVTR) of the second water-blocking layer 150 is not greater than 10 g / m. 2 The thickness of the second water-blocking layer 150 is not greater than 80 μm. Preferably, the second water-blocking layer 150 is adhesive, and the material of the second water-blocking layer 150 can be selected from pressure-sensitive adhesives such as acrylic and epoxy resin.

[0034] Please see Figure 2 and Figure 4 In this embodiment, the circuit board 100 further includes a third water-blocking layer 160, which covers the first water-blocking layer 140. The water vapor transmission rate (WVTR) of the third water-blocking layer 160 is not greater than 0.6 g / m³. 2 ·day, and the thickness of the third water-blocking layer 160 is no more than 50um, and the material of the third water-blocking layer 160 can be selected from moisture-proof materials such as polyimide and polyethylene terephthalate.

[0035] Please see Figure 2 and Figure 4 The third water-blocking layer 160 has a projection 161 on the carrier plate 110, the first water-blocking layer 140 is located in the projection 161 of the third water-blocking layer 160, and the third water-blocking layer 160 completely covers the first water-blocking layer 140.

[0036] Please see Figure 2 and Figure 4 Preferably, the circuit board 100 further includes an adhesive layer 170, and the third water-blocking layer 160 is attached to the first water-blocking layer 140 via the adhesive layer 170, so that the first water-blocking layer 140 and the third water-blocking layer 160 are bonded together. The water vapor transmission rate (WVTR) of the adhesive layer 170 is not greater than 10 g / m. 2 •day, and the thickness of the adhesive layer 170 is not greater than 80um.

[0037] Please see Figure 3 In the manufacturing process, transportation or storage environment, if liquid or water vapor adheres to the first water-blocking layer 140, the first water-blocking layer 140, or the first water-blocking layer 140 and the second water-blocking layer 150, can prevent the liquid or water vapor from penetrating into the solder resist layer 130. This can prevent the liquid or water vapor, or corrosive elements (such as chlorine) carried by the liquid or water vapor, from penetrating into the solder resist layer 130 and the circuit layer 120, causing the circuit layer 120 to oxidize or be corroded, thereby avoiding affecting the structure and electrical reliability of the circuit board 100.

[0038] Please see Figure 4 In the manufacturing process, transportation or storage environment, if liquid or water vapor adheres to the third water-blocking layer 160, the third water-blocking layer 160; or the third water-blocking layer 160, the first water-blocking layer 140 and the second water-blocking layer 150 can prevent the liquid or water vapor from penetrating into the solder resist layer 130, thereby preventing the liquid or water vapor or corrosive elements (such as chlorine) carried by the liquid or water vapor from penetrating into the solder resist layer 130 and the circuit layer 120, and causing the circuit layer 120 to be oxidized or corroded, so as to avoid affecting the structure and electrical reliability of the circuit board 100.

[0039] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any way. Although the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the present invention. Any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of the present invention without departing from the scope of the present invention shall still fall within the scope of the present invention.

Claims

1. A circuit board, characterized in that, Include: Carrier plate; A circuit layer is disposed on the carrier board, and the circuit layer has multiple internal pins and multiple external pins; A solder mask layer covering the circuit layer, exposing the internal and external pins; and At least one first water-blocking layer covers the solder resist layer, such that the circuit layer and the solder resist layer are located between the carrier board and the first water-blocking layer, and the water vapor transmission rate (WVTR) of the first water-blocking layer is not greater than 1x10. -2 g / m 2 ·day.

2. The circuit board as described in claim 1, characterized in that, The first water-blocking layer has a projection on the carrier plate, the solder resist layer is located in the projection, and the first water-blocking layer completely covers the solder resist layer.

3. The circuit board as described in claim 1, characterized in that, The thickness of the first water-blocking layer is no more than 50 μm.

4. The circuit board as described in claim 1, characterized in that, It further includes a second water-blocking layer, which is integrally formed with the first water-blocking layer and the solder resist layer. The water-transmitting capacity (WVTR) of the second water-blocking layer is not greater than 10 g / m. 2 ·day.

5. The circuit board as described in claim 4, characterized in that, The second water-blocking layer is viscous.

6. The circuit board as described in claim 5, characterized in that, The thickness of the second water-blocking layer is no more than 80 μm.

7. The circuit board as described in claim 1 or 4, characterized in that, It further includes a third water-blocking layer that covers the first water-blocking layer, and the water vapor transmission rate (WVTR) of the third water-blocking layer is not greater than 0.6 g / m. 2 ·day.

8. The circuit board as described in claim 7, characterized in that, The third water-blocking layer has a projection on the carrier plate, the first water-blocking layer is located in the projection of the third water-blocking layer, and the third water-blocking layer completely covers the first water-blocking layer.

9. The circuit board as described in claim 7, characterized in that, The thickness of the third water-blocking layer is no more than 50 μm.

10. The circuit board as claimed in claim 7, characterized in that, It includes an adhesive layer, and the third water-blocking layer is attached to the first water-blocking layer by the adhesive layer.

11. The circuit board as claimed in claim 10, characterized in that, The water vapor transmission rate (WVTR) of the adhesive layer is no greater than 10 g / m. 2 ·day.

12. The circuit board as described in claim 11, characterized in that, The thickness of the adhesive layer is no more than 80 μm.