Embedded element circuit board and manufacturing method thereof
By embedding conductive structures within the circuit board and utilizing nano-bicrystalline copper and high thermal conductivity materials, the problems of parasitic inductance and electrical connection limitations in silicon carbide power modules are solved, thereby improving the circuit board's process yield and heat dissipation efficiency.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-26
- Publication Date
- 2026-03-27
AI Technical Summary
In existing silicon carbide power modules, the parasitic inductance caused by wire bonding of electronic components is a serious problem that affects performance. Furthermore, the electrical connection of embedded components limits the wiring design and circuit board process measurement.
A conductive structure is embedded in the circuit board, and the source and drain of the electronic components are respectively placed on the same side of the conductive structure. The conductive structure and the metal block are electrically connected to the circuit board. The electrical connection between the different sides is isolated by insulating material. Nano-bicrystalline copper and high thermal conductivity materials are used to improve heat dissipation efficiency.
It improves the process yield of circuit boards and the convenience of electrical measurement, while also improving heat dissipation efficiency and reducing the impact of parasitic inductance.
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Figure CN121751490A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to a circuit board, and in particular to a circuit board with embedded components. BACKGROUND
[0002] In a conventional silicon carbide (SiC) power module, electronic components (e.g., dies or chips) are electrically connected to the internal circuit layer of the module by wire bonding. However, since the SiC power module needs to perform high frequency switching, the problem of parasitic inductance caused by wire bonding is more serious, thereby affecting the performance of the power module. In order to improve the situation of parasitic inductance, a power module with embedded electronic components in the circuit substrate is developed.
[0003] On the other hand, the source and the drain of the electronic component embedded in the circuit substrate are respectively located on the opposite sides of the electronic component, and thus need to be electrically connected to the components outside the circuit substrate through the external circuit layers on the opposite sides of the circuit substrate. Such electrical connection not only limits the wiring design of the embedded component circuit board and affects the operation performance of the circuit board, but also is not conducive to electrical measurement in the process of the circuit board. SUMMARY
[0004] Therefore, the present application provides an embedded component circuit board to improve the process yield of the circuit board.
[0005] At least one embodiment of the present application also provides a method for manufacturing the above-mentioned embedded component circuit board.
[0006] At least one embodiment of the present application provides an embedded component circuit board, which includes a circuit substrate, a conductive structure embedded in the circuit substrate, an electronic component, and a metal block. The conductive structure has opposite first and second surfaces. The electronic component is disposed on the first surface of the conductive structure and is electrically connected to the circuit substrate through the source, the gate, and the drain of the electronic component. The drain is electrically connected to the conductive structure through the first surface of the conductive structure, and the source and the gate are electrically connected to the circuit substrate through the circuit layer of the circuit substrate. The electronic component is located between the circuit layer and the conductive structure. The metal block is disposed on the first surface of the conductive structure, and the conductive structure is electrically connected to the circuit substrate through the metal block. The conductive structure is not electrically connected to the circuit substrate through the second surface. The source and the gate and the second surface of the conductive structure have a first distance therebetween, and the drain and the second surface of the conductive structure have a second distance therebetween. The second distance is smaller than the first distance.
[0007] In at least one embodiment of the present application, the embedded component circuit board further includes an insulating material. The insulating material covers the sidewall of the conductive structure and is located between the conductive structure and the circuit substrate.
[0008] In at least one embodiment of the present application, the electronic element further comprises a body disposed on the first surface of the conductive structure. The source and the gate of the electronic element are located on a first plane of the body, and the drain of the electronic element is located on a second plane of the body. The first plane and the second plane are located on opposite sides of the body, and the second plane faces the first surface of the conductive structure.
[0009] In at least one embodiment of the present application, the embedded component circuit board further comprises a metal sintering layer. The metal sintering layer is disposed on the first surface of the conductive structure and is located between the conductive structure and the electronic element. The electronic element is electrically connected to the conductive structure through the metal sintering layer.
[0010] In at least one embodiment of the present application, the embedded component circuit board further comprises an insulating substrate disposed on the second surface of the conductive structure and located between the conductive structure and the circuit board.
[0011] In at least one embodiment of the present application, the conductive structure further comprises two layers of first metal layers and two layers of second metal layers. The second metal layers are alternately stacked with the first metal layers, and one of the second metal layers is connected to the electronic element, and one of the first metal layers is connected to the insulating substrate. The second metal layers comprise nanotwinned copper.
[0012] The present application also provides a manufacturing method of an embedded component circuit board, comprising: providing an initial circuit board; removing a portion of the initial circuit board to form an opening in the initial circuit board, the opening being in communication with opposite sides of the initial circuit board; providing an embedded structure, the embedded structure comprising a conductive structure, a metal block, and an electronic element, the conductive structure having opposite first and second surfaces, the metal block being disposed on the first surface of the conductive structure and being electrically connected to the conductive structure, and the electronic element being disposed on the first surface of the conductive structure. The source and the gate of the electronic element and the second surface of the conductive structure have a first spacing therebetween, and the drain of the electronic element and the second surface of the conductive structure have a second spacing therebetween. The second spacing is smaller than the first spacing, and the drain is electrically connected to the conductive structure; disposing the embedded structure in the opening; after disposing the embedded structure in the opening, disposing at least one bonding substrate and a first metal layer on the initial circuit board so that the bonding substrate and the first metal layer cover the embedded structure. The bonding substrate is located between the first metal layer and the initial circuit board; pressing the initial circuit board, the bonding substrate, and the first metal layer; and after pressing the initial circuit board, the bonding substrate, and the first metal layer, forming a plurality of conductive blind holes in the bonding substrate, the first metal layer being electrically connected to the embedded structure through the conductive blind holes.
[0013] In at least one embodiment of the present application, the forming of the embedded structure comprises providing a conductive substrate, the conductive substrate having a third surface and a fourth surface opposite to the third surface; providing a composite substrate; disposing an electronic component and a metal block on the third surface of the conductive substrate; disposing the composite substrate on the fourth surface of the conductive substrate; after disposing the electronic component and the metal block on the conductive substrate, adhering at least one bonding layer and a second metal layer on the third surface of the conductive substrate, so that the bonding layer and the second metal layer cover the electronic component and the metal block; after adhering the bonding layer and the second metal layer on the third surface of the conductive substrate, forming a plurality of conductive embedded holes in the bonding layer and the second metal layer, and the second metal layer is electrically connected to the electronic component and the metal block through the conductive embedded holes; after forming the conductive embedded holes, patterning the second metal layer to form a circuit layer; and after forming the circuit layer, cutting the circuit layer, the bonding layer, the conductive substrate and the composite substrate along the normal line of the circuit layer to form the embedded structure.
[0014] In at least one embodiment of the present application, the forming of the composite substrate comprises providing an initial composite substrate; and depositing a third metal layer on opposite sides of the initial composite substrate, and the third metal layer comprises nanotwinned copper.
[0015] In at least one embodiment of the present application, the forming of the conductive substrate comprises providing an initial conductive substrate; and depositing a fourth metal layer on opposite sides of the initial conductive substrate, and the fourth metal layer comprises nanotwinned copper.
[0016] Based on the above, when the source electrode (and the gate electrode) and the drain electrode of the electronic component in at least one embodiment of the present application are respectively located on opposite sides of the electronic component, the conductive structure is embedded in the circuit substrate, and the electronic component and the metal block are disposed on the first surface of the conductive structure, so that the drain electrode of the electronic component can be electrically connected to the circuit substrate through the conductive structure and the metal block. Because the conductive structure can only be directly electrically connected to the circuit substrate through the first surface, the source electrode and the drain electrode of the electronic component are both electrically connected to the same side of the circuit substrate. In this way, the source electrode and the drain electrode of the electronic component are both electrically connected to the same side of the circuit substrate, so that the convenience of electrical measurement in the process of the circuit board is improved, and the process yield of the circuit board is improved. BRIEF DESCRIPTION OF DRAWINGS
[0017] The aspects of the present application can be understood more readily by reference to the following detailed description and accompanying drawings. It is to be noted that the various features are not drawn to scale in the drawings. Indeed, the dimensions of the various features can be arbitrarily increased or decreased for the sake of discussion.
[0018] Figure 1 A cross-sectional view of an embedded component circuit board according to at least one embodiment of the present application is shown.
[0019] Figures 2A-2B FIG. 4 illustrates a cross-sectional view of a method of manufacturing a buried component circuit board according to at least one embodiment of the present disclosure.
[0020] Figures 3A-3E FIG. 4 illustrates a cross-sectional view of a method of manufacturing a buried component circuit board according to at least one embodiment of the present disclosure.
[0021] Figures 4A-4B FIG. 4 illustrates a cross-sectional view of a method of manufacturing a buried component circuit board according to at least one embodiment of the present disclosure. DETAILED DESCRIPTION
[0022] The present disclosure will now be described in detail for the following embodiments. It should be noted that the following description of the present disclosure is only by way of example and is not intended to limit the specific embodiments of the present disclosure. For example, the description of "a first feature formed on a second feature" includes various embodiments, in which the first feature is in direct contact with the second feature, and in which additional features are formed between the first feature and the second feature so that the two are not in direct contact. In addition, the same reference numerals are used in the drawings and the description to indicate the same or similar elements.
[0023] Spatially relative terms, such as "under", "below", "lower", "above", "upper", and the like, can be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientations depicted in the figures. The devices can be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.
[0024] Further, when describing numerical or numerical range values, such as "about", "approximately", and the like, the term is intended to encompass numbers within a reasonable range given the nature of the value, and to account for natural variations that would be understood by one of ordinary skill in the art in the manufacturing process. A numerical range encompasses a reasonable range of values including the described value, for example, + / - 10% of the described value, based on known manufacturing tolerances related to the characteristics of the manufacturing feature. For example, a material layer having a thickness of "about 5 nanometers" can encompass a range of sizes from 4.25 nanometers to 5.75 nanometers, given a manufacturing tolerance of + / - 15% for depositing the material layer, as would be known by one of ordinary skill in the art. Further, the present disclosure can repeat the use of reference numerals and / or letters in various examples. This repetition of reference numerals and / or letters is for the purpose of simplicity and clarity and does not necessarily indicate a relationship between the various embodiments and / or configurations discussed.
[0025] At least one embodiment of the present disclosure provides a buried component circuit board 100. Please refer to Figure 1The embedded element circuit board 100 includes a circuit substrate 120, a conductive structure 140, a metal block 150, and an electronic element 160. The circuit substrate 120 includes circuit layers 122a, 122b, 122c, 122d, 122e, and 122f, and insulating layers 124a, 124b, 124c, 124d, and 124e, in which each of the circuit layers and each of the insulating layers are alternately stacked along a normal line N1. In detail, in order from the bottom to the top along the normal line N1, there are the circuit layer 122a, the insulating layer 124a, the circuit layer 122b, the insulating layer 124b, the circuit layer 122c, the insulating layer 124c, the circuit layer 122d, the insulating layer 124d, the circuit layer 122e, the insulating layer 124e, and the circuit layer 122f.
[0026] Although in the present embodiment, the circuit substrate 120 is a multilayer board including multiple circuit layers (and multiple insulating layers), and has six circuit layers and five insulating layers, in various embodiments of the present application, the number of circuit layers and the number of insulating layers of the circuit substrate 120 are not limited thereto. For example, the circuit substrate 120 can also be a double-sided board, and include only two circuit layers and one insulating layer disposed between the two circuit layers.
[0027] The conductive structure 140 is embedded in the circuit substrate 120, and has opposite first and second surfaces 140f and 140s. The conductive structure 140 further includes two first metal layers 142a and 142b, and two second metal layers 144a and 144b, in which the second metal layers 144a and 144b are disposed alternately with the first metal layers 142a and 142b. In detail, in order from the bottom to the top along the normal line N1, there are the first metal layer 142a, the second metal layer 144a, the first metal layer 142b, and the second metal layer 144b.
[0028] The electronic element 160 is disposed on the first surface 140f of the conductive structure 140, and is electrically connected to the circuit substrate 120 through a source 160s, a gate 160g, and a drain 160d of the electronic element 160, respectively. It is worth mentioning that the drain 160d of the electronic element 160 is electrically connected to the conductive structure 140 through the first surface 140f of the conductive structure 140. On the other hand, the source 160s and the gate 160g of the electronic element 160 are not electrically connected to the circuit substrate 120 through the conductive structure 140, but are electrically connected to the circuit substrate 120 through the circuit layer 122e of the circuit substrate 120, and the electronic element 160 is located between the circuit layer 122e and the conductive structure 140.
[0029] As Figure 1As shown, the source 160s and the gate 160g of the electronic element 160 are separated from the second surface 140s of the conductive structure 140 by a distance d1, while the drain 160d of the electronic element 160 is separated from the second surface 140s of the conductive structure 140 by a distance d2, which is smaller than the distance d1. In other words, the drain 160d of the electronic element 160 is disposed close to the second surface 140s of the conductive structure 140, while the source 160s and the gate 160g of the electronic element 160 are disposed away from the second surface 140s.
[0030] The metal block 150 is disposed on the first surface 140f of the conductive structure 140, and the conductive structure 140 is electrically connected to the circuit substrate 120 through the metal block 150. On the other hand, since the embedded element circuit board 100 further comprises the insulating substrate 170, which is disposed on the second surface 140s of the conductive structure 140 and is located between the conductive structure 140 and the circuit substrate 120. Therefore, the conductive structure 140 is not electrically connected to the circuit substrate 120 through the second surface 140s of the conductive structure 140.
[0031] The second metal layer 144b of the conductive structure 140 is connected to the drain 160d of the electronic element 160 through the metal sintering layer 180, while the first metal layer 142a of the conductive structure 140 is connected to the insulating substrate 170. It is worth mentioning that the insulating substrate 170 completely isolates the first metal layer 142a of the conductive structure 140 from the circuit layer 122a of the circuit substrate 120. In this way, there is no direct electrical connection between the first metal layer 142a of the conductive structure 140 and the circuit layer 122a of the circuit substrate 120. In other words, the first metal layer 142a of the conductive structure 140 and the circuit layer 122a of the circuit substrate 120 are separated from each other without contact, and the current cannot pass through other conductors between the first metal layer 142a of the conductive structure 140 and the circuit layer 122a of the circuit substrate 120.
[0032] Since the insulating substrate 170 blocks the current transmission path between the first metal layer 142a of the conductive structure 140 and the circuit layer 122a of the circuit substrate 120, the drain 160d of the electronic element 160 must pass through the conductive structure 140 and the metal block 150 to transmit the current to the circuit layer 122e of the circuit substrate 120.
[0033] In detail, the circuit layer 122e includes a source region SR, a gate region GR, and a drain region DR, wherein the source 160s of the electronic element 160 is connected to the source region SR of the circuit layer 122e, and the gate 160g of the electronic element 160 is connected to the gate region GR of the circuit layer 122e. In addition, the drain 160d of the electronic element 160 is connected to the drain region DR of the circuit layer 122e through the conductive structure 140 and the metal block 150.
[0034] The electronic element 160 further includes a body 165, which is disposed on the first surface 140f of the conductive structure 140. The source 160s and the gate 160g of the electronic element 160 are located on a first plane 165f of the body 165, and the drain 160d of the electronic element 160 is located on a second plane 165s of the body 165. The first plane 165f and the second plane 165s are located on opposite sides of the body 165, and the second plane 165s faces the first surface 140f of the conductive structure 140.
[0035] The electronic element 160 can be an unpackaged die, but the present disclosure is not limited thereto. In other embodiments, the electronic element 160 can also be a packaged chip. In particular, although the electronic element 160 is shown as a rectangular shape in the illustrated embodiment, the present disclosure is not limited thereto. In other embodiments, the electronic element 160 can also have other shapes, such as a circular shape, an oval shape, a polygonal shape, or the like. Figure 1 In the illustrated embodiment, the embedded component circuit board 100 has two conductive structures 140, but the present disclosure is not limited thereto. In other embodiments, the embedded component circuit board 100 can also have more than two conductive structures 140, such as one or three conductive structures 140. In addition, one electronic element 160 is disposed on the first surface 140f of each conductive structure 140.
[0036] The embedded component circuit board 100 further includes an insulating material 130, which covers the sidewall 140w of the conductive structure 140 and is located between the conductive structure 140 and the circuit substrate 120. In detail, the insulating material 130 completely separates the sidewall 140w of the conductive structure 140 from direct contact with the insulating layers 124a, 124b, 124c and the circuit layers 122b, 122c of the circuit substrate 120. Therefore, the conductive structure 140 is also not directly electrically connected to the circuit layers 122b, 122c of the circuit substrate 120.
[0037] In particular, a portion of the insulating material 130 is distributed between the source region SR, the gate region GR, and the drain region DR of the circuit layer 122e. In detail, a portion of the insulating material 130 is present between the source region SR and the gate region GR of the circuit layer 122e, and a portion of the insulating material 130 is also present between the gate region GR and the drain region DR of the circuit layer 122e. In this way, direct electrical connection between the source region SR and the gate region GR of the circuit layer 122e can be avoided.
[0038] In this embodiment, the insulating material 130, the insulating layers 124a, 124b, 124c, 124d and 124e of the circuit substrate 120 can include, but are not limited to, a material having a coefficient of thermal expansion (CTE) less than 10 ppm / °C (i.e., a low CTE material), such as polyphenylene oxide (PPO), polyphenylene ether (PPE), or the like. In addition, the insulating material 130 can also be a resin or a similar insulating polymer material.
[0039] The embedded component circuit board 100 further includes a metal sintering layer 180 disposed on the first surface 140f of the conductive structure 140 and positioned between the conductive structure 140 and the electronic component 160. In addition, the embedded component circuit board 100 can further include another metal sintering layer 180 disposed between the conductive structure 140 and the metal block 150. The electronic component 160 (and the metal block 150) is electrically connected to the conductive structure 140 via the metal sintering layer 180. In particular, the metal sintering layer 180 can include a metal material having a high thermal conductivity, such as silver, to improve the efficiency of heat conduction from the electronic component 160 to the conductive structure 140.
[0040] The materials of the first metal layers 142a and 142b and the second metal layers 144a and 144b of the conductive structure 140 can include a conductive material having a high thermal conductivity, such as copper. In some embodiments, the second metal layers 144a and 144b can include nanotwinned copper. That is, the microstructure of the copper included in the second metal layers 144a and 144b exhibits a columnar grain having a (111) orientation.
[0041] On the other hand, in various embodiments, the material of the insulating substrate 170 can be a ceramic material having a thermal conductivity greater than 20 W / mk, such as aluminum oxide (AI2O3) or the like. In particular, the material of the insulating substrate 170 is preferably a ceramic material having a high thermal conductivity, such as aluminum nitride (AIN) having a thermal conductivity greater than 170 W / mk or the like. In addition, in this embodiment, the second surface 140s of the conductive structure 140 directly contacts the insulating substrate 170, which in turn directly contacts the circuit layer 122a of the circuit substrate 120. In this way, heat generated by the electronic component 160 can be more efficiently conducted outward. In other words, the rate at which heat generated by the electronic component 160 is conducted through the conductive structure 140 and the insulating substrate 170 toward the surface 120s of the circuit substrate 120 can be improved.
[0042] The embedded component circuit board 100 can also include a plurality of conductive buried holes 103v and conductive blind holes 113v, in which the metal blocks 150 and the electronic components 160 are connected to the circuit layer 122e of the circuit substrate 120 through the conductive buried holes 103v, and the circuit layer 122e is connected to the circuit layer 122f through the conductive blind holes 113v. Thus, the metal blocks 150 and the electronic components 160 are electrically connected to the circuit substrate 120.
[0043] It is particularly noted that the embedded component circuit board 100 can also include at least one solder mask 110. The solder mask 110 can be coated on the circuit layers 122a and 122f to reduce the solder contamination of the circuit layers 122a and 122f in the soldering process. On the other hand, the embedded component circuit board 100 can also include a plating through hole 190 (PTH). The plating through hole 190 connects the opposite sides of the embedded component circuit board 100, and each of the circuit layers (i.e. the circuit layers 122a, 122b, 122c, 122d, 122e and 122f) in the embedded component circuit board 100 can be electrically connected to each other through the plating through hole 190.
[0044] At least one embodiment of the present application provides a manufacturing method of an embedded component circuit board. Taking the embedded component circuit board 100 as an example, the manufacturing method can include a plurality of steps as shown in Figures 2A-2B 、 Figures 3A-3E and Figures 4A-4B . Please refer to Figure 2A , first, an initial circuit substrate 220 is provided. The initial circuit substrate 220 can include a plurality of circuit layers and insulating layers. For example, the initial circuit substrate 220 is a multi-layer circuit board made by stacking and pressing two copper clad laminate (CCL) and two bonding substrates (not shown), and through patterning steps such as lithography and etching, in which the bonding substrate can be a prepreg including a low-expansion material.
[0045] It is particularly noted that although the present embodiment is described by taking two copper clad laminates and two bonding substrates as an example, the present application is not limited thereto. In various embodiments, the number of copper clad laminates and bonding substrates can be any number more than one, for example, three.
[0046] Next, as shown in Figure 2AAs shown, a portion of the initial circuit substrate 220 can be removed to form the openings 205t in the initial circuit substrate 220 by, for example, mechanical cutting (e.g., CNC machining) or laser slotting, and the openings 205t communicate opposite sides of the initial circuit substrate 220. Although the present embodiment is exemplified by forming two openings 205t, the present application is not limited thereto. In other embodiments, more than two openings 205t can be formed, such as three openings 205t.
[0047] Referring to Figure 2B , the embedded structure 210 is provided, and one embedded structure 210 is disposed in each of the openings 205t. The embedded structure 210 includes the conductive structure 140, the metal block 150, the electronic component 160, and the insulating substrate 170 as shown in Figure 1 . The metal block 150 and the electronic component 160 are disposed on the first surface 140f of the conductive structure 140 and electrically connected to the conductive structure 140, respectively. In addition, the embedded structure 210 further includes a portion of the insulating layer 124d and a portion of the circuit layer 122e.
[0048] In the present embodiment, the embedded structure 210 is formed by a plurality of steps as shown in Figures 3A-3E . First, referring to Figure 3A , the conductive substrate 340 having opposite surfaces 340f and 340s is provided. In the present embodiment, the conductive substrate 340 can be a copper plate having a thickness in the range of 635 μm to 2385 μm. In addition, this step further includes providing the composite substrate 350.
[0049] It is worth mentioning that the composite substrate 350 is formed by providing an initial composite substrate 350', which includes an insulating substrate 357 and two metal layers 358a and 358b, and the insulating substrate 357 is disposed between the metal layers 358a and 358b. Then, the metal layers 354a and 354b can be deposited on opposite sides of the initial composite substrate 350' by, for example, electroplating. That is, the metal layers 354a and 354b are deposited on the metal layers 358a and 358b of the initial composite substrate 350', respectively, to form the composite substrate 350.
[0050] On the other hand, the conductive substrate 340 can be formed by providing an initial conductive substrate 340' and depositing metal layers 344a and 344b on opposite sides of the initial conductive substrate 340' by, for example, electroplating. In the present embodiment, the metal layers 344a and 344b of the conductive substrate 340 and the metal layers 354a and 354b of the composite substrate 350 can comprise nanobimetallic copper, and the thickness of the metal layers 344a and 344b and the metal layers 354a and 354b can range from 20 μm to 50 μm.
[0051] Next, referring to Figure 3B The electronic components 160 and the metal blocks 150 can be attached to the surface 340f of the conductive substrate 340 by, for example, sintering. In detail, a plurality of metal sintering materials (not shown) can be printed on the surface 340f of the conductive substrate 340, and the electronic components 160 and the metal blocks 150 can be attached to the metal sintering materials. The metal sintering materials can then be sintered to the surface 340f of the conductive substrate 340 and between the electronic components 160 and the metal blocks 150 to form a plurality of metal sintering layers 180 connecting the electronic components 160 and the conductive substrate 340 and connecting the metal blocks 150 and the conductive substrate 340, respectively.
[0052] On the other hand, Figure 3B The step of attaching the composite substrate 350 to the surface 340s of the conductive substrate 340 can be performed by hot-press bonding. It is worth mentioning that in the present embodiment, the sintering temperature for attaching the electronic components 160 to the conductive substrate 340 ranges from 220 °C to 260 °C and the process pressure ranges from 11 MPa to 20 MPa, and the hot-press bonding temperature for attaching the composite substrate 350 to the conductive substrate 340 ranges from 220 °C to 260 °C and the process pressure ranges from 11 MPa to 20 MPa. Since the process temperature and the process pressure for the two steps overlap, the two steps can be performed in the same process.
[0053] Next, referring to Figure 3C After the electronic components 160 and the metal blocks 150 are attached to the conductive substrate 340, at least one bonding layer 324 can be attached to the surface 340f of the conductive substrate 340 by, for example, hot-press bonding. Figure 3Cis taken as an example) and the metal layer 322' so that the bonding layer 324 and the metal layer 322' cover the electronic element 160 and the metal block 150. In addition, the bonding layer 324 and the metal layer 322' can also cover a portion of the surface 340f of the conductive substrate 340 to isolate the surface 340f of the conductive substrate 340 from the external environment.
[0054] Referring to Figure 3D After the bonding layer 324 and the metal layer 322' are attached to the surface 340f of the conductive substrate 340, a plurality of conductive buried holes 103v can be formed in the bonding layer 324 and the metal layer 322' by mechanical grinding, mechanical drilling and electroplating. Figure 1 The metal layer 322' is electrically connected to the electronic element 160 and the metal block 150 through the conductive buried holes 103v. It is particularly pointed out that in this step, the thickness of the metal layer 322' can also be increased by thick copper electroplating. After the conductive buried holes 103v are formed, the metal layer 322' can be patterned by, for example, photolithography and etching to form a circuit layer 322 (i.e. Figure 1 part of the circuit layer 122e in FIG. 1).
[0055] Referring to Figure 3E After the circuit layer 322 is formed, the circuit layer 322, the bonding layer 324, the conductive substrate 340 and the composite substrate 350 can be cut from top to bottom along the normal line N1 of the circuit layer 322 by, for example, mechanical cutting, laser cutting or ion beam cutting to form a plurality of completely separated embedded structures 210. During the cutting process, the cutting device p sequentially passes through the circuit layer 322, the bonding layer 324, the conductive substrate 340 and the composite substrate 350, and the cutting device p can be a cutting tool, a laser beam or an ion beam.
[0056] It is worth mentioning that in the present embodiment, the embedded structure 210 is also formed by removing the metal layer 354a of the composite substrate 350 by, for example, mechanical grinding after the circuit layer 322 is formed to expose the metal layer 358a of the composite substrate 350. However, the present application is not limited thereto, and in other embodiments, the metal layer 354a of the composite substrate 350 can also not be removed so that the embedded structure 210 contains the metal layer 354a.
[0057] Next, referring back to Figure 2BThe step of setting the embedded structure 210 within the opening 205t includes: attaching an adhesive tape 207 (e.g., polyethylene terephthalate tape) or similar to it to the surface 220s of the initial circuit board 220, wherein the tape 207 overlaps with the opening 205t. After attaching the adhesive tape 207 to the surface 220s of the initial circuit board 220, the structure will be... Figures 3A-3E The embedded structure 210 formed by a series of steps is disposed on the tape 207, and the surface 140s of the conductive structure 140 faces the tape 207.
[0058] Please refer to Figure 4A After the embedded structure 210 is set in the opening 205t, at least one bonding substrate 424 is set on the initial circuit board 220. Figure 4A (Taking the example of bonding two bonding substrates 424 and a metal layer 422, the bonding substrate 424 and the metal layer 422 cover the embedded structure 210. The bonding substrate 424 is located between the metal layer 422 and the initial circuit substrate 220. The bonding substrate 424 and the aforementioned bonding layer 324 may be films containing a material with a low coefficient of thermal expansion. Furthermore, to achieve better insulation, in some embodiments, the number of bonding substrates 424 (or bonding layers 324) may be two or more.
[0059] Next, the initial circuit board 220, the bonding substrate 424, and the metal layer 422 can be bonded together by thermoforming. It is worth noting that, please refer to [the following text is also included]. Figure 2B as well as Figure 4A The difference between the width w1 of the opening 205t and the width w2 of the embedded structure 210 is greater than 0.4 mm. Therefore, a gap (not shown) will be formed between the inner surface of the opening 205t and the side surface of the embedded structure 210. In order to fill the gap and to isolate the side surface of the embedded structure 210 from the initial circuit board 220, the manufacturing method of the embedded component circuit board 100 further includes: providing an insulating material 130 in the opening 205t and covering the side surface of the embedded structure 210 with the insulating material 130.
[0060] In this embodiment, the manufacturing method of the embedded component circuit board 100 further includes: after providing insulating material 130 in the opening 205t, removing tape 207 to expose the end face 130e of insulating material 130, and the end face 130e of insulating material 130 is flush with the bottom surface 210s of embedded structure 210.
[0061] Please refer to Figure 4B After laminating the initial circuit board 220, the bonding substrate 424, and the metal layer 422, multiple conductive blind vias 113v can be formed in the bonding substrate 424 by mechanical grinding, mechanical drilling, and electroplating. Metal layer 422 (labeled as...)Figure 4A ) through the conductive blind via 113v. In addition, the metal layer 422 can also be thickened by electroplating.
[0062] After the conductive blind via 113v is formed, the metal layer 422 can be patterned by photolithography and etching to form the circuit layer 122f shown in Figure 1 , and the initial circuit substrate 220 is formed as the circuit substrate 120 shown in Figure 1 . It is particularly mentioned that the manufacturing method of the embedded component circuit board 100 of the present embodiment can also include forming a plated through hole 190 in the initial circuit substrate 220 by, for example, mechanical drilling and electroplating before the metal layer 422 is patterned. At this point, the embedded component circuit board 100 shown in Figure 1 has been roughly formed.
[0063] In summary, when the source (and the gate) and the drain of the electronic component in the embedded component circuit board are located on opposite sides of the electronic component, the conductive structure is embedded in the circuit substrate, and the electronic component and the metal block are disposed on the same surface (i.e., the first surface) of the conductive structure, so that the drain of the electronic component can be electrically connected to the circuit substrate through the conductive structure and the metal block. Because the conductive structure can only be directly electrically connected to the circuit substrate through the first surface, the source and the drain of the electronic component are both electrically connected to the same side of the circuit substrate. In other words, the source of the electronic component is connected to the circuit layer located on one side of the circuit substrate. The drain of the electronic component is connected to the conductive structure and connected to the above-mentioned circuit layer through the metal block, so the drain of the electronic component can only be connected (through the conductive structure) to this circuit layer. In this way, the source and the drain of the electronic component are both electrically connected to the same side of the circuit substrate, which improves the convenience of electrical measurement in the process of the circuit board, thereby improving the process yield of the circuit board.
[0064] On the other hand, by disposing an insulating substrate with a thermal conductivity greater than 20 W / mk on the second surface of the conductive structure, and the conductive structure including the second metal layer with nanotwinned copper, the rate of heat generated by the electronic component being transferred to the external environment through the conductive structure can be improved, thereby improving the heat dissipation efficiency of the embedded electronic component circuit board. In this way, the heat accumulated on the electronic component can be reduced, and the life of the electronic component can be increased.
[0065] Although the embodiments of the present application have been disclosed as above, they are not intended to limit the embodiments of the present application, and any person skilled in the art can make some changes and modifications without departing from the spirit and scope of the embodiments of the present application, so the protection scope of the embodiments of the present application shall be subject to the appended claims.
[0066] SYMBOL DESCRIPTION
[0067] 100: inner embedded element circuit board
[0068] 103v: conductive buried hole
[0069] 110: solder resist layer
[0070] 113v: conductive blind hole
[0071] 120: circuit substrate
[0072] 122a, 122b, 122c, 122d, 122e, 122f, 322: circuit layer
[0073] 124a, 124b, 124c, 124d, 124e: insulating layer
[0074] 130: insulating material
[0075] 130e: end face
[0076] 140: conductive structure
[0077] 120s, 140f, 140s, 340f, 340s, 220s: surface
[0078] 140w: side wall
[0079] 142a, 142b: first metal layer
[0080] 144a, 144b: second metal layer
[0081] 150: metal block
[0082] 160: electronic element
[0083] 160d: drain
[0084] 160g: gate
[0085] 160s: source
[0086] 165: main body
[0087] 165f, 165s: plane
[0088] 170, 357: insulating substrate
[0089] 180: metal sintered layer
[0090] 190: electroplated via hole
[0091] 210: inner embedded structure
[0092] 210s: bottom surface
[0093] 220: initial wiring substrate
[0094] 205t: opening
[0095] 207: adhesive tape
[0096] 324: bonding layer
[0097] 340: conductive substrate
[0098] 340': initial conductive substrate
[0099] 350: composite substrate
[0100] 350': initial composite substrate
[0101] 344a, 344b, 358a, 358b, 354a, 354b, 322', 422: metal layer
[0102] 424: bonded substrate
[0103] d1, d2: distance
[0104] DR: drain region
[0105] GR: gate region
[0106] N1: normal line
[0107] p: cutting device
[0108] SR: source region
[0109] w1, w2: width
Claims
1. A circuit board with embedded components, characterized in that, Include: Circuit board; A conductive structure is embedded in the circuit substrate, and the conductive structure has a first surface and a second surface opposite to each other. An electronic component is disposed on the first surface of the conductive structure and electrically connected to the circuit substrate through its source, gate and drain, respectively. The drain is electrically connected to the conductive structure through the first surface of the conductive structure, and the source and gate are electrically connected to the circuit substrate through the circuit layer of the circuit substrate. The electronic component is located between the circuit layer and the conductive structure. as well as A metal block is disposed on the first surface of the conductive structure, wherein the conductive structure is electrically connected to the circuit substrate through the metal block, and the conductive structure is not electrically connected to the circuit substrate through the second surface; The source electrode and the gate electrode and the second surface of the conductive structure are respectively separated by a first distance, while the drain electrode and the second surface of the conductive structure are separated by a second distance, wherein the second distance is smaller than the first distance.
2. The embedded component circuit board according to claim 1, characterized in that, Also includes: An insulating material is used to cover the sidewalls of the conductive structure and is located between the conductive structure and the circuit board.
3. The embedded component circuit board according to claim 1, characterized in that, The electronic component also includes: A body is disposed on the first surface of the conductive structure, wherein the source and gate of the electronic element are located on the first plane of the body, and the drain of the electronic element is located on the second plane of the body, wherein the first plane and the second plane are respectively located on opposite sides of the body, and the second plane faces the first surface of the conductive structure.
4. The embedded component circuit board according to claim 3, characterized in that, Also includes: A metal sintered layer is disposed on the first surface of the conductive structure and located between the conductive structure and the electronic component, wherein the electronic component is electrically connected to the conductive structure through the metal sintered layer.
5. The embedded component circuit board according to claim 1, characterized in that, Also includes: An insulating substrate is disposed on the second surface of the conductive structure, and the insulating substrate is located between the conductive structure and the circuit substrate.
6. The embedded component circuit board according to claim 5, characterized in that, The conductive structure further includes: Two first metal layers; and Two second metal layers are stacked alternately with the first metal layer, and one of the second metal layers is connected to the electronic component, while one of the first metal layers is connected to the insulating substrate, wherein the second metal layers comprise nanocrystalline copper.
7. A method for manufacturing a circuit board with embedded components, characterized in that, Include: Provide initial circuit board; A portion of the initial circuit board is removed to form an opening in the initial circuit board, wherein the opening connects opposite sides of the initial circuit board; An embedded structure is provided, and the embedded structure comprises: A conductive structure having opposing first and second surfaces; A metal block is disposed on the first surface of the conductive structure and is electrically connected to the conductive structure; as well as An electronic component is disposed on the first surface of the conductive structure, wherein the source and gate of the electronic component and the second surface of the conductive structure are respectively separated by a first distance, and the drain of the electronic component and the second surface of the conductive structure are separated by a second distance, wherein the second distance is smaller than the first distance, and the drain is electrically connected to the conductive structure. The embedded structure is provided within the opening; After the embedded structure is set in the opening, at least one bonding substrate and a first metal layer are set on the initial circuit board, so that the bonding substrate and the first metal layer cover the embedded structure, wherein the bonding substrate is located between the first metal layer and the initial circuit board. The initial circuit substrate, the bonding substrate, and the first metal layer are pressed together; as well as After laminating the initial circuit board, the bonding substrate, and the first metal layer, a plurality of conductive blind vias are formed in the bonding substrate, wherein the first metal layer is electrically connected to the embedded structure through the conductive blind vias.
8. The method according to claim 7, characterized in that, The method of forming the embedded structure includes: A conductive substrate is provided, the conductive substrate having opposing third and fourth surfaces; Provide composite substrates; The electronic component and the metal block are disposed on the third surface of the conductive substrate; The composite substrate is disposed on the fourth surface of the conductive substrate; After the electronic components and the metal block are disposed on the conductive substrate, at least one bonding layer and a second metal layer are attached to the third surface of the conductive substrate so that the bonding layer and the second metal layer cover the electronic components and the metal block. After the bonding layer and the second metal layer are bonded to the third surface of the conductive substrate, a plurality of conductive buried vias are formed in the bonding layer and the second metal layer, wherein the second metal layer is electrically connected to the electronic component and the metal block through the conductive buried vias; After forming the conductive buried via, the second metal layer is patterned to form a circuit layer; as well as After the circuit layer is formed, the circuit layer, the bonding layer, the conductive substrate, and the composite substrate are cut along the normal of the circuit layer to form the embedded structure.
9. The method according to claim 8, characterized in that, The composite substrate is formed in the following ways: Provide an initial composite substrate; and A third metal layer is deposited on each of the opposite sides of the initial composite substrate to form the composite substrate, and the third metal layer comprises nanocrystalline copper.
10. The method according to claim 9, characterized in that, The conductive substrate is formed by means of: Provide an initial conductive substrate; and A fourth metal layer is deposited on each of the opposite sides of the initial conductive substrate to form the conductive substrate, and the fourth metal layer comprises nanocrystalline copper.