Chip module, self-testing method, preparation method of receiving chip and laser radar
By integrating laser emitting and receiving chips on a system-on-a-chip and employing hybrid bonding and time-division multiplexing technologies, the problems of complex data fusion and large space occupation caused by independent LiDAR and camera devices are solved, achieving higher integration and data processing accuracy.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-11
- Publication Date
- 2026-03-27
AI Technical Summary
When LiDAR and cameras are used as sensors in vehicle systems, they are usually independent devices, which leads to complex coordinate calculations and large physical space requirements, making them unsuitable for miniaturization and integration.
The laser emitting chip and receiving chip are integrated on a system-on-a-chip (SoC), high-density interconnection is achieved through hybrid bonding technology, and through-silicon vias are set on the SoC for heat dissipation. Time-division multiplexing technology is used to avoid signal interference, and the signal detection capability is improved by combining an extended-angle lens and a matte coating.
It improves the accuracy and integration of data fusion, reduces the size of lidar, lowers signal transmission delay and thermal resistance, and enhances signal stability and response speed.
Smart Images

Figure CN121751784A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of lidar technology, and in particular to a chip module, a self-testing method, a method for preparing a receiving chip, and a lidar. Background Technology
[0002] As crucial sensors in automotive systems, LiDAR and cameras represent a significant development direction for automotive / robotics information sensing. Currently, LiDAR and cameras are typically two independent devices placed in different locations on the vehicle / robot. Due to the inconsistent data acquisition locations of the two devices, calculating unified coordinates for their data is extremely complex and prone to information mismatch during data fusion. Furthermore, the independent nature of LiDAR and cameras results in a larger physical footprint, hindering the integration and miniaturization of sensor devices. Summary of the Invention
[0003] This application provides a chip module, a self-testing method, a method for preparing a receiving chip, and a lidar, aiming to improve the current situation where lidar and cameras occupy a large physical space when used together, which is not conducive to miniaturization.
[0004] In a first aspect, embodiments of this application provide a chip module, including a packaging substrate, a system-on-a-chip (SoC), a laser emitting chip, at least two receiving chips, and a cover. The SoC is disposed on the surface of the packaging substrate. The laser emitting chip, disposed on the surface of the SoC, is used to emit laser signals. At least two receiving chips, disposed on the surface of the SoC, include a first receiving chip and a second receiving chip. The first receiving chip is used to receive echo laser signals, and the second receiving chip is used to receive visible light signals. The cover is disposed on the packaging substrate, and the cover and the packaging substrate together form a mounting cavity. The SoC, the laser emitting chip, the first receiving chip, and the second receiving chip are all located within the mounting cavity. The cover has a first area for laser signals to pass through, a second area for echo laser signals to pass through, and a third area for visible light signals to pass through. This chip module integrates both the laser emitting chip and the receiving chip on the SoC, achieving not only simultaneous emission and reception of laser signals by a single chip, but also simultaneous reception of laser signals and visible light signals by a single chip, improving the integration of the chip module and reducing the size of the lidar.
[0005] In some embodiments, a laser emitting chip and a first receiving chip are spaced apart along a first preset direction, and a second receiving chip is located between the laser emitting chip and the first receiving chip. Because the system-on-a-chip (SoC) is small in size, the laser emitting chip, the chip for receiving echo laser signals, and the chip for receiving visible light signals, all disposed on the surface of the SoC, are positioned close to each other. On the one hand, the proximity of the laser emitting chip and the chip for receiving echo laser signals reduces the blind zone in the field of view; on the other hand, the proximity of the chip for receiving echo laser signals and the chip for receiving visible light signals on the SoC makes the spatial positions of the received laser signals and visible light signals nearly identical, thereby reducing the error in the unified calculation of point cloud data and image data coordinates and improving the accuracy of data fusion.
[0006] In some embodiments, the laser emitting chip and the first receiving chip are spaced apart along a first preset direction, and the second receiving chip and the first receiving chip are spaced apart along a second preset direction; wherein the second preset direction is perpendicular to the first preset direction. This arrangement increases the distance between the laser emitting chip, the chip for receiving echo laser signals, and the chip for receiving visible light signals, thereby reducing thermal crosstalk between the chips. However, since the overall size of the system-on-a-chip is small, the blind spot caused by this distance, as well as the difficulty in fusing point cloud data and image data, is still acceptable.
[0007] In some embodiments, the cover includes a sidewall and a top wall. One end of the sidewall is fixed to a first surface of the packaging substrate on which a system-on-a-chip is disposed, and the other end extends away from the first surface; the top wall is fixed to the end of the sidewall away from the first surface, so that the packaging substrate, the sidewall and the top wall together form a mounting cavity, and the top wall is provided with a first lens, a second lens and a third lens, the first lens constituting a first region, the second lens constituting a second region and the third lens constituting a third region.
[0008] In some embodiments, the area of the top wall outside the first lens, second lens, and third lens is coated with an anti-reflective coating; the first lens is an expanding-angle lens, used to increase the detection field of view formed by the laser signal emitted by the laser emitting chip. By coating the top wall area outside the lens with an anti-reflective coating, stray light can be effectively absorbed and suppressed, enhancing signal detection capability; using an expanding-angle lens can extend the detection field of view, thereby improving the uniformity and accuracy of the detection signal.
[0009] In some embodiments, the laser emitting chip, the first receiving chip, and the second receiving chip are all electrically connected to the system-on-a-chip (SoC) via hybrid bonding; the SoC and the packaging substrate are electrically connected via hybrid bonding; the SoC has through-silicon vias (TSVs), within which a first material layer is disposed, the thermal conductivity of which is higher than a preset threshold; the laser emitting chip covers at least one TSV and is electrically connected to the packaging substrate through the first material layer. Hybrid bonding technology enables high-density interconnection between chips, improving not only the system's integration, response speed, and performance, but also the connection strength and stability between chips. The first material layer within the TSV serves two purposes: firstly, it supplies power to the laser emitting chip; secondly, it rapidly conducts the heat generated by the laser emitting chip to the packaging substrate, significantly improving heat dissipation efficiency and reducing the thermal resistance of the laser emitting chip.
[0010] In some embodiments, the signal transmission and reception cycle of the chip module includes a laser emitter period and a laser blanking period. During the laser emission period, the system-on-a-chip (SoC) controls the laser emitter chip and the first receiver chip to turn on, and controls the second receiver chip to turn off. During the laser blanking period, the SoC controls the laser emitter chip and the first receiver chip to turn off, and controls the second receiver chip to turn on. This configuration effectively avoids interference from the laser signal emitted by the laser emitter chip to the visible light signal received by the second receiver chip, thereby improving the signal quality received by the second receiver chip.
[0011] In some embodiments, the system-on-a-chip (SoC) is used to receive the echo laser signal processed by the first receiving chip and obtain point cloud data based on the processed echo laser signal; the SoC is used to receive the visible light signal processed by the second receiving chip and obtain image data based on the processed visible light signal; the SoC further includes a fusion unit for performing coordinate unification calculation on the point cloud data and image data and obtaining fused data, the fused data including the coordinate-unified point cloud data and image data.
[0012] In some embodiments, the system-on-a-chip further includes a communication interface; the communication interface is used to transmit fused data from the chip module to a device outside the chip module.
[0013] Secondly, embodiments of this application provide a self-testing method for a chip module, applicable to the chip module in any of the above embodiments. The method includes: controlling a laser emitting chip to emit a laser signal towards a preset scene; receiving first excitation data and second excitation data generated by a first receiving chip, wherein the first excitation data is point cloud data pre-stored by the first receiving chip based on the preset scene, and the second excitation data is an echo signal actually received based on the laser signal; receiving third excitation data generated by a second receiving chip, wherein the third excitation data is image data pre-stored by the second receiving chip based on the preset scene; and fusing the first excitation data and the third excitation data to obtain... The first fused data includes information from first stimulus data and third stimulus data. A first comparison result is obtained based on the first and second stimulus data. A second comparison result is obtained based on the first fused data and expected data, where the expected data is a result obtained by fusing the first stimulus data with the third stimulus data. Based on the first and second comparison results, it is determined whether the signal paths of the system-on-a-chip, laser emitting chip, first receiving chip, second receiving chip, and packaging substrate are abnormal. The first stimulus data table and the third stimulus data both correspond to the same preset scenario. By using the above method to perform self-testing on the chip, self-testing can be achieved internally without the need for additional testing equipment or devices, reducing testing costs, significantly shortening the testing process and time, and improving testing efficiency.
[0014] Thirdly, embodiments of this application provide a method for fabricating a receiving chip, applicable to the chip module in any of the above embodiments. The receiving chip includes a device layer and a substrate layer, the device layer being connected to a system-on-a-chip (SoC), and the substrate layer being located on the side of the device layer facing away from the SoC. The method for fabricating the receiving chip includes:
[0015] Step S1: Photolithography is performed on the substrate layer using a mask of a preset width to form a first protrusion and a first groove located on both sides of the first protrusion.
[0016] Step S2: Using a mask with a wider width than the one used in the previous round, perform photolithography on a portion of the groove formed in the previous round, so that the substrate layer forms a second protrusion supporting the protrusion formed in the previous round, and a second groove located on both sides of the second protrusion; and
[0017] Step S3: Repeat step S2;
[0018] The protrusions include a first protrusion and a second protrusion, and the sinks include a first sink and a second sink. By performing photolithography directly on the substrate of the receiver chip, not only is the integration density of the receiver chip improved, but high-precision receiver chip fabrication is also achieved. Furthermore, by performing photolithography directly on the substrate of the receiver chip, the entire fabrication process from the device layer to the substrate layer can be completed at the same location, shortening the processing time of the receiver chip.
[0019] In some embodiments, photolithography is performed on a substrate layer using a mask of a preset width to form a first protrusion and first sinks located on both sides of the first protrusion. This includes: coating a photoresist layer on the surface of the substrate layer to obtain a first resist layer; exposing the first resist layer to ultraviolet light using the mask of the preset width; developing the exposed area of the first resist layer to form a first region covered by the first resist layer and a second region exposed on the substrate layer; etching the second region to obtain the first sink; and removing the first resist layer to form the first protrusion and the first sinks located on both sides of the first protrusion on the substrate layer.
[0020] In some embodiments, a mask with a wider width than the mask used in the previous round is used to perform photolithography on a portion of the trench formed in the previous round, so that the substrate layer forms a second protrusion that supports the protrusion formed in the previous round, and a second trench located on both sides of the second protrusion. This includes: coating the surface of the substrate layer with photoresist to obtain a second photoresist layer; exposing the second photoresist layer with ultraviolet light using a mask with a wider width, wherein the mask with a wider width blocks the protrusion formed in the previous round; developing the exposed area of the second photoresist layer to form a third area covered by the second photoresist layer and a fourth area exposed in the substrate layer; etching the fourth area to obtain the second trench; and removing the second photoresist layer to form the second protrusion and the second trench located on both sides of the second protrusion in the substrate layer.
[0021] Fourthly, embodiments of this application provide a lidar, including a housing and a chip module as described in any of the above embodiments, wherein the chip module is disposed within the housing.
[0022] The technical solution provided in this application has the following beneficial effects:
[0023] This invention discloses a chip module, a self-testing method, a method for fabricating a receiving chip, and a lidar. On one hand, by integrating the chip for receiving echo laser signals and the chip for receiving visible light signals onto a system-on-a-chip (SoC), the spatial positions of the received laser and visible light signals are nearly identical, thereby reducing the error in the unified calculation of point cloud and image data coordinates and improving the accuracy of data fusion.
[0024] On the other hand, by integrating both the laser emitting chip and the receiving chip onto the system-on-a-chip, not only is the integration of the chip module improved and the size of the lidar reduced, but the data transmission distance between the chips is also significantly shortened, reducing signal delay during transmission. This improves the response speed and data processing efficiency of the chip module, helps to better calibrate and synchronize the work of each chip, and thus improves the accuracy of distance measurement, image acquisition, and other tasks. Attached Figure Description
[0025] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments recorded in this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0026] Figure 1 This is a schematic diagram of a side view of a chip module provided in an embodiment of this application;
[0027] Figure 2 This is a schematic diagram of time-division multiplexing of the laser emitting chip and the second receiving chip provided in the embodiments of this application;
[0028] Figure 3 This is a schematic diagram of a top view of the chip module provided in an embodiment of this application;
[0029] Figure 4 This is a schematic diagram of a top view of the chip module provided in an embodiment of this application;
[0030] Figure 5 This is a communication schematic diagram of a chip module provided in an embodiment of this application;
[0031] Figure 6 This is a flowchart of a chip module self-testing method provided in an embodiment of this application;
[0032] Figure 7 This is a schematic diagram of a receiving chip provided in an embodiment of this application;
[0033] Figure 8 This is a flowchart illustrating a method for fabricating a receiver chip according to an embodiment of this application;
[0034] Figure 9 yes Figure 8 The manufacturing process flow chart corresponding to step S1;
[0035] Figure 10 yes Figure 8 The manufacturing process flow chart corresponding to step S2.
[0036] The accompanying figures are labeled as follows:
[0037] 1. Chip Module; 10. Packaging Substrate; 11. System-on-a-Chip (SoC); 12. Laser Emitting Chip; 13. Receiving Chip; 13a. First Receiving Chip; 13b. Second Receiving Chip; 14. Cover; 111. Through-Silicon Via (TSV); 140. Sidewall; 141. Top Wall; 1411. First Lens; 1412. Second Lens; 1413. Third Lens; 110. Bus; 120. Main Control Unit; 130. Laser Emitting Control Unit; 150. First Serial Interface; 151. Second Serial Interface; 160. Control Unit; 170. Storage Unit; 180. Fusion Unit; 190. Transmission Unit; 191. Communication Interface; 2. External Devices; 131. Device Layer; 132. Substrate Layer; 133. First Adhesive Layer; 134. Second Adhesive Layer; 1321. First Boss; 1322. First Slot; 1323. Second Boss; 1324. Second Slot. Detailed Implementation
[0038] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions in the embodiments of this application will be described clearly and in detail below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. It should be understood that the specific embodiments described herein are only used to explain this application and are not intended to limit this application.
[0039] The fusion of point cloud data from LiDAR and image data from traditional cameras is a crucial development direction for vehicle / robot information sensing. Currently, LiDAR and cameras are typically two independent devices placed in different locations on the vehicle / robot. Because the information is collected from different locations by LiDAR and cameras, the coordinate calculation for fusion is extremely complex and prone to information mismatch. Furthermore, the fact that LiDAR and cameras are separate devices results in a larger physical footprint, hindering sensor integration and miniaturization.
[0040] Based on this, the embodiments of this application aim to provide a chip module, a self-testing method, a method for fabricating a receiving chip, and a lidar, aiming to improve the current situation where lidar and cameras occupy a large physical space when used together, which is not conducive to miniaturization. Furthermore, this chip module can also improve the integration of the chip module, reduce the error in the unified calculation of coordinates of point cloud data and image data, and improve the accuracy of point cloud data and image data fusion. The embodiments in this application are all described using chip module 1 applied to lidar as an example; however, in other embodiments of this application, chip module 1 can also be applied to other products, such as robots, drones, etc.
[0041] like Figure 1 As shown, Figure 1 This is a schematic side view of the chip module 1 provided in an embodiment of this application. The chip module 1 includes a packaging substrate 10, a system-on-chip (SOC) 11, a laser emitting chip 12, at least two receiving chips 13, and a cover 14. The SOC 11 is disposed on the surface of the packaging substrate 10. The laser emitting chip 12 is disposed on the surface of the SOC 11 and is used to emit laser signals. The at least two receiving chips 13 include a first receiving chip 13a and a second receiving chip 13b, both of which are disposed on the surface of the SOC 11. The first receiving chip 13a is used to receive echo laser signals, and the second receiving chip 13b is used to receive visible light signals. The cover 14 is disposed on the packaging substrate 10. The cover 14 and the packaging substrate 10 together form a mounting cavity. The system-on-a-chip 11, the laser emitting chip 12, the first receiving chip 13a and the second receiving chip 13b are all located in the mounting cavity. The cover 14 is provided with a first region 1411 for laser signals to pass through, a second region 1412 for echo laser signals to pass through, and a third region 1413 for visible light signals to pass through.
[0042] The packaging substrate 10 serves not only as a base for mounting the system-on-a-chip 11 and the cover 14, but also as a means of achieving electrical connection between the chip module 1 and external devices. In one embodiment, the packaging substrate 10 includes a conductive structure for achieving electrical connection between the chip module 1 and external circuitry, ensuring that the chip module 1 functions properly.
[0043] A system-on-a-chip 11 is disposed on the surface of a packaging substrate 10 to support a laser emitting chip 12, a first receiving chip 13a, and a second receiving chip 13b. The laser emitting chip 12 is disposed on the surface of the system-on-a-chip 11 and is used to emit laser signals. In one embodiment, the laser of the laser emitting chip 12 is a vertical-cavity surface-emitting laser (VCSEL), and there are multiple VCSELs arranged in an array on the laser emitting chip 12. In one embodiment, the laser signal emitted by the laser emitting chip 12 has a range from 850 nm to 1600 nm.
[0044] In some embodiments, the system-on-a-chip 11 has a through-silicon via (TSV) 111, within which a first material layer is disposed, the thermal conductivity of the first material layer being higher than a preset threshold; the laser emitting chip 12 covers at least one TSV 111 and is electrically connected to the packaging substrate 10 through the first material layer. In one embodiment, the preset threshold is 300 W / (m·K), and the first material layer comprises copper or other dielectrics with high thermal conductivity.
[0045] Specifically, the area and location of the laser emitting chip 12 on the system-on-chip 11 need to be determined first, and then a through-silicon via 111 is formed at the location of the laser emitting chip 12 on the system-on-chip 11. Further, the process of forming the through-silicon via 111 includes etching, insulating layer deposition, barrier layer deposition, filling, annealing, chemical-mechanical planarization (CMP), and wafer thinning.
[0046] In one embodiment, vias are first formed on the system-on-chip 11 by etching, followed by the deposition of an insulating layer and a barrier layer within the vias. Copper is then filled into the vias by electroplating. Finally, chemical mechanical polishing and wafer thinning are performed to form through-silicon vias (TSVs) 111 on the system-on-chip 111, and bonding metal pads, specifically copper pads, are formed on the TSVs 111. In one embodiment, the first material layer within the TSV 111 is copper.
[0047] On one hand, the through-silicon via 111 is used to realize the electrical connection between the laser emitting chip 12 and the packaging substrate 10. Specifically, the packaging substrate 10 supplies power to the laser emitting chip 12 through the through-silicon via 111. On the other hand, when the laser emitting chip 12 is working, the heat generated by the laser emitting chip 12 can be quickly conducted to the packaging substrate 10 through the first material layer in the through-silicon via 111, which effectively improves the heat dissipation efficiency of the chip and reduces the thermal resistance of the chip.
[0048] A first receiving chip 13a and a second receiving chip 13b are respectively disposed on the surface of the system-on-a-chip 11. The first receiving chip 13a is used to receive echo laser signals, and the second receiving chip 13b is used to receive visible light signals. In one embodiment, the echo laser signal received by the first receiving chip 13a has a range of 850nm to 1600nm, and the visible light signal received by the second receiving chip 13b has a range of 400nm to 700nm.
[0049] Specifically, the echo laser signal refers to the laser emitted by the laser emitting chip 12 reflected by objects within the detection range. Information about objects within the detection range, such as physical distance, speed, and shape, can be obtained through the echo laser signal. The visible light signal refers to the visible light reflected by objects within the detection range. Information about objects within the detection range, such as brightness, color, shape, and outline, can be obtained through the visible light signal.
[0050] In some embodiments, the laser emitting chip 12, the first receiving chip 13a, and the second receiving chip 13b are all electrically connected to the system-on-a-chip 11 via hyper-bonding, and the system-on-a-chip 11 and the packaging substrate 10 are electrically connected via hyper-bonding. In one embodiment, the first receiving chip 13a is a single-photon avalanche diode (SPAD) chip, referred to simply as a SPAD chip. In one embodiment, the second receiving chip 12b is a CMOS image sensor (CIS) chip, referred to simply as a CIS chip.
[0051] Specifically, the laser emitting chip 12, the first receiving chip 13a, and the second receiving chip 13b are directly bonded to the copper pads of the system-on-a-chip 11 using hybrid bonding technology, achieving a copper-to-copper connection and thus realizing the electrical connection between the laser emitting chip 12, the first receiving chip 13a, and the second receiving chip 13b and the system-on-a-chip 11, respectively. Hybrid bonding, by embedding metal pads in the bonding interface, eliminates signal interference between pads, improving signal integrity and stability. Because hybrid bonding uses a direct copper-to-copper connection, it reduces the signal transmission paths between chips in the chip module 1, thereby increasing data transmission speed; it also reduces the need for physical connections between chips, lowering internal mechanical stress and resistance, thereby reducing power consumption.
[0052] Furthermore, the hybrid bonding technology integrates the laser emitting chip 12, the first receiving chip 13a, the second receiving chip 13b, the system-on-a-chip 11, and the packaging substrate 10 in a vertically stacked manner. This not only improves the integration density of the chip module 1 and achieves high-density interconnection between chips, reducing the size of the lidar, but also improves the connection strength and stability between chips. In addition, the hybrid bonding technology effectively reduces the thermal resistance of the chip module 1 and improves heat dissipation performance through its compact structure and direct conductive path.
[0053] In some embodiments, the signal transmission and reception cycle of the chip module 1 includes a laser emission period and a laser blanking period. During the laser emission period, the system-on-a-chip 11 controls the laser emitting chip 12 and the first receiving chip 13a to be turned on, and controls the second receiving chip 13b to be turned off; at this time, the echo laser signal can be received through the first receiving chip 13a to obtain point cloud data. During the laser blanking period, the system-on-a-chip 11 controls the laser emitting chip 12 and the first receiving chip 13a to be turned off, and controls the second receiving chip to be turned on; at this time, the visible light signal can be received through the second receiving chip 13b to obtain image data.
[0054] In some embodiments, the system-on-a-chip 11 is used to receive the echo laser signal processed by the first receiving chip 13a and obtain point cloud data based on the processed echo laser signal; the system-on-a-chip 11 is used to receive the visible light signal processed by the second receiving chip 13b and obtain image data based on the processed visible light signal.
[0055] In one embodiment, the period during which the laser emitting chip 12 is turned off is called the laser blanking period. Taking the use of a Micro-Electro-Mechanical System (MEMS) galvanometer (MEMS galvanometer) for scanning in a lidar as an example, specifically, assuming the MEMS galvanometer's scanning cycle starts from the upper left corner and ends at the lower left corner, a retrace is required after each scanning cycle. That is, the galvanometer returns from the lower left corner to the upper left corner starting position to begin the next scanning cycle. This retrace process is the laser blanking period. During the laser blanking period, the laser emitting chip 12 does not emit laser light, and the first receiving chip 13a does not receive the echo laser; only the second receiving chip 13b receives visible light. Further, during the MEMS galvanometer's scanning cycle, i.e., the laser emission period, the laser emitting chip 12 emits laser light, and the first receiving chip 13a receives the echo laser. Therefore, the point cloud data obtained by the system-on-a-chip 11 during the laser emission period and the image data obtained by the system-on-a-chip 11 during the laser blanking period represent data from the same detection range within the same cycle of the lidar. In another embodiment, the lidar can also use a rotating mirror for scanning.
[0056] like Figure 2 As shown, Figure 2 This is a schematic diagram illustrating the time-division multiplexing of the laser emitting chip 12 and the second receiving chip 13b provided in an embodiment of this application. In one embodiment, one working cycle of the laser emitting chip 12 is divided into two time periods: the laser emitting chip 12 is turned on and the laser emitting chip 12 is turned off. Throughout the operation of the entire chip module 1, the laser emitting chip 12 continuously repeats this working cycle.
[0057] Specifically, the activation period of the laser emitting chip 12 includes three consecutive stages: charging, emitting, and receiving by the first receiving chip 13a. Charging the laser emitting chip 12 provides power to the packaging substrate 10, causing electrons inside the laser emitting chip 12 to transition from low to high energy levels, preparing energy for laser emission. Emitting the laser emitting chip 12 occurs after charging is complete, when the laser emitting chip 12 emits laser light into the detection range. Receiving the laser light by the first receiving chip 13a occurs after the laser emitting chip 12 emits laser light, which is then received by the first receiving chip 13a from the echo laser light reflected from objects within the detection range.
[0058] Furthermore, during the period when the laser emitting chip 12 is turned on, the three stages of laser emitting chip 12 charging, emitting, and first receiving chip 13a receiving are performed sequentially, forming a periodic laser emitting chip 12 charging, emitting, and first receiving chip 13a receiving, ensuring that the chip module 1 can continuously emit laser and receive echo laser.
[0059] One operating cycle of the second receiving chip 13b is also divided into two time periods: the second receiving chip 13b is off and the second receiving chip 13b is on. The time period when the second receiving chip 13b is off corresponds to the time period when the laser emitting chip 12 is on, and the time period when the second receiving chip 13b is on corresponds to the time period when the laser emitting chip 12 is off.
[0060] Specifically, the laser emitting chip 12 is turned on during the laser emission period and turned off during the laser blanking period. During the laser blanking period, the laser emitting chip 12 does not emit laser light, and the first receiving chip 13a does not receive the echo laser. By using time-division multiplexing for the laser emitting chip 12 and the second receiving chip 13b, interference caused by the laser emission of the laser emitting chip 12 to the reception of visible light signals by the second receiving chip 13b is effectively avoided.
[0061] like Figure 3 As shown, Figure 3 This is a schematic top view of the chip module 1 provided in an embodiment of this application. In some embodiments, the laser emitting chip 12 and the first receiving chip 13a are spaced apart along a first preset direction, and the second receiving chip 13b is located between the laser emitting chip and the first receiving chip 13a. In this embodiment, the first preset direction X is the extension direction of the long side of the surface of the system-on-a-chip 11.
[0062] In one embodiment, the first preset direction X is the extension direction of the wide side of the surface of the system-on-a-chip 11, the extension direction of the two diagonals of the surface of the system-on-a-chip 11, or parallel to the extension direction of the two diagonals of the surface of the system-on-a-chip 11. Because the system-on-a-chip 11 is relatively small, the laser emitting chip 12, the first receiving chip 13a, and the second receiving chip 13b disposed on the surface of the system-on-a-chip 11 are positioned close to each other. Specifically, the close position of the laser emitting chip 12 and the first receiving chip 13a can reduce the blind zone in the field of view; the close position of the second receiving chip 13b and the first receiving chip 13a makes the spatial positions of the received laser signal and visible light signal nearly consistent, thereby reducing the error in the unified calculation of point cloud data and image data coordinates and improving the accuracy of data fusion.
[0063] like Figure 4 As shown, Figure 4This is a schematic top view of the chip module 1 provided in an embodiment of this application. In some embodiments, the laser emitting chip 12, the first receiving chip 13a, and the second receiving chip 13b may not be arranged collinearly. For example, the laser emitting chip 12 and the first receiving chip 13a may be spaced apart along a first preset direction X, and the second receiving chip 13b and the first receiving chip 13a may be spaced apart along a second preset direction Y; wherein, the second preset direction Y is perpendicular to the first preset direction X. In this embodiment, the first preset direction X is the long side direction of the surface of the system-on-a-chip 11, and the second preset direction Y is the wide side direction of the surface of the system-on-a-chip 11.
[0064] In one embodiment, the first preset direction X is the extension direction of the wide side of the surface of the system-on-a-chip 11, and the second preset direction Y is the extension direction of the long side of the surface of the system-on-a-chip 11. This arrangement increases the spacing between the laser emitting chip 12, the first receiving chip 13a, and the second receiving chip 13b, thereby reducing thermal crosstalk between the chips. Although this arrangement increases the spacing between the laser emitting chip 12, the first receiving chip 13a, and the second receiving chip 13b, the overall size of the system-on-a-chip 11 is relatively small, so the blind spots caused by this spacing, as well as the difficulty in fusing point cloud data and image data, are still acceptable.
[0065] Furthermore, by placing the laser emitting chip 12, the first receiving chip 13a, and the second receiving chip 13b all on the system-on-a-chip 11, not only is the integration of the chip module 1 improved, but the size of the lidar is also reduced. It should be understood that the present invention does not impose any specific restrictions on the position of the laser emitting chip 12, the first receiving chip 13a, and the second receiving chip 13b on the system-on-a-chip 11.
[0066] In some embodiments, such as Figure 1 As shown, the cover 14 includes a sidewall 140 and a top wall 141 for encapsulating a system-on-a-chip 11, a laser emitting chip 12, a first receiving chip 13a, and a second receiving chip 13b. One end of the sidewall 140 is fixed to the first surface of the packaging substrate 10 where the system-on-a-chip 11 is located, and the other end extends away from the first surface. The top wall 141 is fixed to the end of the sidewall 140 away from the first surface, such that the packaging substrate 10, the sidewall 140, and the top wall 141 together form a mounting cavity for fixing and protecting the system-on-a-chip 11, the laser emitting chip 12, the first receiving chip 13a, and the second receiving chip 13b, preventing displacement or damage to the chips within the cavity during packaging or transportation. In one embodiment, the sidewall 140 is made of a dual-adhesive material (DMA), and the top wall 141 is made of glass.
[0067] Specifically, such as Figure 3As shown, from a top view, the area of the closed region formed by the sidewall 140 on the packaging substrate 10 is larger than the area of the system-on-a-chip 11, but smaller than the area of the packaging substrate 10.
[0068] In one embodiment, the top wall 141 is fixed to the end of the side wall 140 away from the first surface and is bonded to the side wall 140 with adhesive, thereby encapsulating the system-on-a-chip 11, the laser emitting chip 12, the first receiving chip 13a, and the second receiving chip 13b within the cavity, ensuring good airtightness and watertightness within the cavity. Furthermore, bonding the side wall 140 to the top wall 141 with adhesive also effectively prevents rainwater or dust from entering the cavity and damaging the chips.
[0069] In some embodiments, such as Figure 1 As shown, the top wall 141 is provided with a first lens, a second lens, and a third lens. The first lens constitutes a first region 1411, the second lens constitutes a second region 1412, and the third lens constitutes a third region 1413. The first lens is used to amplify the laser emitted by the laser emitting chip 12, so that the amplified laser illuminates objects within the detection range of the lidar. The second lens is used to refract the echo laser into the enclosed cavity to obtain refracted laser light, and then focus the refracted laser light onto the first receiving chip 13a. The third lens is used to refract visible light into the enclosed cavity to obtain refracted visible light, and then focus the refracted visible light onto the second receiving chip 13b. In some embodiments, the area of the top wall 141 outside the first, second, and third lenses is coated with an matting layer to absorb and suppress stray light, thereby enhancing signal detection capability.
[0070] In some embodiments, the first lens is an expanding lens, used to increase the detection field of view formed by the laser signal emitted by the laser emitting chip 12. The laser emitted by the laser emitting chip 12 can be a linear array laser or a planar laser. The second and third lenses include convex lenses, used to focus the echo laser and visible light from outside the lidar onto the first receiving chip 13a and the second receiving chip 13b, respectively. In one embodiment, the top wall 141 is made of glass, and convex lenses for focusing light, i.e., the second and third lenses, are etched on the area of the top wall 141 corresponding to the first receiving chips 13a and 13b. An expanding lens for extending light, i.e., the first lens, is etched on the area corresponding to the laser emitting chip 12.
[0071] In one embodiment, the second lens 1412 includes a microlens array, each microlens in the microlens array corresponding to a SPAD unit in the aforementioned area array SPAD chip. The microlenses are used to improve the single-photon detection efficiency of the first receiving chip 13a in low-photon environments, ensuring the accuracy of point cloud data. The third lens 1413 includes a microlens array and an infrared cut-off filter, wherein the microlens array and the infrared cut-off filter are respectively disposed on both sides of the top wall 141. The microlens array is used to focus visible light onto the second receiving chip 13b, improving the collection efficiency and imaging quality of visible light. The infrared cut-off filter is used to transmit visible light while blocking or reflecting infrared light, ensuring the quality of image data and the accuracy of color.
[0072] like Figure 5 As shown, Figure 5 This is a communication schematic diagram of a chip module 1 provided in an embodiment of this application. The chip module 1 includes a system-on-a-chip (SoC) 11, a laser emitting chip 12, a first receiving chip 13a, and a second receiving chip 13b. The laser emitting chip 12, the first receiving chip 13a, and the second receiving chip 13b are respectively connected to the SoC 11, and the SoC 11 is used to control the laser emitting chip 12, the first receiving chip 13a, and the second receiving chip 13b.
[0073] In one embodiment, after power-on, the system-on-chip 11 first initializes the laser emitting chip 12, the first receiving chip 13a, and the second receiving chip 13b. Specifically, the system-on-chip 11 sets parameters such as the emission power, pulse width, and frequency of the laser emitting chip 12; it sets parameters such as the detection threshold of the first receiving chip 13a to improve its response to laser signals; and it sets parameters such as the exposure time of the second receiving chip 13b to ensure high-quality image data is obtained. Furthermore, the initialization process of the laser emitting chip 12, the first receiving chip 13a, and the second receiving chip 13b by the system-on-chip 11 also includes error detection processing to ensure the normal operation of the hardware devices of the laser emitting chip 12, the first receiving chip 13a, and the second receiving chip 13b. Any problems will be identified by the system-on-chip 11, and appropriate measures will be taken.
[0074] Furthermore, after initializing the laser emitting chip 12, the first receiving chip 13a, and the second receiving chip 13b, the system-on-chip 11 controls the laser emitting chip 12 to emit laser light and controls the first receiving chip 13a to receive the echo laser signal within the detection range, transmitting it to the system-on-chip 11. After a series of processing steps by the system-on-chip 11, point cloud data is finally obtained. After the first receiving chip 13a receives the echo laser signal within the detection range, the system-on-chip 11 controls the laser emitting chip 12 and the first receiving chip 13a to turn off, and controls the second receiving chip 13b to turn on, receiving visible light within the detection range and transmitting it to the system-on-chip 11. After a series of processing steps by the system-on-chip 11, image data is finally obtained. The system-on-chip 11 performs coordinate unified calculation and fusion of the point cloud data and the image data to obtain fused data, and transmits the fused data to the external device 2.
[0075] In some embodiments, the system-on-a-chip 11 includes a bus 110, a main control unit 120, a laser emission control unit 130, a first serial interface 150, a second serial interface 151, a control unit 160, a storage unit 170, a fusion unit 180, a transmission unit 190, and a communication interface 191. There are two communication interfaces 191, namely communication interface 1 and communication interface 2.
[0076] Bus 110 is a set of physical lines or electronic signals used for data transmission. A bus typically consists of three parts: an address bus, a main bus, and a control bus, used to transmit address, data, and control signals. Bus 110 connects the various units and interfaces within the system-on-a-chip 11, enabling them to communicate and exchange data.
[0077] The main control unit 120 is the core part of the entire system-on-a-chip 11. It is connected to the bus 110 and is used to execute instructions, process data, and control other units. In one embodiment, the main control unit 120 includes a central processing unit (CPU).
[0078] The laser emission control unit 130 is connected to the bus 110 and the laser emission chip 12, and is used to control the laser emission chip 12 to turn on and off. In one embodiment, the main control unit 120 controls the laser emission control unit 130 through the bus 110 and outputs control commands to the laser emission chip 12. After receiving the control commands, the laser emission chip 12 emits laser light into the detection range.
[0079] The first serial interface 150 is connected to the first receiving chip 13a and is used to transmit the electrical signal converted by the first receiving chip 13a based on the received echo laser signal to the system-on-a-chip 11. In one embodiment, the first receiving chip 13a converts the received echo laser signal into an electrical signal and encodes and formats it through a serial communication protocol to ensure the integrity and reliability of the signal during transmission. The encoded and formatted signal is transmitted to the system-on-a-chip 11 through the first serial interface 150. The system-on-a-chip 11 receives and decodes these signals, and then performs further processing and analysis to finally obtain point cloud data.
[0080] The second serial interface 151 is connected to the second receiving chip 13b and is used to transmit the electrical signal converted by the second receiving chip 13b based on the received visible light signal to the system-on-a-chip 11. In one embodiment, the second receiving chip 13b converts the received visible light signal into an electrical signal and encodes and formats it through a serial communication protocol to ensure the integrity and reliability of the signal during transmission. The encoded and formatted signal is transmitted to the system-on-a-chip 11 through the second serial interface 151. The system-on-a-chip 11 receives and decodes these signals, and then performs further processing and analysis to finally obtain image data.
[0081] In one embodiment, both the first serial interface 150 and the second serial interface 151 include a MIPI CSI (Camera Serial Interface) interface. Specifically, the MIPI CSI interface is a high-speed serial interface designed specifically for mobile devices, primarily used for data transmission between the camera and the processor, featuring high bandwidth, low power consumption, and high reliability. Furthermore, the MIPI CSI interface supports high-speed data transmission, meeting the needs of high-resolution image and video transmission, and also supports multiple pixel formats, enabling it to adapt to different image processing requirements.
[0082] The control unit 160 is connected to the bus 110 and the second receiving chip 13b, and is used to control the turning on and off of the second receiving chip 13b. In one embodiment, the main control unit 120 controls the control unit 160 through the bus 110 and outputs control commands to the second receiving chip 13b. After receiving the control commands, the second receiving chip 13b begins to receive visible light within its detection range and transmits the visible light signal to the system-on-a-chip 11 through the second serial interface 151. Simultaneously, the main control unit 120 controls the laser emitting chip 12 to turn off through the bus 110 and the laser control unit 130, and controls the first receiving chip 13a to turn off through the bus 110. Specifically, the main control unit 120 controls the control unit 160 through the bus 110, and outputs control commands after the laser emitting chip 12 and the first receiving chip 13a have been turned off.
[0083] Storage unit 170 is connected to bus 110 and is used to cache point cloud data and image data within the same cycle. The same cycle includes a laser emission period and a laser blanking period; during the laser emission period, the laser emitting chip 12 and the first receiving chip 13a are turned on, and the second receiving chip 13b is turned off; during the laser blanking period, the laser emitting chip 12 and the first receiving chip 13a are turned off, and the second receiving chip 13b is turned on. In one embodiment, the storage unit includes a frame buffer (frm buffer).
[0084] In some embodiments, the system-on-a-chip 11 further includes a fusion unit 180, which is connected to the bus 110 and is used to perform coordinate unification calculation on point cloud data and image data to obtain fused data, which includes coordinate-unified point cloud data and image data. Further, the fusion unit 180 is also used to further transmit the fused data to the storage unit 170 for caching.
[0085] Specifically, when the fusion unit 180 fuses point cloud data and image data, since the laser signals and visible light signals received by the first receiving chip 13a and the second receiving chip 13b are almost identical in spatial position, the calculation of coordinate transformation can be simplified, accurate registration can be achieved when fusing point cloud data and image data, and the accuracy and reliability of the fused data can be improved.
[0086] In one embodiment, the fusion unit 180 maps color information from image data onto point cloud data to generate colored point cloud data. This not only makes the point cloud data more vivid and intuitive but also facilitates subsequent 3D reconstruction and visualization analysis. Furthermore, after color filling the fused data, global optimization is performed to adjust the parameters of the image data and point cloud data, ensuring spatial, color, and temporal consistency. For data obtained from multiple scans, stitching processing is also required to generate a complete panoramic view of the scene. By fusing point cloud data and image data, the fusion unit 180 can provide accurate 3D spatial information, thereby improving environmental perception. Especially in fields such as autonomous driving, this fusion can significantly enhance the vehicle's understanding of its surroundings.
[0087] The transmission unit 190 is connected to the bus 110 and is used to transfer fused data from the storage unit 170 to the communication interface 191. In one embodiment, the transmission unit 190 is a Direct Memory Access (DMA) device. Specifically, DMA allows peripheral devices to directly access system memory without the control of the central processing unit, which can significantly improve data transfer rates, reduce the burden on the central processing unit, and improve overall system performance.
[0088] In some embodiments, the system-on-a-chip 11 further includes a communication interface 191, which is connected to the bus 110 for transmitting fused data from the chip module 1 to a device 2 outside the chip module. The communication interface 191 includes communication interface 1 and communication interface 2, where communication interface 1 is different from communication interface 2. Specifically, the fused data cached in the storage unit 170 is transferred to communication interface 1 or communication interface 2 via the transmission unit 190, and then transmitted to the external device 2 via communication interface 1 or communication interface 2, achieving highly flexible data communication.
[0089] In one embodiment, communication interface 1 includes a wired interface and communication interface 2 includes a wireless interface; or, communication interface 1 includes a wireless interface and communication interface 2 includes a wired interface. The wired interface is used to transmit fused data via a physical medium, and the wireless interface is used to transmit fused data via radio waves. In one embodiment, the wired interface includes Ethernet, and the wireless interface includes Wi-Fi.
[0090] In one embodiment, when the chip module 1 is located in an electrical device, such as a lidar device, electric vehicle, electric two-wheeler, electric tricycle, robot, etc., the external device 2 includes a memory or processor in the electrical device. After receiving the fused data, the external device 2 uses the fused data for object detection and classification to identify and understand objects in the surrounding environment, such as vehicles, pedestrians, traffic signs, etc. Furthermore, the external device 2 is also responsible for tracking multi-frame information, calculating and predicting the trajectory of obstacles, and semantic understanding of special scenarios including traffic lights, road signs, construction areas, etc., and outputting the processed data to the decision-making system for path planning to achieve safe driving of the autonomous vehicle. In one embodiment, the external device 2 may also include a hard drive, a remote server, or the cloud for storing and analyzing the fused data for further analysis and processing.
[0091] like Figure 6 As shown, Figure 6 This is a flowchart illustrating a self-testing method for a chip module 1 provided in this application embodiment. It should be understood that the self-testing method for the chip module 1 provided in this application embodiment is applied to the aforementioned chip module 1. The chip module 1 can be located in any device, including but not limited to: LiDAR, automotive devices, handheld devices, wearable devices, or computing devices. The following embodiments of this application will use the system-on-a-chip 11 in the chip module 1 as an example to illustrate the method. The specific steps of the method are as follows:
[0092] S10: Control the laser emitting chip 12 to emit laser signals to the preset scene.
[0093] In some embodiments, the system-on-a-chip 11 outputs control commands through the laser emission control unit 130, causing the laser emission chip 12 to emit laser signals toward a preset scene.
[0094] S20. Receive first excitation data and second excitation data generated by the first receiving chip 13a, wherein the first excitation data is point cloud data pre-stored by the first receiving chip 13a based on a preset scenario, and the second excitation data is the echo signal actually received based on the laser signal.
[0095] In some embodiments, the system-on-a-chip 11 receives first stimulus data and second stimulus data through a first serial interface 150. The first stimulus data is point cloud data pre-stored in the first receiving chip 13a and obtained based on a preset scene, and the second stimulus data is the echo signal actually received based on the laser signal. Specifically, before executing step S20, the preset scene is detected by a lidar including a receiving chip of the same specifications as the first receiving chip 13a to obtain corresponding point cloud data, and the point cloud data is stored in the first receiving chip 13a as reference data for use in the mass-produced chip module 1. Specifically, the preset scene corresponding to the first stimulus data and the second stimulus data is the same scene.
[0096] S30. Receive the third stimulus data generated by the second receiving chip 13b, wherein the third stimulus data is image data pre-stored by the second receiving chip 13b and obtained based on a preset scene.
[0097] In some embodiments, the system-level receiving chip 11 receives third stimulus data through the second serial interface 151. The third stimulus data is image data pre-stored in the second receiving chip 13b and obtained based on a preset scene. Specifically, before executing step S30, the preset scene is detected by a LiDAR including a receiving chip of the same specifications as the second receiving chip 13b to obtain corresponding image data, and the image data is stored in the second receiving chip 13b as reference data for use in the mass-produced chip module 1. The point cloud data pre-stored in the first receiving chip 13a and the image data pre-stored in the second receiving chip 13b both originate from the same preset scene; that is, the preset scene corresponding to the first stimulus data and the third stimulus data is the same scene.
[0098] S40. Based on the first incentive data and the third incentive data, the first fused data is obtained by fusing them together, wherein the first fused data includes information from the first incentive data and the third incentive data.
[0099] In some embodiments, the system-on-chip 11 fuses the received first stimulus data and third stimulus data through the fusion unit 180 to obtain first fused data. In one embodiment, the first fused data includes depth information of point clouds and color information of images in the same scene.
[0100] S50. Based on the first incentive data and the second incentive data, obtain the first comparison result of the first incentive data and the second incentive data.
[0101] In some embodiments, the first stimulus data and the second stimulus data are transmitted to the main control unit 120 through the first serial interface 150 and the bus 110. The main control unit 120 compares the first stimulus data and the second stimulus data to obtain a first comparison result. In another embodiment, the first stimulus data is pre-stored in the host computer, and the second stimulus data is first transmitted to the storage unit 170 in the system-on-a-chip for caching, and then transferred from the storage unit 170 to the communication interface 191 by the transmission unit 190. Finally, the first fused data is transmitted to the host computer through the communication interface 191, and the host computer compares the first stimulus data and the second stimulus data to obtain a first comparison result.
[0102] S60. Based on the first fused data and the expected data, a second comparison result of the first fused data and the expected data is obtained, wherein the expected data is the result obtained in advance by fusing the first incentive data and the third incentive data.
[0103] In some embodiments, the desired data is the result obtained by the system-on-chip 11 in advance by fusing the first stimulus data and the third stimulus data. In one embodiment, point cloud data is obtained by detecting a preset scene using a lidar, and image data is obtained by acquiring images of the preset scene using an image acquisition device. Then, the point cloud data and the image data are fused by a processor or microcontroller unit to obtain the desired data, and the desired data is stored in the system-on-chip 11.
[0104] Specifically, the expected data is pre-stored in the system-on-a-chip 11 as reference data. The first fused data is the data actually obtained by fusing the first stimulus data output by the first receiver chip 13a and the second stimulus data output by the second receiver chip 13b after the first receiver chip 13a and the second receiver chip 13b are disposed on the surface of the system-on-a-chip 11. Therefore, by comparing the first fused data with the expected data, it can be determined whether the communication between the first receiver chip 13a and the second receiver chip 13b and the system-on-a-chip is normal.
[0105] In one embodiment, both the first fused data and the desired data are stored in the storage unit 170 of the system-on-a-chip 11. The first fused data and the desired data are transmitted to the main control unit 120 via the bus 110. The main control unit 120 compares the first fused data and the desired data to obtain a second comparison result. In another embodiment, the desired data is pre-stored in the host computer. The first fused data is first transmitted to the storage unit 170 of the system-on-a-chip 11 for caching. Then, the transmission unit 190 moves the first fused data from the storage unit 170 to the communication interface 191. Finally, the communication interface 191 transmits the first fused data to the host computer, where the host computer compares the desired data and the first fused data to obtain a second comparison result.
[0106] S70. Based on the first comparison result and the second comparison result, determine whether the signal paths of the system-on-a-chip 11, the laser emitting chip 12, the first receiving chip 13a, the second receiving chip 13b, and the packaging substrate 10 are abnormal; wherein, the first excitation data and the third excitation data both correspond to the same preset scenario.
[0107] In one embodiment, if the comparison results of the first stimulus data and the second stimulus data are consistent or have a small difference, it indicates that the signal paths of the system-on-a-chip 11, the laser emitting chip 12, and the first receiving chip 13a are normal; if the comparison results of the first stimulus data and the second stimulus data have a large difference, it indicates that the signal paths of the system-on-a-chip 11, the laser emitting chip 12, and the first receiving chip 13a are abnormal.
[0108] In one embodiment, if the comparison results of the first fused data and the expected data are consistent or have a small difference, it indicates that the signal path of the system-on-chip 11, the first receiving chip 13a, the second receiving chip 13b, and the packaging substrate 10 is normal; if the comparison results of the first fused data and the expected data have a large difference, it indicates that the signal path of the system-on-chip 11, the first receiving chip 13a, the second receiving chip 13b, and the packaging substrate 10 is abnormal. Specifically, based on the first comparison result and the second comparison result, it can be determined whether the entire signal chain path of the system-on-chip 11, the laser emitting chip 12, the first receiving chip 13a, the second receiving chip 13b, and the packaging substrate 10 is abnormal.
[0109] The self-testing method of the chip module 1 described above enables self-testing within the chip without the need for additional testing equipment or devices, reducing testing costs, significantly shortening the testing process and time, and improving testing efficiency.
[0110] like Figure 7 As shown, Figure 7This is a schematic diagram of a receiving chip 13 provided in an embodiment of this application. The receiving chip 13 includes a first receiving chip 13a and a second receiving chip 13b. In some embodiments, the receiving chip 13 includes a device layer 131 and a substrate layer 132. The device layer 131 is connected to a system-on-a-chip 11, and the substrate layer 132 is located on the side of the device layer 131 facing away from the system-on-a-chip 11.
[0111] In one embodiment, the substrate 132 is made of silicon and is fabricated using a chemical vapor deposition (CVD) process. CVD is a process that utilizes the chemical reaction of gases on a solid surface to deposit solid materials. Its basic principle is a gas-phase reaction at high temperatures, such as the thermal decomposition of metal halides, organometallic compounds, hydrocarbons, etc., hydrogen reduction, or a chemical reaction of its mixed gases at high temperatures to precipitate inorganic materials such as metals, oxides, and carbides.
[0112] like Figures 8 to 10 As shown, Figure 8 This is a flowchart illustrating a method for fabricating a receiver chip 13 according to an embodiment of this application. Figure 9 and Figure 10 This is a flowchart illustrating the manufacturing process corresponding to the method for fabricating the receiver chip 12. It should be understood that the method for fabricating the receiver chip 13 provided in this embodiment is applied to the chip module 1 described above. The specific steps of this method are as follows:
[0113] Step S1: Photolithography is performed on the substrate layer 132 using a mask of a preset width, forming a first protrusion 1321 and a first groove 1322 located on both sides of the first protrusion.
[0114] In some embodiments, such as Figure 9 As shown, step S1 includes: coating a photoresist onto the surface of a substrate layer 132 to obtain a first photoresist layer 133; exposing the first photoresist layer 133 to ultraviolet light using a mask of a preset width; developing the exposed area of the first photoresist layer to form a first region covered by the first photoresist layer 133 and a second region exposed on the substrate layer 132; etching the second region to obtain a first sink 1322; and removing the first photoresist layer 133 to form a first boss 1321 and a first sink 1322 located on both sides of the first boss on the substrate layer 132.
[0115] Step S2: Using a mask with a wider width than the mask used in the previous round, perform photolithography on a portion of the groove formed in the previous round, so that the substrate layer 132 forms a second protrusion 1323 that supports the protrusion formed in the previous round, and a second groove 1324 located on both sides of the second protrusion 1323.
[0116] In some embodiments, such as Figure 10As shown, step S2 includes: coating a photoresist layer on the surface of the substrate layer 132 to obtain a second photoresist layer 134; exposing the second photoresist layer 134 to ultraviolet light using a mask with a wider width, wherein the mask with a wider width blocks the protrusion formed in the previous round; developing the exposed area of the second photoresist layer 134 to form a third region covered by the second photoresist layer 134 and a fourth region exposed on the substrate layer 132; etching the fourth region to obtain a second trench 1324; and removing the second photoresist layer to form a second protrusion and a second trench located on both sides of the second protrusion on the substrate layer 132.
[0117] Step S3: Repeat step S2; wherein the boss includes a first boss 1321 and a second boss 1323, and the sink includes a first sink 1322 and a second sink 1324.
[0118] Specifically, the third region includes the portion of the boss and sinker formed in the previous round, such as the portion of the first boss and the first sinker; the fourth region includes most of the sinker formed in the previous step, such as most of the first sinker.
[0119] By repeatedly executing step S2, an approximate arc shape with a thicker middle region and gradually decreasing thickness on both sides can be formed on the surface of the substrate layer 122 away from the device layer 121, thus ultimately obtaining a convex lens.
[0120] In one embodiment, the mask with a preset width in step S1 represents the mask's process limit; that is, the preset width of the mask is the minimum width achievable under the current mask fabrication process conditions. In step S2, the mask width used initially is greater than the mask width in step S1. In step S3, the mask width used in the repeated execution of step S2 is greater than the mask width used in the previous round, meaning the mask width gradually increases, but the maximum mask width is less than the width of the substrate layer 122. Specifically, in each step after the initial step, the mask width is greater than the width of the protrusion formed in the previous step.
[0121] In one embodiment, the etching in the above steps is either ion beam etching (IBE) or reactive ion etching (RIE). Ion beam etching is a dry etching technique that uses an ion beam to react physically or chemically with the material surface to remove material, thereby achieving precise pattern transfer. Reactive ion etching uses a high-energy ion beam to bombard the surface of the object to be etched, while simultaneously introducing a reactive gas. Collisions between the ion beam and gas molecules generate chemically active groups and ions. These high-energy ions and active groups react chemically with the surface of the etched material, thereby removing unwanted material.
[0122] like Figure 8As shown, Figure 8 This is a flowchart illustrating a method for fabricating a receiver chip 13 according to an embodiment of this application. It should be understood that the method for fabricating the receiver chip 13 provided in this embodiment is applied to the chip module 1 described above. The specific steps of this method are as follows:
[0123] In one embodiment, the substrate of the receiving chip 13 is fabricated using the above-described method steps, resulting in the substrate 13 being ultimately fabricated into an arc-shaped integrated lens, wherein the lens corresponds to the entire receiving chip 12. In another embodiment, the substrate of the receiving chip 12 is fabricated using the above-described method steps, resulting in the substrate 12 being ultimately fabricated into an arc-shaped microlens array. Specifically, the more times the above steps are repeated, the better the curvature and accuracy of the lens will be optimized and improved.
[0124] In one embodiment, the receiving chip 13 further includes a pixel array and a microlens array, wherein the pixel array is disposed on the device layer 131, and the microlens array is fabricated from the substrate layer 132. Specifically, each microlens in the microlens array corresponds one-to-one with each pixel in the pixel array, and the specific steps of the above-described method for fabricating the receiving chip 13 are to fabricate a microlens on a pixel, so that the pixel and the microlens are integrally formed.
[0125] By directly fabricating a high-precision microlens on the substrate layer 132 of the receiving chip 13 using semiconductor fabrication methods, not only is the quality and performance of the received signal of the receiving chip 13 improved, but the integration density of the receiving chip 13 is also increased. Furthermore, the fabrication of the receiving chip 13 from the device layer to the microlens can be completed in the same location, shortening processing time and reducing production costs.
[0126] This application also provides a lidar, which includes a housing and a chip module 1 as described in any embodiment of this application, wherein the chip module 1 is disposed inside the housing.
[0127] In the description of this application, it should be understood that, unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the application. The terms “and / or” and “and / or” as used herein describe the relationship between related objects, indicating that three relationships may exist, for example, A and / or B can represent: A alone, A and B simultaneously, and B alone. The character “ / ” generally indicates that the preceding and following related objects are in an “or” relationship. The singular forms “a” and “an” are also intended to include the plural forms unless the context clearly indicates otherwise. When the terms “comprising” and / or “including” are used in this specification, they indicate the presence of the stated features, elements, and / or components, but do not exclude the presence or addition of one or more other features, elements, components, and / or combinations thereof, i.e., including any and all combinations of one or more of the associated listed items. Ordinal numbers such as “first” and “second” referenced in the embodiments of this application are merely identifiers and do not imply any particular order or relative importance.
[0128] In this application, unless otherwise expressly specified and limited, "above" or "below" a second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of a second feature includes the first feature being directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" a second feature includes the first feature being directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature. Those skilled in the art can understand the specific meaning of the above terms according to the specific circumstances. The phrase "one or more embodiments" as used herein does not refer to the same embodiment, but rather to any suitable combination of specific features, structures, or characteristics. The above are merely preferred embodiments of this application and are not intended to limit this application. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this application should be included within the scope of protection of this application.
Claims
1. A chip module, characterized in that, include: Packaging substrate; A system-on-a-chip is disposed on the surface of the packaging substrate; A laser emitting chip, disposed on the surface of the system-on-a-chip, is used to emit laser signals; At least two receiving chips are disposed on the surface of the system-on-a-chip, the at least two receiving chips including a first receiving chip and a second receiving chip, the first receiving chip being used to receive echo laser signals, and the second receiving chip being used to receive visible light signals; as well as A cover is disposed on the packaging substrate, and the cover and the packaging substrate together form a mounting cavity. The system-on-a-chip, the laser emitting chip, the first receiving chip and the second receiving chip are all located in the mounting cavity. The cover is provided with a first area for the laser signal to pass through, a second area for the echo laser signal to pass through, and a third area for the visible light signal to pass through.
2. The chip module according to claim 1, characterized in that, The laser emitting chip and the first receiving chip are spaced apart along a first preset direction, and the second receiving chip is located between the laser emitting chip and the first receiving chip.
3. The chip module according to claim 1, characterized in that, The laser emitting chip and the first receiving chip are spaced apart along a first preset direction, and the second receiving chip and the first receiving chip are spaced apart along a second preset direction; The second preset direction is perpendicular to the first preset direction.
4. The chip module according to claim 1, characterized in that, The cover includes: Sidewall, one end of which is fixed to the first surface of the packaging substrate on which the system-on-a-chip is disposed, and the other end extending away from the first surface; and The top wall is fixed to the end of the side wall away from the first surface, so that the packaging substrate, the side wall and the top wall together form the mounting cavity. The top wall is provided with a first lens, a second lens and a third lens. The first lens constitutes the first region, the second lens constitutes the second region and the third lens constitutes the third region.
5. The chip module according to claim 4, characterized in that, The top wall is coated with a matte coating in the area outside the first lens, the second lens and the third lens; The first lens is an extended-angle lens, which is used to increase the detection field of view formed by the laser signal emitted by the laser emitting chip.
6. The chip module according to claim 1, characterized in that, The laser emitting chip, the first receiving chip, and the second receiving chip are all electrically connected to the system-on-a-chip via hybrid bonding. The system-on-a-chip and the packaging substrate are electrically connected by hybrid bonding; The system-on-a-chip is provided with a through-silicon via, and a first material layer is provided inside the through-silicon via. The thermal conductivity of the first material layer is higher than a preset threshold. The laser emitting chip covers at least one of the through-silicon vias and is electrically connected to the packaging substrate through the first material layer.
7. The chip module according to claim 6, characterized in that, The signal transmission and reception cycle of the chip module includes a laser emission period and a laser blanking period; During the laser emission period, the system-on-a-chip is used to control the laser emitting chip and the first receiving chip to turn on, and to control the second receiving chip to turn off; During the laser blanking period, the system-on-a-chip is used to control the laser emitting chip and the first receiving chip to turn off, and to control the second receiving chip to turn on.
8. The chip module according to claim 7, characterized in that, The system-on-a-chip is used to receive the echo laser signal processed by the first receiving chip, and to obtain point cloud data based on the processed echo laser signal; The system-on-a-chip is used to receive the visible light signal processed by the second receiving chip, and to obtain image data based on the processed visible light signal; The system-on-a-chip also includes a fusion unit, which is used to perform coordinate unification calculation on the point cloud data and the image data to obtain fused data, the fused data including the coordinate-unified point cloud data and image data.
9. The chip module according to claim 8, characterized in that, The system-on-a-chip also includes a communication interface; The communication interface is used to transmit the fused data from the chip module to a device outside the chip module.
10. A self-testing method for a chip module, characterized in that, Applied to the chip module as described in any one of claims 1-9, the method comprises: The laser emitting chip is controlled to emit laser signals toward a preset scene; The system receives first stimulus data and second stimulus data generated by the first receiving chip, wherein the first stimulus data is point cloud data pre-stored by the first receiving chip and obtained based on a preset scenario, and the second stimulus data is the echo signal actually received according to the laser signal. The third stimulus data generated by the second receiving chip is received, wherein the third stimulus data is image data pre-stored by the second receiving chip and obtained based on a preset scene; Based on the first incentive data and the third incentive data, a first fused data is obtained by fusing them together, wherein the first fused data includes information from the first incentive data and the third incentive data; Based on the first incentive data and the second incentive data, a first comparison result of the first incentive data and the second incentive data is obtained; Based on the first fused data and the expected data, a second comparison result of the first fused data and the expected data is obtained, wherein the expected data is a result obtained in advance by fusing the first incentive data and the third incentive data; Based on the first comparison result and the second comparison result, determine whether the signal paths of the system-on-a-chip, the laser emitting chip, the first receiving chip, the second receiving chip, and the packaging substrate are abnormal; The first incentive data and the third incentive data both correspond to the same preset scenario.
11. A method for fabricating a receiving chip, applied to the chip module according to any one of claims 1-9, characterized in that, The receiving chip includes a device layer and a substrate layer. The device layer is connected to the system-on-a-chip (SoC). The substrate layer is located on the side of the device layer opposite to the SoC. The method for fabricating the receiving chip includes: Step S1: Photolithography is performed on the substrate layer using a mask of a preset width to form a first protrusion and a first groove located on both sides of the first protrusion. Step S2: Using a mask with a wider width than the one used in the previous round, perform photolithography on a portion of the groove formed in the previous round, so that the substrate layer forms a second boss supporting the boss formed in the previous round, and a second groove located on both sides of the second boss; and Step S3: Repeat step S2; The boss includes the first boss and the second boss, and the sinker includes the first sinker and the second sinker.
12. The method according to claim 11, characterized in that, The step of performing photolithography on the substrate layer using a mask of a preset width to form a first protrusion and first grooves located on both sides of the first protrusion includes: A first adhesive layer is obtained by coating the surface of the substrate layer with photoresist. The first adhesive layer is exposed to ultraviolet light using a mask of the preset width; The exposed area of the first adhesive layer is developed to form a first area covered by the first adhesive layer and a second area exposed in the substrate layer; The second region is etched to obtain the first sink; and Remove the first adhesive layer to form the first boss and the first grooves located on both sides of the first boss in the substrate layer.
13. The method according to claim 11, characterized in that, The method involves using a mask with a wider width than the mask used in the previous round to perform photolithography on a portion of the groove formed in the previous round, so that the substrate layer forms a second boss that supports the boss formed in the previous round, and a second groove located on both sides of the second boss, including: A second adhesive layer is obtained by coating the surface of the substrate layer with photoresist. The second adhesive layer is subjected to ultraviolet exposure using a mask with a wider width, wherein the mask with a wider width blocks the protrusions formed in the previous round; The exposed area of the second adhesive layer is developed to form a third area covered by the second adhesive layer and a fourth area exposed in the substrate layer; The fourth region is etched to obtain the second sink groove; and Remove the second adhesive layer to form the second boss and the second grooves located on both sides of the second boss in the substrate layer.
14. A lidar, characterized in that, It includes a housing and a chip module as described in any one of claims 1-9, wherein the chip module is disposed within the housing.