Active heat dissipation piezoelectric fan structure, preparation method thereof and MEMS device
By using an active cooling piezoelectric fan structure, which utilizes piezoelectric stacks to drive high-frequency vibration of the blades, the problem of insufficient efficiency and reliability in traditional cooling solutions is solved, achieving a highly efficient and lightweight cooling effect, suitable for space-constrained electronic devices.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-29
- Publication Date
- 2026-03-31
AI Technical Summary
Existing technologies suffer from insufficient efficiency, excessive size, and poor reliability in heat dissipation of space-constrained electronic devices. Traditional active cooling solutions, such as miniature axial fans and centrifugal fans, cannot meet the heat dissipation requirements of high-power chips and are susceptible to dust and moisture corrosion.
An active cooling piezoelectric fan structure is adopted, which is connected by bonding a first substrate and a second substrate. Several piezoelectric heat dissipation blades are set on the second substrate. The blades are driven to vibrate at high frequency by utilizing the inverse piezoelectric effect of the piezoelectric stack to form airflow and exhaust hot air. Combined with wafer bonding technology, lightweight and efficient heat dissipation are achieved.
It achieves efficient and lightweight active heat dissipation, suitable for heat dissipation needs in confined environments, improves heat dissipation efficiency and reduces the overall weight of the device, and is applicable to electronic components such as CPUs, GPUs, memory and batteries.
Smart Images
Figure CN121760969A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of semiconductor device manufacturing technology, specifically relating to an active heat dissipation piezoelectric fan structure and its preparation method, and MEMS devices. Background Technology
[0002] With the rapid development of technologies such as 5G communication, artificial intelligence, and the Internet of Things, the functional integration and computing power requirements of electronic devices are growing exponentially, leading to a significant increase in chip power consumption. Simultaneously, consumer electronics, wearable devices, and industrial portable devices are evolving towards thinner and more compact designs, compressing internal heat dissipation space to the millimeter level. Against this backdrop, the contradiction between high power density and ultra-small size has become a key bottleneck restricting the performance release of electronic devices. Traditional heat dissipation solutions are no longer sufficient to meet the dual demands of "limited space + efficient heat dissipation," necessitating new miniaturized, low-power, and highly reliable heat dissipation technologies.
[0003] Currently, heat dissipation technologies for space-constrained electronic devices are mainly divided into two categories: passive heat dissipation and active heat dissipation. Passive heat dissipation relies on the thermal conduction / convection characteristics of materials or structures, and common solutions include graphite sheets, vapor chambers (VC), and thermal interface materials. Typical applications include attaching graphene films or ultra-thin VC vapor chambers (approximately 0.5mm thick) to the surface of mobile SoCs to reduce local temperature rise by expanding the heat dissipation area. However, the heat dissipation capacity of this method is limited by the thermal conductivity and area of the materials, and it cannot solve the problem of sudden increases in local heat flux density in high-power chips. Furthermore, passive heat dissipation lacks active airflow, and heat tends to accumulate in the enclosed space, causing the device surface temperature to exceed the limit. At the same time, strict limitations on thickness and weight prevent increasing the number of material layers or area from improving efficiency.
[0004] Active cooling drives airflow through mechanical motion, and common solutions include miniature axial fans, centrifugal fans, and thermoelectric cooling. For example, gaming phones often incorporate centrifugal fans with a diameter of approximately 3mm-5mm. These fans rely on bearings to support the rotor, resulting in a complex structure and an overall thickness generally exceeding 2mm, making them unsuitable for ultra-thin devices. To increase airflow, fan speeds are typically increased, leading to noise levels approaching the human ear's sensitivity threshold and increased power consumption, conflicting with the device's requirement for "low power consumption and long battery life." Furthermore, the mechanical bearings of these fans are susceptible to corrosion from dust and moisture, resulting in a short lifespan.
[0005] Existing technologies face a quadruple dilemma in the "heat dissipation of space-constrained electronic devices" scenario: efficiency, size, reliability, and cost. Passive heat dissipation is inefficient, while traditional active heat dissipation is too bulky and consumes too much power. Therefore, there is an urgent need to develop a high-efficiency, ultra-thin, and highly reliable piezoelectric fan structure based on MEMS technology and its fabrication method. Summary of the Invention
[0006] The technical problem solved by this invention is to provide an active heat dissipation piezoelectric fan structure and its manufacturing method, thereby improving heat dissipation efficiency.
[0007] To solve the above-mentioned technical problems, the present invention provides an active heat dissipation piezoelectric fan structure, comprising: a first substrate having a first cavity; a second substrate bonded to the first substrate, the second substrate being located on a side opposite to the opening direction of the first cavity of the first substrate, the second substrate including a plurality of piezoelectric heat dissipation blades spaced apart, a second cavity being formed between two adjacent piezoelectric heat dissipation blades with an opening direction opposite to that of the first cavity, each piezoelectric heat dissipation blade including a cantilever body and a piezoelectric stack disposed on the side wall of the cantilever body, the piezoelectric stack including a first electrode layer, a piezoelectric thin film layer and a second electrode layer sequentially disposed on the side wall of the cantilever body; and a heat dissipation slot is also provided between two adjacent piezoelectric heat dissipation blades, the heat dissipation slot communicating with the first cavity and the second cavity respectively.
[0008] Optionally, the material of the first substrate is selected from at least one of silicon, germanium, germanium silicon, silicon carbon, silicon carbon germanium silicon, indium arsenide, gallium arsenide, and indium phosphide; the material of the second substrate is selected from at least one of silicon, germanium, germanium silicon, silicon carbon, silicon carbon germanium silicon, indium arsenide, gallium arsenide, and indium phosphide; the material of the cantilever body is selected from at least one of silicon, germanium, germanium silicon, silicon carbon, silicon carbon germanium silicon, indium arsenide, gallium arsenide, and indium phosphide; the material of the piezoelectric thin film layer is selected from at least one of aluminum nitride, zinc oxide, lead titanate, lead zirconate titanate, lithium niobate, quartz, and potassium niobate; and the materials of the first electrode layer and the second electrode layer are both aluminum.
[0009] Optionally, the second substrate also includes a second buried oxygen layer located at the bottom of the piezoelectric heat sink blade.
[0010] Optionally, several piezoelectric heat dissipation blades are arranged in parallel to each other.
[0011] Optionally, the thickness of the first electrode layer is 0.1 μm to 0.5 μm, the thickness of the piezoelectric thin film layer is 0.5 μm to 1.5 μm, and the thickness of the second electrode layer is 0.1 μm to 0.5 μm.
[0012] The present invention also provides a method for fabricating an active heat dissipation piezoelectric fan structure, comprising: providing a first substrate; forming a first cavity in the first substrate; forming a first through hole at the bottom of the first cavity, the first through hole communicating with the first cavity; providing a second substrate; forming a plurality of piezoelectric heat dissipation blades spaced apart in the second substrate; forming a second through hole in the second substrate between two adjacent piezoelectric heat dissipation blades; bonding the first substrate and the second substrate together, such that the first through hole and the second through hole are connected to form a through heat dissipation slot.
[0013] Optionally, providing the first substrate further includes: providing a first SOI wafer, the first SOI wafer including a first bottom silicon, a first top silicon, and a first buried oxide layer located between the first bottom silicon and the first top silicon, and using the first bottom silicon as the first substrate; forming a first cavity in the first bottom silicon facing away from the opening of the first top silicon, the depth of the first cavity being less than the thickness of the first bottom silicon layer; forming a first via at the bottom of the first cavity further includes: etching a portion of the first bottom silicon at the bottom of the first cavity from the opening side of the first cavity until the first buried oxide layer is exposed, forming the first via; after forming the first via, and before bonding the first substrate to the second substrate, the fabrication method further includes: attaching a first protective film to the surface of the first bottom silicon, the first protective film sealing the opening of the first cavity; after attaching the first protective film, removing the first top silicon and the first buried oxide layer from the first top silicon side.
[0014] Optionally, providing a second substrate further includes: providing a second SOI wafer, the second SOI wafer including a second bottom silicon, a second top silicon, and a second buried oxide layer disposed between the second bottom silicon and the second top silicon, and at least the second bottom silicon serving as the second substrate; forming a plurality of piezoelectric heat sinks within the second bottom silicon further includes: etching a portion of the second bottom silicon until the second buried oxide layer is exposed to form a plurality of cantilever bodies disposed at intervals; forming a piezoelectric stack on the sidewall of the cantilever body, the piezoelectric stack including a first electrode layer, a piezoelectric thin film layer, and a second electrode layer sequentially formed on the sidewall of the cantilever body; a method for forming a second via between two adjacent piezoelectric heat sinks includes: attaching a second protective film to the surface of the second bottom silicon; after attaching the second protective film, etching the second top silicon and the second buried oxide layer from the second top silicon side to form a second via located within the intervals of the plurality of piezoelectric heat sinks.
[0015] The present invention also provides a MEMS device, including: a heat-dissipating element and the above-mentioned active heat dissipation piezoelectric fan structure, wherein the active heat dissipation piezoelectric fan structure is configured such that the opening of the first cavity of the first substrate faces the heat-dissipating element.
[0016] Optionally, the heat dissipation element includes a heat-generating element and a substrate. An active cooling piezoelectric fan is fixed on the substrate. The heat-generating element is located in the first cavity, and there is a gap between the heat-generating element and the first cavity to form a heat dissipation channel.
[0017] Compared with the prior art, the technical solution of the present invention has the following beneficial effects: The active heat dissipation piezoelectric fan structure provided by the present invention has a first substrate with a first cavity on one side close to the heat-dissipating element, and heat flow flows in from the bottom of the first cavity. A second substrate is bonded to the first substrate and is located on the side of the first substrate opposite to the opening direction of the first cavity. The second substrate has a plurality of piezoelectric heat dissipation blades spaced apart, forming a second cavity between adjacent piezoelectric heat dissipation blades with an opening direction opposite to that of the first cavity. Furthermore, heat dissipation slots are provided between two adjacent piezoelectric heat dissipation blades, connecting the first cavity and the second cavity respectively. Therefore, the heat flow flowing in from the bottom of the first cavity passes through the heat dissipation slots and enters the second cavity of the second substrate. Furthermore, since the piezoelectric heat dissipation blades located within the second substrate include a cantilever body and a piezoelectric stack disposed on the side wall of the cantilever body, the piezoelectric stack includes a first electrode layer, a piezoelectric thin film layer, and a second electrode layer disposed sequentially on the side wall of the cantilever body. Utilizing the inverse piezoelectric effect of the piezoelectric thin film layer in the piezoelectric stack, i.e., when the first electrode layer and the second electrode layer are applied with voltages of opposite phase, the electric field formed causes the piezoelectric thin film layer to undergo expansion and contraction deformation, thereby driving the piezoelectric heat dissipation blades to undergo high-frequency lateral vibration. Therefore, the heat flow entering the second cavity is squeezed to form an airflow and is discharged, thereby actively discharging the hot air to the outside and achieving active heat dissipation. Furthermore, the aforementioned structure utilizes wafer bonding technology to stack the first and second substrates, each equipped with a heat dissipation cavity, into a single unit. This results in a lighter weight compared to traditional metal heat dissipation devices, facilitating miniaturization and weight reduction of the heat dissipation device, eliminating the need for consumables such as thermal silicone, and making it suitable for high-density packaging. Moreover, the cantilever body generates high-frequency vibration under AC voltage drive, which, combined with the stacked heat dissipation cavities, can improve the overall heat dissipation efficiency of the heat dissipation device. This is particularly suitable for the heat dissipation needs of electrical components in confined working environments, such as CPUs, GPUs, memory, and batteries. Attached Figure Description
[0018] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0019] Figure 1 This is a cross-sectional schematic diagram of an active cooling piezoelectric fan structure according to an embodiment of the present invention; Figure 2 This is a cross-sectional schematic diagram of the piezoelectric heat dissipation blades of an active heat dissipation piezoelectric fan structure according to an embodiment of the present invention; Figures 3 to 20 This is a cross-sectional structural schematic diagram of each step in the preparation method of the active heat dissipation piezoelectric fan structure in one embodiment of the present invention; Figure 21 This is a schematic diagram of the mounting structure of a MEMS device in one embodiment of the present invention. Detailed Implementation
[0020] As mentioned in the background technology, existing cooling fans suffer from problems such as insufficient heat dissipation efficiency, large heat dissipation volume, and excessive heat dissipation power consumption.
[0021] To address the aforementioned technical problems, the present invention provides an active heat dissipation piezoelectric fan structure and its fabrication method, as well as a MEMS device. The method involves bonding a first substrate with a first cavity to a second substrate with a second cavity. The second substrate has several piezoelectric heat dissipation blades spaced apart, forming a second cavity with an opening direction opposite to the first cavity between adjacent blades. Heat dissipation slots are provided between adjacent blades, connecting the first and second cavities respectively. Heat flows in from the bottom of the first cavity, passes through the heat dissipation slots, and enters the second cavity. Furthermore, a piezoelectric stack is provided on the sidewall of the cantilever body of the piezoelectric heat dissipation blade. The piezoelectric stack includes a first electrode layer, a piezoelectric thin film layer, and a second electrode layer sequentially. Utilizing the inverse piezoelectric effect of the piezoelectric thin film layer (i.e., applying voltages with opposite phases to the first and second electrode layers), the resulting electric field causes the piezoelectric thin film layer to stretch and deform, thereby driving the piezoelectric heat dissipation blade to vibrate at high frequency laterally. Therefore, the heat flow entering the second cavity is compressed to form an airflow, thus actively dissipating the hot air to the outside and achieving active heat dissipation.
[0022] To make the above-mentioned objectives, features, and beneficial effects of the present invention more apparent and understandable, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0023] The terms “first,” “second,” “third,” “fourth,” etc. (if present) in the specification, claims, and drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a particular order or sequence. It should be understood that such data can be interchanged where appropriate so that embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus. Additionally, directional terms such as above, below, up, down, upward, downward, left, right, etc., are used relative to exemplary embodiments as they are shown in the figures, with upward or upper directions pointing towards the top of the corresponding figure and downward or lower directions pointing towards the bottom of the corresponding figure.
[0024] Figure 1 This is a cross-sectional schematic diagram of an active cooling piezoelectric fan structure according to an embodiment of the present invention.
[0025] like Figure 1 As shown, the active cooling piezoelectric fan structure includes: a first base 110, a second base, and a heat dissipation slot 300.
[0026] Furthermore, the material of the first substrate is selected from at least one of silicon, germanium, germanium silicon, silicon carbon, silicon carbon germanium silicon, indium arsenide, gallium arsenide, and indium phosphide.
[0027] The first substrate 110 has a first cavity 140.
[0028] Furthermore, the material of the second substrate is selected from at least one of silicon, germanium, germanium silicon, silicon carbon, silicon carbon germanium silicon, indium arsenide, gallium arsenide, and indium phosphide.
[0029] The second substrate is bonded to the first substrate 110, and the second substrate is located on the side opposite to the opening direction of the first cavity 140 of the first substrate 110.
[0030] Please refer to the reference. Figure 1 and Figure 2 The second substrate includes a plurality of piezoelectric heat dissipation blades 250 spaced apart, and a second cavity 240 is formed between two adjacent piezoelectric heat dissipation blades 250 with an opening direction opposite to that of the first cavity 140.
[0031] Furthermore, several piezoelectric heat dissipation blades are arranged in parallel to each other.
[0032] Each piezoelectric heat sink 250 includes: a cantilever body 251 and a piezoelectric stack 252 disposed on the side wall of the cantilever body 251.
[0033] Furthermore, the material of the cantilever body is selected from at least one of silicon, germanium, germanium silicon, silicon carbon, silicon carbon germanium silicon, indium arsenide, gallium arsenide, and indium phosphide.
[0034] The piezoelectric stack 252 includes a first electrode layer 2521, a piezoelectric thin film layer 2522, and a second electrode layer 2523, which are sequentially disposed on the side wall of the cantilever body 251 from the inside out.
[0035] Furthermore, the material of the piezoelectric thin film layer is selected from at least one of aluminum nitride, zinc oxide, lead titanate, lead zirconate titanate, lithium niobate, quartz, and potassium niobate.
[0036] Furthermore, both the first electrode layer and the second electrode layer are made of aluminum.
[0037] Preferably, the thickness of the first electrode layer 2521 is 0.1μm to 0.5μm, the thickness of the piezoelectric thin film layer 2522 is 0.5μm to 1.5μm, and the thickness of the second electrode layer 2523 is 0.1μm to 0.5μm.
[0038] In some embodiments, the second substrate further includes a second buried oxide layer 220 located at the bottom of the piezoelectric heat sink 250.
[0039] The second buried oxygen layer 220 is used for electrical isolation between the piezoelectric heat dissipation blade 250 and the bottom of the second substrate.
[0040] Furthermore, the material of the buried oxide layer is silicon dioxide.
[0041] The heat dissipation slots 300 are disposed between adjacent piezoelectric heat dissipation blades 250, and the heat dissipation slots 300 are respectively connected to the first cavity 140 and the second cavity 240.
[0042] Furthermore, the heat dissipation slot 300 is formed by the first through hole 150 and the second through hole 260 being connected to form a through heat dissipation slot 300.
[0043] The first electrode layer 2521 and the second electrode layer 2523 receive voltages with opposite phases, causing the piezoelectric thin film layer 2522 to undergo expansion and contraction deformation under the action of the formed electric field, thereby driving the cantilever body 251 to swing and form blades that can actively dissipate heat.
[0044] Since the side of the first substrate 110 with the first cavity 140 is close to the heat-dissipating element 800, heat flow flows in from the bottom of the first cavity 140. The second substrate, bonded to the first substrate 110, is located on the side of the first substrate 110 opposite to the opening direction of the first cavity 140. The second substrate has several piezoelectric heat dissipation blades 250 spaced apart, forming a second cavity 240 between adjacent piezoelectric heat dissipation blades 250 with an opening direction opposite to that of the first cavity 140. Furthermore, a heat dissipation slot 300 is provided between two adjacent piezoelectric heat dissipation blades 250, connecting the first cavity 140 and the second cavity 240 respectively. Therefore, the heat flow flowing in from the bottom of the first cavity 140 passes through the heat dissipation slot 300 and enters the second cavity 240 of the second substrate. Furthermore, since the piezoelectric heat dissipation blades 250 located in the second substrate include a cantilever body 251 and a piezoelectric stack 252 disposed on the side wall of the cantilever body 251, the piezoelectric stack 252 includes a first electrode layer 2521, a piezoelectric thin film layer 2522 and a second electrode layer 2523 disposed sequentially on the side wall of the cantilever body 251, the inverse piezoelectric effect of the piezoelectric thin film layer 2522 in the piezoelectric stack 252 is utilized, that is, the first electrode layer 2521 and the second electrode layer 2523 are applied with voltages of opposite phase, and the electric field formed causes the piezoelectric thin film layer 2522 to undergo expansion and contraction deformation, thereby driving the piezoelectric heat dissipation blades 250 to undergo high-frequency lateral vibration. Therefore, the heat flow entering the second cavity is squeezed to form airflow and discharged, thereby actively discharging the hot air to the outside and realizing active heat dissipation. Furthermore, the above structure utilizes wafer bonding technology to stack the first substrate 110 and the second substrate, each equipped with a heat dissipation cavity, into a single unit. This results in a lighter weight compared to traditional metal heat dissipation devices, facilitating miniaturization and weight reduction of the heat dissipation device, eliminating the need for consumables such as thermal silicone, and making it suitable for high-density packaging. Moreover, the cantilever body 251 generates high-frequency vibration under AC voltage drive, which, combined with the stacked heat dissipation cavities, can improve the overall heat dissipation efficiency of the heat dissipation device. This is particularly suitable for the heat dissipation needs of electrical components in confined working environments, such as CPUs, GPUs, memory, and batteries.
[0045] Figures 3 to 21 This is a cross-sectional structural diagram of each step in the preparation method of the active heat dissipation piezoelectric fan structure in one embodiment of the present invention.
[0046] Please refer to Figure 3 Provides a first substrate 110.
[0047] Specifically, the first SOI wafer 100 is provided.
[0048] The first SOI wafer 100 includes: a first bottom silicon layer, a first top silicon layer 130, and a first buried oxide layer 120 located between the first bottom silicon layer and the first top silicon layer 130.
[0049] The first bottom silicon is used as the first substrate 110.
[0050] Please refer to Figure 4 A first cavity 140 is formed within the first SOI wafer 100.
[0051] Specifically, a first cavity 140 is formed within the first bottom silicon layer 110, and the opening direction of the first cavity 140 faces away from the first top silicon layer 130.
[0052] The depth of the first cavity 140 is less than the thickness of the first bottom silicon layer 110, so that the first through hole 150 can be formed at the bottom of the first cavity 140.
[0053] Furthermore, the first bottom silicon 110 of the first SOI wafer 100 is flipped and placed on the top layer so that the first bottom silicon 110 can be etched to form the first cavity 140.
[0054] Please refer to Figure 5 A first through hole 150 is formed at the bottom of the first cavity 140, and the first through hole 150 connects to the first cavity 140.
[0055] Specifically, starting from the opening side of the first cavity 140, a portion of the first bottom silicon 110 at the bottom of the first cavity 140 is etched until the first buried oxide layer 120 is exposed, forming the first via 150.
[0056] Please refer to Figure 6 A first protective film 600 is attached to the surface of the first bottom silicon 110.
[0057] Specifically, after the first through hole 150 is formed and before the first substrate 110 is bonded to the second substrate, the first protective film 600 closes the opening of the first cavity 140, that is, the first cavity 140 is sealed between the first protective film 600 and the first buried oxide layer 120.
[0058] Furthermore, after attaching the first protective film 600, the first SOI wafer 100 is flipped again to flip the first top silicon 130 to the top layer.
[0059] Please refer to Figure 7 Remove the first buried oxide layer 120 and the first top silicon layer 130 from the first top silicon layer 130 side.
[0060] Thus, the first through-hole 150 is exposed to the upper surface of the first bottom silicon 110 to form the first substrate 110, so that external air can enter the first cavity 140 through the first through-hole 150.
[0061] Furthermore, an etching process is used to peel off the first top silicon layer 130 and the first buried oxide layer 120.
[0062] Please refer to Figure 8 , providing a second base.
[0063] Specifically, a second SOI wafer 200 is provided.
[0064] The second SOI wafer 200 includes: a second bottom silicon layer 210, a second top silicon layer 230, and a second buried oxide layer 220 located between the second bottom silicon layer 210 and the second top silicon layer 230.
[0065] Among them, at least the second bottom silicon 210 is used as the second substrate.
[0066] In this embodiment, the second substrate further includes a second buried oxide layer 220.
[0067] In this embodiment, the material of the second buried oxide layer 220 is silicon dioxide.
[0068] Next, a plurality of piezoelectric heat sink blades 250 are formed at intervals within the second bottom silicon layer 210. The following will be combined with... Figures 9 to 15 The specific steps for forming the piezoelectric heat dissipation blade 250 are described in detail.
[0069] Please refer to Figure 9 The second SOI wafer 200 is flipped over, and the bottom surface of the second bottom silicon 210 is placed upwards. Part of the second bottom silicon 210 is etched until the second buried oxide layer 220 is exposed, forming a number of cantilever bodies 251 that are spaced apart from each other.
[0070] Furthermore, several cantilever bodies 251 are parallel to each other and are arranged at intervals to form a second cavity 240 within the second base.
[0071] Next, a piezoelectric stack 252 is formed on the sidewall of the cantilever body 251.
[0072] Specifically, the piezoelectric stack 252 includes a first electrode layer 2521, a piezoelectric thin film layer 2522, and a second electrode layer 2523 sequentially formed on the sidewall of the cantilever body 251.
[0073] Preferably, the thickness of the first electrode layer 2521 is 0.1μm to 0.5μm, the thickness of the piezoelectric thin film layer 2522 is 0.5μm to 1.5μm, and the thickness of the second electrode layer 2523 is 0.1μm to 0.5μm.
[0074] The following will combine Figures 10 to 15 The specific steps for forming the piezoelectric stack 252 are described in detail.
[0075] Please refer to Figure 10 A first conductive film 2524 is deposited on the inner wall of the second cavity 240 and the upper surface of the cantilever body 251.
[0076] Please refer to Figure 11 The first conductive film 2524 in the transverse direction is removed by an anisotropic etching process, and the first electrode layer 2521 is formed on the side wall of the cantilever body 251.
[0077] Please refer to Figure 12 A piezoelectric material film 2525 is deposited on the surface of the first electrode layer 2521, the exposed surface of the second buried oxide layer 220, and the exposed surface of the cantilever body 251.
[0078] Please refer to Figure 13 By using an anisotropic etching process, the transverse piezoelectric material film 2525 is removed, and a piezoelectric thin film layer 2522 is formed on the sidewall surface of the first electrode layer 2521.
[0079] Please refer to Figure 14 A second conductive film 2526 is deposited on the surface of the piezoelectric thin film layer 2522, the surface exposed by the second buried oxide layer 220, the surface exposed by the first electrode layer 2521, and the surface exposed by the cantilever body 251.
[0080] Please refer to Figure 15 The second conductive film 2526 is removed by anisotropic etching process, and the second electrode layer 2523 is formed on the sidewall of the piezoelectric thin film layer 2522.
[0081] Thus, a piezoelectric stack 252 is formed on the side wall of the cantilever body 251. Therefore, the inner wall surfaces on both sides of the second cavity 240 are formed with a piezoelectric stack 252, ensuring that after the current is conducted, the piezoelectric heat dissipation blades 250 swing in the left and right directions to effectively dissipate hot air.
[0082] Furthermore, the piezoelectric heat sink 250 is formed based on the second bottom silicon 210, therefore, the second buried oxide layer 220 is located at the bottom of the piezoelectric heat sink 250.
[0083] The second buried oxide layer 220 is used for electrical isolation between the piezoelectric heat dissipation blade 250 and the bottom of the second substrate. Understandably, the piezoelectric heat dissipation blade 250 is formed directly on the second buried oxide layer 220.
[0084] Next, a second through-hole 260 is formed in the second substrate between two adjacent piezoelectric heat sink blades. The following will be combined with... Figure 16 and Figure 17 The specific steps for forming the second through hole 260 are described in detail.
[0085] Please refer to Figure 16 A second protective film 700 is attached to the surface of the second bottom silicon 210. Then, the second SOI wafer 200 is flipped so that the second top silicon 230 faces upward. At this time, the second cavity 240 is sealed between the second electrode layer 2523 and the second protective film 700.
[0086] Please refer to Figure 17 From one side of the second top silicon layer 230, the second top silicon layer 230 and the second buried oxide layer 220 are etched to form a through second hole 260 in the second substrate at the interval of a plurality of piezoelectric heat dissipation blades 250.
[0087] Please refer to Figure 18 Then, the second top silicon layer 230 is flipped over to face down, and external air can enter the second cavity 240 from below the second top silicon layer 230 through the second through hole 260.
[0088] Please refer to Figure 19 and Figure 20 The first substrate 110 and the second substrate are bonded in such a way that each second through hole 260 corresponds to each first through hole 150.
[0089] After bonding is complete, remove protective film 600 and protective film 700.
[0090] in, Figure 19 This is a schematic diagram showing the placement of the first substrate 110 and the second substrate before they are bonded together. Figure 20 This is a schematic diagram of the two bonded together.
[0091] Preferably, the diameter of the first through hole 150 is larger than the diameter of the second through hole 260.
[0092] After the first substrate 110 is bonded to the second substrate, the first through hole 150 and the second through hole 260 are connected to form a through heat dissipation slot 300.
[0093] Figure 21 This is a schematic diagram of the mounting structure of a MEMS device in one embodiment of the present invention.
[0094] Accordingly, one embodiment of the present invention also provides a MEMS device, please refer to... Figure 21 The MEMS device includes a heat-dissipating element 800 and an active heat-dissipating piezoelectric fan structure as described in the above embodiments.
[0095] Specifically, the active cooling piezoelectric fan structure is configured such that the opening of the first cavity 140 of the first base 110 faces the heat-dissipating element, that is, the first cavity 140 is located above the heat-dissipating element.
[0096] Preferably, the heat dissipation element includes a heating element 800 and a substrate. The active cooling piezoelectric fan is fixed on the substrate. The heating element 800 is located in the first cavity 140. There is a gap between the heating element 800 and the first cavity 140 to form a heat dissipation channel 500. When the active cooling piezoelectric fan structure is installed in place, ambient air and hot air can exchange heat in the heat dissipation channel 500.
[0097] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.
Claims
1. An active cooling piezoelectric fan structure, characterized in that, include: A first substrate, the first substrate having a first cavity; The second substrate is bonded to the first substrate and is located on a side opposite to the opening direction of the first cavity of the first substrate. The second substrate includes a plurality of piezoelectric heat dissipation blades spaced apart. A second cavity is formed between two adjacent piezoelectric heat dissipation blades with an opening direction opposite to that of the first cavity. Each piezoelectric heat dissipation blade includes a cantilever body and a piezoelectric stack disposed on the side wall of the cantilever body. The piezoelectric stack includes a first electrode layer, a piezoelectric thin film layer and a second electrode layer disposed sequentially on the side wall of the cantilever body. A heat dissipation slot is provided between two adjacent piezoelectric heat dissipation blades, and the heat dissipation slot is connected to the first cavity and the second cavity respectively.
2. The active cooling piezoelectric fan structure according to claim 1, characterized in that, The material of the first substrate is selected from at least one of silicon, germanium, germanium silicon, silicon carbon, silicon carbon germanium silicon, indium arsenide, gallium arsenide, and indium phosphide; the material of the second substrate is selected from at least one of silicon, germanium, germanium silicon, silicon carbon, silicon carbon germanium silicon, indium arsenide, gallium arsenide, and indium phosphide; the material of the cantilever body is selected from at least one of silicon, germanium, germanium silicon, silicon carbon, silicon carbon germanium silicon, indium arsenide, gallium arsenide, and indium phosphide; the material of the piezoelectric thin film layer is selected from at least one of aluminum nitride, zinc oxide, lead titanate, lead zirconate titanate, lithium niobate, quartz, and potassium niobate; the materials of the first electrode layer and the second electrode layer are both aluminum.
3. The active cooling piezoelectric fan structure according to claim 1, characterized in that, The second substrate also includes a second buried oxygen layer located at the bottom of the piezoelectric heat sink blade.
4. The active cooling piezoelectric fan structure according to claim 1, characterized in that, The piezoelectric heat dissipation blades are arranged in parallel to each other.
5. The active cooling piezoelectric fan structure according to claim 1, characterized in that, The thickness of the first electrode layer is 0.1 μm to 0.5 μm, the thickness of the piezoelectric thin film layer is 0.5 μm to 1.5 μm, and the thickness of the second electrode layer is 0.1 μm to 0.5 μm.
6. A method for fabricating an active heat dissipation piezoelectric fan structure, characterized in that, include: Provide the first base; A first cavity is formed within the first substrate; A first through hole is formed at the bottom of the first cavity, and the first through hole connects to the first cavity; Provide a second substrate; A plurality of piezoelectric heat dissipation blades are formed at intervals within the second substrate; A second through hole is formed in the second substrate between two adjacent piezoelectric heat dissipation blades; The first substrate and the second substrate are bonded together so that the first through hole and the second through hole are aligned to form a through heat dissipation groove.
7. The preparation method according to claim 6, characterized in that, The provision of the first substrate further includes: A first SOI wafer is provided, the first SOI wafer including a first bottom silicon, a first top silicon and a first buried oxide layer located between the first bottom silicon and the first top silicon, and the first bottom silicon is used as the first substrate; A first cavity is formed within the first bottom silicon layer, facing away from the opening of the first top silicon layer, and the depth of the first cavity is less than the thickness of the first bottom silicon layer. Forming a first via at the bottom of the first cavity further includes: etching a portion of the first bottom silicon at the bottom of the first cavity from the opening side of the first cavity until the first buried oxide layer is exposed, thereby forming the first via; After forming the first via and before bonding the first substrate to the second substrate, the fabrication method further includes: attaching a first protective film to the surface of the first bottom silicon layer, the first protective film sealing the opening of the first cavity; and after attaching the first protective film, removing the first top silicon layer and the first buried oxide layer from the first top silicon layer side.
8. The preparation method according to claim 6 or 7, characterized in that, The provision of the second substrate further includes: providing a second SOI wafer, the second SOI wafer including a second bottom silicon layer, a second top silicon layer and a second buried oxide layer located between the second bottom silicon layer and the second top silicon layer, and at least the second bottom silicon layer serving as the second substrate; The process of forming a plurality of piezoelectric heat dissipation blades within the second bottom silicon layer further includes: etching a portion of the second bottom silicon layer until the second buried oxide layer is exposed, forming a plurality of cantilever bodies spaced apart; and forming a piezoelectric stack on the sidewall of the cantilever body, the piezoelectric stack comprising a first electrode layer, a piezoelectric thin film layer, and a second electrode layer sequentially formed on the sidewall of the cantilever body. The method for forming a second through-hole between two adjacent piezoelectric heat sink blades includes: attaching a second protective film to the surface of the second bottom silicon layer; and after attaching the second protective film, etching the second top silicon layer and the second buried oxide layer from the side of the second top silicon layer to form the second through-hole located in the interval of a plurality of piezoelectric heat sink blades.
9. A MEMS device, characterized in that, include: The heat-dissipating element and the active cooling piezoelectric fan structure as described in any one of claims 1-5, wherein the active cooling piezoelectric fan structure is configured such that the opening of the first cavity of the first substrate faces the heat-dissipating element.
10. The MEMS device according to claim 9, characterized in that, The heat-dissipating element includes a heating element and a substrate. The active cooling piezoelectric fan is fixed on the substrate. The heating element is located in the first cavity. There is a gap between the heating element and the first cavity to form a heat dissipation channel.