Wafer flatness adjusting method and device, electronic equipment and medium

Abstract

The embodiment of the invention relates to the technical field of semiconductor photoetching, and provides a wafer flatness adjusting method and device, electronic equipment and a medium, and the method comprises the following steps: controlling photodiode arrays in different directions to emit uniform surface light sources to irradiate a wafer to be detected, and collecting and receiving photodiode current information received by the photodiode arrays, the different directions comprise the X-axis direction and the Y-axis direction of the wafer to be detected; the photodiode current information is converted into light intensity information, and a shadow shape is collected based on the light intensity information; calculating coordinate information of a shadow edge transition area; determining an inclination parameter of the to-be-detected wafer relative to an ideal focal plane based on the coordinate information of the shadow edge transition region; and sending the inclination parameter to the workpiece table, and judging whether the flatness of the to-be-detected wafer needs to be adjusted or not based on the inclination parameter through the workpiece table. Therefore, instant, low-cost and high-precision wafer flatness detection and posture adjustment are realized.

Description

Technical Field

[0001] This invention relates to the field of semiconductor photolithography technology, and in particular to a wafer flatness adjustment method, apparatus, electronic device, and medium. Background Technology

[0002] The lens of a lithography machine has a very small depth of field. If the wafer surface is outside the depth of field of the lens, the exposed pattern will be blurry and distorted, leading to chip failure. The wafer itself and the tray supporting it are not ideal planes; they exhibit: global tilt and curvature, such as a central bulge or depression; local unevenness, with slight differences in height between each chip area; and dynamic errors, such as vibrations generated during the scanning exposure process.

[0003] The purpose of adjusting the flatness is to eliminate these errors, ensuring that every point on the wafer that needs exposure falls precisely on the optimal focal plane of the lens. The entire adjustment process is automated and completed at high speed, mainly including the following stages: Phase 1: Pre-alignment and wafer mapping Wafer loading: The robotic arm removes the wafer from the wafer cassette and places it onto the wafer support stage of the workpiece stage. This support stage is a vacuum chuck that firmly holds the wafer in place using negative pressure, but this cannot correct for any bending of the wafer itself.

[0004] Pre-alignment: Using an optical sensor to identify notches or flat edges on the wafer, the wafer's azimuth angle is roughly corrected to align it approximately with the scanning direction. This step primarily prepares for subsequent fine alignment and contributes little to flatness adjustment.

[0005] Global leveling: Using multiple (usually three or more) non-contact ranging sensors (such as capacitive sensors or laser displacement sensors), the wafer edge or specific measurement points are rapidly scanned to measure the overall tilt (such as rotational errors around the X and Y axes) and height of the wafer. Based on this data, the stage performs coarse adjustments to eliminate large tilts, making the wafer surface approximately parallel to the focal plane.

[0006] Phase Two: Fine-tuning and Focusing - Core Steps This is the most crucial step, completed by the leveling and focusing system built into the lithography machine.

[0007] Measurement Principle: The system uses one or more beams of incoherent light (such as red or infrared light) projected onto the wafer surface at a certain angle. By detecting changes in the position or phase of the reflected light, the height and tilt of the illumination point relative to the ideal focal plane can be accurately measured. These measurement points are sampled in a specific grid pattern across the entire wafer surface or on each exposure field before exposure.

[0008] Real-time measurement and compensation: In modern scanning lithography machines, this process is performed in real time. A row of leveling sensors takes measurements in front of the lens exposure slit. As the stage carries the wafer through the exposure slit at high speed, the system acquires the height data of the measurement points in front in real time and predicts the height and tilt of the area to be exposed.

[0009] The stage integrates a piezoelectric ceramic actuator or voice coil motor with nanometer-level precision. Based on predicted data, the stage makes minute, high-speed adjustments in the Z-axis direction (up and down) and in the tilt directions around the X and Y axes, dynamically keeping the exposure area within the depth of focus.

[0010] Phase 3: Continuous Correction During Scanning Exposure Throughout the scanning and exposure process, the aforementioned real-time leveling and focusing is continuous. It not only compensates for the static unevenness of the wafer itself but also counteracts dynamic errors caused by platform movement, vibration, and thermal deformation. The key technologies and components used here include: Leveling sensor: a high-speed, high-precision distance measurement unit.

[0011] Precision workpiece stage: an ultra-precision platform with six degrees of freedom (X, Y, Z, θx, θy, θz) nanometer-level motion capability.

[0012] High-speed real-time control system: Responsible for processing sensor data, calculating compensation amounts, and driving the workpiece stage movement. Its control bandwidth and accuracy directly determine the final leveling effect.

[0013] In summary, wafer flatness adjustment before exposure is a complex closed-loop system integrating sensing, driving, and control. Through a series of steps—pre-alignment -> global leveling -> real-time fine leveling and focusing—it dynamically "flattens" the originally uneven wafer into the focal plane of the lithography machine, thus laying the foundation for subsequent nanoscale lithography exposure. The precision of this process directly determines the minimum linewidth achievable by the lithography machine and the final chip yield.

[0014] In this process, global leveling uses multiple non-contact ranging sensors to quickly scan the wafer edge or specific measurement points to measure the overall tilt of the wafer (such as rotational errors around the X and Y axes) and height. Large tilts are then eliminated by adjusting the workpiece stage. This process takes a certain amount of time and cannot instantly measure the overall flatness of the wafer because the number of sensors is limited, usually three or more, to measure global tilt information. Furthermore, these sensors are generally expensive due to their high precision requirements. Summary of the Invention

[0015] This invention provides a wafer flatness adjustment method, device, electronic device, and medium to solve the shortcomings of the existing technology, which uses a limited number of non-contact ranging sensors, which cannot instantly measure the overall flatness of the wafer and is costly. This invention achieves instantaneous, low-cost, and high-precision wafer flatness detection and attitude adjustment.

[0016] This invention provides a method for adjusting wafer flatness, comprising: The photodiode arrays in different directions are controlled to emit uniform surface light sources to illuminate the wafer under test, and the photodiode current information received by the photodiode arrays is collected and received. The different directions include the X-axis direction and the Y-axis direction of the wafer under test. The photodiode current information is converted into light intensity information, and the coordinate information of the shadow edge transition zone is calculated based on the light intensity information; The tilt parameters of the wafer to be tested relative to the ideal focal plane are determined based on the coordinate information of the shadow edge transition region. The tilt parameters are sent to the workpiece stage, which then determines whether the flatness of the wafer to be inspected needs to be adjusted based on the tilt parameters.

[0017] In one possible implementation, the method further includes: The photodiode array in the X-axis direction of the wafer to be tested is controlled to emit a uniform surface light source to illuminate the wafer to be tested, and the first photodiode current information received by the first receiving photodiode array is collected. The first receiving photodiode array is arranged opposite to the photodiode array in the X-axis direction. The photodiode array in the Y-axis direction of the wafer under test is controlled to emit a uniform surface light source to illuminate the wafer under test, and the second photodiode current information received by the second receiving photodiode array is collected. The second receiving photodiode array is arranged opposite to the photodiode array in the Y-axis direction.

[0018] In one possible implementation, the method further includes: Based on the responsivity of the photodiode, the incident light power, and the cross-sectional area of ​​the light spot, the current information of the first photodiode is converted into first light intensity information, and the current information of the second photodiode is converted into second light intensity information. The shape of the shadow after the light source in the X-axis direction passes through the wafer to be tested is acquired based on the first light intensity information, and the shape of the shadow after the light source in the Y-axis direction passes through the wafer to be tested is acquired based on the second light intensity information, wherein the shadow edge transition region is the region where the photocurrent is between the saturation conduction value and the cutoff value.

[0019] In one possible implementation, the method further includes: Obtain the first coordinate information and first photocurrent information of each first receiving photodiode in the first receiving photodiode array; Based on the first coordinate information and the first photocurrent information, the first shadow edge coordinate information of the shadow edge transition region corresponding to the X-axis direction is calculated using the centroid method; Obtain the second coordinate information and second photocurrent information of each second receiving photodiode in the second receiving photodiode array; Based on the second coordinate information and the second photocurrent information, the second shadow edge coordinate information of the shadow edge transition zone corresponding to the Y-axis direction is calculated using the centroid method.

[0020] In one possible implementation, the method further includes: The first shadow edge coordinate information and the second shadow edge coordinate information are compared with the corresponding standard wafer edge coordinates, and the tilt parameters of the wafer to be tested relative to the ideal focal plane are determined by a fitting algorithm. The tilt parameters include rotation error around the X-axis, rotation error around the Y-axis, and height error in the Z-axis direction.

[0021] In one possible implementation, the method further includes: After the flatness of the wafer to be tested is adjusted, the step of collecting the photodiode current information after the photodiode array in different directions emits a uniform surface light source to illuminate the wafer to be tested is repeated.

[0022] The present invention also provides a wafer flatness adjustment device, comprising the following modules: The information acquisition module is used to control the photodiode arrays in different directions to emit uniform surface light sources to illuminate the wafer under test, and to acquire and receive the photodiode current information received by the photodiode arrays. The different directions include the X-axis direction and the Y-axis direction of the wafer under test. The information conversion module is used to convert the photodiode current information into light intensity information, and calculate the coordinate information of the shadow edge transition zone based on the light intensity information; The determination module is used to determine the tilt parameters of the wafer to be tested relative to the ideal focal plane based on the coordinate information of the shadow edge transition region; The adjustment module is used to send the tilt parameters to the workpiece stage, and the workpiece stage determines whether the flatness of the wafer to be inspected needs to be adjusted based on the tilt parameters.

[0023] In one possible implementation, the information acquisition module is further configured to control the photodiode array in the X-axis direction of the wafer under test to emit a uniform surface light source to illuminate the wafer under test, and to acquire first photodiode current information received by a first receiving photodiode array, wherein the first receiving photodiode array is arranged opposite to the photodiode array in the X-axis direction; and to control the photodiode array in the Y-axis direction of the wafer under test to emit a uniform surface light source to illuminate the wafer under test, and to acquire second photodiode current information received by a second receiving photodiode array, wherein the second receiving photodiode array is arranged opposite to the photodiode array in the Y-axis direction.

[0024] The present invention also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the wafer flatness adjustment method as described above.

[0025] The present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the wafer flatness adjustment method as described above.

[0026] The present invention also provides a computer program product, including a computer program that, when executed by a processor, implements the wafer flatness adjustment method as described above.

[0027] The wafer flatness adjustment method, apparatus, electronic device, and medium provided by this invention illuminate the wafer under test by controlling a photodiode array in different directions to emit a uniform surface light source, and collect and receive photodiode current information received by the photodiode array. The different directions include the X-axis and Y-axis directions of the wafer under test. The photodiode current information is converted into light intensity information, and the shadow shape is collected based on the light intensity information. The coordinate information of the shadow edge transition region is calculated. The tilt parameter of the wafer under test relative to the ideal focal plane is determined based on the coordinate information of the shadow edge transition region. The tilt parameter is sent to the workpiece stage, which determines whether the flatness of the wafer under test needs to be adjusted based on the tilt parameter. Compared with the shortcomings of existing technologies that use a limited number of non-contact ranging sensors, which cannot instantly measure the overall flatness of the wafer and are costly, this solution utilizes the shadow measurement method of a transmitting-receiving diode array to achieve instantaneous, low-cost, and high-precision wafer flatness detection and attitude adjustment. Attached Figure Description

[0028] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0029] Figure 1 This is one of the flowcharts illustrating the wafer flatness adjustment method provided by the present invention.

[0030] Figure 2 This is the second flowchart of the wafer flatness adjustment method provided by the present invention.

[0031] Figure 3 This is the third flowchart of the wafer flatness adjustment method provided by the present invention.

[0032] Figure 4 This is a schematic diagram of wafer shadow imaging provided by the present invention.

[0033] Figure 5 This is a schematic diagram of the wafer flatness adjustment device provided by the present invention.

[0034] Figure 6 This is a schematic diagram of the structure of the electronic device provided by the present invention. Detailed Implementation

[0035] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0036] To facilitate understanding of the embodiments of the present invention, further explanations and descriptions will be provided below with reference to the accompanying drawings and specific embodiments. These embodiments do not constitute a limitation on the embodiments of the present invention.

[0037] Figure 1 This is one of the flowcharts illustrating the wafer flatness adjustment method provided by the present invention, such as... Figure 1 As shown, the method includes the following: S11. Control the photodiode arrays in different directions to emit uniform surface light sources to illuminate the wafer under test, and collect and receive the photodiode current information received by the photodiode arrays.

[0038] This invention utilizes a coordinated approach of an emitting photodiode array and a receiving diode array integrated onto a flexible screen. Emitter-receiver diode array pairs are arranged along the X and Y axes of the area supporting the wafer to be tested. The emitting array is optically designed to form a uniform surface light source. When the wafer is placed between the emitting and receiving arrays, the wafer edge projects a shadow onto the receiving array. Each photodiode in the receiving diode array converts the received light signal into a current signal, with the current value proportional to the incident light power. The acquisition process only requires reading the current value of each diode in the receiving array, eliminating the need for mechanical scanning and achieving millisecond-level data acquisition.

[0039] S12. Convert the photodiode current information into light intensity information, and collect the shadow shape based on the light intensity information.

[0040] The core formula for a photodiode to convert current information into light intensity information is: Iph=R⋅P in, R is the photocurrent, R is the responsivity of the photodiode, which is a constant, and P is the incident light power. The incident light power P can be calculated by multiplying the light intensity by the area, as shown in the following formula: P=I⋅A Where I is the light intensity and A is the cross-sectional area of ​​the light spot.

[0041] After converting the collected current information into light intensity distribution data, the receiving array is scanned row by row and column by column: if the current value of a diode is close to the saturation conduction value (fully exposed), it is determined to be a region without shadow; if it is close to the cutoff value (fully blocked), it is determined to be a region in complete shadow; if the current value is between the saturation value and the cutoff value, then this region is the shadow edge transition region. This region corresponds to the blurred boundary of the wafer edge and is a key data area for subsequent calculations.

[0042] S13. Calculate the coordinate information of the shadow edge transition area.

[0043] Obtain the first coordinate information and first photocurrent information of each first receiving photodiode in the first receiving photodiode array; calculate the first shadow edge coordinate information of the shadow edge transition region corresponding to the X-axis direction using the centroid method based on the first coordinate information and the first photocurrent information; obtain the second coordinate information and second photocurrent information of each second receiving photodiode in the second receiving photodiode array; calculate the second shadow edge coordinate information of the shadow edge transition region corresponding to the Y-axis direction using the centroid method based on the second coordinate information and the second photocurrent information.

[0044] S14. Determine the tilt parameters of the wafer to be tested relative to the ideal focal plane based on the coordinate information of the shadow edge transition region.

[0045] The measured set of shadow edge coordinates calculated by S13 is compared with the theoretical edge coordinates of a standard wafer (in a completely flat state). The spatial attitude parameters of the wafer relative to the ideal focal plane are calculated using a least squares fitting algorithm, specifically including: rotation error θx around the X-axis (affecting tilt in the Y direction); rotation error θy around the Y-axis (affecting tilt in the X direction); and overall height error ΔZ in the Z-axis direction.

[0046] Since the set of shadow edge coordinates covers the entire circumference of the wafer, global tilt information can be obtained at once, eliminating the need for multiple point measurements and enabling instantaneous global leveling.

[0047] S15. The tilt parameters are sent to the workpiece stage, and the workpiece stage determines whether the flatness of the wafer to be inspected needs to be adjusted based on the tilt parameters.

[0048] The high-speed real-time control system built into the workpiece stage receives the tilt parameters determined in S14 and judges whether θx, θy, and ΔZ exceed the preset error threshold. If they exceed the range, the wafer pose adjustment device integrated into the workpiece stage immediately performs nanometer-level pose compensation adjustment in six degrees of freedom (X, Y, Z, θx, θy, θz) to make the wafer surface dynamically parallel to the ideal focal plane. After the adjustment is completed, steps S11-S14 can be repeated for closed-loop verification to ensure that the adjustment accuracy meets the lithography requirements.

[0049] The wafer flatness adjustment method provided by this invention illuminates the wafer under test by controlling a photodiode array in different directions to emit a uniform surface light source, and collects and receives photodiode current information received by the photodiode array. The different directions include the X-axis and Y-axis directions of the wafer under test. The photodiode current information is converted into light intensity information, and the presence of shadows is determined based on the light intensity information. If shadows exist, the coordinate information of the shadow edge transition zone is calculated. The tilt parameter of the wafer under test relative to the ideal focal plane is determined based on the coordinate information of the shadow edge transition zone. The tilt parameter is sent to the workpiece stage, which determines whether flatness adjustment of the wafer under test is necessary based on the tilt parameter. Compared with the shortcomings of existing technologies that use a limited number of non-contact ranging sensors, which cannot instantly measure the overall flatness of the wafer and are costly, this method utilizes the shadow measurement method of the emitter-receiver diode array to achieve instantaneous, low-cost, and high-precision wafer flatness detection and attitude adjustment.

[0050] Figure 2 This is the second schematic flowchart of the wafer flatness adjustment method provided by the present invention, as shown below. Figure 2 As shown, the method includes the following: S21. Control the photodiode array in the X-axis direction of the wafer to be tested to emit a uniform surface light source to illuminate the wafer to be tested, and collect the first photodiode current information received by the first receiving photodiode array, wherein the first receiving photodiode array is arranged opposite to the photodiode array in the X-axis direction.

[0051] The embodiments of the present invention are combined with Figure 3 A detailed explanation follows. With the wafer under test placed horizontally, its X-axis emitting diode array is activated, forming a uniformly intense surface light source that vertically illuminates the wafer. A first receiving photodiode array (composed of densely packed nanoscale photodiodes) positioned along the negative X-axis simultaneously collects the light signal transmitted through the wafer's edge region, generating a two-dimensional current distribution matrix. In this matrix, the current in the wafer's shaded areas is close to zero, the current in the transmitted areas is saturated, and the edge regions exhibit a gradual transition characteristic.

[0052] S22. Control the photodiode array in the Y-axis direction of the wafer to be tested to emit a uniform surface light source to illuminate the wafer to be tested, and collect the second photodiode current information received by the second receiving photodiode array, wherein the second receiving photodiode array is arranged opposite to the photodiode array in the Y-axis direction.

[0053] The transmitting array in the positive Y-axis direction is activated, and the second receiving array acquires the current distribution matrix in the Y-axis direction. Data acquisition in the two orthogonal X and Y directions can be completed within 10ms, reflecting the tilt components of the wafer in the two axes, respectively. The two receiving arrays form a circular or square measurement device, with half-area transmission and half-area reception, ensuring no moving mechanical parts and achieving static high-speed measurement.

[0054] S23. Based on the responsivity of the photodiode, the incident light power, and the cross-sectional area of ​​the light spot, the current information of the first photodiode is converted into first light intensity information, and the current information of the second photodiode is converted into second light intensity information.

[0055] According to the first formula The current information of the first photodiode is converted into first light intensity information, and the current information of the second photodiode is converted into second light intensity information, resulting in light intensity matrices corresponding to the X and Y axes, respectively. Let I be the photocurrent, I be the light intensity, A be the cross-sectional area of ​​the light spot, and R be a constant representing the responsivity of the photodiode. The conversion process is completed in an FPGA or dedicated ASIC chip to ensure real-time data processing. The gradient change of the light intensity matrix directly corresponds to the change in the spatial position of the wafer edge.

[0056] S24. Based on the first light intensity information, collect the shadow shape of the light source in the X-axis direction after passing through the wafer to be tested, and based on the second light intensity information, collect the shadow shape of the light source in the Y-axis direction after passing through the wafer to be tested.

[0058] The shadow edge transition region is the area where the photocurrent is between the saturation conduction value and the cutoff value, such as... Figure 4 As shown.

[0059] Threshold analysis is performed on the light intensity matrices corresponding to the X and Y axes, setting 90% of the saturated light intensity as the conduction threshold and 10% as the cutoff threshold. Regions with light intensity >90% in the matrix are defined as fully exposed areas (no shadows), regions with light intensity <10% are defined as fully shadowed areas, and the continuous region between the two is the shadow edge transition region. This region has a width of approximately 5-10 diode pixels in the X and Y directions, precisely capturing the spatial information of the wafer edge.

[0060] Optionally, if no valid transition area is detected (e.g., the wafer is not within the measurement range), an alarm is triggered and the process is aborted.

[0061] S25. Obtain the first coordinate information and first photocurrent information of each first receiving photodiode in the first receiving photodiode array.

[0062] For the X-axis shadow edge transition region identified by S24, the address information (row and column numbers in the array) of all photodiodes in this region is quickly extracted as the first coordinate information, and the corresponding first photocurrent information is read at the same time. The acquisition process adopts a row scan interrupt triggering mechanism: the system receives the array by scanning row by row. When a row first shows a non-saturated current, the row and the adjacent rows are marked as edge regions, and only the data in this region is cached, which greatly reduces the amount of invalid data transmission.

[0063] S26. Based on the first coordinate information and the first photocurrent information, the first shadow edge coordinate information of the shadow edge transition area corresponding to the X-axis direction is calculated using the centroid method.

[0064] For the extracted X-direction edge data point set, we can select every 3 adjacent points as a group to calculate the first shadow edge coordinate information of the shadow edge transition zone corresponding to the X-axis direction, as shown in the following formula: Traverse all edge points to generate a high-precision sequence of shadow edge contour coordinates in the X direction. The centroid method utilizes current gradient information to improve edge positioning accuracy to less than 1 / 10 of the physical size of a single diode (e.g., when the diode size is 5μm, the edge positioning accuracy can reach 0.5μm).

[0065] S27. Obtain the second coordinate information and second photocurrent information of each second receiving photodiode in the second receiving photodiode array.

[0066] For the shadow edge transition area in the Y-axis direction identified by S24, the address information (row and column numbers in the array) of all photodiodes in this area is quickly extracted as the second coordinate information, and the corresponding second photocurrent information is read at the same time.

[0067] S28. Based on the second coordinate information and the second photocurrent information, the second shadow edge coordinate information of the shadow edge transition area corresponding to the Y-axis direction is calculated using the centroid method.

[0068] For the extracted Y-direction edge data point set, the coordinate information of the second shadow edge of the shadow edge transition zone corresponding to the Y-axis direction can be calculated by selecting every 3 adjacent points as a group, as shown in the following formula: Traverse all edge points to generate a high-precision sequence of shadow edge contour coordinates in the Y direction.

[0069] Where LED[N] represents the LED in the Nth column, LED[M] represents the LED in the Mth row, and i is the photocurrent information.

[0070] The high-precision shadow edge contour coordinate sequence in the X direction and the high-precision shadow edge contour coordinate sequence in the Y direction together constitute the complete two-dimensional projection contour of the wafer under test on the receiving array.

[0071] S29. The first shadow edge coordinate information and the second shadow edge coordinate information are compared with the corresponding standard wafer edge coordinates, and the tilt parameters of the wafer to be detected relative to the ideal focal plane are determined by a fitting algorithm.

[0072] The tilt parameters include rotational error about the X-axis, rotational error about the Y-axis, and height error in the Z-axis direction.

[0073] Establish a standard wafer coordinate system: Assume the ideal focal plane is the Z=0 plane, and the projection of the standard wafer edge onto this plane is a theoretical circle with radius R0 (wafer specifications are known). Perform least-squares fitting between the measured high-precision shadow edge contour coordinate sequences in the X and Y directions and the corresponding standard circle, calculating the deviation between the two. Since wafer tilt causes the projected circle to deform into an ellipse and produce translation, by solving the geometric transformation matrix, directly extract: rotation error θx around the X-axis (affecting diameter change in the Y direction); rotation error θy around the Y-axis (affecting diameter change in the X direction); and height error ΔZ (overall projection scaling). This allows for the simultaneous acquisition of leveling parameters for all three degrees of freedom, significantly reducing computation time.

[0074] S210. The tilt parameters are sent to the workpiece stage, and the workpiece stage determines whether the flatness of the wafer to be inspected needs to be adjusted based on the tilt parameters.

[0075] Determine whether the rotational error around the X-axis, the rotational error around the Y-axis, and the height error in the Z-axis direction are within the corresponding error range; if so, there is no need to adjust the flatness of the wafer to be inspected; if not, adjust the position of the wafer to be inspected by adjusting the workpiece stage according to the tilt parameters so that the surface of the wafer to be inspected is parallel to the ideal focal plane.

[0076] Specifically, the workpiece stage controller receives the (θx, θy, ΔZ) parameters output by S29 and compares them with the system's allowable error threshold. If any parameter exceeds the limit, the nanometer-scale actuator is immediately driven to compensate. Z-axis adjustment: Piezoelectric ceramic actuators adjust wafer height with a resolution of <1nm; Tilting adjustment: The voice coil motor drives the platform to rotate around the X / Y axis with an angular resolution of <0.1μrad. After adjustment, the system can automatically trigger S21-S29 for verification measurement, forming a closed-loop control to ensure that the final deviation of the wafer surface meets the requirements of the photolithography process.

[0077] The entire measurement-adjustment cycle can be completed within 50ms, which is more than 10 times more efficient than traditional multi-sensor scanning methods (typically >500ms).

[0078] Compared with existing technologies, the wafer flatness adjustment method proposed in this invention is more economical. Firstly, with the development of flexible screens and the maturity of LED mass transfer technology, the prices of light-emitting diodes and receiving diodes will continue to decrease. For example, the current price of flexible screens is much cheaper than high-precision lasers. Secondly, the wafer orientation recognition method mentioned in this invention, with the development of chip computing power, can instantly extract shadow edges and provide the required adjustment position information to the workpiece stage, saving wafer flatness adjustment time. This shortens wafer exposure time and increases the number of wafers exposed per unit time, thereby improving the exposure efficiency of the lithography machine and accumulating economic benefits.

[0079] The wafer flatness adjustment device provided by the present invention is described below. The wafer flatness adjustment device described below and the wafer flatness adjustment method described above can be referred to in correspondence.

[0080] Figure 5 This is a schematic diagram of the wafer flatness adjustment device provided by the present invention, specifically including: The information acquisition module 501 is used to control the photodiode arrays in different directions to emit uniform surface light sources to illuminate the wafer under test, and to acquire and receive the photodiode current information received by the photodiode arrays. The different directions include the X-axis direction and the Y-axis direction of the wafer under test. The information conversion module 502 is used to convert the photodiode current information into light intensity information and collect the shadow shape based on the light intensity information; Calculation module 503 is used to calculate the coordinate information of the shadow edge transition area; The determination module 504 is used to determine the tilt parameters of the wafer to be tested relative to the ideal focal plane based on the coordinate information of the shadow edge transition region; The adjustment module 505 is used to send the tilt parameters to the workpiece stage, and the workpiece stage determines whether the flatness of the wafer to be inspected needs to be adjusted based on the tilt parameters.

[0081] In one possible implementation, the information acquisition module 501 is specifically configured to control the photodiode array in the X-axis direction of the wafer under test to emit a uniform surface light source to illuminate the wafer under test, and to acquire first photodiode current information received by a first receiving photodiode array, wherein the first receiving photodiode array is arranged opposite to the photodiode array in the X-axis direction; and to control the photodiode array in the Y-axis direction of the wafer under test to emit a uniform surface light source to illuminate the wafer under test, and to acquire second photodiode current information received by a second receiving photodiode array, wherein the second receiving photodiode array is arranged opposite to the photodiode array in the Y-axis direction.

[0082] In one possible implementation, the information conversion module 502 is specifically used to convert the first photodiode current information into first light intensity information and the second photodiode current information into second light intensity information based on the photodiode's responsivity, incident light power, and cross-sectional area of ​​the light spot; to collect the shadow shape of the light source in the X-axis direction after passing through the wafer under test based on the first light intensity information, and to collect the shadow shape of the light source in the Y-axis direction after passing through the wafer under test based on the second light intensity information, wherein the shadow edge transition region is the region where the photocurrent is between the saturation conduction value and the cutoff value.

[0083] In one possible implementation, the calculation module 503 is specifically used to acquire the first coordinate information and first photocurrent information of each first receiving photodiode in the first receiving photodiode array; calculate the first shadow edge coordinate information of the shadow edge transition region corresponding to the X-axis direction using the centroid method based on the first coordinate information and the first photocurrent information; acquire the second coordinate information and second photocurrent information of each second receiving photodiode in the second receiving photodiode array; and calculate the second shadow edge coordinate information of the shadow edge transition region corresponding to the Y-axis direction using the centroid method based on the second coordinate information and the second photocurrent information.

[0084] In one possible implementation, the determining module 504 is specifically used to compare the first shadow edge coordinate information and the second shadow edge coordinate information with the corresponding standard wafer edge coordinates, and determine the tilt parameters of the wafer to be detected relative to the ideal focal plane through a fitting algorithm. The tilt parameters include rotation error around the X-axis, rotation error around the Y-axis, and height error in the Z-axis direction.

[0085] In one possible implementation, the adjustment module 505 is specifically used to determine whether the rotation error around the X-axis, the rotation error around the Y-axis, and the height error in the Z-axis direction are within the corresponding error range; if so, there is no need to adjust the flatness of the wafer to be tested; if not, the workpiece stage adjusts the pose of the wafer to be tested according to the tilt parameters so that the surface of the wafer to be tested is parallel to the ideal focal plane.

[0086] Figure 6 An example is a schematic diagram of the physical structure of an electronic device, such as... Figure 6As shown, the electronic device may include a processor 610, a communications interface 620, a memory 630, and a communication bus 640. The processor 610, communications interface 620, and memory 630 communicate with each other via the communication bus 640. The processor 610 can call logic instructions in the memory 630 to execute a wafer flatness adjustment method. This method includes: controlling a photodiode array in different directions to emit a uniform surface light source to illuminate the wafer under test, and collecting and receiving photodiode current information received by the photodiode array, wherein the different directions include the X-axis direction and the Y-axis direction of the wafer under test; converting the photodiode current information into light intensity information, and collecting the shadow shape based on the light intensity information; calculating the coordinate information of the shadow edge transition region; determining the tilt parameter of the wafer under test relative to the ideal focal plane based on the coordinate information of the shadow edge transition region; sending the tilt parameter to the workpiece stage, and the workpiece stage determining whether flatness adjustment of the wafer under test is necessary based on the tilt parameter.

[0087] Furthermore, the logical instructions in the aforementioned memory 630 can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0088] On the other hand, the present invention also provides a computer program product, which includes a computer program that can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer can execute the wafer flatness adjustment method provided by the above methods. The method includes: controlling a photodiode array in different directions to emit a uniform surface light source to illuminate the wafer to be tested, and collecting and receiving photodiode current information received by the photodiode array, wherein the different directions include the X-axis direction and the Y-axis direction of the wafer to be tested; converting the photodiode current information into light intensity information, and collecting the shadow shape based on the light intensity information; calculating the coordinate information of the shadow edge transition region; determining the tilt parameter of the wafer to be tested relative to the ideal focal plane based on the coordinate information of the shadow edge transition region; sending the tilt parameter to the workpiece stage, and determining whether the wafer to be tested needs to be adjusted for flatness based on the tilt parameter by the workpiece stage.

[0089] In another aspect, the present invention also provides a non-transitory computer-readable storage medium storing a computer program thereon. When executed by a processor, the computer program implements the wafer flatness adjustment method provided by the above methods. The method includes: controlling a photodiode array in different directions to emit a uniform surface light source to illuminate the wafer to be tested, and collecting and receiving photodiode current information received by the photodiode array, wherein the different directions include the X-axis direction and the Y-axis direction of the wafer to be tested; converting the photodiode current information into light intensity information, and collecting the shadow shape based on the light intensity information; calculating the coordinate information of the shadow edge transition region; determining the tilt parameter of the wafer to be tested relative to the ideal focal plane based on the coordinate information of the shadow edge transition region; sending the tilt parameter to the workpiece stage, and determining whether the wafer to be tested needs to be adjusted for flatness based on the tilt parameter by the workpiece stage.

[0090] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.

[0091] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.

[0092] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for adjusting wafer flatness, characterized in that, include: The photodiode arrays in different directions are controlled to emit uniform surface light sources to illuminate the wafer under test, and the photodiode current information received by the photodiode arrays is collected and received. The different directions include the X-axis direction and the Y-axis direction of the wafer under test. The photodiode current information is converted into light intensity information, and the shadow shape is collected based on the light intensity information; Calculate the coordinate information of the shadow edge transition area; The tilt parameters of the wafer to be tested relative to the ideal focal plane are determined based on the coordinate information of the shadow edge transition region. The tilt parameters are sent to the workpiece stage, which then determines whether the flatness of the wafer to be inspected needs to be adjusted based on the tilt parameters.

2. The method according to claim 1, characterized in that, The control of photodiode arrays in different directions to emit uniform surface light sources illuminates the wafer under test, and the acquisition and reception of photodiode current information received by the photodiode array includes: The photodiode array in the X-axis direction of the wafer to be tested is controlled to emit a uniform surface light source to illuminate the wafer to be tested, and the first photodiode current information received by the first receiving photodiode array is collected. The first receiving photodiode array is arranged opposite to the photodiode array in the X-axis direction. The photodiode array in the Y-axis direction of the wafer under test is controlled to emit a uniform surface light source to illuminate the wafer under test, and the second photodiode current information received by the second receiving photodiode array is collected. The second receiving photodiode array is arranged opposite to the photodiode array in the Y-axis direction.

3. The method according to claim 2, characterized in that, The step of converting the photodiode current information into light intensity information and acquiring the shadow shape based on the light intensity information includes: Based on the responsivity of the photodiode, the incident light power, and the cross-sectional area of ​​the light spot, the current information of the first photodiode is converted into first light intensity information, and the current information of the second photodiode is converted into second light intensity information. The shape of the shadow after the light source in the X-axis direction passes through the wafer to be tested is acquired based on the first light intensity information, and the shape of the shadow after the light source in the Y-axis direction passes through the wafer to be tested is acquired based on the second light intensity information, wherein the shadow edge transition region is the region where the photocurrent is between the saturation conduction value and the cutoff value.

4. The method according to claim 3, characterized in that, The calculation of the coordinate information of the shadow edge transition area includes: Obtain the first coordinate information and first photocurrent information of each first receiving photodiode in the first receiving photodiode array; Based on the first coordinate information and the first photocurrent information, the first shadow edge coordinate information of the shadow edge transition region corresponding to the X-axis direction is calculated using the centroid method; Obtain the second coordinate information and second photocurrent information of each second receiving photodiode in the second receiving photodiode array; Based on the second coordinate information and the second photocurrent information, the second shadow edge coordinate information of the shadow edge transition zone corresponding to the Y-axis direction is calculated using the centroid method.

5. The method according to claim 4, characterized in that, The determination of the tilt parameters of the wafer under test relative to the ideal focal plane based on the coordinate information of the shadow edge transition region includes: The first shadow edge coordinate information and the second shadow edge coordinate information are compared with the corresponding standard wafer edge coordinates, and the tilt parameters of the wafer to be tested relative to the ideal focal plane are determined by a fitting algorithm. The tilt parameters include rotation error around the X-axis, rotation error around the Y-axis, and height error in the Z-axis direction.

6. The method according to any one of claims 1-5, characterized in that, The method further includes: After the flatness of the wafer to be tested is adjusted, the step of collecting the photodiode current information after the photodiode array in different directions emits a uniform surface light source to illuminate the wafer to be tested is repeated.

7. A wafer flatness adjustment device, characterized in that, include: The information acquisition module is used to control the photodiode arrays in different directions to emit uniform surface light sources to illuminate the wafer under test, and to acquire and receive the photodiode current information received by the photodiode arrays. The different directions include the X-axis direction and the Y-axis direction of the wafer under test. The information conversion module is used to convert the photodiode current information into light intensity information and to collect the shadow shape based on the light intensity information; The calculation module is used to calculate the coordinate information of the shadow edge transition area; The determination module is used to determine the tilt parameters of the wafer to be tested relative to the ideal focal plane based on the coordinate information of the shadow edge transition region; The adjustment module is used to send the tilt parameters to the workpiece stage, and the workpiece stage determines whether the flatness of the wafer to be inspected needs to be adjusted based on the tilt parameters.

8. The apparatus according to claim 7, characterized in that, The information acquisition module is further configured to control the photodiode array in the X-axis direction of the wafer under test to emit a uniform surface light source to illuminate the wafer under test, and to acquire the first photodiode current information received by the first receiving photodiode array, wherein the first receiving photodiode array is arranged opposite to the photodiode array in the X-axis direction; and to control the photodiode array in the Y-axis direction of the wafer under test to emit a uniform surface light source to illuminate the wafer under test, and to acquire the second photodiode current information received by the second receiving photodiode array, wherein the second receiving photodiode array is arranged opposite to the photodiode array in the Y-axis direction.

9. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the wafer flatness adjustment method as described in any one of claims 1 to 6.

10. An electronic device comprising a memory, a processor, and a computer program stored in the memory and running on the processor, characterized in that, When the processor executes the computer program, it implements the wafer flatness adjustment method as described in any one of claims 1 to 6.

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