Photovoltaic cell module and preparation method thereof

Abstract

The invention relates to the technical field of solar cells, in particular to a photovoltaic cell assembly and a preparation method thereof.The preparation method comprises the following steps that a cell piece is prepared, specifically, a silicon wafer with the half size serves as a raw material, selective patterning etching is conducted on the front face and the back face of the textured silicon wafer to form two grooves, and the width of the groove in the front face is smaller than that of the groove in the back face; and sequentially plating an amorphous silicon / microcrystalline silicon thin film and a transparent conductive film, removing the transparent conductive film in the groove, and then carrying out subsequent steps and slicing. And assembly manufacturing: the groove processing position is located below the non-groove processing position of the other battery piece during series welding of the battery assembly. The grooves are arranged in the fragmentation areas of the front and back surfaces of the battery piece, so that the phenomenon that the transparent conductive film is not thoroughly removed by etching slurry or laser or the amorphous / microcrystalline layer is damaged can be well avoided.

Description

Technical Field

[0001] This invention relates to the field of solar cell technology, and more specifically to a photovoltaic cell module and its preparation method. Background Technology

[0002] Multi-cell photovoltaic (PV) cell technology, by cutting cells into half-cells, third-cells, or quarter-cells, can effectively reduce current loss and improve overall module efficiency. However, this technology faces multiple challenges in its implementation. After laser cutting, microscopic defects formed on the cut surface can lead to carrier recombination at the edges; heat-affected zones can damage the surrounding passivation film, causing efficiency losses; high-temperature sputtering can cause recombination centers in the passivation material in the peripheral area; and microcracks and burrs at the cut edges can easily cause microcracks and encapsulation failures. These defects result in a significant deterioration of the passivation effect after slicing, manifested as unstable efficiency improvements and a decline in long-term reliability. Currently, the industry mainly mitigates the heat-affected zone (TAZ) by optimizing laser cutting parameters (power, speed) and employing non-destructive cutting techniques. While this can reduce the degree of thermal damage to some extent, several key issues remain. For example, existing technologies have failed to effectively address the removal of laser residue and the repair of microcracks in the TAZ, leading to persistent defects at the cutting edges and impacting the long-term reliability of the battery. Furthermore, current improvement measures primarily focus on the laser cutting process and post-cutting processing, lacking pre-optimization of the intrinsic properties of the battery cells and failing to reduce sensitivity to laser processes at the material source. Finally, the current technological approach exhibits a "remedial" characteristic, failing to form a complete solution system encompassing material pretreatment, cutting processes, and post-processing.

[0003] Therefore, to solve the above problems, it is necessary to develop a new photovoltaic cell module and its preparation method, which can improve the technical problems of poor passivation effect in the heat-affected zone of the cell and severe recombination of charge carriers at the cutting edge, leading to a decrease in efficiency, by pre-treating the cell surface, repairing microcracks after cutting, and enhancing edge passivation. Summary of the Invention

[0004] The purpose of this invention is to provide a photovoltaic cell module and its preparation method, which solves the technical problems in the prior art of poor passivation effect due to large heat-affected zone after slicing and severe recombination of charge carriers at the cutting edge leading to reduced efficiency.

[0005] This invention discloses a method for preparing a photovoltaic cell module, comprising the following steps: Cell fabrication: Using a half-size silicon wafer as raw material, selectively pattern and etch two grooves on the front and back sides of the texturized silicon wafer. The width of the groove on the front side is smaller than the width of the groove on the back side. Then, amorphous silicon / microcrystalline silicon thin film and transparent conductive film are deposited in sequence. The transparent conductive film in the groove is then removed. After subsequent steps, the wafers are separated to obtain the final product. Module manufacturing: When stringing battery modules, the grooved area is located below the non-grooved area of ​​another battery cell.

[0006] Principle and function: By designing groove structures of specific width, depth, and flatness in the slab areas on the front and back of the solar cell, and then removing the TCO film from the grooves, the following key process issues can be effectively solved: (1) The groove structure can precisely limit the flow range of the fluid etching paste, avoiding over-etching of non-target areas due to paste epitaxy. In traditional processes, paste epitaxy will etch unnecessary areas of the transparent conductive film (TCO), resulting in a reduction in the effective current collection area. The groove design significantly improves the accuracy of the etching process through physical boundary control.

[0007] (2) The transparent conductive film (100nm) deposited on the pyramidal textured surface of the silicon wafer exhibits the same undulating pattern as the pyramid (pyramid height 1000-3000nm). In traditional laser removal processes, the apex region is easily removed, but the groove region requires higher laser energy, which can damage the amorphous film (5nm) and microcrystalline film (17nm) at the bottom. The mirror structure formed by the grooves can eliminate the influence of the pyramidal undulations on laser removal, achieving uniform removal while protecting the underlying film. (3) The groove structure serves as the stacking area for slab-type battery modules, effectively improving the problem of easy breakage during the stacking process by reducing the height difference between the battery cells. The stress concentration problem caused by the uneven surface of the battery cells in the traditional stacking process is significantly improved, thereby enhancing the mechanical reliability of the module. (4) One of the functions of the transparent conductive film layer is to collect photogenerated charge carriers and conduct them laterally to the metal grid lines. After the laser splits the groove, the charge carriers in the split area will move to this area and recombine due to the effects of heat and mechanical damage, thus affecting the photoelectric conversion efficiency of the split cell. Therefore, the transparent conductive film in the groove is removed first, and then the surface is split.

[0008] Furthermore, the transparent conductive film is a TCO transparent conductive layer.

[0009] Furthermore, the width of the groove on the light-receiving surface is smaller than the width of the non-light-receiving surface.

[0010] The width of the mirror groove on the light-receiving side is smaller than that on the non-light-receiving side, primarily based on the following considerations: As the light-absorbing surface, the front side needs to minimize the groove size while ensuring the laser-cut wafer completely falls into the mirror groove, thus minimizing laser damage and maximizing light absorption. The width of the mirror groove on the non-light-receiving side is larger than that on the light-receiving side because this area is located at the stacking position during cell stacking and does not need to participate in light absorption. Increasing the groove width facilitates the implementation of paste etching of TCO or laser removal of TCO.

[0011] Furthermore, the width of the groove on the light-receiving surface is 0.5–3 mm, the width of the groove on the non-light-receiving surface is 1–5 mm, the groove depth is 5–20 μm, and the flatness of the groove base is 1–10 nm.

[0012] The physical barrier created by the depth of the groove effectively prevents the etching paste from diffusing outwards. By limiting the paste flow range, it ensures that the etching process only occurs in the target area, avoiding over-etching of unnecessary areas. The groove concentrates laser energy on the defined area, forming a "heat-affected zone isolation effect," confining thermal and mechanical damage within the groove and significantly reducing the risk of damage to surrounding functional layers (such as microcrystalline / amorphous thin films). The high flatness of the groove substrate eliminates interference from the pyramid textured surface in the process, allowing the etching paste or laser to effectively remove TCO.

[0013] Furthermore, a laser is used to remove the transparent conductive film, with the following process parameters: laser power 7%–9%, ​​speed 1.5–2.5 m / s, and 2–4 laser passes.

[0014] The transparent conductive film (TCO) is removed using slurry etching. The slurry etching process for TCO is as follows: First, etchant is printed onto the light-receiving surface grooves. The printing thickness should not exceed the groove depth, and the printing width should not exceed the groove width to prevent the etchant from spreading outwards and affecting areas that do not need etching. After printing, the etchant is dried. After drying, etchant is printed onto the non-light-receiving surface grooves. The printing thickness should not exceed the groove depth, and the printing width should not exceed the groove width to prevent the etchant from spreading outwards and affecting areas that do not need etching. After printing, the etchant is dried again. Finally, the dried blue film is cleaned with pure water and dried in an ultrasonic tank. Without this groove area, the fluid etchant will extend outwards, causing excessive etching in areas that do not need etching due to flow extension, thus reducing the TCO film and affecting current collection. The process parameters are as follows: the width of the etching paste for the groove printing on the light-receiving surface is 0.5-3mm, the width of the etching paste for the groove printing on the non-light-receiving surface is 1-5mm, the thickness is 10-30um, the drying temperature of the etching paste is 140-160℃, the drying time is 1-5 minutes, and the cleaning time is 30-60s.

[0015] Furthermore, after the subsequent steps are completed, the light-receiving surface of the solar cell is divided into sections.

[0016] Furthermore, the slicing is performed using a non-destructive cutting laser.

[0017] Furthermore, during the slicing process, grooves are first cut at both ends of the recessed area on the light-receiving surface of the solar cell, and then thermal stress is used to split the cells in the recessed area to obtain the slicing.

[0018] By removing the transparent conductive film (TCO) layer, carrier collection in that region is blocked, causing carriers to recombine on the side and preventing new recombination in the TCO region, thus reducing leakage current. The heat-affected zone and mechanical damage from the cleaving are confined within the groove, facilitating precise removal by subsequent plasma etching. The reason front-side laser cleaving is preferred over back-side cleaving is that the P-type microcrystalline silicon layer, located above the intrinsic amorphous silicon layer, acts as a hole transport layer, participating in PN junction formation and assisting holes in migrating from the silicon substrate to the contact layer. Cleaving from the back side could damage this critical structure, significantly impacting battery efficiency compared to front-side cleaving.

[0019] Furthermore, after the slicing is completed, the edges are protected, including plasma etching and edge passivation.

[0020] Plasma etching is used to remove composite centers, microcracks, burrs, etc., formed by passivation film sputtering onto the battery periphery under high temperature laser.

[0021] The thermal effect generated during laser processing creates a heat-affected zone (HAZ), which can cause mechanical damage during chipping. Specifically, thermal damage leads to the destruction of the passivation film structure around the battery, and the passivation film material sputters under the high temperature of the laser. Therefore, plasma is used to remove these damages after laser chipping, and a passivation layer is subsequently deposited using plasma to achieve good surface passivation in the chipped area, preventing the formation of new carrier recombination.

[0022] Furthermore, the edge passivation is performed using plasma-enhanced chemical vapor deposition of side-side amorphous silicon thin films and side-side silicon nitride thin films.

[0023] Furthermore, the amorphous silicon thin film on the side uses silane and hydrogen as source gases, wherein the silane flow rate is 600-1000 sccm, the hydrogen flow rate is 6000-9000 sccm, the gas pressure in the chamber is 100-150 Pa, the temperature is 150-180℃, and the RF power density during deposition is 0.01-0.04 W / cm². 2 The plasma treatment time is 20–100 s, and the overall thickness of the passivation film is 30–100 nm. Amorphous silicon is deposited here because amorphous silicon, through hydrogen atom saturated dangling bonds, can reduce the recombination rate on the silicon wafer surface to below 10 cm / s. Its passivation effect is significantly better than that of SiO2 (recombination rate of about 100 cm / s) and SiNx (about 50 cm / s).

[0024] Furthermore, the silicon nitride film uses silane and ammonia as source gases, with a radio frequency power of 1600-1900W, a temperature of 100-150℃, a deposition time of 100-200s, a pressure of 1600-1800mTorr, and a SiH4:NH3 flow ratio of 1:5-1:10. A silicon nitride thickness of 100-150nm and a refractive index of 1.6-1.9 are deposited on the amorphous silicon film.

[0025] Silicon nitride is deposited here to protect the amorphous silicon and the edges of the silicon wafer by taking advantage of silicon nitride's excellent resistance to moisture and corrosion.

[0026] Furthermore, the spacing between the edge grid lines of the battery cell is smaller than the spacing between the middle fine grid lines.

[0027] Furthermore, the edge grid lines of the battery cell are unequally spaced gradient grid lines.

[0028] Furthermore, the unequal spacing gradually changes to a smaller spacing closer to the edge of the battery cell.

[0029] Furthermore, the spacing between the grid lines at the edge of the segmented region is smaller than the spacing between the grid lines at the edge of the unsegmented region.

[0030] Because the carrier recombination in the segmented region is relatively severe and the carrier obstruction is strong, edge grid lines with small spacing can be set at this edge.

[0031] Furthermore, the edge grid lines of the battery cell are equidistant grid lines.

[0032] Furthermore, the edge grid line includes a short edge region and a long edge region.

[0033] Furthermore, the spacing between the edge grid lines in the long edge region is 0.5–1.5 mm, and the spacing between the fine grid lines in the middle is 0.6–3 mm.

[0034] By setting the spacing of the edge grid lines in the long edge region, the problem of inconsistent EL brightness between the long edge region and the middle region can be improved. Furthermore, by adopting a gradient form, the light-blocking area is not increased while optimizing contact performance and current collection performance, ensuring that the light-receiving area remains unchanged and maximizing the light absorption of the battery.

[0035] Furthermore, the spacing between the edge grid lines in the long edge region is equidistant, and the spacing between the fine grid lines in the middle is also equidistant.

[0036] This method can enhance the edge current collection capability and fully unleash the carrier transport potential at the battery edge.

[0037] Furthermore, the spacing between the intermediate fine grids is equal, the intermediate fine grids are in rows 1-10, and the spacing between the edge grid lines in the long side edge region is an unequally spaced gradient grid line.

[0038] This method can be used in batteries where edge carrier recombination is not severe or edge carrier collection resistance is not significant, with the grid line spacing gradually decreasing from the middle. Alternatively, the grid line spacing at the edge of the segmented region can be smaller than that at the edge of the unsegmented region, because carrier recombination is relatively severe and carrier resistance is stronger in the segmented region; this edge can be configured as an enhanced electrode collection grid line.

[0039] Furthermore, the width of the edge grid line region is 1 to 16 mm.

[0040] Furthermore, the spacing between the edge grid lines in the short edge region is 0.5–1.5 mm, and the spacing between the fine grid lines in the middle is 0.6–3 mm.

[0041] By adjusting the spacing of the edge grid lines in the short edge region, the problem of inconsistent EL brightness between the short edge region and the middle region can be improved, thereby enhancing the edge current collection capability.

[0042] Furthermore, the width of the edge grid line in the short edge region is from the edge of the battery cell to the first welding line.

[0043] This method is an enhanced edge current collection design for batteries with severe relative recombination of charge carriers and strong charge carrier obstruction.

[0044] Furthermore, the width of the edge grid line in the short edge region extends from the edge of the battery cell to the second welding line.

[0045] Compared with the prior art, the beneficial effects of the present invention are: 1. The physical barrier formed by the groove structure can effectively limit the epitaxial growth of the etching paste, ensuring that the transparent conductive film (TCO) is removed only in the target area, avoiding over-etching of unnecessary areas, and achieving precise control of the etching process; 2. The mirror-like groove eliminates the interference of the pyramid-shaped textured surface structure on the laser removal process, so that the TCO removal process is no longer affected by the pyramid depth, achieving a uniform and thorough removal effect and ensuring a uniform distribution of laser removal energy. 3. This invention performs dry plasma etching on the surface and sidewalls of the grooves of the wafer to remove laser sputtering residues and microcracks and burrs, significantly improving the yield of the module stacking. 4. This invention stacks silicon wafers that have undergone plasma etching and then sequentially deposits amorphous silicon and silicon nitride as passivation layers using low-temperature plasma, which significantly improves the conversion efficiency of slab cells and the power of modules, and enhances long-term reliability. 5. The groove structure serves as the stacking area for slab battery modules, effectively mitigating the problem of easy breakage during the stacking process by reducing the height difference between the battery cells; 6. The electrode grid lines of the segmented battery of the present invention adopt unequally spaced gradient lines in both the short and long edge regions, which can improve the problem of inconsistent EL brightness between the edge and middle regions of the overall battery cell, fully release the carrier transport potential of the battery edge, enhance the edge current collection capability, and thus improve battery efficiency and module power. Attached Figure Description

[0046] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0047] Figure 1 This is a schematic diagram of the battery structure before it is segmented according to the present invention.

[0048] Figure 2 This is a schematic diagram of the battery passivation structure after the battery is sliced ​​according to the present invention.

[0049] Figure 3 This is a microscopic test image of a piece repaired by plasma treatment after being segmented using traditional methods.

[0050] Figure 4 This is a microscopic test image of the piece after it has been repaired by plasma treatment following the process of this invention.

[0051] Figure 5 Comparison of laser PL tests before and after laser treatment in traditional process segmented areas.

[0052] Figure 6 This is a comparison diagram of laser PL tests before and after laser treatment in the segmented areas of the process of this invention.

[0053] Figure 7 This is a schematic diagram of the interconnection of the segmented battery modules of the present invention.

[0054] Figure 8 This is a schematic diagram of the segmented battery grid structure of the present invention.

[0055] In the above figures, the meanings of each mark are as follows: 1-Silicon wafer, 2-Intrinsic amorphous silicon thin film, 3-Doped microcrystalline silicon thin film, 4-TCO transparent conductive layer, 5-Electrode, 6-Mirror groove on the light-receiving surface, 7-Mirror groove on the non-light-receiving surface, 8-Side amorphous silicon thin film, 9-Side silicon nitride thin film, 10-Edge gate line, 11-Middle fine gate, 12-Long edge region, 13-Short edge region, 14-Segmented region. Detailed Implementation

[0056] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments.

[0057] Example 1 This embodiment discloses a photovoltaic cell module and its preparation method, the specific structure of which is as follows: Figure 1 and Figure 2 As shown, it includes the following steps: Step 1: Select the texturized silicon wafer 1 and perform a patterning mask. Then, etch the masked silicon wafer 1 to form front and back mirror grooves in the non-masked areas. This step specifically includes the following steps: (1) First, nano-silica is used to selectively mask the texturized silicon wafer 1.

[0058] (2) After the masking is completed, the silicon wafer 1 is etched in one step to form the front and back grooves for wafer stacking. The process parameters are: a solution of 1% hydrogen peroxide and 5% potassium hydroxide or sodium hydroxide, time 200s, temperature 80℃. The groove width is 3mm, the groove depth is 5-20um, and the groove substrate flatness is 5nm. This groove can prevent the etching paste from spreading outward and the groove will keep the heat-affected and mechanical damage in the groove, which is conducive to removal. The flatness of the groove substrate is set because there is no pyramid effect. The etching paste or laser can remove TCO well without affecting the microcrystalline film and amorphous film under TCO.

[0059] Step 2: Deposit intrinsic amorphous silicon thin film 2 / doped microcrystalline silicon thin film 3 on both sides of the etched silicon wafer 1; Step 3: Deposit TCO transparent conductive layer 4 on both sides of silicon wafer 1.

[0060] Step 4: Remove the TCO in the groove of silicon wafer 1, which can be done by etching paste or laser.

[0061] The TCO etching process is as follows: First, etchant is printed onto the recesses of the light-receiving surface. The printing thickness should not exceed the recess depth, and the printing width should not exceed the recess width to prevent the etchant from spreading outwards and affecting areas that do not need etching. After printing, the etchant is dried. After drying, etchant is printed onto the recesses of the non-light-receiving surface. The printing thickness should not exceed the recess depth, and the printing width should not exceed the recess width to prevent the etchant from spreading outwards and affecting areas that do not need etching. After printing, the etchant is dried again. Finally, the dried blue film is cleaned and dried with pure water in an ultrasonic tank. Without this recessed area, the fluid etchant will extend outwards, causing excessive etching in areas that do not need etching due to the outward flow, thus reducing the transparent conductive film and affecting current collection. The process parameters are: etchant width for the light-receiving surface recesses is 0.5–3 mm, etchant width for the non-light-receiving surface recesses is 1–5 mm, thickness is 20 μm, etchant drying temperature is 150℃, drying time is 3 minutes, and cleaning time is 60 seconds.

[0062] The laser TCO removal process is as follows: Picosecond lasers are used to remove TCO from both the light-receiving and non-light-receiving surfaces. Since the substrate of the groove is etched into a flat surface using a solution, the film layers within this groove consist of a 5nm amorphous thin film, a 17nm microcrystalline thin film, and a 100nm TCO thin film. The pyramid on silicon wafer 1 has a height and depth of 1000-3000nm. When TCO is deposited on the pyramid, it exhibits an undulating pattern, similar to the pyramid itself. During laser removal, the apex of the pyramid is easily removed, while the grooves require higher laser energy. However, higher laser energy can damage the amorphous and microcrystalline films grown on the pyramid. Therefore, a mirror-like groove with 1-5nm undulations is formed in this area, effectively solving the problem of damage to the bottom amorphous and microcrystalline films during laser TCO removal due to the depth and undulation of the pyramid. The process parameters are: laser power 7%, speed 2.5m / s, and 2 laser passes.

[0063] Step 5: Silicon wafer 1 is sequentially screen printed, cured or sintered, and photo-injected or electro-injected to form the finished solar cell; Step 6: The solar cells on the light-receiving surface are sliced ​​using a non-destructive cutting laser; First, grooves are cut at both ends of the recessed area on the light-receiving surface of the solar cell. Then, thermal stress is used to split the cell in the recessed area to obtain the cells.

[0064] Step 7: Stack the finished battery cells together and perform plasma etching on the edges to remove composite centers formed by the passivation film sputtered to the battery periphery under high temperature laser, microcracks at the battery edges, burrs, etc. Process parameters: In plasma discharge etching, the ion source material is a mixture of carbon tetrafluoride and oxygen. The reaction gas volume ratio is carbon tetrafluoride:oxygen = 1:0.05~0.15. The radio frequency power is 300W, the etching time is 1 minute, the chamber pressure is 10pa, and the temperature is 60℃.

[0065] Step 8: The edges of the solar cells are passivated and protected by plasma-enhanced chemical vapor deposition of amorphous silicon film 8 and silicon nitride film 9. The amorphous silicon thin film 8 on the side was prepared using a PECVD plasma-enhanced chemical vapor deposition system, with silane and hydrogen as the source gases. The silane flow rate was 1000 sccm, and the hydrogen flow rate was 9000 sccm. The pressure inside the chamber was 100 Pa, the temperature was 160℃, and the power density of the RF power supply during deposition was 0.04 W / cm². 2 The plasma treatment time was 800 s, and the overall thickness of the passivation film was 60 nm. Amorphous silicon was deposited here. Because amorphous silicon can reduce the recombination rate on the surface of silicon wafer 1 to below 10 cm / s through hydrogen atom saturated dangling bonds, its passivation effect is significantly better than that of SiO2 (recombination rate of about 100 cm / s) and SiNx (about 50 cm / s).

[0066] The side-side silicon nitride thin film 9 was prepared using a PECVD plasma-enhanced chemical vapor deposition system. Silane and ammonia gases were introduced, with a radio frequency power of 1600W, a temperature of 150℃, a deposition time of 200s, a pressure of 1600mTorr, and a SiH4:NH3 flow ratio of 1:5-1:10. A silicon nitride thickness of 100nm and a refractive index of 1.6 were deposited on the amorphous silicon film. This silicon nitride deposition utilizes silicon nitride's excellent resistance to moisture and corrosion, protecting the amorphous silicon and the edges of the silicon wafer 1.

[0067] Step 9: Perform efficiency testing and grading on the battery cells after edge passivation is completed; Step 10: Perform module string soldering on the segmented cells; When the cells are arranged in series, such as Figure 7 As shown, the reason is that a groove with a certain width, depth and flatness is formed. This area is the stacking area of ​​the segmented battery module, which reduces the height difference of the original battery cells. Therefore, it is not easy to break during segmented stacking, and it also improves the problem of the segmented stacking area being fragile.

[0068] Step 11: Stack and laminate the serially welded segments to form a photovoltaic module.

[0069] like Figure 3-6 The technical solution of this application is clearly superior to traditional processes.

[0070] Example 2 This embodiment discloses a photovoltaic cell module and its preparation method. The only change from Embodiment 1 is the mirror groove of the segmented region 14, with a groove width of 4mm, a groove depth of 3um, and a groove substrate flatness of 2nm.

[0071] This groove can prevent the etching paste from spreading outwards, and the groove will retain the thermal effects and mechanical damage in the groove, which is conducive to removal; the groove base is set with flatness because there is no pyramid effect, the etching paste or laser can remove TCO well without affecting the microcrystalline film and amorphous film under TCO.

[0072] Example 3 This embodiment discloses a photovoltaic cell module and its preparation method. The only change from Embodiment 1 is that the spacing of the edge grid lines 10 of the cell is smaller than the spacing of the middle fine grid lines 11, and the edge grid lines 10 of the cell are unequally spaced gradient grid lines, wherein the unequal spacing gradient is smaller as it approaches the edge of the cell.

[0073] Example 4 This embodiment discloses a photovoltaic cell module and its preparation method, such as... Figure 8 As shown, the only change from Embodiment 3 is that the edge grid lines 10 of the battery cell are equidistant grid lines. The edge grid lines 10 include a short edge region 13 and a long edge region 12. The spacing of the edge grid lines 10 in the long edge region 12 is 0.5 to 1.5 mm, the spacing of the middle fine grids 11 is 0.6 to 3 mm, the width of the edge grid lines 10 in the long edge region 12 is 1 to 15 mm, and the spacing of the edge grid lines 10 in the long edge region 12 is equidistant, as is the spacing of the middle fine grids 11. The spacing of the edge grid lines 10 in the short edge region 13 is 0.5 to 1.5 mm, the spacing of the middle fine grid lines 11 is 0.6 to 3 mm, and the width of the edge grid lines 10 in the short edge region 13 extends from the edge of the battery cell to the second welding line.

[0074] Example 5 This embodiment discloses a photovoltaic cell module and its preparation method. The only change from embodiment 4 is that the width of the edge grid line 10 of the short edge region 13 is from the edge of the cell to the first welding line.

[0075] In some embodiments, the spacing of the edge grid lines 16 of the segmented region is smaller than the spacing of the edge grid lines 16 of the unsegmented region.

[0076] The above are the embodiments listed in this example. However, this example is not limited to the optional embodiments described above. Those skilled in the art can arbitrarily combine the above methods to obtain other various embodiments. Anyone can derive other various forms of embodiments based on the inspiration of this example. The above specific embodiments should not be construed as limiting the scope of protection of this example. The scope of protection of this example should be determined by the claims, and the specification can be used to interpret the claims.

Claims

1. A method for preparing a photovoltaic cell module, characterized in that: Includes the following steps, Cell fabrication: Using a half-size silicon wafer as raw material, selectively pattern and etch two grooves on the front and back sides of the texturized silicon wafer. The width of the groove on the front side is smaller than the width of the groove on the back side. Then, amorphous silicon / microcrystalline silicon thin film and transparent conductive film are deposited in sequence. The transparent conductive film in the groove is then removed. After subsequent steps, the wafers are separated to obtain the final product. Module manufacturing: When stringing battery modules, the grooved area is located below the non-grooved area of ​​another battery cell.

2. The method for preparing a photovoltaic cell module according to claim 1, characterized in that: The width of the groove on the light-receiving surface is 0.5–3 mm, the width of the groove on the non-light-receiving surface is 1–5 mm, the groove depth is 5–20 μm, and the flatness of the groove base is 1–10 nm.

3. The method for preparing a photovoltaic cell module according to claim 1, characterized in that: Using lasers to remove transparent conductive films; The process parameters for removing transparent conductive films using lasers are: laser power 7%–9%, ​​speed 1.5–2.5 m / s, and laser strikes 2–4 times.

4. The method for preparing a photovoltaic cell module according to claim 1, characterized in that: The transparent conductive film is removed by etching with a paste. The process of removing the transparent conductive film by etching with a paste is as follows: first, the etching paste is printed on the groove of the light-receiving surface, the printing thickness is not higher than the groove depth, and the printing width is not greater than the groove width. After printing, the etching paste is dried. After drying, the etching paste is printed on the non-light-receiving groove. The printing thickness is not higher than the groove depth and the printing width is not greater than the groove width. After printing, the etching paste is dried. Finally, the dried blue film is cleaned and dried with pure water in an ultrasonic tank. The process parameters are as follows: the width of the etching paste for the grooves printed on the light-receiving side is 0.5-3mm, the width of the etching paste for the grooves printed on the non-light-receiving side is 1-5mm, the thickness is 10-30um, the drying temperature of the etching paste is 140-160℃, the drying time is 1-5 minutes, and the cleaning time is 30-60s.

5. The method for preparing a photovoltaic cell module according to claim 3, characterized in that: After the segmentation is completed, the edges are protected, including plasma etching and edge passivation. The edge passivation is performed using plasma-enhanced chemical vapor deposition of side-side amorphous silicon thin films and side-side silicon nitride thin films; The amorphous silicon thin film on the side uses silane and hydrogen as source gases, with a silane flow rate of 600-1000 sccm and a hydrogen flow rate of 6000-9000 sccm. The pressure inside the chamber is 100-150 Pa, the temperature is 150-180℃, and the RF power density during deposition is 0.01-0.04 W / cm². 2 The plasma treatment time is 20-100s, and the overall thickness of the passivation film is 30-100nm. And / or the silicon nitride film uses silane and ammonia as source gases, with a radio frequency power of 1600-1900W, a temperature of 100-150℃, a deposition time of 100-200s, a pressure of 1600-1800mTorr, a SiH4:NH3 flow ratio of 1:5-1:10, and deposits silicon nitride with a thickness of 100-150nm on the amorphous silicon film, with a refractive index of 1.6-1.

9.

6. The method for preparing a photovoltaic cell module according to claim 1, characterized in that: The spacing between the edge grid lines of the battery cell is smaller than the spacing between the middle fine grid lines, and the edge grid lines include edge grid lines in the short edge region and edge grid lines in the long edge region.

7. The method for preparing a photovoltaic cell module according to claim 6, characterized in that: The edge grid lines of the battery cell are unequally spaced gradient grid lines, and the unequal spacing gradient means that the spacing becomes smaller as it gets closer to the edge of the battery cell.

8. The method for preparing a photovoltaic cell module according to claim 6, characterized in that: The edge grid lines of the battery cell are equidistant grid lines.

9. A method for preparing a photovoltaic cell module according to claim 7 or 8, characterized in that: The spacing between the edge grid lines of the battery cell is 0.5 to 1.5 mm, the spacing between the fine grid lines in the middle is 0.6 to 3 mm, and the width of the edge grid line area is 1 to 16 mm.

10. A photovoltaic cell module, characterized in that: The photovoltaic cell module is prepared using the method described in any one of claims 1-9.

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