Packaging structure, manufacturing method thereof and electronic equipment

Abstract

The invention provides a packaging structure and a manufacturing method thereof, and electronic equipment. The packaging structure comprises a substrate with a first opening and a second opening penetrating from a first surface to a second surface; the light-emitting device is at least partially located in the first opening, and the driving chip is at least partially located in the second opening; the metal layer is located on the first surface, the metal layer comprises a plurality of wires and a shielding ring surrounding the wires, the first electrode of the light-emitting device is electrically connected with the first pin of the driving chip through the wires, and the orthographic projection of the light-emitting device and the driving chip on the substrate is located in an area defined by the orthographic projection of the shielding ring on the substrate. Thus, through the arrangement of the shielding ring, an electrostatic shielding area is formed on the premise that the overall size of the packaging structure is not increased, and the circuit protection cost of the driving chip and the light-emitting device is reduced; and the light-emitting device and the driving chip are embedded in the opening of the substrate, so that the overall thickness of the packaging structure is reduced while the structural strength is not sacrificed.

Description

Technical Field

[0001] This application relates to the field of display panel technology, and more specifically, to a packaging structure and its manufacturing method, and an electronic device. Background Technology

[0002] Currently, most packaging structures for micro-light-emitting devices utilize bismaleimide-triazine resin (BT) substrates or glass substrates. These structures generally suffer from significant overall thickness and weak electrostatic discharge (ESD) resistance. To achieve higher ESD resistance, the area of ​​the driver chip needs to be increased, leading to higher costs. Furthermore, BT substrate-based processes typically involve two reflow soldering steps. The first reflow soldering step is prone to failure due to secondary heating, increasing the defect rate and impacting overall yield. Summary of the Invention

[0003] In order to at least overcome the above-mentioned shortcomings in the prior art, the purpose of this application is to provide a packaging structure, including: A substrate, the substrate including opposing first and second surfaces; the substrate including a first opening and a second opening extending from the first surface to the second surface; A light-emitting device at least partially located within the first opening and a driving chip at least partially located within the second opening; A metal layer located on the first surface includes multiple traces and a shielding ring surrounding the traces. The first electrode of the light-emitting device is electrically connected to the first pin of the driving chip through the traces. The side of the shielding ring facing the substrate is in contact with the substrate. The orthographic projections of the light-emitting device and the driving chip on the substrate are located within the area enclosed by the orthographic projection of the shielding ring on the substrate.

[0004] In one possible implementation, the side of the light-emitting device closest to the second surface protrudes relative to the second surface; The packaging structure further includes a first insulating layer located on the second surface. The first insulating layer includes a first portion and a second portion. The orthographic projection of the driving chip on the first insulating layer is located in the first portion, and the orthographic projection of the light-emitting device on the first insulating layer is located in the second portion. In the direction perpendicular to the second surface, the thickness of the second portion is less than the thickness of the first portion. Preferably, the thickness of the second portion is 1~5µm in the direction perpendicular to the substrate; Preferably, the side of the driver chip closest to the second surface is flush with the second surface.

[0005] In one possible implementation, the packaging structure further includes: A passivation layer that covers the first surface of the substrate and the sidewalls of the first opening and the second opening; A second insulating layer covers the side of the passivation layer away from the first surface and fills the gap between the light-emitting device and the passivation layer, as well as the gap between the driving chip and the passivation layer. The shielding ring contacts the substrate through a third opening that penetrates the passivation layer and the second insulating layer; Preferably, the substrate is made of silicon; Preferably, the material of the passivation layer includes silicon oxide and / or silicon nitride; Preferably, the passivation layer has a thickness of 250 nm.

[0006] In one possible implementation, the packaging structure further includes: A third insulating layer covers the plurality of the traces, the shielding ring, and the side of the second insulating layer away from the substrate; The metal layer also includes pads located on the side of the third insulating layer away from the substrate, the pads being electrically connected to the traces, the first electrode of the light-emitting device and / or the first pin of the driver chip via through-holes penetrating at least a portion of the third insulating layer.

[0007] In one possible implementation, the third insulating layer includes a first insulating layer and a second insulating layer; The first insulator layer covers the second insulating layer and the shielding ring on the side away from the substrate; The second insulator layer covers the first insulator layer and the side of the plurality of said traces away from the substrate; Preferably, the material of the first insulator layer includes silicon oxide and / or silicon nitride.

[0008] This application also provides a method for manufacturing a packaging structure, including: A substrate is provided; wherein the substrate includes opposing first surfaces and second surfaces; A first opening and a second opening penetrating the first surface are formed on the substrate; The light-emitting device and the driving chip are respectively disposed in the first opening and the second opening; A metal layer is formed on the first surface. The metal layer includes multiple traces and a shielding ring surrounding the traces. The first electrode of the light-emitting device is electrically connected to the first pin of the driving chip through the traces. The side of the shielding ring facing the substrate is in contact with the substrate. The orthographic projections of the light-emitting device and the driving chip on the substrate are located within the area enclosed by the orthographic projection of the shielding ring on the substrate. The second surface of the substrate is ground to expose the light-emitting device.

[0009] In one possible implementation, after the step of forming a first opening and a second opening through the first surface on the substrate, the method further includes: A passivation layer is formed covering the first surface of the substrate and the sidewalls of the first opening and the second opening; After the step of respectively placing the light-emitting device and the driving chip in the first opening and the second opening, the method further includes: A second insulating layer is formed by a vacuum hot pressing process. The second insulating layer covers the side of the passivation layer away from the first surface and fills the gap between the light-emitting device and the passivation layer, as well as the gap between the driving chip and the passivation layer. The shielding ring contacts the substrate through a third opening that penetrates the passivation layer and the second insulating layer.

[0010] In one possible implementation, the hardness of the light-emitting device on the side closer to the second surface is greater than the hardness of the substrate; The step of grinding the second surface of the substrate to expose the light-emitting device further includes: grinding the substrate from one side of the second surface to a predetermined thickness; wherein, when the substrate is at the predetermined thickness, the side of the light-emitting device closer to the second surface protrudes relative to the second surface; Preferably, the material of the light-emitting device near the second surface includes sapphire, and the material of the substrate includes silicon.

[0011] In one possible implementation, after grinding the second surface of the substrate to expose the light-emitting device, the method further includes: A first insulating layer is formed on one side of the second surface by a vacuum hot pressing process; Preferably, the material of the first insulating layer is a black thermosetting adhesive film.

[0012] This application also provides an electronic device, which includes any of the electronic devices described in any of the preceding claims, or the electronic device includes an electronic device made by any of the methods described in any of the preceding claims.

[0013] Compared with the prior art, this application has the following beneficial effects: This application creates an electrostatic shielding area by setting a shielding ring, without increasing the overall size of the packaging structure. This reduces the circuit protection cost for the driver chip and light-emitting device, and improves the reliability and lifespan of the packaging structure. Furthermore, by embedding the light-emitting device and driver chip in the opening of the substrate, the overall thickness of the packaging structure is reduced without sacrificing structural strength, thereby enhancing the market competitiveness of the packaging structure. Attached Figure Description

[0014] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings required in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0015] Figure 1 This is one of the structural diagrams of the packaging structure provided in this embodiment; Figure 2 This is a top view of the packaging structure provided in this embodiment; Figure 3 This is the second schematic diagram of the packaging structure provided in this embodiment; Figure 4 This is the third schematic diagram of the packaging structure provided in this embodiment; Figure 5 This is the fourth schematic diagram of the packaging structure provided in this embodiment; Figure 6 This is the fifth schematic diagram of the packaging structure provided in this embodiment; Figure 7 This is a flowchart illustrating the method for fabricating the packaging structure provided in this embodiment; Figures 8(a)-8(d) This is a schematic diagram of the process structure for fabricating the packaging structure provided in this embodiment.

[0016] Icons: Package structure - 10; Substrate - 100; First surface - 101; Second surface - 102; First opening - 110; Second opening - 120; Light-emitting device - 210; Driver chip - 220; Metal layer - 300; Trace - 310; Shielding ring - 320; First insulating layer - 400; First part - 410; Second part - 420; Passivation layer - 500; Second insulating layer - 600; Third opening - 510; Third insulating layer - 700; Pad - 330; Through hole - 501; First insulator layer - 710; Second insulator layer - 720; First light-emitting device - 211; Second light-emitting device - 212; Third light-emitting device - 213; First pad - 331; Second pad - 332; Third pad - 333; Fourth pad - 334; Metal layer window - 301; Thickness of the second part - H. Detailed Implementation

[0017] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0018] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0019] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0020] In the description of this application, it should be noted that the terms "upper," "lower," etc., indicating the orientation or positional relationship are based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product is in use. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on this application. In addition, the terms "first," "second," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0021] Furthermore, terms such as "horizontal," "vertical," and "sag" do not imply that components must be absolutely horizontal or suspended, but rather that they can be slightly tilted. For example, "horizontal" simply means that its direction is more horizontal relative to "vertical," and does not mean that the structure must be completely horizontal, but can be slightly tilted.

[0022] In the description of this application, it should also be noted that, unless otherwise expressly specified and limited, the terms "set up," "install," "connect," and "link" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0023] It should be noted that, where there is no conflict, different features in the embodiments of this application can be combined with each other.

[0024] The inventors discovered that, in order to achieve electrostatic shielding for light-emitting devices and driver chips, extend the lifespan of the packaging structure, and improve the reliability of electronic devices using this packaging structure, electrostatic protection circuits can be incorporated into the driver chip in related technologies. However, designing electrostatic protection circuits on the driver chip increases the cost and overall size of the packaging structure, making it unsuitable for applications with stringent size requirements.

[0025] This application provides a packaging structure 10, please refer to... Figure 1 It includes a substrate 100, a light-emitting device 210, a driver chip 220, and a metal layer 300.

[0026] The substrate 100 includes a first surface 101 and a second surface 102 opposite to each other, and a first opening 110 and a second opening 120 extending from the first surface 101 to the second surface 102.

[0027] Optionally, the substrate 100 may be made of silicon.

[0028] In this embodiment, the first opening 110 and the second opening 120 are used to accommodate the light-emitting device 210 and the driving chip 220.

[0029] The light-emitting device 210 is at least partially located within the first opening 110, and the driving chip 220 is at least partially located within the second opening 120.

[0030] For example, the light-emitting device 210 includes a body, a first electrode, and a second electrode. The body, first electrode, and second electrode of the light-emitting device 210 are all located inside the first opening 110; or, the body of the light-emitting device 210 is located inside the first opening 110, while the first electrode and second electrode may be located outside the first opening 110; or, a portion of the body of the light-emitting device 210 is located inside the first opening 110, while the first electrode, second electrode, and another portion of the body of the light-emitting device 210 are located outside the first opening 110.

[0031] Optionally, the light-emitting device 210 can be a pre-packaged light-emitting structure with pins, and each light-emitting device 210 can emit one of red light, green light and blue light.

[0032] The driver chip 220 is used to drive at least one light-emitting device 210 to emit light.

[0033] In this embodiment, in order to reduce the overall thickness of the packaging structure 10 and make it suitable for electronic devices with high requirements for the thickness of the packaging structure 10, a first opening 110 and a second opening 120 that fit the size of the light-emitting device 210 and the driving chip 220 can be formed on the substrate 100, respectively. In this way, the market competitiveness of this packaging structure 10 is improved.

[0034] For example, the size of the first opening 110 corresponding to the light-emitting device 210 can be 85*160*70um.

[0035] The metal layer 300 is located on the first surface 101 and includes multiple traces 310. The first electrode of the light-emitting device 210 is electrically connected to the first pin of the driver chip 220 through the traces 310.

[0036] In this embodiment, the metal layer 300 is made of a conductive material. For example, the metal layer 300 may be made of copper.

[0037] In this embodiment, the first pin of the driver chip 220 is electrically connected to the first electrode of the light-emitting device 210 via the trace 310, thereby driving the light-emitting device 210 to emit light. For example, please refer to... Figure 2 This embodiment includes three light-emitting devices 210, which can emit red, blue, and green light respectively under the drive of the driver chip 220. The first pin of the driver chip 220 is electrically connected to at least the first electrode of each of the three light-emitting devices 210 to receive an independent driving voltage from the driver chip 220. Simultaneously, the second electrodes of the three light-emitting devices 210 and the driver chip 220 are connected to the same pad 330 to receive a common voltage (VCC). Thus, the driver chip 220 can achieve individual driving of each light-emitting device 210.

[0038] The metal layer 300 also includes a shielding ring 320, the side of the shielding ring 320 facing the substrate 100 contacting the substrate 100. (See attached image.) Figure 2 The orthographic projection of the light-emitting device 210 and the driving chip 220 on the substrate 100 is located within the area enclosed by the orthographic projection of the shielding ring 320 on the substrate 100.

[0039] When the conductive shielding ring 320 comes into direct contact with the substrate 100, an electrical connection can be formed at the contact point, thereby creating an equipotential body when the substrate 100 is subsequently grounded. For example, when the conductive shielding ring 320 comes into contact with the silicon substrate 100, a continuous conductive path is formed from the contact point to the grounding point. In this way, electric field lines generated by external interference electric fields or electrostatic charges will be forced to terminate when they reach the surface of the shielding ring 320, and will not be able to continue to penetrate into the internal circuit area surrounded by the shielding ring 320; at the same time, the large current generated by electrostatic discharge will also preferentially be discharged through this low-impedance grounding path, thereby protecting the internal devices.

[0040] Therefore, in this embodiment, by providing a shielding ring 320 on the packaging structure 10, electrostatic shielding is achieved for the electronic components within the packaging structure 10. This ensures the electrical independence and operational stability of each packaging structure 10, thereby improving the reliability of electronic devices using the packaging structure 10.

[0041] It is worth mentioning that in related technologies, the size of the driver chip after designing an electrostatic protection circuit is approximately 400*400um, while the size of the driver chip 220 without electrostatic protection is only 130*130um. The packaging structure 10 in this embodiment reduces the size while achieving electrostatic shielding.

[0042] Optionally, the traces 310 and shielding ring 320 in this embodiment can be fabricated in the same process, thereby reducing the cost of electrostatic shielding protection for the package structure 10.

[0043] In one possible implementation, please refer to Figure 3 The side of the light-emitting device 210 closest to the second surface 102 protrudes from the second surface 102.

[0044] In this embodiment, the sapphire substrate of the light-emitting device 210 is disposed on one side near the second surface 102 of the substrate 100, and serves as the light-emitting surface.

[0045] The packaging structure 10 also includes a first insulating layer 400 located on the second surface 102. The first insulating layer 400 includes a first portion 410 and a second portion 420. The orthographic projection of the driver chip 220 on the first insulating layer 400 is located in the first portion 410, and the orthographic projection of the light-emitting device 210 on the first insulating layer 400 is located in the second portion 420. In the direction perpendicular to the second surface 102, the thickness H of the second portion 420 is less than the thickness of the first portion 410.

[0046] To reduce reflections in non-light-emitting areas and absorb stray light, thereby improving the display contrast of the light-emitting device 210, a first insulating layer 400 is formed on the second surface 102 of the substrate 100 in this embodiment. The first insulating layer 400 is made of a material with low light transmittance.

[0047] For example, the material of the first insulating layer 400 is a black film.

[0048] Meanwhile, in order to reduce the impact of the first insulating layer 400 on the light efficiency of the light-emitting device 210, in this embodiment, the thickness of the second part 420 corresponding to the light-emitting device 210 is relatively small.

[0049] Optionally, the thickness H of the second portion 420 in the direction perpendicular to the substrate 100 is 1~5 μm. At this thickness, the effect of the first insulating layer 400 covering the light-emitting device 210 on the luminous efficacy is negligible.

[0050] Meanwhile, in this embodiment, the thickness difference between the first part 410 and the second part 420 can be 10 μm, that is, when the thickness H of the second part 420 is 1~5 μm, the thickness of the first part 410 is 11~15 μm.

[0051] Thus, the thicker first portion 410 of the first insulating layer 400 has a stronger ability to absorb stray light, which can effectively improve the display contrast of the encapsulation structure 10; although the second portion 420 is located on one side of the light-emitting surface of the light-emitting device 210, its thickness is extremely small and will not affect the light efficiency of the light-emitting side.

[0052] It should be noted that, depending on the specific dimensions of the packaging structure 10 and the light-emitting capability of the light-emitting device 210, the specific thicknesses of the first part 410 and the second part 420 can be set to other values, and no specific limitation is made here.

[0053] Optionally, the side of the driver chip 220 closest to the second surface 102 is flush with the second surface 102.

[0054] Before fabricating the first insulating layer 400 in this embodiment, the substrate 100 and the driver chip 220 need to be polished. The material of the driver chip 220 near the second surface 102 has the same hardness as the material of the substrate 100. Therefore, after polishing, the driver chip 220 is flush with the second surface 102.

[0055] In one possible implementation, please refer to Figure 4 The encapsulation structure 10 also includes a passivation layer 500 and a second insulating layer 600.

[0056] The passivation layer 500 covers the first surface 101 of the substrate 100 and the sidewalls of the first opening 110 and the second opening 120.

[0057] In this embodiment, the passivation layer 500 can form a dense insulating medium on the first surface 101 of the substrate 100, thereby providing uniform and stable electrical isolation and physical protection for the light-emitting device 210 and the driving chip 220 mounted in the first opening 110 and the second opening 120 in subsequent processes.

[0058] The second insulating layer 600 covers the side of the passivation layer 500 away from the first surface 101 and fills the gap between the light-emitting device 210 and the passivation layer 500, as well as the gap between the driver chip 220 and the passivation layer 500.

[0059] In this embodiment, the second insulating layer 600 can flow and fill the gaps between the light-emitting device 210 and the passivation layer 500, as well as the gaps between the driver chip 220 and the passivation layer 500. After curing, it achieves planarization and simultaneously buffers and releases the mechanical stress generated between the light-emitting device 210 and the driver chip 220 and the substrate 100 due to the difference in their coefficients of thermal expansion. This prevents damage to the light-emitting device 210 and the driver chip 220 or breakage of their connections, thus improving the reliability of the packaging structure 10. Furthermore, the second insulating layer 600 provides a flat substrate for the metal layer 300 fabricated on top of it.

[0060] Optionally, the material of the second insulating layer 600 is polyimide.

[0061] The shielding ring 320 contacts the substrate 100 through a third opening 510 that penetrates the passivation layer 500 and the second insulating layer 600.

[0062] In this embodiment, the conductive shielding ring 320, after making direct contact with the substrate 100 through the third opening 510, can be grounded during subsequent use, thus becoming an equipotential body. External interference electric fields or electric field lines generated by electrostatic charges cannot penetrate further into the internal circuit area surrounded by the shielding ring 320, and the large current generated by electrostatic discharge will preferentially be discharged through this grounding path, thereby protecting the light-emitting device 210 and the driver chip 220.

[0063] Optionally, the substrate 100 may be made of silicon.

[0064] Thus, the shielding ring 320, which is in direct contact with the substrate 100, can achieve electrostatic shielding.

[0065] Optionally, the passivation layer 500 may be made of silicon oxide and / or silicon nitride, which may form a dense insulating layer on the substrate 100.

[0066] For example, the material of the passivation layer 500 includes a composite layer formed by a silicon oxide layer and a silicon nitride layer.

[0067] Optionally, the passivation layer 500 has a thickness of 250 nm. This can be set by technicians based on the design requirements and experience of the packaging structure 10; no specific limitations are specified here.

[0068] In one possible implementation, please refer to Figure 5 The package structure 10 also includes a third insulating layer 700, which covers multiple traces 310, a shielding ring 320, and the side of the second insulating layer 600 away from the substrate 100.

[0069] In this embodiment, a third insulating layer 700 is provided to protect and planarize the entire packaging structure 10.

[0070] Alternatively, the material of the third insulating layer 700 may be polyimide.

[0071] The metal layer 300 also includes a pad 330 located on the side of the third insulating layer 700 away from the substrate 100. The pad 330 is electrically connected to the trace 310, the second electrode of the light-emitting device 210 and / or the second pin of the driver chip 220 through a through hole 501 that penetrates at least part of the third insulating layer 700.

[0072] In this embodiment, one end of the pad 330 is electrically connected to the light-emitting device 210 and / or the driver chip 220, and the other end is exposed to the third insulating layer 700, thereby connecting the package structure 10 in this embodiment to external devices or circuits.

[0073] For example, please refer to Figure 2The package structure 10 in this embodiment includes a first light-emitting device 211, a second light-emitting device 212, and a third light-emitting device 213, wherein the first light-emitting device 211, the second light-emitting device 212, and the third light-emitting device 213 are used to emit red light, green light, and blue light, respectively. The package structure 10 also includes a first pad 331, a second pad 332, a third pad 333, and a fourth pad 334. Each light-emitting device 210 is provided with a first electrode (such as a cathode) and a second electrode (such as an anode). The second electrodes of all light-emitting devices 210 are connected to the first pad 331 to access the anode common voltage (VDD). The first electrodes of the first light-emitting device 211, the second light-emitting device 212, and the third light-emitting device 213 are electrically connected to the first pins of the three independent constant current outputs of the driver chip 220. The driver chip 220 is provided with multiple second pins. The second pin corresponding to the positive power supply (VDD) is connected to the first pad 331, and the second pin corresponding to the negative power supply (GND) is connected to the fourth pad 334. The second pin corresponding to the serial data input of the driver chip 220 is connected to the second pad 332 for receiving serial control signals; the second pin corresponding to the serial data output is connected to the third pad 333 for transmitting control signals. The driver chip 220 operates after the positive power supply (VDD) and negative power supply (GND) are connected. Based on the received serial control signals, it controls the current path from the first pin to the negative power supply to achieve independent addressing and brightness control of the corresponding light-emitting device 210.

[0074] In one possible implementation, please refer to Figure 6 The third insulating layer 700 includes a first insulating layer 710 and a second insulating layer 720.

[0075] It should be understood that the second insulator layer 720 is generally a polymer layer, which simultaneously performs the functions of insulation, sealing, protection, and planarization. For example, polyimide is used as the material for the second insulator layer 720. However, this material is soft and easily absorbs moisture, and cannot effectively block water vapor and contaminants. If the insulating second insulator layer 720 is formed directly on the conductive shielding ring 320 side, it will cause the shielding ring 320 to be corroded, reducing or eliminating the electrostatic shielding capability of the shielding ring 320, thereby reducing the reliability and lifespan of the encapsulation structure 10.

[0076] Therefore, in this embodiment, at least a first insulator layer 710 is provided between the shielding ring 320 and the second insulator layer 720 to protect the shielding ring 320.

[0077] The first insulator layer 710 covers the second insulating layer 600 and the shielding ring 320 on the side away from the substrate 100.

[0078] Thus, the first insulator layer 710 can provide the second insulation layer 600 and the shielding ring 320 with high-hardness mechanical protection, moisture-proof sealing and ion blocking, thereby improving the reliability of the encapsulation structure 10.

[0079] Optionally, the material of the first insulator layer 710 includes silicon oxide and / or silicon nitride.

[0080] For example, in this embodiment, the first insulator layer 710 can be a composite layer formed of a silicon oxide layer, a silicon nitride layer, and a silicon oxide layer. This composite layer has high hardness and good insulation performance, and can provide mechanical protection and ion blocking for the shielding ring 320.

[0081] The second insulator layer 720 covers the first insulator layer 710 and the side of the multiple traces 310 away from the substrate 100.

[0082] In this way, stress buffering and planarization of the entire packaging structure 10 can be achieved.

[0083] This application also provides a method for manufacturing the packaging structure 10, please refer to... Figure 7 This includes the following steps.

[0084] Step S11, please refer to FIG8(a), a substrate 100 is provided; wherein the substrate 100 includes a first surface 101 and a second surface 102 opposite to each other.

[0085] Optionally, the substrate 100 is made of silicon.

[0086] Step S12, please refer to Figure 8(a), a first opening 110 and a second opening 120 are formed on the substrate 100, penetrating the first surface 101.

[0087] In this embodiment, in order to reduce the overall thickness of the packaging structure 10 and make it suitable for electronic devices with high thickness requirements for the packaging structure 10, a first opening 110 and a second opening 120 that fit the size of the light-emitting device 210 and the driving chip 220 can be formed on the substrate 100, respectively. This improves the market competitiveness of the packaging structure 10.

[0088] Step S13, please refer to Figure 8(a), and place the light-emitting device 210 and the driving chip 220 in the first opening 110 and the second opening 120 respectively.

[0089] Optionally, the light-emitting device 210 and the driving chip 220 can be bonded to the first opening 110 and the second opening 120 respectively by means of a chip bonding film or a die-bonding film.

[0090] Step S14, please refer to Figure 8(b), a metal layer 300 is formed on the first surface 101. The metal layer 300 includes multiple traces 310 and a shielding ring 320 surrounding the traces 310. The first electrode of the light-emitting device 210 is electrically connected to the first pin of the driving chip 220 through the traces 310. The side of the shielding ring 320 facing the substrate 100 is in contact with the substrate 100. The orthographic projections of the light-emitting device 210 and the driving chip 220 on the substrate 100 are located within the area enclosed by the orthographic projection of the shielding ring 320 on the substrate 100.

[0091] In this embodiment, by providing a shielding ring 320 that is in direct contact with the substrate 100, grounding can be achieved during subsequent use of the package structure 10, thereby becoming an equipotential body and forming an electrostatic shield to protect the light-emitting device 210 and the driver chip 220. This ensures the electrical independence and operational stability of each package structure 10, thereby improving the reliability of electronic devices using the package structure 10.

[0092] Step S15, please refer to Figure 8(d), polish the second surface 102 of the substrate 100 to expose the light-emitting device 210.

[0093] In this embodiment, the light-emitting surface of the light-emitting device 210 faces the second surface 102, therefore the second surface 102 of the substrate 100 needs to be polished to expose the light-emitting device 210. At the same time, polishing the second surface 102 of the substrate 100 can reduce the thickness of the packaging structure 10 without reducing its structural strength, thereby improving product competitiveness.

[0094] Thus, by setting the shielding ring 320, an electrostatic shielding area is formed without increasing the overall size of the package structure 10, reducing the circuit protection cost for the driver chip 220 and the light-emitting device 210, and improving the reliability and lifespan of the package structure 10 made by this method; and by embedding the light-emitting device 210 and the driver chip 220 in the first opening 110 and the second opening 120 of the substrate 100, the overall thickness of the package structure 10 is reduced without sacrificing structural strength, thereby improving the market competitiveness of the package structure 10 made by this method.

[0095] Furthermore, it should be noted that after step S15, the final wafer needs to be diced to divide it into individual chip package structures 10. For example, each package structure 10 includes a first light-emitting device 211, a second light-emitting device 212, and a third light-emitting device 213 for emitting red, green, and blue light, respectively. The driving chip 220 is electrically connected to the first light-emitting device 211, the second light-emitting device 212, and the third light-emitting device 213 via traces 310 to individually drive the three light-emitting devices 210 to emit light.

[0096] In one possible implementation, after step S12, the method of fabricating the package structure 10 further includes step S16, referring to FIG8(a), forming a passivation layer 500 covering the sidewalls of the first surface 101, the first opening 110, and the second opening 120 of the substrate 100.

[0097] Optionally, a passivation layer 500 can be formed on the first surface 101 and the sidewalls of the first opening 110 and the second opening 120 of the substrate 100 by chemical vapor deposition. The material of the passivation layer 500 can be silicon oxide and / or silicon nitride, thereby forming a dense insulating layer on the surface of the substrate 100, providing uniform and stable electrical isolation and physical protection for the light-emitting device 210 and the driver chip 220 mounted in the first opening 110 and the second opening 120 in subsequent processes.

[0098] After step S13, the method for manufacturing the packaging structure 10 further includes the following steps.

[0099] Step S17, please refer to Figure 8(a), a second insulating layer 600 is formed by vacuum hot pressing process. The second insulating layer 600 covers the side of the passivation layer 500 away from the first surface 101 and fills the gap between the light-emitting device 210 and the passivation layer 500 and the gap between the driving chip 220 and the passivation layer 500.

[0100] Optionally, the second insulating layer 600 can be formed by a vacuum hot pressing process. During the hot pressing process, the thermosetting adhesive film corresponding to the second insulating layer 600 changes from solid to liquid and fills the gap between the light-emitting device 210, the driver chip 220, and the passivation layer 500. After curing, the second insulating layer 600 is formed. After curing, the second insulating layer 600 achieves planarization and buffers and releases the mechanical stress caused by the difference in thermal expansion coefficients between the light-emitting device 210 and the driver chip 220 and the substrate 100, thereby improving the reliability of the packaging structure 10.

[0101] The shielding ring 320 contacts the substrate 100 through a third opening 510 that penetrates the passivation layer 500 and the second insulating layer 600.

[0102] Specifically, after step 17, step S18 is also included. Referring to Figure 8(b), a portion of the second insulating layer 600 and the passivation layer 500 are etched to expose the second electrode of the light-emitting device 210 and the second pin of the driving chip 220 in the second insulating layer 600, and a third opening 510 is formed. The third opening 510 is used to make the shielding ring 320 contact the substrate 100.

[0103] Optionally, the third opening 510 can be formed by laser drilling.

[0104] Thus, by openings in the second insulating layer 600 and the passivation layer 500, the electrodes of the light-emitting device 210, the pins of the driving chip 220, and the portion of the substrate 100 that is in direct contact with the shielding ring 320 are exposed. This defines the positions where the first electrode and the second electrode on the light-emitting device 210 and the first pin and the second pin on the driving chip 220 are electrically connected to the trace 310, etc., thereby enabling high-precision electrical interconnection based on these positions in subsequent processes.

[0105] Optionally, step S14 may include the following sub-steps.

[0106] A seed layer is deposited on the side of the second insulating layer 600 away from the substrate 100, and on the side of the substrate 100 exposed by the second insulating layer 600, including the first electrode of the light-emitting device 210, the first pin of the driving chip 220, and the portion of the substrate 100 in contact with the shielding ring 320.

[0107] For example, each light-emitting device 210 is provided with a first electrode (such as a cathode) and a second electrode (such as an anode).

[0108] Optionally, the seed layer may be made of copper.

[0109] A photoresist layer is coated on one side of the seed layer.

[0110] In this embodiment, a metal layer window 301 is formed by a photoresist layer to enable subsequent electroplating based on the seed layer.

[0111] The pattern of the metal layer 300 is transferred to the photoresist layer to form the metal layer window 301.

[0112] Specifically, the metal layer window 301 can be formed by developing, exposing, or other methods based on a pre-designed mask corresponding to the metal layer 300.

[0113] Electroplating is performed within the metal layer window 301 based on the seed layer to form at least the trace 310 and the shielding ring 320 in the metal layer 300.

[0114] Optionally, the metal layer 300 may be made of copper.

[0115] Remove the photoresist layer.

[0116] It should be noted that after removing the photoresist layer, the seed layer corresponding to the photoresist layer also needs to be etched away by a wet etching process to achieve electrical insulation between multiple traces 310 and shielding rings 320.

[0117] Optionally, in order to at least achieve electrical connection between the package structure 10 and other external devices, the metal layer 300 further includes a pad 330, which includes a third portion and a fourth portion. The fourth portion has a thickness of 20 μm in the direction perpendicular to the substrate.

[0118] In this embodiment, the third and fourth portions of the pad 330 can be formed through two different steps.

[0119] Referring to Figure 8(b), step S14 further includes electroplating based on the seed layer within the metal layer window 301 to form a third portion of the pad 330 in the metal layer 300.

[0120] After step S14, please refer to Figure 8(c). The method for manufacturing the package structure 10 also includes the following steps.

[0121] A third insulating layer 700 is formed on the side of the second insulating layer 600 and the metal layer 300 away from the substrate 100.

[0122] The third insulating layer 700 can be used to achieve electrical isolation and planarization of the traces 310 and shielding ring 320 in the metal layer 300, while protecting the light-emitting device 210 and the driver chip 220.

[0123] A through-hole 501 is formed on the third insulating layer 700, exposing at least a third portion.

[0124] Optionally, in this embodiment, the via 501 exposes at least one end of the third portion away from the substrate 100, so that a fourth portion can be formed in the via 501 based on the third portion.

[0125] Electroplating is performed within the via 501 based on the third portion to form the fourth portion of the pad 330. The pad 330 is electrically connected to the trace 310, the first electrode of the light-emitting device 210 and / or the first pin of the driver chip 220 via the via 501 that penetrates at least part of the third insulating layer 700.

[0126] After the fourth part is formed, a composite metal layer of copper, nickel and gold can be formed on the side of the fourth part away from the substrate 100 to enable soldering or wire bonding of the pad 330 to other components.

[0127] For example, please refer to Figure 2The package structure 10 formed by the manufacturing method in this embodiment includes a first light-emitting device 211, a second light-emitting device 212, and a third light-emitting device 213, wherein the first light-emitting device 211, the second light-emitting device 212, and the third light-emitting device 213 are used to emit red light, green light, and blue light, respectively. The package structure 10 also includes a first pad 331, a second pad 332, a third pad 333, and a fourth pad 334. Each light-emitting device 210 is provided with a first electrode (such as a cathode) and a second electrode (such as an anode). The second electrodes of all light-emitting devices 210 are connected to the first pad 331 to connect to the anode common voltage (VDD). The first electrodes of the first light-emitting device 211, the second light-emitting device 212, and the third light-emitting device 213 are electrically connected to the first pins of the three independent constant current outputs of the driver chip 220. The driver chip 220 is provided with multiple second pins. The second pin corresponding to the positive power supply (VDD) is connected to the first pad 331, and the second pin corresponding to the negative power supply (GND) is connected to the fourth pad 334. The second pin corresponding to the serial data input of the driver chip 220 is connected to the second pad 332 for receiving serial control signals; the second pin corresponding to the serial data output is connected to the third pad 333 for transmitting control signals. The driver chip 220 operates after the positive power supply (VDD) and negative power supply (GND) are connected. Based on the received serial control signals, it controls the current path from the first pin to the negative power supply to achieve independent addressing and brightness control of the corresponding light-emitting device 210.

[0128] In one possible implementation, the hardness of the light-emitting device 210 near the second surface 102 is greater than the hardness of the substrate 100. Step S15 further includes: grinding the substrate 100 to a set thickness from one side of the second surface with a set pressure. Grinding the substrate 100 to a set thickness from one side of the second surface 102; wherein, when the substrate 100 is at the set thickness, the side of the light-emitting device 210 near the second surface 102 protrudes relative to the second surface 102.

[0129] Optionally, the material of the light-emitting device 210 near the second surface 102 includes sapphire, and the material of the substrate 100 includes silicon.

[0130] In this embodiment, since the side of the light-emitting device 210 closest to the second surface 102 is a sapphire substrate with relatively high hardness, while the silicon substrate 100 has relatively low hardness, the material removal rate of the side of the light-emitting device 210 closest to the second surface 102 is slower, while the material removal rate of the substrate 100 is faster. Under uniform grinding pressure and conditions in this embodiment, the grinding process continues until the substrate 100 is thinned to a set thickness, exposing the light-emitting device 210. Due to the difference in hardness between the light-emitting device 210 and the substrate 100, the light-emitting device 210 protrudes from the second surface 102 of the substrate 100 after grinding.

[0131] Optionally, the hardness of the substrate 100 is similar to that of the side of the driver chip 220 near the second surface 102. Therefore, after grinding, the end of the driver chip 220 away from the metal layer 300 is flush with the substrate 100, and the light-emitting device 210 protrudes from the substrate 100 and the driver chip 220.

[0132] In one possible implementation, after step S15, referring to Figure 8(d), the method for manufacturing the package structure 10 further includes step S19, forming a first insulating layer 400 on one side of the second surface 102 by a vacuum hot pressing process.

[0133] Optionally, the first insulating layer 400 may include a first portion 410 and a second portion 420. The orthographic projection of the substrate 100 and the driving chip 220 onto the first insulating layer 400 is located in the first portion 410, and the orthographic projection of the light-emitting device 210 onto the first insulating layer 400 is located in the second portion 420. The thickness of the first portion 410 is greater than the thickness of the second portion 420. Thus, the extremely thin second portion of the first insulating layer 400 will not affect the luminous efficiency of the light-emitting device 210.

[0134] Specifically, firstly, the film layer corresponding to the first insulating layer 400 is attached and aligned with the substrate 100. Then, in a vacuum environment, the substrate 100, the driving chip 220 and the raised light-emitting device 210 are pressed together with the film layer at a set temperature and a set pressure. At this temperature, the film layer softens and flows. Finally, after curing, the first insulating layer 400 that fits the shape of the second surface 102 is formed.

[0135] Optionally, the first insulating layer 400 is made of a black thermosetting adhesive film. The black thermosetting adhesive film, with its low light transmittance, can improve the contrast of the light-emitting device 210 when it emits light, thereby enhancing the display effect.

[0136] Based on the same inventive concept, this application also provides an electronic device, which includes the encapsulation structure 10 of any of the foregoing claims, or the electronic device includes the encapsulation structure 10 manufactured by any of the foregoing display panel manufacturing methods. Because the aforementioned encapsulation structure 10 forms an electrostatic shielding area without increasing the overall size of the encapsulation structure 10 by providing a shielding ring 320, it reduces the circuit protection cost for the driver chip 220 and the light-emitting device 210, and improves the reliability and lifespan of the encapsulation structure 10; and by embedding the light-emitting device 210 and the driver chip 220 within the opening of the substrate 100, it reduces the overall thickness of the encapsulation structure 10 without sacrificing structural strength; thereby improving the market competitiveness of the electronic device using the aforementioned encapsulation structure 10.

[0137] In summary, this application provides a packaging structure 10 and its manufacturing method, as well as an electronic device. The packaging structure 10 includes a substrate 100 having a first opening 110 and a second opening 120 extending from a first surface 101 to a second surface 102; a light-emitting device 210 at least partially located within the first opening 110 and a driving chip 220 at least partially located within the second opening 120; a metal layer 300 located on the first surface 101, the metal layer 300 including multiple traces 310 and a shielding ring 320 surrounding the traces 310; the first electrode of the light-emitting device 210 is electrically connected to the first pin of the driving chip 220 through the traces 310; the orthographic projection of the light-emitting device 210 and the driving chip 220 on the substrate 100 is located within the area enclosed by the orthographic projection of the shielding ring 320 on the substrate 100. Thus, by setting the shielding ring 320, an electrostatic shielding area is formed without increasing the overall size of the packaging structure 10, reducing the circuit protection cost for the driver chip 220 and the light-emitting device 210, and improving the reliability and lifespan of the packaging structure 10; and by embedding the light-emitting device 210 and the driver chip 220 in the opening of the substrate 100, the overall thickness of the packaging structure 10 is reduced without sacrificing structural strength, thereby improving the market competitiveness of the packaging structure 10.

[0138] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0139] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A packaging structure, characterized in that, include: A substrate, the substrate including opposing first and second surfaces; the substrate including a first opening and a second opening extending from the first surface to the second surface; A light-emitting device at least partially located within the first opening and a driving chip at least partially located within the second opening; A metal layer located on the first surface includes multiple traces and a shielding ring surrounding the traces. The first electrode of the light-emitting device is electrically connected to the first pin of the driving chip through the traces. The side of the shielding ring facing the substrate is in contact with the substrate. The orthographic projections of the light-emitting device and the driving chip on the substrate are located within the area enclosed by the orthographic projection of the shielding ring on the substrate.

2. The packaging structure according to claim 1, characterized in that, The side of the light-emitting device closest to the second surface protrudes relative to the second surface; The packaging structure further includes a first insulating layer located on the second surface. The first insulating layer includes a first portion and a second portion. The orthographic projection of the driving chip on the first insulating layer is located in the first portion, and the orthographic projection of the light-emitting device on the first insulating layer is located in the second portion. In the direction perpendicular to the second surface, the thickness of the second portion is less than the thickness of the first portion. Preferably, the thickness of the second portion is 1~5µm in the direction perpendicular to the substrate; Preferably, the side of the driver chip closest to the second surface is flush with the second surface.

3. The packaging structure according to claim 1, characterized in that, The packaging structure further includes: A passivation layer that covers the first surface of the substrate and the sidewalls of the first opening and the second opening; A second insulating layer covers the side of the passivation layer away from the first surface and fills the gap between the light-emitting device and the passivation layer, as well as the gap between the driving chip and the passivation layer. The shielding ring contacts the substrate through a third opening that penetrates the passivation layer and the second insulating layer; Preferably, the substrate is made of silicon; Preferably, the material of the passivation layer includes silicon oxide and / or silicon nitride; Preferably, the passivation layer has a thickness of 250 nm.

4. The packaging structure according to claim 3, characterized in that, The packaging structure further includes: A third insulating layer covers the plurality of the traces, the shielding ring, and the side of the second insulating layer away from the substrate; The metal layer also includes pads located on the side of the third insulating layer away from the substrate, the pads being electrically connected to the traces, the second electrode of the light-emitting device and / or the second pin of the driver chip via through-holes penetrating at least a portion of the third insulating layer.

5. The packaging structure according to claim 4, characterized in that, The third insulating layer includes a first insulating layer and a second insulating layer; The first insulator layer covers the second insulating layer and the shielding ring on the side away from the substrate; The second insulator layer covers the first insulator layer and the side of the plurality of said traces away from the substrate; Preferably, the material of the first insulator layer includes silicon oxide and / or silicon nitride.

6. A method for manufacturing an encapsulation structure, characterized in that, include: A substrate is provided; wherein the substrate includes opposing first surfaces and second surfaces; A first opening and a second opening penetrating the first surface are formed on the substrate; The light-emitting device and the driving chip are respectively disposed in the first opening and the second opening; A metal layer is formed on the first surface. The metal layer includes multiple traces and a shielding ring surrounding the traces. The first electrode of the light-emitting device is electrically connected to the first pin of the driving chip through the traces. The side of the shielding ring facing the substrate is in contact with the substrate. The orthographic projections of the light-emitting device and the driving chip on the substrate are located within the area enclosed by the orthographic projection of the shielding ring on the substrate. The second surface of the substrate is ground to expose the light-emitting device.

7. The method according to claim 6, characterized in that, After the step of forming the first opening and the second opening through the first surface on the substrate, the method further includes: A passivation layer is formed covering the first surface of the substrate and the sidewalls of the first opening and the second opening; After the step of respectively placing the light-emitting device and the driving chip in the first opening and the second opening, the method further includes: A second insulating layer is formed by a vacuum hot pressing process. The second insulating layer covers the side of the passivation layer away from the first surface and fills the gap between the light-emitting device and the passivation layer, as well as the gap between the driving chip and the passivation layer. The shielding ring contacts the substrate through a third opening that penetrates the passivation layer and the second insulating layer.

8. The method according to claim 6, characterized in that, The hardness of the light-emitting device on the side closer to the second surface is greater than the hardness of the substrate; The step of grinding the second surface of the substrate to expose the light-emitting device further includes: grinding the substrate from one side of the second surface to a predetermined thickness; wherein, when the substrate is at the predetermined thickness, the side of the light-emitting device closer to the second surface protrudes relative to the second surface; Preferably, the material of the light-emitting device near the second surface includes sapphire, and the material of the substrate includes silicon.

9. The method according to claim 6, characterized in that, After grinding the second surface of the substrate to expose the light-emitting device, the method further includes: A first insulating layer is formed on one side of the second surface by a vacuum hot pressing process; Preferably, the material of the first insulating layer is a black thermosetting adhesive film.

10. An electronic device, characterized in that, Includes the packaging structure according to any one of claims 1-5, or a packaging structure made by the method of manufacturing the packaging structure according to any one of claims 6-9.

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