Band-gap reference circuit and reference voltage source device

Abstract

The invention provides a band-gap reference circuit and a reference voltage source device, and relates to the technical field of integrated circuits. The band-gap reference circuit comprises a temperature compensation module and a band-gap reference voltage generation module; the temperature compensation module comprises a plurality of bias units and a plurality of adjusting tubes in a sub-threshold state; each bias unit corresponds to one adjusting tube; and each adjusting tube and the band-gap reference voltage generation module form a compensation path. The band-gap reference voltage generation module generates initial band-gap reference voltage when in a working state; each bias unit generates a bias voltage related to the temperature according to the initial band-gap reference voltage; each adjusting tube adjusts the opening degree of the adjusting tube according to the preset bias voltage of the corresponding bias unit to generate compensation current; and the band-gap reference voltage generation module adjusts the initial band-gap reference voltage based on each compensation current to obtain the final band-gap reference voltage. On the basis, the precision of the band-gap reference voltage can be improved, and the temperature influence is avoided to a great extent.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of integrated circuits, in particular to a bandgap reference circuit and a reference voltage source device. BACKGROUND

[0002] In the design of analog and mixed-signal integrated circuits, reference voltage source is one of the core modules, and its stability directly affects the system performance. The reference voltage is widely used in the setting of reference level of ADC / DAC converter, the feedback reference of LDO / DC-DC voltage stabilizer, the bias voltage of various sensors, and the power supply calibration of PLL and other timing circuits.

[0003] The traditional bandgap reference source is based on the principle of mutual compensation of the positive temperature coefficient and the negative temperature coefficient voltage of bipolar transistors. Through first-order temperature compensation, an output voltage with nearly zero temperature coefficient can be achieved at a specific temperature point. However, this compensation method will exhibit obvious quadratic curvature characteristics in a wide temperature range (-40°C to 125°C), resulting in deviation of the output voltage from the nominal value in high-temperature and low-temperature regions. To improve the temperature characteristics, the existing technology adopts a segmented linear compensation scheme, for example, detecting the ambient temperature through a temperature sensor and switching the compensation resistor network or adjusting the current mirror ratio in different temperature zones. Although two-stage or three-stage compensation can partially improve the temperature coefficient, the fixed number of compensation stages will cause a step voltage jump at the temperature zone switching point, introducing nonlinear distortion. In addition, transistor mismatch caused by process deviation will further worsen the smoothness of the switching point, and the statically divided temperature zones cannot adapt to the curvature changes under different process corners, making the reference source face consistency challenges in mass production. SUMMARY

[0004] Therefore, the purpose of the present application is to provide a compensation bandgap reference circuit and a reference voltage source device to improve the accuracy of the bandgap reference circuit in the prior art within the working temperature range and greatly avoid the influence of temperature.

[0005] To achieve the above purpose, the technical solutions adopted by the embodiments of the present application are as follows: In a first aspect, the present application provides a bandgap reference circuit, which comprises a temperature compensation module and a bandgap reference voltage generation module; the bandgap reference voltage generation module is connected with the temperature compensation module; the temperature compensation module comprises a plurality of bias units and a plurality of adjustment tubes in a sub-threshold state; each bias unit corresponds to an adjustment tube; the output end of each bias unit is connected with the control end of the corresponding adjustment tube; wherein each adjustment tube respectively constitutes a compensation path with the bandgap reference voltage generation module; The bandgap reference voltage generation module is used to generate an initial bandgap reference voltage when in a working state; Each biasing unit is configured to generate a temperature-dependent bias voltage according to the initial bandgap reference voltage; Each adjusting tube is configured to adjust an opening degree of itself according to the preset bias voltage of the corresponding biasing unit to generate a compensation current; The bandgap reference voltage generation module is further configured to adjust the initial bandgap reference voltage based on the compensation currents to obtain a final bandgap reference voltage.

[0006] Optionally, the temperature compensation module further comprises a positive temperature coefficient extraction unit, an input end of the positive temperature coefficient extraction unit being connected with the bandgap reference voltage generation module, and an output end of the positive temperature coefficient extraction unit being connected with the input ends of the biasing units; The positive temperature coefficient extraction unit is configured to extract a positive temperature coefficient current from the initial bandgap reference voltage. Each biasing unit is further configured to generate a corresponding positive temperature coefficient voltage or a negative temperature coefficient voltage based on the positive temperature coefficient current. Each biasing unit is configured to generate a bias voltage according to the corresponding positive temperature coefficient voltage or the negative temperature coefficient voltage.

[0007] Optionally, the positive temperature coefficient extraction unit comprises a current mirror component, and the biasing units comprise at least one voltage dividing component; an input end of the current mirror component is connected with the bandgap reference voltage generation module; an output end of the current mirror component is connected with the input ends of the voltage dividing components; and an output end of each voltage dividing component is connected with a control end of the corresponding adjusting tube.

[0008] Optionally, at least one target biasing unit is included in the plurality of biasing units, an input end of the target biasing unit is connected with the bandgap reference voltage generation module, an output end of the target biasing unit is connected with a control end of the corresponding target adjusting tube, and the input ends of the remaining biasing units except the target biasing unit are connected with the output end of the positive temperature coefficient extraction unit. The target biasing unit is configured to generate a target bias voltage according to the bandgap reference voltage. The target adjusting tube is configured to adjust an opening degree of itself based on the target bias voltage; wherein a change rate of the opening degree of the target adjusting tube is greater than change rates of opening degrees of the remaining adjusting tubes except the target adjusting tube.

[0009] Optionally, the bandgap reference voltage generation module comprises a first bipolar transistor, a second bipolar transistor, a first resistor and an adjusting unit; a first end of the first bipolar transistor is connected with a control end of the second bipolar transistor and a second end of the first resistor, a control end of the first bipolar transistor is connected with a first end of the first resistor and a first end of the adjusting unit; a first end of the second bipolar transistor is connected with a second end of the adjusting unit; a second end of the first bipolar transistor and a second end of the second bipolar transistor are grounded. The adjusting unit is configured to adjust the voltage at the first end of the first bipolar transistor and the first end of the second bipolar transistor in the working state, so as to equalize the voltage at the first end of the first bipolar transistor and the first end of the second bipolar transistor.

[0010] Optionally, when the two bias units are included, the temperature compensation module comprises a positive temperature coefficient extraction unit, a first bias unit, a second bias unit, a first adjusting tube and a second adjusting tube; the first end of the first adjusting tube and the first end of the second adjusting tube are connected with the second end of the first resistor; the second end of the first adjusting tube and the second end of the second adjusting tube are both grounded; the control end of the first adjusting tube is connected with the output end of the first bias unit; the control end of the second adjusting tube is connected with the output end of the second bias unit; the input end of the first bias unit and the input end of the second bias unit are both connected with the output end of the positive temperature coefficient extraction unit; the input end of the positive temperature coefficient extraction unit is connected with the third end of the adjusting unit; wherein the first adjusting tube and the second adjusting tube are both NMOS tubes.

[0011] Optionally, the temperature compensation module further comprises a target bias unit and a third adjusting tube; the input end of the target bias unit is connected with the output end of the adjusting unit; the output end of the target bias unit is connected with the control end of the third adjusting tube; the first end of the third adjusting tube is connected with the second end of the first resistor; the second end of the third adjusting tube is grounded; wherein the third adjusting tube is an NMOS tube.

[0012] Optionally, when the first adjusting tube is used to build a high-temperature coefficient compensation path and the second adjusting tube is used to build a low-temperature coefficient compensation path, the first bias unit comprises a first bias adjusting tube, a first voltage dividing resistor and a second voltage dividing resistor; the second bias unit comprises at least a second bias adjusting tube, a third voltage dividing resistor and a fourth voltage dividing resistor; wherein the doping type between the first bias adjusting tube and the second bias adjusting tube is different. The first end of the first voltage dividing resistor is connected with the second end of the first bias adjusting tube; the second end of the first voltage dividing resistor is connected with the first end of the second voltage dividing resistor and the control end of the first adjusting tube; the first end of the third voltage dividing resistor is connected with the first end of the second bias adjusting tube; the second end of the third voltage dividing resistor is connected with the first end of the fourth voltage dividing resistor and the control end of the second adjusting tube; the second end of the second voltage dividing resistor and the second end of the fourth voltage dividing resistor are both grounded; the second end of the first bias adjusting tube and the first end of the second bias adjusting tube are connected with a power supply; the control end of the first bias adjusting tube and the control end of the second bias adjusting tube are connected with the output end of the positive temperature coefficient extraction unit.

[0013] Optionally, when the third adjusting tube is used to build a high temperature coefficient compensation path, the target bias unit comprises a fifth voltage dividing resistor and a sixth voltage dividing resistor, a first end of the fifth voltage dividing resistor is connected with the output end of the adjusting unit, a second end of the fifth voltage dividing resistor and a first end of the sixth voltage dividing resistor are connected with the control end of the third adjusting tube, and a second end of the sixth voltage dividing resistor is grounded.

[0014] In a second aspect, the present application provides a reference voltage source device, the reference voltage source device comprising the bandgap reference circuit of any one of the first aspect.

[0015] The bandgap reference circuit and the reference voltage source device provided by the embodiments of the present application have the following beneficial effects: In the present application, the bandgap reference circuit comprises a temperature compensation module and a bandgap reference voltage generation module; the bandgap reference voltage generation module is connected with the temperature compensation module; the temperature compensation module comprises a plurality of bias units and a plurality of adjusting tubes in a sub-threshold state; each bias unit corresponds to an adjusting tube; the output end of each bias unit is connected with the control end of the corresponding adjusting tube; wherein each adjusting tube forms a compensation path with the bandgap reference voltage generation module. Wherein, the bandgap reference voltage generation module generates an initial bandgap reference voltage when in a working state; each bias unit generates a temperature-related bias voltage based on the initial bandgap reference voltage; each adjusting tube adjusts its opening degree based on the preset bias voltage of the corresponding bias unit to generate a compensation current; and the bandgap reference voltage generation module adjusts the initial bandgap reference voltage based on each compensation current to obtain a final bandgap reference voltage. Based on this, the bandgap reference circuit and the reference voltage source device provided by the present application can improve the accuracy of the bandgap reference voltage within the working temperature range and greatly avoid the influence of temperature.

[0016] In order to make the above objectives, characteristics and advantages of the present application more apparent and comprehensible, the following preferred embodiments are specifically described below, and the accompanying drawings are referred to for a detailed description. BRIEF DESCRIPTION OF DRAWINGS

[0017] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments. It should be understood that the following drawings only show some embodiments of the present application, and therefore should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can also be obtained without creative labor on the basis of these drawings.

[0018] Figure 1 Fig. 1 shows a structure schematic diagram of the bandgap reference circuit provided by the embodiments of the present application; Figure 2 Fig. 2 shows a structure schematic diagram of the temperature compensation module provided by the embodiments of the present application; Figure 3A circuit schematic of the temperature compensation module is shown; Figure 4 A structure schematic of the bandgap reference circuit is shown; Figure 5 A circuit schematic of the positive temperature coefficient extraction unit is shown; Figure 6 A structure schematic of the temperature compensation module is shown; Figure 7 A circuit schematic of the bandgap reference circuit is shown; Figure 8 A structure schematic of the temperature compensation module is shown; Figure 9 A circuit schematic of the bandgap reference circuit is shown; Figure 10 An experimental result of the embodiment of the present application is shown.

[0019] Figure: 100-bandgap reference circuit; 101-temperature compensation module; 102-bandgap reference voltage generation module; 201-bias unit; 202-regulation tube; 203-regulation unit; 204-positive temperature coefficient extraction unit; 301-first bias unit; 302-second bias unit; 303-target bias unit; NM1-first NMOS tube; NM2-second NMOS tube; NM3-third NMOS tube; NM4-fourth NMOS tube; NM5-fifth NMOS tube; PM1-first PMOS tube; PM2-second PMOS tube; PM3-third PMOS tube; Q0-first bipolar transistor; Q1-second bipolar transistor; Q2-third bipolar transistor; Q3-fourth bipolar transistor; R1-first resistor; R2-second resistor; R3-third resistor; R4-fourth resistor; R5-fifth resistor; NM7-first regulation tube; NM8-second regulation tube; NM9-third regulation tube; PM4-first bias regulation tube; R11-first voltage dividing resistor; R12-second voltage dividing resistor; NM6-second bias regulation tube; R9-third voltage dividing resistor; R10-fourth voltage dividing resistor; R6-fifth voltage dividing resistor; R7-sixth voltage dividing resistor; R8-eighth resistor. DETAILED DESCRIPTION

[0020] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the accompanying drawings of the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments of the present application. The components of the embodiments of the present application described and shown in the accompanying drawings can be arranged and designed in various different configurations.

[0021] Therefore, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.

[0022] It should be noted that relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0023] Traditional reference sources can only achieve optimal performance at a single temperature point. Simple segmented compensation (such as two- or three-segment compensation) attempts to "flatten" the output curve across the entire temperature range by switching different compensation circuits or parameters in different temperature intervals. However, the compensation accuracy is limited by the fixed number of segments, and nonlinearity and mismatch are introduced at the switching points, making adaptive compensation difficult to achieve.

[0024] To obtain a more accurate bandgap reference voltage, please refer to... Figure 1 , Figure 1 A schematic diagram of a bandgap reference circuit provided in an embodiment of the present invention is shown. The bandgap reference circuit 100 includes a temperature compensation module 101 and a bandgap reference voltage generation module 102. The bandgap reference voltage generation module 102 is connected to the temperature compensation module 101. The temperature compensation module 101 includes multiple bias units 201 and multiple adjustment transistors 202 in a subthreshold state. Each bias unit 201 corresponds to one adjustment transistor 202. The output terminal of each bias unit 201 is connected to the control terminal of the corresponding adjustment transistor 202.

[0025] Each adjustment tube 202 forms a compensation path with the bandgap reference voltage generation module 102.

[0026] The bandgap reference voltage generation module 102 is used to generate an initial bandgap reference voltage when it is in the working state; Each bias unit 201 is used to generate a temperature-dependent bias voltage based on an initial bandgap reference voltage; Each regulating tube 202 is used to adjust its own opening degree according to the preset bias voltage of the corresponding bias unit to generate compensation current.

[0027] The bandgap reference voltage generation module 102 is also used to adjust the initial bandgap reference voltage based on each compensation current to obtain the final bandgap reference voltage.

[0028] This embodiment can be based on the compensation path formed by the above-mentioned multiple one-to-one corresponding bias units and adjustment transistors. Since each adjustment transistor is in the subthreshold state, it can achieve the characteristic of asymptotic shutdown rather than abrupt change in the operating temperature range based on the exponential characteristic of the MOS transistor in the subthreshold region. This achieves the purpose of gradually turning on in different temperature ranges, thereby generating a continuous compensation current in the operating temperature range to dynamically adjust the initial bandgap reference voltage and obtain the final, stable bandgap reference voltage.

[0029] It should be noted that this embodiment does not limit the temperature range or interval adjusted by each compensation path. That is, the adjustable temperature range corresponding to each compensation path is in an overlapping state, without specific or required interval boundaries.

[0030] Based on this, this embodiment does not limit the number of the above-mentioned bias units and / or adjustment tubes, that is, it does not limit the number of compensation paths, which can be adjusted according to actual needs.

[0031] In one possible implementation, the larger the number of compensation paths N, the more compensation segments can be implemented, and the closer it gets to the ideal compensation curve.

[0032] Please refer to Figure 2 , Figure 2 The diagram shows a schematic of the temperature compensation module provided in an embodiment of the present invention. The bandgap reference voltage generation module 102 includes a first bipolar transistor Q0, a second bipolar transistor Q1, a first resistor R1, and an adjustment unit 203. The first terminal of the first bipolar transistor Q0 is connected to the control terminal of the second bipolar transistor Q1 and the second terminal of the first resistor R1. The control terminal of the first bipolar transistor Q0 is connected to the first terminal of the first resistor R1 and the first terminal of the adjustment unit 203 (i.e., point B). The first terminal of the second bipolar transistor Q1 is connected to the second terminal of the adjustment unit 203 (i.e., point A). The second terminals of both the first bipolar transistor Q0 and the second bipolar transistor Q1 are grounded. The adjustment unit 203 is used to adjust the voltage at the first terminal of the first bipolar transistor and the first terminal of the second bipolar transistor when it is in operation, so that the voltage at the first terminal of the first bipolar transistor and the first terminal of the second bipolar transistor are equal.

[0033] In this embodiment, the bandgap reference voltage generation module 102 uses the base-emitter voltage (VBE) of a bipolar transistor (BJT) and the negative temperature coefficient voltage (CTAT) and positive temperature coefficient voltage (PTAT) extracted from the ΔVBE of the two BJTs respectively, and superimposes them in an appropriate ratio to achieve the reference voltage.

[0034] Please refer to Figure 3 , Figure 3 The circuit diagram of the temperature compensation module provided in an embodiment of the present invention is shown. The adjustment unit 203 includes at least a third bipolar transistor Q2, a fourth bipolar transistor Q3, a first NMOS transistor NM1, a second NMOS transistor NM2, a third NMOS transistor NM3, a first PMOS transistor PM1, a second PMOS transistor PM2, a second resistor R2, a third resistor R3, a fourth resistor R4, and a fifth resistor R5. The connection relationship between the adjustment unit 203 and the first bipolar transistor Q0, the second bipolar transistor Q1, and the first resistor R1 is not described in detail here, but can be found in [link to documentation]. Figure 3 The specific structure shown.

[0035] Among them, the resistance values ​​of the second resistor R2 and the third resistor R3 are equal.

[0036] It should be noted that the number of parallel connections of the third bipolar transistor Q2, the fourth bipolar transistor Q3 and the first bipolar transistor Q0 is the same, and the number of parallel connections of the first bipolar transistor Q0 and the second bipolar transistor Q1 are linearly related.

[0037] In one possible implementation, the number of parallel connections of the third bipolar transistor Q2, the fourth bipolar transistor Q3, and the first bipolar transistor Q0 is 1, and the number of parallel connections of the second bipolar transistor Q1 is 8.

[0038] Please continue to refer to this. Figure 3 In this embodiment, the working principle of the temperature compensation module 101 is as follows: The BJT current mirror composed of the first bipolar transistor Q0 and the fourth bipolar transistor Q3 replicates the current flowing through the first bipolar transistor Q0 to the fourth bipolar transistor Q3. This current is then replicated to the second PMOS transistor PM2 through the PMOS current mirror composed of the first PMOS transistor PM1 and the second PMOS transistor PM2. This makes the current flowing through the third bipolar transistor Q2 equal to that flowing through the fourth bipolar transistor Q3, thus making the voltages at points A and B equal. Simultaneously, the resistances between the third resistor R3 and the second resistor R2 are equal. Based on this, the voltages from points A and B to point C are equal, making the current flowing through the third resistor R3 equal to that through the second resistor R2. Furthermore, the current flowing through the fourth resistor R4 is twice the current flowing through the second resistor R2.

[0039] Since the number of parallel connections of the second bipolar transistor Q1 in this embodiment is eight times that of the first bipolar transistor Q0, the voltage difference between points B and D is the difference (ΔVbe) between the base-emitter voltage difference (Vbe) of the first bipolar transistor Q0 and the second bipolar transistor Q1. Based on this, the formula for calculating the current I flowing through the first resistor R1 can be expressed as: ; Therefore, the voltage V1 from point D to point E can be expressed as: ; In the formula, V1 is the... The relevant positive temperature coefficient voltage PTAT, while the base-emitter voltage V2 of the first bipolar transistor Q0 is a negative temperature coefficient voltage CTAT.

[0040] Based on this, the initial first-order compensated bandgap reference V3 is the voltage at point E to ground, and its calculation formula can be expressed as: V3 = V1 + V2.

[0041] In this embodiment, the temperature compensation module 101 adjusts the initial first-order compensated bandgap reference voltage by adjusting the compensation current within a working range to obtain the final, stable first-order compensated bandgap reference voltage.

[0042] Furthermore, the third NMOS transistor NM3 and the second NMOS transistor NM2 form an NMOS current mirror, which can be used to adjust the base voltages of the fourth bipolar transistor Q3 and the third bipolar transistor Q2. The first NMOS transistor NM1 is used as the control switch for the negative feedback loop. When the initial first-order compensated bandgap reference V3 deviates from the target value, the gate voltage of the first NMOS transistor NM1 is adjusted, thereby changing the drain current of the first NMOS transistor NM1, thus forming a negative feedback loop. The fifth resistor R5 stabilizes the DC level, thereby locking the gate-source voltage VGS of the first NMOS transistor NM1, forming a stable bias.

[0043] The following section will detail the compensation process for the initial bandgap reference voltage.

[0044] Please refer to Figure 4 , Figure 4 A schematic diagram of the structure of the temperature compensation module provided in an embodiment of the present invention is shown; the temperature compensation module 101 further includes a positive temperature coefficient extraction unit 204, the input terminal of the positive temperature coefficient extraction unit 204 is connected to the bandgap reference voltage generation module 102; the output terminal of the positive temperature coefficient extraction unit 204 is connected to the input terminal of each bias unit 201.

[0045] Positive temperature coefficient extraction unit 204 is used to extract positive temperature coefficient current from the initial bandgap reference voltage.

[0046] Each bias unit 201 is also used to generate a corresponding positive temperature coefficient voltage or negative temperature coefficient voltage based on the positive temperature coefficient current. Each bias unit 201 is used to generate a bias voltage based on the corresponding positive temperature coefficient voltage or negative temperature coefficient voltage.

[0047] It should be noted that in this embodiment, the positive temperature coefficient extraction unit 204 essentially extracts the positive temperature coefficient from the bandgap reference voltage generation module 102. The relevant positive temperature coefficient current is the current I flowing through the first resistor R1 mentioned above.

[0048] In one possible implementation, the positive temperature coefficient extraction unit 204 in this embodiment includes a current mirror assembly, and the bias unit 201 includes at least one voltage divider assembly; the input terminal of the current mirror assembly is connected to the bandgap reference voltage generation module 102; the output terminal of the current mirror assembly is connected to the input terminal of each voltage divider assembly; and the output terminal of each voltage divider assembly is connected to the control terminal of the corresponding adjustment tube 202.

[0049] Please refer to Figure 5 , Figure 5 The circuit schematic diagram of the positive temperature coefficient extraction unit provided in the embodiment of the present invention is shown. The positive temperature coefficient extraction unit 204 includes a third PMOS transistor PM3, a fourth NMOS transistor NM4, a fifth NMOS transistor NM5, and an eighth resistor R8.

[0050] In this configuration, the gate of the third PMOS transistor PM3 is connected to the gate of the first PMOS transistor PM1 and the gate of the second PMOS transistor PM2. The positive temperature coefficient current is then copied into the third PMOS transistor PM3 through a PMOS current mirror formed by the first PMOS transistor PM1 and the second PMOS transistor PM2. Subsequently, the positive temperature coefficient current is copied into the fifth NMOS transistor NM5 through a current mirror formed by the fourth NMOS transistor NM4 and the fifth NMOS transistor NM5. At this time, the current flowing through the eighth resistor is the positive temperature coefficient current I. Correspondingly, the voltage at point F is the difference between the power supply VDD and the voltage across the eighth resistor R8 (VDD minus the voltage drop across the eighth resistor R8). Based on this, the voltage at point F is the negative temperature coefficient voltage CTAT.

[0051] To achieve temperature compensation, when two bias units 201 are included, that is, when the temperature compensation module 101 includes a first bias unit 301, a second bias unit 302, a first adjustment tube NM7, and a second adjustment tube NM8, please refer to [the relevant documentation]. Figure 6 , Figure 6A schematic diagram of the temperature compensation module provided in an embodiment of the present invention is shown. The first end of the first regulating transistor NM7 is connected to the first end of the second regulating transistor NM8 and the second end of the first resistor R1. The second ends of the first regulating transistor NM7 and the second regulating transistor NM8 are both grounded. The control terminal of the first regulating transistor NM7 is connected to the output terminal of the first bias unit 301. The control terminal of the second regulating transistor NM8 is connected to the output terminal of the second bias unit 302. The input terminals of the first bias unit 301 and the second bias unit 302 are both connected to the output terminal of the positive temperature coefficient extraction unit 204. The input terminal of the positive temperature coefficient extraction unit 204 is connected to the third end of the regulating unit 203. The first regulating transistor NM7 and the second regulating transistor NM8 are both NMOS transistors.

[0052] Since both the first regulating transistor NM7 and the second regulating transistor NM8 are NMOS transistors and are both in the subthreshold state, the formula for the subthreshold conduction current of an NMOS transistor can be expressed as: ; in, The characteristic current density (in A / µm) is process-dependent, with a typical value of approximately 10. 15 10 14 A is determined by factors such as carrier mobility and doping concentration. The width-to-length ratio of the channel; The difference between the gate-source voltage and the threshold voltage; when the difference... When <0, the current follows Exponential growth; This is the subthreshold swing factor, a parameter used to describe the efficiency of gate voltage control, with a typical value of 1.3~1.8. This subthreshold swing factor is derived from the formula: Decision (in the formula, To deplete the layer capacitance, (For gate oxide capacitors). This is the thermal voltage, approximately 26mV at room temperature (300K).

[0053] Since the temperature curve of the first-order compensated bandgap reference generated by the core circuit is U-shaped, compensation can be performed in the high-temperature and low-temperature ranges respectively. Assuming that when the first adjustment transistor NM7 is used to construct a high temperature coefficient compensation path and the second adjustment transistor NM8 is used to construct a low temperature coefficient compensation path, the first bias unit 301 includes a first bias adjustment transistor, a first voltage divider resistor, and a second voltage divider resistor; the second bias unit includes at least a second bias adjustment transistor, a third voltage divider resistor, and a fourth voltage divider resistor; wherein the first bias adjustment transistor and the second bias adjustment transistor have different doping types.

[0054] In one possible implementation, the first bias adjustment transistor can be a PMOS; the second bias adjustment transistor can be an NMOS.

[0055] At this point, please refer to Figure 7 , Figure 7 The circuit diagram of the temperature compensation module provided in this embodiment of the invention is shown. The first end of the first voltage divider resistor R11 is connected to the second end of the first bias adjustment transistor PM4; the second end of the first voltage divider resistor R11 is connected to the first end of the second voltage divider resistor R12 and the control terminal of the first adjustment transistor NM7; the first end of the third voltage divider resistor R9 is connected to the first end of the second bias adjustment transistor NM6; the second end of the third voltage divider resistor R9 is connected to the first end of the fourth voltage divider resistor R10 and the control terminal of the second adjustment transistor NM8; the second ends of the second voltage divider resistor R12 and the fourth voltage divider resistor R10 are both grounded; the second end of the first bias adjustment transistor PM4 and the first end of the second bias adjustment transistor NM6 are connected to the power supply; the control terminals of the first bias adjustment transistor PM4 and the second bias adjustment transistor NM6 are connected to the output terminal of the positive temperature coefficient extraction unit 204.

[0056] In this embodiment, point F is connected to the gate of the second bias adjustment transistor NM6. The second bias adjustment transistor NM6 is in the linear region, and the current flowing through it at this time... It can be represented as: ; in, For electron mobility, The gate oxide capacitance per unit area. The width-to-length ratio of the channel.

[0057] Since the voltage at point F has a negative temperature coefficient, it decreases as the temperature rises, meaning the voltage at point F decreases due to the second bias regulating transistor NM6. The decrease ultimately leads to a decrease in the current flowing through the second bias regulating transistor NM6. Decrease, therefore The current has a negative temperature coefficient, thus the voltage at point G has a negative temperature coefficient.

[0058] Based on this, the working principle of the high temperature coefficient compensation path in this embodiment is as follows: When the temperature is high, the first regulating transistor NM7 discharges current from point D, which reduces the current that originally flowed through the first bipolar transistor Q0, thereby reducing the base-emitter voltage difference (Vbe) of the first bipolar transistor Q0, and ultimately reducing the bandgap reference voltage Vref at high temperature.

[0059] The voltage at point H increases with increasing temperature, and the first regulating transistor NM7... As the temperature rises, the current decreases slowly. Combining this with the NMOS transistor subthreshold conduction current formula, it can be seen that the discharge current flowing from point D through the first regulating transistor NM7 increases with the temperature, ultimately causing the bandgap reference voltage Vref to drop rapidly at high temperatures, thus completing rapid high-temperature dynamic compensation.

[0060] Unlike other transistors, point F is also connected to the gate of the first bias regulating transistor PM4. However, the first bias regulating transistor PM4 is in the cutoff region at low temperatures. As the temperature rises and the voltage at point F decreases, the first bias regulating transistor PM4 gradually enters the linear region, and the current flowing through the first bias regulating transistor PM4... Its calculation formula is expressed as: ; in, For electron mobility, The gate oxide capacitance per unit area. This refers to the width-to-length ratio of the channel. When the temperature rises, the voltage at point F, which is the voltage of the first bias regulating transistor PM4, is... The rise ultimately results in a current flowing through the first bias regulating tube PM4. Ascending, therefore Since the current has a positive temperature coefficient, the voltage at point H is also a positive temperature coefficient voltage.

[0061] Based on this, the working principle of the low temperature coefficient compensation path in this embodiment is as follows: The gate of the second regulating transistor NM8 is connected to point G. At low temperature, the second regulating transistor NM8 discharges current from point D, which reduces the current that originally flowed through the first bipolar transistor Q0, thereby reducing the base-emitter voltage difference (Vbe) of the first bipolar transistor Q0, and ultimately reducing the bandgap reference voltage Vref at low temperature.

[0062] When the temperature rises, the voltage at point G decreases. According to the above formula for the subthreshold on-current of the NMOS transistor, it can be seen that the subthreshold on-current that originally flowed from point D through the second regulating transistor NM8 decreases. Moreover, as the temperature rises, the decrease in the subthreshold on-current that flowed from point D through the second regulating transistor NM8 becomes increasingly slower until it remains basically unchanged, thus completing the low-temperature dynamic compensation.

[0063] To further improve the bandgap reference voltage Vref, please refer to Figure 8 , Figure 8 This diagram illustrates another structural schematic of the temperature compensation module provided in an embodiment of the present invention. In this embodiment, at least one target bias unit 303 is included among the multiple bias units 201. The input terminal of the target bias unit 303 is connected to the bandgap reference voltage generation module 102. The output terminal of the target bias unit 303 is connected to the control terminal of the corresponding target adjustment tube. The input terminals of the other bias units, excluding the target bias unit 303, are connected to the output terminal of the positive temperature coefficient extraction unit 204.

[0064] The target bias unit 303 is used to generate a target bias voltage based on the bandgap reference voltage.

[0065] The target adjustment tube 202 is used to adjust its own turn-on degree based on the target bias voltage.

[0066] Among them, the rate of change of the opening degree of the target adjustment tube is greater than the rate of change of the opening degree of the other adjustment tubes.

[0067] In this embodiment, when the target adjustment tube is turned on, the rate of change of the opening degree of the other adjustment tubes should be very low.

[0068] Please Figure 7 Based on, refer to Figure 9 , Figure 9 This diagram illustrates another circuit schematic of the temperature compensation module provided in an embodiment of the present invention. The temperature compensation module 101 further includes a target bias unit 303 and a third adjustment transistor NM9. The input terminal of the target bias unit 303 is connected to the output terminal of the adjustment unit 203, and the output terminal of the target bias unit 303 is connected to the control terminal of the third adjustment transistor NM9. The first terminal of the third adjustment transistor NM9 is connected to the second terminal of the first resistor R1. The second terminal of the third adjustment transistor NM9 is grounded. The third adjustment transistor NM9 is an NMOS transistor.

[0069] Please continue to refer to this. Figure 9 When the third regulating transistor NM9 is used to construct a high temperature coefficient compensation path, the target bias unit 303 includes a fifth voltage divider resistor R6 and a sixth voltage divider resistor R7. The first end of the fifth voltage divider resistor R6 is connected to the output end of the regulating unit 203, and the second end of the fifth voltage divider resistor R6 is connected to the first end of the sixth voltage divider resistor R7 and the control end of the third regulating transistor NM9. The second end of the sixth voltage divider resistor R7 is grounded.

[0070] Based on this, the working principle of the high temperature coefficient compensation path constructed through the third adjusting tube NM9 in this embodiment is as follows: The third regulating transistor NM9 is connected to point I. At high temperature, the third regulating transistor NM9 discharges current from point D, which reduces the current that originally flowed through Q0, thereby reducing the base-emitter voltage difference (Vbe) of Q0, and ultimately reducing the bandgap voltage at high temperature.

[0071] The voltage at point I is a voltage divider of the bandgap reference voltage, therefore it can be considered a voltage that does not change with temperature. The third regulating transistor, NM9... As the temperature rises, the current decreases slowly. Combining the NMOS transistor subthreshold conduction current formula, it can be seen that the discharge current flowing from point D through the third regulating transistor NM9 increases with the rise in temperature, which causes the bandgap voltage to decrease slowly at high temperatures, and finally completes the slow high-temperature dynamic compensation.

[0072] Following the same approach as the previous embodiment, the present invention also provides a reference voltage source device, which includes the bandgap reference circuit of any of the first aspects described above, in order to improve the accuracy of the bandgap reference voltage within the operating temperature range and greatly avoid the influence of temperature.

[0073] In addition, please refer to Figure 10 , Figure 10 The experimental results of an embodiment of the present invention are shown in the figure. This figure illustrates the temperature characteristics of the bandgap reference voltage of the bandgap reference circuit provided in this embodiment within the operating temperature range of [-40°C, 125°C]. It can be seen that at 25°C, the output voltage is 1.19327V. Furthermore, it can be seen that within the range of -40 to 125°C, its temperature coefficient is 1.65ppm / °C. Based on this, the bandgap reference circuit and reference voltage source device provided by the present invention can improve the accuracy of the bandgap reference voltage within the operating temperature range and greatly mitigate the effects of temperature.

[0074] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can also be implemented in other ways. The apparatus embodiments described above are merely illustrative; for example, the flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than those marked in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram and / or flowchart, and combinations of blocks in block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.

[0075] In addition, the functional modules in the various embodiments of the present invention can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0076] If the aforementioned functions are implemented as software functional modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0077] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A bandgap reference circuit, characterized in that, The bandgap reference circuit includes a temperature compensation module and a bandgap reference voltage generation module; the bandgap reference voltage generation module is connected to the temperature compensation module; the temperature compensation module includes multiple bias units and multiple adjustment transistors in a subthreshold state; each bias unit corresponds to one adjustment transistor; the output terminal of each bias unit is connected to the control terminal of the corresponding adjustment transistor; wherein, each adjustment transistor and the bandgap reference voltage generation module respectively form a compensation path; The bandgap reference voltage generation module is used to generate an initial bandgap reference voltage when it is in the working state; Each bias unit is used to generate a temperature-dependent bias voltage based on the initial bandgap reference voltage; Each regulating tube is used to adjust its own opening degree according to the preset bias voltage of the corresponding bias unit to generate compensation current; The bandgap reference voltage generation module is further configured to adjust the initial bandgap reference voltage based on each of the compensation currents to obtain the final bandgap reference voltage.

2. The bandgap reference circuit according to claim 1, characterized in that, The temperature compensation module further includes a positive temperature coefficient extraction unit, the input terminal of which is connected to the bandgap reference voltage generation module; the output terminal of which is connected to the input terminal of each of the bias units. The positive temperature coefficient extraction unit is used to extract the positive temperature coefficient current from the initial bandgap reference voltage. Each bias unit is also used to generate a corresponding positive temperature coefficient voltage or negative temperature coefficient voltage based on the positive temperature coefficient current; Each bias unit is used to generate a bias voltage based on the corresponding positive temperature coefficient voltage or negative temperature coefficient voltage.

3. The bandgap reference circuit according to claim 2, characterized in that, The positive temperature coefficient extraction unit includes a current mirror assembly, and the bias unit includes at least one voltage divider assembly. The input terminal of the current mirror assembly is connected to the bandgap reference voltage generation module. The output terminal of the current mirror assembly is connected to the input terminal of each voltage divider assembly. The output terminal of each voltage divider assembly is connected to the control terminal of the corresponding adjustment tube.

4. The bandgap reference circuit according to claim 2, characterized in that, When at least one of the plurality of bias units is a target bias unit, the input terminal of the target bias unit is connected to the bandgap reference voltage generation module; the output terminal of the target bias unit is connected to the control terminal of the corresponding target adjustment transistor. The input terminals of the remaining bias units, except for the target bias unit, are connected to the output terminal of the positive temperature coefficient extraction unit; The target bias unit is used to generate a target bias voltage based on the bandgap reference voltage; The target adjustment tube is used to adjust its own opening degree based on the target bias voltage; wherein, the rate of change of the opening degree of the target adjustment tube is greater than the rate of change of the opening degree of the other adjustment tubes.

5. The bandgap reference circuit according to claim 1, characterized in that, The bandgap reference voltage generation module includes a first bipolar transistor, a second bipolar transistor, a first resistor, and an adjustment unit; the first terminal of the first bipolar transistor is connected to the control terminal of the second bipolar transistor and the second terminal of the first resistor, and the control terminal of the first bipolar transistor is connected to the first terminal of the first resistor and the first terminal of the adjustment unit; the first terminal of the second bipolar transistor is connected to the second terminal of the adjustment unit; the second terminals of both the first and second bipolar transistors are grounded. The adjustment unit is used to adjust the voltage at the first terminal of the first bipolar transistor and the first terminal of the second bipolar transistor when it is in operation, so that the voltage at the first terminal of the first bipolar transistor and the first terminal of the second bipolar transistor are equal.

6. The bandgap reference circuit according to claim 5, characterized in that, When including two bias units, the temperature compensation module includes a positive temperature coefficient extraction unit, a first bias unit, a second bias unit, a first adjustment transistor, and a second adjustment transistor; the first end of the first adjustment transistor is connected to the first end of the second adjustment transistor and the second end of the first resistor; the second ends of the first adjustment transistor and the second adjustment transistor are both grounded; the control terminal of the first adjustment transistor is connected to the output terminal of the first bias unit; the control terminal of the second adjustment transistor is connected to the output terminal of the second bias unit; the input terminals of the first bias unit and the second bias unit are both connected to the output terminal of the positive temperature coefficient extraction unit; the input terminal of the positive temperature coefficient extraction unit is connected to the third end of the adjustment unit; wherein, the first adjustment transistor and the second adjustment transistor are both NMOS transistors.

7. The bandgap reference circuit according to claim 6, characterized in that, The temperature compensation module further includes a target bias unit and a third adjustment transistor. The input terminal of the target bias unit is connected to the output terminal of the adjustment unit, and the output terminal of the target bias unit is connected to the control terminal of the third adjustment transistor. The first terminal of the third adjustment transistor is connected to the second terminal of the first resistor. The second terminal of the third adjustment transistor is grounded. The third adjustment transistor is an NMOS transistor.

8. The bandgap reference circuit according to claim 6, characterized in that, When the first adjustment transistor is used to construct a high temperature coefficient compensation path and the second adjustment transistor is used to construct a low temperature coefficient compensation path, the first bias unit includes a first bias adjustment transistor, a first voltage divider resistor, and a second voltage divider resistor; the second bias unit includes at least a second bias adjustment transistor, a third voltage divider resistor, and a fourth voltage divider resistor; wherein the first bias adjustment transistor and the second bias adjustment transistor have different doping types. The first end of the first voltage divider resistor is connected to the second end of the first bias adjustment transistor; the second end of the first voltage divider resistor is connected to the first end of the second voltage divider resistor and the control terminal of the first adjustment transistor; the first end of the third voltage divider resistor is connected to the first end of the second bias adjustment transistor; the second end of the third voltage divider resistor is connected to the first end of the fourth voltage divider resistor and the control terminal of the second adjustment transistor; the second ends of the second voltage divider resistor and the second end of the fourth voltage divider resistor are both grounded; the second end of the first bias adjustment transistor and the first end of the second bias adjustment transistor are connected to the power supply; the control terminals of the first bias adjustment transistor and the second bias adjustment transistor are connected to the output terminal of the positive temperature coefficient extraction unit.

9. The bandgap reference circuit according to claim 7, characterized in that, When the third adjusting tube is used to construct a high temperature coefficient compensation path, the target bias unit includes a fifth voltage divider resistor and a sixth voltage divider resistor. The first end of the fifth voltage divider resistor is connected to the output end of the adjusting unit, and the second end of the fifth voltage divider resistor is connected to the first end of the sixth voltage divider resistor and the control end of the third adjusting tube. The second end of the sixth voltage divider resistor is grounded.

10. A reference voltage source device, characterized in that, The reference voltage source device includes the bandgap reference circuit as described in any one of claims 1 to 9.

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