Substrate processing method, substrate processing device and computer storage medium
By filling the spaces between chemically amplified resist patterns with molten Al-containing metal and subjecting them to UV irradiation and heat treatment, a metal oxide film pattern is formed, solving the problems of low etch resistance and pattern collapse, and achieving the formation of patterns with good etch resistance.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- TOKYO ELECTRON LTD
- Filing Date
- 2024-09-12
- Publication Date
- 2026-04-10
AI Technical Summary
In the photolithography process of chemically amplified resists, the increased aspect ratio of the resist pattern leads to pattern collapse, and the solvent of silicon oxide material in the existing inversion process is an organic solvent, which cannot be applied to positive resists.
An Al-containing metal-filled liquid is used to fill the spaces between chemically amplified resist patterns. A metal oxide film pattern is then formed by UV irradiation and heat treatment, replacing silicon oxide materials as a hard mask.
It improves etch resistance, suppresses pattern collapse, is suitable for positive resists, and the formed metal oxide mask pattern has high etch resistance, effectively protecting the underlying film.
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Figure CN121844261A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to a substrate processing method, a substrate processing apparatus, and a computer storage medium. BACKGROUND
[0002] In Patent Literature 1, regarding a technique in which a coating composition containing polysiloxane is applied onto a patterned resist film formed in a process of development of a resist film in a photolithography process, or a patterned resist film after development, is filled between patterns, and then the resist film is removed by dry etching or the like to invert the pattern, a production method of a composition capable of being applied onto a patterned resist film is disclosed, characterized by comprising: a step (A) of obtaining a hydrolysis condensate by hydrolyzing and condensing a hydrolyzable silane in a non-alcohol hydrophilic solvent; and a step (B) of replacing the non-alcohol hydrophilic solvent of the hydrolysis condensate with a hydrophobic solvent, the non-alcohol hydrophilic solvent used in the step (A) being an aliphatic ketone having 3 or 4 carbon atoms, and the hydrophobic solvent being selected from an aliphatic or aromatic ester having 5 to 20 carbon atoms, or a dialkyl ether.
[0003] PRIOR ART DOCUMENTS
[0004] PATENT LITERATURE
[0005] Patent Literature 1: Japanese Patent No. 7112023 SUMMARY
[0006] PROBLEMS TO BE SOLVED BY THE INVENTION
[0007] The present application is to form a pattern having good etching resistance in a photolithography process of a chemically amplified resist.
[0008] MEANS FOR SOLVING THE PROBLEMS
[0009] One aspect of the present application is a substrate processing method for processing a substrate, characterized by filling a metal-containing liquid containing Al into between resist patterns formed on the substrate by a chemically amplified resist, and then removing the chemically amplified resist to form a metal oxide film pattern.
[0010] EFFECTS OF THE INVENTION
[0011] With the present application, a pattern having good etching resistance can be formed in a photolithography process of a chemically amplified resist. BRIEF DESCRIPTION OF DRAWINGS
[0012] Figure 1 is a plan view showing an outline of a structure of a wafer processing system as a substrate processing apparatus which carries out the substrate processing method of the present embodiment.
[0013] Figure 2 is a front view showing an outline of a structure of a wafer processing system that is a substrate processing apparatus implementing the substrate processing method of the present embodiment.
[0014] Figure 3 is an explanatory view showing a process of the substrate processing method of the present embodiment.
[0015] Figure 4 is an explanatory view showing a process of generating voids when heating a filling liquid having a surfactant.
[0016] Figure 5 is an explanatory view showing a process of suppressing generation of voids by performing UV irradiation before heating a filling liquid having a surfactant. DETAILED DESCRIPTION
[0017] Conventionally, in a so-called photolithography process of a semiconductor manufacturing process, a chemical amplification resist (CAR) is used as a resist when forming a fine pattern on a semiconductor wafer (hereinafter, sometimes referred to as a wafer) that is a substrate. Then, after the chemical amplification resist is patterned through an exposure process and a development process, the chemical amplification resist is used as a mask to etch a silicon oxide film or a carbon film of an underlayer film.
[0018] With recent years' miniaturization of patterns, the aspect ratio of a resist pattern becomes larger and larger, but when the aspect ratio becomes large, so-called pattern collapse easily occurs. That is, the chemical amplification resist is an organic resist, and has low etching resistance, so when it is thinned, etching of an underlayer becomes insufficient.
[0019] On the other hand, a method of patterning a hard mask of a silicon oxide film type using a reverse process after patterning a chemical amplification resist is also being studied.
[0020] However, in the case of patterning a hard mask of a silicon oxide film type using a reverse process, since a solvent of a silicon oxide material is an organic solvent, in the case of a positive resist, a pattern is dissolved, so there are cases where it cannot be applied.
[0021] The technology of the present application is used to form a pattern having good etching resistance in a photolithography process of a chemical amplification resist.
[0022] Hereinafter, a wafer processing system that is a substrate processing apparatus implementing the substrate processing method of the present embodiment will be described with reference to the drawings. In addition, in the present specification, for elements having substantially the same function and configuration, repeated description will be omitted by labeling the same reference numerals.
[0023] < WAFER PROCESSING SYSTEM >
[0024] First, the structure of the wafer processing system in the present embodiment will be described. Figure 1 , Figure 2 are a plan view and a front view that schematically represent an outline of the structure of the wafer processing system 1, respectively. In the present embodiment, a case where the wafer processing system 1 is a lithography processing system capable of performing resist film formation processing and development processing on a wafer W will be described as one example.
[0025] As shown in Figure 1 , the wafer processing system 1 has a cassette station 2 capable of feeding in and out a cassette C in which a plurality of wafers W are housed with respect to the cassette station 2, and a processing station 3 including a plurality of various processing devices capable of performing prescribed processing on the wafer W. Also, the wafer processing system 1 has a structure in which the cassette station 2, the processing station 3, and an interface station 4 capable of performing handover of the wafer W between an adjacent exposure device (not shown) on the side opposite to the processing station 3 are connected integrally. In addition, as shown in Figure 1 , two processing stations 3 are provided between the cassette station 2 and the interface station 4, but one processing station 3 can also be provided, or three or more processing stations 3 can be provided.
[0026] A cassette placement table 21, a wafer conveyance device 22, and a wafer conveyance device 23 are provided in the cassette station 2. In the cassette placement table 21, a plurality of cassette placement plates 24 are arranged and disposed in the X direction. In the cassette station 2, the wafer can be conveyed between the cassette C placed on the cassette placement table 21 and the processing station 3 by the wafer conveyance device 22 or the wafer conveyance device 23. For this reason, the wafer conveyance device 22 and the wafer conveyance device 23 each include a drive mechanism for moving in each of the horizontal directions (X direction and Y direction), the vertical direction (Z direction), the direction around the vertical axis direction (θ direction), and the like as needed, or a drive mechanism for moving in all directions can be included.
[0027] At least either one of the wafer conveyance device 22 and the wafer conveyance device 23 can perform handover of the wafer W with the cassette C, and can perform handover of the wafer with the processing station 3. Further, the handover of the wafer W with the processing station 3 refers to, for example, handover of the wafer between the first block Gl and the third block G3 including a handover device accessible by the wafer conveyance device 33 in the processing station 3 described later. The third block G3 can include a plurality of handover devices (not shown) arranged in the vertical direction.
[0028] In addition, an inspection device (not shown) for inspecting the wafer W can be included at a position accessible by either one of the wafer conveyance device 22 and the wafer conveyance device 23.
[0029] A plurality of blocks are provided in the processing station 3, for example, three blocks of a first block Gl, a second block G2, and a fourth block G4 are provided. Further, asFigure 2 As shown, multiple layers 31, including the first block G1 and the second block G2, are stacked in the vertical direction. For example, on the front side of the processing station 3 ( Figure 1 The first block G1 is set on the negative X-direction side, on the back side of processing station 3. Figure 1 A second block G2 is located on the positive X-direction side of processing station 3. On the interface station 4 side of processing station 3 ( Figure 1 A fourth block G4 is provided on the Y-direction positive side or at the connection point with another adjacent processing station 3. The fourth block G4 may include multiple connecting devices arranged in the vertical direction. In addition, the aforementioned third block G3 may also be provided within the processing station 3.
[0030] The first block G1 is equipped with multiple liquid processing devices, such as a patterning film forming device and a developing device (neither of which are shown in the figure). For example, the patterning film forming device may include a resist film forming device and an anti-reflective film forming device.
[0031] In the first block G1, for example, multiple processing devices are arranged horizontally. Furthermore, the number, configuration, and type of these processing devices in the first block G1 can be arbitrarily selected.
[0032] In these patterning film forming apparatuses and developing apparatuses, the process is performed, for example, by supplying a predetermined processing solution or a predetermined gas onto the wafer W. In this way, resist films, anti-reflective films, and the like can be formed in the patterning film forming apparatus. The resist film can be used as a mask when forming a pattern for the underlying film, and the anti-reflective film is used for efficient light irradiation processing, such as exposure processing. On the other hand, in the developing apparatus, a portion of the exposed resist film can be removed to form the uneven shape that serves as the aforementioned mask.
[0033] For example, in the second block G2, heat treatment apparatus (not shown) for performing heat treatments such as heating or cooling of the wafer W is arranged in both the vertical and horizontal directions. Furthermore, although not shown, in the second block G2, a hydrophobic treatment apparatus for performing hydrophobic treatment to improve the adhesion of the resist to the wafer W, and a peripheral exposure apparatus for exposing the outer periphery of the wafer W are arranged in both the vertical (Z-direction) and horizontal directions. The number and arrangement of these heat treatment apparatus, hydrophobic treatment apparatus, and peripheral exposure apparatus can be arbitrarily selected.
[0034] like Figure 1 As shown, a wafer transport region 32 is formed in the area sandwiched between the first block G1 and the second block G2 when viewed from above. A wafer transport device 33 is, for example, disposed in the wafer transport region 32.
[0035] The wafer transport device 33 has, for example, a transport arm capable of moving in the Y direction, front-back direction, θ direction, and Z direction. The wafer transport device 33 is capable of moving within the wafer transport area 32, transporting the wafer W to designated locations within the surrounding first block G1, second block G2, third block G3, and fourth block G4. Figure 1 In the case of having multiple processing stations 3, the wafer transport device 33 installed in the processing station 3 located on the side of the interface station 4 can transport the wafer W to the specified devices in the first block G1, the second block G2, the fourth block G4, and the fifth block G5 described later.
[0036] Multiple wafer transport devices 33 are arranged vertically, for example. One wafer transport device 33 can transport a wafer W to a device located at a predetermined height of the upper layer 31 among multiple stacked layers 31. For devices located at a predetermined height of the lower layers 31, the wafer W can be transported by other wafer transport devices 33. To enable such wafer W transport, multiple wafer transport areas 32 are provided. Furthermore, the number of wafer transport devices 33 and the number of layers 31 corresponding to one wafer transport device 33 can be arbitrarily selected; for example, a wafer transport device 33 can be provided for each layer 31.
[0037] Furthermore, a reciprocating transport device (not shown) may be provided in the wafer transport area 32, or in the first block G1 or the second block G2. The reciprocating transport device is capable of transporting the wafer W linearly between a space adjacent to one side of the processing station 3 and another space adjacent to the opposite side.
[0038] Interface station 4 is equipped with a fifth block G5 including multiple transfer devices, and wafer transport devices 41 and 42. Interface station 4 can transport wafer W between the fifth block G5, where wafer W is transferred by wafer transport device 33, and an exposure device (not shown), using wafer transport device 41 or wafer transport device 42. For this purpose, wafer transport device 41 and wafer transport device 42 may each include, as needed, a drive mechanism for movement in various directions such as the X direction, Y direction, vertical Z direction, and about the vertical axis (θ direction), or may include a drive mechanism for movement in all directions. At least one of wafer transport device 41 and wafer transport device 42 can support wafer W and transport wafer W between the transfer devices and the exposure device (not shown) in the fifth block G5.
[0039] A cleaning device for cleaning the surface of the wafer W, or the aforementioned peripheral exposure device, can be installed within the interface station 4 at a location accessible by either the wafer transport device 41 or the wafer transport device 42.
[0040] As mentioned above, an inspection device can be installed in the box station 2, but in the processing station 3 and the interface station 4, in any of the wafer transport devices 33, 41, and 42 located inside their respective facilities... Figure 1 or Figure 2 Inspection devices can also be installed at locations accessible via points 33, 41, and 42.
[0041] In the aforementioned chip processing system 1, such as Figure 1 As shown, at least one control unit 100 is provided. The control unit 100 is capable of processing computer-executable commands for causing the wafer processing system 1 to perform the various steps described herein. The control unit 100 is capable of controlling various elements of the wafer processing system 1 to perform the various steps described herein. In one embodiment, some or all of the control unit 100 may be included in the wafer processing system 1. The control unit 100 may include a processing unit, a storage unit, and a communication interface. The control unit 100 is implemented, for example, by a computer. The processing unit is capable of reading programs from the storage unit that provide logic or routines enabling various control actions, and performing these control actions by executing the read programs.
[0042] The program can be pre-stored in the storage unit or retrieved via a medium when needed. The retrieved program is stored in the storage unit and read and executed by the processing unit. The medium can be various computer-readable storage media or a communication line connected to a communication interface. The storage medium can be temporary or non-temporary. The processing unit can be a CPU (Central Processing Unit) or one or more circuits. The storage unit can include RAM (Random Access Memory), ROM (Read Only Memory), HDD (Hard Disk Drive), SSD (Solid State Drive), or a combination thereof. The communication interface can communicate with the chip processing system 1 via a communication line such as a LAN (Local Area Network).
[0043] <Operation of the chip processing system>
[0044] The wafer processing system 1 is configured as described above. Next, an example of wafer processing performed using the wafer processing system 1 configured as described above will be described.
[0045] First, a cassette C containing multiple wafers W is fed into the cassette station 2 of the wafer processing system 1 and placed on the cassette mounting plate 24. Next, the wafers W in the cassette C are sequentially removed using the wafer transport device 22 or the wafer transport device 23 and transported to the transfer device of the third block G3.
[0046] The wafer W, transported to the handover device in the third block G3, is supported by the wafer transport device 33 and transported to the hydrophobication treatment device located in the second block G2 for hydrophobication treatment. Next, it is transported by the wafer transport device 33 to the resist film forming device, where a resist film is formed on the wafer W. Then, it is transported to the heat treatment device for pre-baking treatment, and finally transported to the handover device in the fifth block G5. Additionally, in... Figure 1 , Figure 2 In a configuration with multiple processing stations 3, the wafer W is first placed in the transfer device of the fourth block G4 before being transferred to the transfer device of the fifth block G5, and then transferred between multiple wafer transport devices 33. Furthermore, the wafer W can be transported by the wafer transport device 33 to a peripheral exposure device as needed for exposure processing of the wafer's periphery.
[0047] The wafer W, which is transported to the handover device in the fifth block G5, is then transported to the exposure device by wafer transport device 41 and wafer transport device 42, where it undergoes exposure processing according to a predetermined pattern. Additionally, the wafer W can be cleaned using a cleaning device before exposure processing.
[0048] The exposed wafer W is transported by wafer transport devices 41 and 42 to the handover device of the fifth block G5. Then, it is transported by wafer transport device 33 to the heat treatment device for post-exposure baking.
[0049] The wafer W, after exposure and baking, is transported by wafer transport device 33 to the developing device for developing. After developing, the wafer W is transported by wafer transport device 33 to the heat treatment device 40 for post-baking.
[0050] Afterwards, the wafer W is transported by the wafer transport device 33 to the handover device of the third block G3, and then by the wafer transport device 22 or the wafer transport device 23 of the cassette station 2 to the cassette C of the designated cassette carrier 24. In this way, a series of photolithography processes are completed.
[0051] Furthermore, the wafer processing system of this invention is not limited to the structure and operation described above. For example, in the above embodiment, it is described that the wafer processing system 1 is directly connected to the exposure apparatus (not shown), and the wafer W is transferred between the interface station 4 and the exposure apparatus. However, the wafer processing system may not be directly connected to the exposure apparatus. In this case, for example, after the wafer W is transported from the cassette station 2 to the processing station 3 for necessary processing, it is transported back to the cassette station 2 in order to be sent outside the system.
[0052] Furthermore, unnecessary devices listed as processing apparatus may not be provided in the wafer processing system, or even if they are provided in the wafer processing system, they may not be processed by the processing apparatus.
[0053] <Implementation Method of Substrate Processing>
[0054] The substrate processing method of the embodiment can be implemented in the wafer processing system 1 described above. The processing will be described in turn below.
[0055] Figure 3 A side cross-section of a portion of a wafer W processed using the substrate processing method of the embodiment is schematically illustrated.
[0056] In this example, such as Figure 3 As shown in (a), a SOC film 52 is formed on a silicon substrate 51 of the wafer W, and an SOG film 53 is formed on the SOC film 52. A resist pattern 54 formed of a chemically amplified resist material is formed on the SOG film 53. These processes are performed, for example, using the patterning film forming apparatus, an exposure apparatus (not shown), a development apparatus, and a heat treatment apparatus, for example, configured in the first block G1, as described above, and a heat treatment apparatus, for example, configured in the second block G2. When forming the resist pattern 54, exposure is performed by EUV irradiation. For reference, in this example, the thickness of the SOC film 52 is 55 nm, the thickness of the SOG film 53 is 10 nm, the height of the resist pattern 54 is 25 nm, and the width of the recesses between the patterns of the resist pattern 54 is approximately 14 nm.
[0057] Next, as Figure 3As shown in (b), the wafer W is irradiated with UV light, for example, at a wavelength of 172 nm, in an inert gas atmosphere, such as nitrogen. This hydrophilizes the resist pattern 54. Hydrophilization is beneficial for subsequent filling processes using metal-containing solutions. Furthermore, UV irradiation smooths the surface of the resist pattern 54, and consequently, the pattern itself is refined. From this perspective, if the pattern is made coarser than the target CD in the preceding development process, refining it through UV irradiation can suppress pattern collapse. Such a UV irradiation apparatus is, for example, a UV irradiation device configured in the second block G2 capable of irradiating the wafer with UV light within the housing.
[0058] Next, the wafer W is spin-coated, for example, in a spin coater serving as a patterning film forming apparatus, with an organometallic material 61 used as a filler liquid to fill the spaces between the patterns. In this case, a solvent that will not dissolve the chemically amplified resist is used as the solvent for the organometallic material 61. In this example, an Al-containing carboxylic acid solution is used as the organometallic material 61, and water is used as the solvent.
[0059] As an example of the composition of an aluminum carboxylate solution used as a filling liquid, solutions with the following proportions can be listed. For example, acrylic acid, lactic acid, acetic acid, etc., can be used as the carboxylate.
[0060] Al → 0.01wt%~4wt%
[0061] Carboxylic acids → 0.05wt%~20.00wt%
[0062] Water → 80wt%~99.9wt%
[0063] However, when using water as a solvent, water has a high surface tension. Therefore, to suppress uneven coating and improve coatability, it is best to add a surfactant. Various surfactants can be used, but fluorinated surfactants with good wetting properties are suitable for the technique of this invention. However, other types of surfactants, such as silicone surfactants and hydrocarbon surfactants, can also be used in the technique of this invention.
[0064] In this example, the filling height of the organometallic material 61 is, for example, 20 nm, which is lower than the height of the resist pattern 54. When the organometallic material 61 is filled between the patterns by spin coating, there is a possibility that a thin layer of organometallic material 61 may remain on the upper surface of the resist pattern 54. This residual thin layer is called overburden. To remove it, it is proposed that after the organometallic material 61 is filled by spin coating, the wafer W is rotated while supplying solvent vapor of the organometallic material 61 to the upper surface of the resist pattern 54. In this example, the solvent is water, so it is sufficient to supply water vapor to the upper surface of the wafer W. Such a process can be implemented by providing a supply unit for supplying solvent vapor within the spin coating apparatus.
[0065] When the filling of organometallic material 61 is completed, as follows: Figure 3 As shown in (d), the wafer W is irradiated with UV light, for example, at a wavelength of 172 nm, in an oxygen-containing atmosphere, such as air. This causes the organometallic material 61 to form a metal oxide film (MOx), and the generated ozone removes the resist pattern 54. The UV irradiation apparatus described above can be used as the device for irradiating with UV light.
[0066] When removing the resist pattern 54, the wafer W can be heat-treated after UV irradiation in an oxygen-containing atmosphere. In this case, for example, a known heat treatment apparatus capable of heating the wafer in an oxygen-containing atmosphere can be used, configured in the second block G2. The heating temperature is, for example, 300°C or higher. By heating after UV irradiation as described above, the resist pattern 54 can be removed more appropriately, allowing the organometallic material 61 to completely become a metal oxide (…). Figure 3 (e)).
[0067] After the above processing, the metal-organic material 61 can be used to form a pattern on the wafer W that reverses the resist pattern 54.
[0068] In addition, after UV irradiation and heating as described above, in order to more reliably and completely remove the resist pattern 54, the surface of the wafer W can be cleaned using a solvent capable of dissolving the resist pattern 54, such as PGMEA or IPA.
[0069] After forming a reverse pattern of the resist pattern 54 on the wafer W using the organometallic material 61, the SOG film 53 is etched, for example, using a CF-type gas plasma. Figure 3 (f)), then, for example, using oxygen-based gas plasma to etch the SOC film 52, thereby as Figure 3 As shown in (g), a reverse pattern of the resist pattern 54 is formed on the substrate 51 of the wafer W.
[0070] The pattern formed by inverting the organometallic material 61 can function as a mask pattern for metal oxides with high etch resistance. Therefore, the film thickness when forming the resist pattern using a chemically amplified resist before inversion can be reduced compared to the past, thus suppressing pattern collapse. For reference, aluminum has a high melting point (2015°C), which is higher than that of silicon oxide films (1710°C), and therefore, aluminum has high resistance to ion sputtering. Therefore, etching of silicon oxide films and carbon can be performed using, for example, Al₂O₃ as a mask.
[0071] Furthermore, in the case of using silicon oxide hard masks studied in previous inversion processes, organic solvents are used. However, in the above embodiment, a metal oxide mask pattern is used, and water can be used as the solvent for the coating. Therefore, the pattern of the positive resist can be prevented from dissolving. That is, the technology of the present invention can also be applied to the pattern of positive resist. Moreover, after coating the organometallic material, etching is not required; as described above, the metal oxide patterning (forming the inversion pattern of the resist pattern 54) can be performed simply by UV irradiation and heat treatment.
[0072] In the above-described embodiment, during the reversal process after filling the spaces between the resist patterns 54 with the organometallic material 61, UV irradiation is performed first, followed by heat treatment. However, if some time is allowed, the resist patterns 54 can be removed by UV irradiation alone. On the other hand, even without UV irradiation, the resist patterns 54 can be removed by sublimation caused by heating. However, in this case, the dissolution and volatilization of the resist patterns 54 occur rapidly, resulting in a correspondingly worse surface roughness.
[0073] Furthermore, in the above embodiments, the heating treatment is performed after UV irradiation, but UV irradiation and heating treatment can also be performed in parallel, or UV irradiation and heating treatment can be performed in parallel after a certain period of time following UV irradiation.
[0074] The substrate processing method of the above-described embodiments can be implemented using a wafer processing system 1, which is a substrate processing apparatus. In this case, a program that can run on the control unit 100 to enable the wafer processing system 1 to execute the above-described substrate processing method can be stored in a computer-readable storage medium.
[0075] According to the inventors' understanding of the present invention, when a filler solution containing, for example, a fluorinated surfactant is coated onto a wafer and then subjected to heat treatment, such as Figure 4As shown in (a), the fluorinated surfactant 73 aggregates on the surface portion of the filler liquid (e.g., aluminum acrylate solution) 72 spin-coated onto the silicon substrate 71 of the wafer W. Furthermore, the fluorinated surfactant 73 is schematically illustrated as having a hydrophilic portion 73a and a hydrophobic portion 73b.
[0076] Here, when the wafer W is directly heated, for example, at 500°C, as... Figure 4 As shown in (b), the acrylic acid gas originating from the aluminum acrylate solution will remain at the interface between the silicon substrate 71 and the filling liquid 72, forming voids V. Furthermore, the acrylic acid in the aluminum acrylate solution will evaporate upon heating; therefore, as a result, Figure 4 As shown in (c), the void V was not completely expelled and remained directly in the aluminum oxide 75 (e.g., Al2O3) that serves as a metal oxide film.
[0077] Regarding this, by subjecting the patient to UV irradiation before heat treatment as described above, it is possible to achieve the following: Figure 5 As shown in (b), it will be as Figure 5 The fluorinated surfactant 73 accumulated on the surface of the filling liquid 72, as shown in (a), is removed. This allows gases, such as those originating from acrylic acid, to be easily released. Therefore, when heating continues thereafter, it is possible to... Figure 5 As shown in (c), the acid (e.g., acrylic acid) in the filling liquid 72 is evaporated without creating voids, thereby achieving the desired effect. Figure 5 As shown in (d), a void-free alumina 75 (e.g., Al2O3) is formed on the silicon substrate 71. This technique is effective when a high-boiling-point surfactant is added to the filling solution.
[0078] As mentioned above, when the wafer is subjected to UV irradiation and then heat treatment after the filling liquid is applied, it is also effective in suppressing the formation of voids.
[0079] In an embodiment of the present invention, as an example, there exists a case where the resist is a chemically amplified resist for EUV exposure (EUV-facing CAR), and the exposure process is an exposure process utilizing EUV irradiation. In this case, EUV is easily absorbed in the upper part of the EUV-facing CAR film and has difficulty reaching the lower part. Therefore, the etch resistance of the formed pattern is uneven and easily becomes insufficient. Furthermore, pattern formation using EUV exposure, compared to conventional exposure using KrF, ArF, i-line, etc., is more likely to form fine patterns. The width of the recesses between the patterns containing the metal filler liquid is, for example, as fine as 5 nm to 20 nm. Therefore, as a result, the metal oxide film pattern formed by the metal filler liquid can be formed with fine detail. In other words, it can be considered that, compared to forming a pattern using the EUV-facing CAR itself, by forming a metal oxide film pattern, it is easier to obtain a finer pattern than conventional exposure processes before EUV exposure while simultaneously improving the uniformity and etch resistance of the pattern.
[0080] The embodiments disclosed herein should be considered illustrative rather than limiting in all respects. The described embodiments may be omitted, substituted, or modified in various ways without departing from the appended claims and their spirit. For example, the constituent elements of the described embodiments can be arbitrarily combined. From such arbitrary combinations, the functions and effects of each constituent element involved in the combination can be obtained, and other functions and effects that will be apparent to those skilled in the art according to the description herein can be obtained.
[0081] Furthermore, the effects described in this specification are merely illustrative or exemplary, and not limiting. That is, the technology of the present invention can achieve the above-described effects and other effects that are obvious to those skilled in the art according to the description of this specification, or the technology of the present invention can achieve other effects that are obvious to those skilled in the art according to the description of this specification, in lieu of the above-described effects.
[0082] Furthermore, the following technical solutions also fall within the technical scope of this invention.
[0083] (1) A substrate processing method for processing a substrate, characterized in that:
[0084] A metal oxide film pattern is formed by filling the spaces between the resist patterns formed on the substrate by the chemically amplified resist with an Al-containing metal filling solution, followed by removing the chemically amplified resist.
[0085] (2) The substrate processing method according to (1) is characterized in that:
[0086] The chemically amplified resist is a resist used for EUV exposure.
[0087] The resist pattern is formed by exposing the chemically amplified resist on the substrate to EUV irradiation.
[0088] (3) The substrate processing method according to (1) is characterized in that: after filling the space between the resist patterns with the Al-containing metal filling liquid, the chemically amplified resist is subjected to at least UV irradiation or heating to remove the chemically amplified resist.
[0089] (4) The substrate processing method according to (3) is characterized in that: after filling the space between the resist patterns with the metal-containing Al-containing liquid, the chemically amplified resist is irradiated with UV, and then the chemically amplified resist is heated to remove the chemically amplified resist.
[0090] (5) The substrate processing method according to (3) is characterized in that: after filling the space between the resist patterns with the Al-containing metal filling liquid, the chemically amplified resist is removed during the period of simultaneous UV irradiation and heating of the chemically amplified resist.
[0091] (6) The substrate processing method according to any one of (1) to (5) is characterized in that: the Al-containing metal filling liquid contains Al as the main component of the metal component, contains carboxylic acid as the organic component, and contains a liquid insoluble in the resist polymer as the solvent.
[0092] (7) The substrate processing method according to (6) is characterized in that: the liquid insoluble in the resist polymer is water.
[0093] (8) The substrate processing method according to (7) is characterized in that: before filling the space between the resist patterns formed by the chemically amplified resist with the Al-containing metal filling liquid, the resist patterns are irradiated with UV in an inert gas atmosphere.
[0094] (9) A substrate processing apparatus capable of processing a substrate, characterized in that it comprises:
[0095] The coating treatment section is capable of filling the spaces between resist patterns formed on the substrate by a chemically amplified resist using an Al-containing metal-filling liquid; and
[0096] At least one of the UV irradiation section and the heat treatment section is used for subsequent removal of the chemically amplified resist.
[0097] (10) A computer storage medium, characterized in that:
[0098] The computer storage medium is a computer-readable storage medium storing a program that can be run on a computer used to control the control unit of the substrate processing apparatus, so that the substrate processing apparatus executes the substrate processing method.
[0099] The substrate processing method involves filling the spaces between the resist patterns formed on the substrate by a chemically amplified resist with an Al-containing metal-filling solution, followed by removing the chemically amplified resist to form a metal oxide film pattern.
[0100] Explanation of reference numerals in the attached figures
[0101] 1. Wafer processing system, 54. Resist pattern, 61. Organometallic material, 100. Control unit, W. Wafer.
Claims
1. A substrate processing method for processing a substrate, characterized in that: A metal oxide film pattern is formed by filling the spaces between the resist patterns formed on the substrate by the chemically amplified resist with an Al-containing metal filling solution, followed by removing the chemically amplified resist.
2. The substrate processing method according to claim 1, characterized in that: The chemically amplified resist is a resist used for EUV exposure. The resist pattern is formed by exposing the chemically amplified resist on the substrate to EUV irradiation.
3. The substrate processing method according to claim 1, characterized in that: After filling the spaces between the resist patterns with the Al-containing metal-containing filling liquid, the chemically amplified resist is removed by at least UV irradiation or heating.
4. The substrate processing method according to claim 3, characterized in that: After filling the spaces between the resist patterns with the Al-containing metal-containing filling liquid, the chemically amplified resist is irradiated with UV light, and then heated to remove the chemically amplified resist.
5. The substrate processing method according to claim 3, characterized in that: After the Al-containing metal-containing filling liquid is filled between the resist patterns, the chemically amplified resist is removed during a period of simultaneous UV irradiation and heating.
6. The substrate processing method according to any one of claims 1 to 5, characterized in that: The Al-containing metal-filled liquid contains Al as the main metal component, carboxylic acid as the organic component, and a liquid insoluble in the resist polymer as the solvent.
7. The substrate processing method according to claim 6, characterized in that: The resist polymer is insoluble in water.
8. The substrate processing method according to claim 7, characterized in that: Before filling the spaces between the resist patterns formed by the chemically amplified resist with the Al-containing metal-containing filling liquid, the resist patterns are subjected to UV irradiation in an inert gas atmosphere.
9. A substrate processing apparatus capable of processing a substrate, the substrate processing apparatus characterized in that it comprises: The coating treatment section is capable of filling the spaces between the resist patterns formed on the substrate by the chemically amplified resist with an Al-containing metal-containing filling liquid; and At least one of the UV irradiation section and the heat treatment section is used for subsequent removal of the chemically amplified resist.
10. A computer storage medium, characterized in that: The computer storage medium is a computer-readable storage medium storing a program that can be run on a computer used to control the control unit of the substrate processing apparatus, so that the substrate processing apparatus executes the substrate processing method. The substrate processing method involves filling the spaces between the resist patterns formed on the substrate by a chemically amplified resist with an Al-containing metal-filling solution, followed by removing the chemically amplified resist to form a metal oxide film pattern.