Consumable chip and consumable box

Abstract

The invention provides a consumable chip and a consumable box, an image forming device comprises a plurality of contact pins, the consumable chip comprises a first electronic module and a first circuit substrate, the first circuit substrate comprises a plurality of first connecting terminals, and the first electronic module is electrically connected with the plurality of first connecting terminals; the grafting chip comprises a second circuit substrate and a second electronic module; the second circuit substrate comprises a plurality of second connecting terminals; when the consumable chip is mounted on the image forming equipment, the contact parts of the plurality of first connecting terminals are respectively in contact with the plurality of contact pins; the plurality of second connecting terminals are not provided with contact parts in contact with the contact pins; the first electronic module is in a first state if receiving the target signal, and the second electronic module is configured to change the target signal in a specified state, so that the first electronic module is in a second state; the grafting chip is high in response speed, the contact form and the welding technology can be set in a unified mode, the process complexity is reduced, and the yield is improved.

Description

Technical Field

[0001] This application relates to the field of printing and imaging technology, and in particular to a consumable chip and a consumable box. Background Technology

[0002] During the printing process, the printing device requires imaging assistance information from the consumable cartridge to complete the imaging process. This imaging assistance information is recorded not only within the printing device itself but also on a consumable chip. The consumable chip can be installed on the consumable cartridge, which can be an ink cartridge filled with ink or a toner cartridge filled with toner. Ink and toner are the recording materials. The consumable chip's function is to control the authentication and data matching between the consumable cartridge and the printing device, and to provide imaging assistance information and record usage status during subsequent imaging. The consumable chip has an electronic module and terminals that electrically connect to the printing device's stylus. The electronic module stores information such as toner dosage, manufacturer information, and serial number. The electronic module can be an application-specific integrated circuit (ASIC) or a microcontroller (MCU).

[0003] When the recording material in the consumable cartridge is depleted, the usage information stored on the consumable chip is also recorded as exhausted or unusable, rendering the chip unusable in the printing device. This creates a need and related technologies for reusing used consumable chips (whose recorded ink level and other status information are no longer brand new), especially used original consumable chips (i.e., manufactured and sold by the printing device manufacturer or its authorized third parties). In this technology, a grafted chip can be used in conjunction with a recycled first circuit board, essentially restoring the functions of a brand-new first circuit board. This allows the first circuit board to be reused, avoiding waste and environmental pollution.

[0004] In existing chip grafting solutions, both the grafting chip and the original chip can receive instructions from the printing device simultaneously. However, at least one target contact of the original chip needs to be shielded / covered. The grafting chip receives the target signal corresponding to the target contact and parses the instructions from the printing device. When it is determined that the instructions need to be responded to by the original chip, the grafting chip sends a target signal to the target contact, thereby enabling the original chip to respond to the instructions from the printing device.

[0005] On the one hand, the original chip can only receive the corresponding target signal after the grafted chip parses the complete instruction, which involves a certain delay; on the other hand, if the grafted chip is slow, the target signal received by the original chip will be severely delayed, resulting in the inability to generate the response signal that the printing device wants in time, and thus being rejected by the printing device.

[0006] On the other hand, when the grafted chip is soldered onto the original chip, the covered target contacts are not easy to observe, which may lead to inaccurate alignment and soldering deviation.

[0007] Furthermore, using both open-cut and full-coverage welding processes on grafted chips increases the complexity of the process and may increase the welding defect rate. Summary of the Invention

[0008] In order to overcome the problems existing in the prior art, the main purpose of this application is to provide a consumable chip and consumable box that enable the original chip to directly receive the target signal without waiting for the grafted chip to analyze it, with fast response speed, and can uniformly set the contact form and welding process, reducing process complexity and improving yield.

[0009] To achieve the above objectives, this application specifically adopts the following technical solution:

[0010] In a first aspect, this application provides a consumable chip for mounting in a consumable box, the consumable box being detachably mounted in an image forming apparatus, the image forming apparatus including a plurality of styluses including a target styluse, the consumable chip including a first electronic module and a first circuit board, the first circuit board including a plurality of first connection terminals, the first electronic module being electrically connected to the plurality of first connection terminals;

[0011] It also includes a grafting chip, which includes a second circuit board and a second electronic module;

[0012] The second circuit board includes a plurality of second connection terminals, and the second electronic module is electrically connected to the plurality of second connection terminals; the plurality of second connection terminals are electrically connected to the plurality of first connection terminals in a one-to-one correspondence; when the consumable chip is installed in the image forming device, the contact portions of the plurality of first connection terminals respectively contact the plurality of styluses; the plurality of second connection terminals are electrically connected to the plurality of styluses via the plurality of first connection terminals, without providing contact portions that contact the styluses;

[0013] At least one of the plurality of first connection terminals receives a target signal from the target stylus; the first connection terminal is defined as a first target terminal, and the second connection terminal electrically connected to the first target terminal is defined as a second target terminal.

[0014] If the first electronic module receives the target signal, it is in a first state. The second electronic module is configured to change the target signal in a specified state, so that the first electronic module is in a second state.

[0015] Secondly, this application also provides a consumable box, the consumable box including a box body and the consumable chip described in the first aspect, the consumable chip being installed in the box body. Attached Figure Description

[0016] Figure 1 A diagram illustrating the communication structure of printing equipment and existing consumable chips;

[0017] Figure 2 This is a schematic diagram of a consumable box in the prior art.

[0018] Figure 3 A schematic diagram of the stylus holder of a printing device;

[0019] Figure 4 An enlarged view of the first stylus on the stylus holder of the printing device;

[0020] Figure 5 This is a schematic diagram of the original consumable chip.

[0021] Figure 6 This is a schematic diagram of a consumable chip in the prior art.

[0022] Figure 7 This is a schematic diagram of the electrical connections of existing consumable chips.

[0023] Figure 8 This is a schematic diagram of the consumable chip of this application;

[0024] Figure 9 This is a schematic diagram of the electrical connection relationship of the consumable chip in this application;

[0025] Figure 10 This is a flowchart illustrating the working method of the consumable chip in this application. Detailed Implementation

[0026] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0027] In the description of this application, unless otherwise expressly specified and limited, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance; unless otherwise specified or explained, the term "multiple" refers to two or more; the terms "connected," "fixed," etc., should be interpreted broadly. For example, "connected" can be a fixed connection, a detachable connection, an integral connection, or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0028] In the description of this specification, it should be understood that the directional terms such as "upper" and "lower" used in the embodiments of this application are used to describe the angles shown in the accompanying drawings and should not be construed as limiting the embodiments of this application. Furthermore, in the context, it should also be understood that when it is mentioned that an element is connected "upper" or "lower" to another element, it can be directly connected to the other element "upper" or "lower," or indirectly connected to the other element "upper" or "lower" through an intermediate element.

[0029] See Figure 1 In the prior art, the image forming device is provided with a communication port 10, and the original consumable chip 21' is provided with an interface module 20. When the two are electrically connected to each other, a communication link is established between the communication port 10 and the interface module 20. The image forming device can be a printing device 1, and the following description takes the image forming device as a printing device 1 as an example.

[0030] See Figure 2 The consumable cartridge 2 may include an upper surface 201, a front surface 202, a rear surface (not shown in the figure), a lower surface, and two side surfaces 203. The upper surface 201 is the surface opposite to the ink outlet of the consumable cartridge; the front surface 202 is generally the surface facing the printing device when the consumable cartridge 2 is installed on the printing device 1, and the consumable chip 21' is generally disposed on the front surface 202 of the consumable cartridge. Therefore, the printing device 1 and Figure 2 The original consumable chip 21' on the consumable cartridge 2 can transmit information via a communication link. During imaging, the original consumable chip 21' is used to provide identification information and information on the usage status of recording materials (such as ink or toner). When the printing device 1 sends a signal to the original consumable chip 21', the printing device 1 is the sender and the original consumable chip 21' is the receiver; conversely, when the original consumable chip 21' sends a signal to the printing device 1, the original consumable chip 21' is the sender and the printing device 1 is the receiver. The information transmission between the printing device 1 and the original consumable chip 21' is achieved through physical electrical contact between the stylus on the printing device 1 and the contact portion of the terminal of the original consumable chip 21'.

[0031] like Figure 3As shown, the printing device 1 includes a stylus holder 11, which includes an upper end face 111, a front end face 112, and multiple styluses, including a target stylus. The upper end face 111 is located in the Y-axis arrow direction, the front end face 112 is located in the X-axis arrow direction, and the multiple styluses are staggered along the Z-axis direction. The multiple styluses include a first stylus 1101, a second stylus 1102, a third stylus 1103, a fourth stylus 1104, and a fifth stylus 1105. Specifically, the first stylus 1101, the second stylus 1102, the third stylus 1103, the fourth stylus 1104, and the fifth stylus 1105 are respectively a data stylus, a chip select stylus (also called a reset stylus), a clock stylus, a power supply stylus, and a ground stylus. Each stylus is connected to... Figure 5 The original consumable chip 21' makes contact with its data terminal, chip select terminal (also called reset terminal), clock terminal, power terminal, and ground terminal, thus forming contact portions. Therefore, when... Figure 5 When the original consumable chip 21' is installed in the printing equipment, data contacts, chip select contacts, clock contacts, power contacts, and ground contacts can be formed on the data terminal, chip select terminal, clock terminal, power terminal, and ground terminal, respectively.

[0032] Printing device 1 sends data signals to the original consumable chip 21' via the data terminal. Printing device 1 also sends a chip select signal to the original consumable chip 21' via the chip select terminal (the chip select signal enables the consumable chip; when the chip select signal is at a logic high level, the consumable chip can execute the relevant instructions sent by the printing device, and when the chip select signal is at a logic low level, the consumable chip stops executing instructions). Printing device 1 sends a periodic, alternating low-level and high-level clock signal to the original consumable chip 21' via the clock terminal. Printing device 1 provides operating voltage to the original consumable chip 21' via the power terminal. Printing device 1 provides a unified reference low level for receiving and sending data between printing device 1 and the original consumable chip 21' via the ground terminal, ensuring the correctness and stability of the communication process.

[0033] like Figure 4As shown, the first contact pin 1101 is made of conductive metal and includes a first contact pin tip 11011, a first contact pin front end 11012, a first contact pin bevel end 11013, and a first contact pin tip 11014. These parts can all make contact with the contact portion of the terminal on the consumable chip for electrical connection. The second contact pin 1102, the third contact pin 1103, the fourth contact pin 1104, and the fifth contact pin 1105 all use similar materials and structures to the first contact pin 1101, only differing in their installation positions in the printing device, which will not be described in detail here. In this way, the consumable chip of the consumable cartridge can communicate with the printing device through the contact pins. In the prior art, the first contact pin 1101, the second contact pin 1102, the third contact pin 1103, the fourth contact pin 1104, and the fifth contact pin 1105 respectively connect to the terminal on the consumable chip via the contact pin tip. Figure 5 The first data terminal 211, first chip select terminal 212, first clock terminal 213, first power terminal 214, and first ground terminal 215 of the original consumable chip shown are in contact. Each terminal is connected to an electronic module on the consumable chip to realize data transmission and storage. The electronic module may include a storage unit and a control unit.

[0034] In related technologies, there is a solution for reusing used original consumable chips (where the recorded ink volume and other usage status information are no longer brand new). This involves grafting compatible chips designed and manufactured by other compatible manufacturers onto the original consumable chip (this type of compatible chip is also called a "grafted chip"). The used original consumable chip and the grafted chip together form a consumable chip that works in close conjunction with the original consumable chip to achieve the functions of a brand new original consumable chip, allowing the used original consumable chip to continue to be used. However, there is still room for optimization in existing consumable chips.

[0035] There is a consumable chip in the prior art, see [link to relevant documentation] Figure 6 The consumable chip 40' includes a first circuit board 210 and a second circuit board 310 that partially covers the first circuit board 210. Overall, the second circuit board 310 that grafts the chip covers the upper part of the first circuit board 210 in the vertical direction (i.e., the direction of the Y-axis arrow in the figure).

[0036] To prevent the first circuit board from responding to all signals from the printing device, which could cause a potential printing stoppage, a second chip select terminal 312 is provided on the second circuit board 310 for grafting the chip. At least a portion of the first chip select terminal is blocked by the second chip select terminal, preventing it from contacting the stylus. The second chip select terminal directly contacts the stylus of the printing device. A first terminal contact portion 312P is formed on the second circuit board 310, covering the chip select terminal contact portion 212P of the first circuit board. The second chip select terminal 312 of the grafted chip directly receives the chip select signal from the printing device. Then, based on the instructions received from the printing device, the grafted chip selectively outputs a target signal through a second port on the second circuit board 310 to the first chip select terminal 212 of the first circuit board, thereby controlling whether the first circuit board 210 receives the chip select signal and controlling whether and when the first circuit board 210 responds to the printing device.

[0037] Figure 6 The circuit connections can be briefly described as follows: Figure 7 The circuit connection diagram is presented.

[0038] See Figure 7 The printing device sends and receives signals to and from the consumable chip via multiple communication lines. These signal lines include power lines, ground lines, clock lines, data lines, and chip select lines (also known as reset lines). These signal lines transmit corresponding signals to the corresponding terminals of the consumable chip via multiple pins on the aforementioned pin holder. After the grafting chip 30 is fixed and electrically connected to the first circuit board 210, the grafting chip 30 receives the corresponding signals sent by the printing device simultaneously with the first circuit board 210 via the first data terminal, first clock terminal, first power terminal, and first ground terminal. The grafting chip 30 independently receives the chip select signal from the chip select line of the printing device and, according to the received instructions, selectively outputs the chip select signal to the first port of the first circuit board through its configured second port, thereby controlling the first circuit board 210.

[0039] However, this existing technology has drawbacks. On the one hand, the original chip can only receive the corresponding target signal after the grafted chip parses the complete instruction, which results in a certain delay. If the processing speed of the grafted chip is slow, the target signal received by the original chip will be severely delayed, resulting in the inability to generate the response signal that the printing device wants in time, and thus being rejected by the printing device.

[0040] On the other hand, when the grafted chip is soldered onto the original chip, the covered target contacts are not easy to observe, which may lead to inaccurate alignment and soldering deviation.

[0041] Furthermore, using both open-cut and full-coverage welding processes on grafted chips increases the complexity of the process and may increase the welding defect rate.

[0042] To address the above problems, this application provides a consumable chip and a consumable box. See also... Figure 8 The consumable chip 40 includes a first electronic module and a first circuit board 210, and also includes a grafting chip, which includes a second circuit board 310 and a second electronic module. The first circuit board 210 includes a plurality of first connection terminals, and the first electronic module is electrically connected to the plurality of first connection terminals. The first circuit board is provided with a front side, and the first connection terminals are located on the front side. Specifically, the grafting chip covers a portion of a first area of ​​the first connection terminals, wherein the first area does not contact the contact pins. Specifically, the first connection terminals include a first data terminal 211, a first chip select terminal 212, a first clock terminal 213, a first power terminal 214, and a first ground terminal 215. The first data terminal, the first clock terminal, the first power terminal, and the first chip select terminal are located on a first side of the first circuit board, and the first ground terminal is located on a second side of the first circuit board. The arrangement of the first connection terminals on the first side and the arrangement of the first connection terminals on the second side are asymmetrical. The components are arranged in two rows. The first data terminal and the first chip select terminal are located in the first row, and the first clock terminal, the first power terminal, and the first ground terminal are located in the second row. The second circuit board has several second connection terminals. The second electronic module is electrically connected to the multiple second connection terminals, and the multiple second connection terminals are electrically connected to the multiple first connection terminals in a one-to-one correspondence. The second circuit board has a first side and a second side. The first side is the side facing away from the first circuit board, and the second side is the side facing the first side. The contact portion of the second connection terminal for electrical connection with the first connection terminal is located on the second side. Specifically, the second connection terminal includes a second data terminal 311, a second chip select terminal 312, a second clock terminal 313, a second power terminal 314, and a second ground terminal 315.

[0043] Specifically, when the grafted chip, fixed to the first circuit board, forms a consumable chip, it is installed in a printing device. The printing device's stylus forms an electrical connection with the contact portions on each of the first connection terminals on the first circuit board 210, thereby transmitting data signals, chip select signals, clock signals, power signals, and ground signals. Multiple second connection terminals are electrically connected to the stylus via multiple first connection terminals, without providing contact portions that contact the stylus. The second data terminal 311 covers the vertically upper portion of the first data terminal 211 (but does not cover the data terminal contact portion 211P of the first data terminal 211), and is electrically connected to the first data terminal 211 by soldering, plugging, or gluing. Therefore, the second data terminal 311 of the grafted chip indirectly receives data signals from the printing device via the data terminal contact portion 211P of the first circuit board. Similarly, the second chip select terminal 312 covers the vertically upper portion of the first chip select terminal 212 and is electrically connected to the first clock terminal 213, indirectly receiving chip select signals from the printing device via the chip select terminal contact 212P; the second clock terminal 313 covers the vertically lower portion of the first clock terminal 213 and is electrically connected to the first clock terminal 213, indirectly receiving clock signals from the printing device via the clock terminal contact 213P; the second power terminal 314 covers the vertically lower portion of the first power terminal 214 and is electrically connected to the first power terminal 214, indirectly receiving power signals from the printing device via the power terminal contact 214P; the second ground terminal 315 covers the vertically lower portion of the first ground terminal 215 and is electrically connected to the first ground terminal 215, indirectly receiving ground signals from the printing device via the ground terminal contact 215P. This type of grafted chip can uniformly set the contact form and welding process, so that all the contact parts of the first connection terminal on the first circuit board are hollowed out (the contact parts are not covered by the grafted chip), without the need to design two types of welding processes, namely hollowing out and full coverage, thus reducing the complexity of the process.

[0044] See Figure 9 The printing device sends and receives signals to the consumable chip via power lines, ground lines, clock lines, data lines, and chip select lines (also known as reset lines). These signal lines transmit the corresponding signals to the corresponding terminals of the consumable chip via multiple pins on the aforementioned pin holder.

[0045] At least one of a plurality of first connection terminals receives a target signal from a target contact pin. This first connection terminal receiving the target signal from the target contact pin is defined as a first target terminal, and a second connection terminal electrically connected to the first target terminal is defined as a second target terminal. After the grafting chip 30 is fixed and electrically connected to the first circuit board 210, the grafting chip 30, via the first data terminal, first chip select terminal, first clock terminal, first power terminal, and first ground terminal of the first circuit board 210, simultaneously receives a corresponding signal sent by the printing device. Specifically, the first circuit board 210 receives the target signal through a first port. The first target terminal is the first chip select terminal, the target contact pin is the chip select contact pin, and the target signal is the chip select signal. That is, the first circuit board 210 and the second terminal of the grafting chip 30... The chip select signal can be received simultaneously from the printing device. The second port is located at the second chip select terminal, and the first port is located at the first chip select terminal. The first port and the second port are electrically connected. In other words, the difference between this application and the prior art is that the grafting chip and the original consumable chip simultaneously receive the chip select signal from the printing device. Furthermore, the grafting chip also has the function of interfering with the first port connected to the first chip select terminal through the second port. When the grafting chip recognizes an instruction sent by the printing device, such as an installation detection instruction or a communication verification instruction, which requires a response from the first circuit board, the grafting chip does not output the first signal, and the target signal is not interfered with. At this time, the chip select signal on the first chip select terminal of the first circuit board is controlled by the printing device, and the first circuit board is in a first state. Specifically, the first state represents the first electronic module sending response data. When the grafting chip detects a received instruction, such as a read or rewrite ink volume instruction, requiring the grafting chip to respond to the printing device, this is a designated state. The grafting chip then prevents the first circuit board from continuing to respond after receiving the instruction. The second electronic module outputs a first signal that alters the target signal through the second target terminal. This interference causes the first electronic module to enter a second state, where the first electronic module does not send response data. At this time, the grafting chip can pull down the chip select signal voltage at the second port, causing the voltage at the first port to drop to a preset voltage range. Specifically, the second electronic module of the grafting chip includes a level modulation unit, which includes a controlled switch. The first end of the controlled switch is connected to the second port, and the second end is connected to a reference ground signal (e.g., the reference ground signal of the grafting chip or the reference ground signal of the first circuit board). When the second electronic module needs to stop the first electronic module from responding, it controls the controlled switch to turn on, creating a pull-down path between the second port and the first port, thereby causing the voltage at the first port to drop to the preset voltage range.Specifically, a preset voltage greater than 0 but less than a logic high level is designated as the first level. When the target signal received by the first circuit board is not at the first level, it is identified as a low level, meaning it is not a valid chip select signal sent by the printing device and enters the second state, which is a non-operating state. Since the grafted chip has confirmed that it needs to respond to the instruction, it is unaffected by the already lowered chip select signal voltage. The second electronic module still considers the chip select signal to be high and continues to operate. Specifically, when the first electronic module determines the chip select signal to be high, it may, based on CMOS technology, consider a value greater than or equal to 0.7VDD; if it is less than this value, it considers it low and does not operate, meaning the operating voltage range is 0.7VDD to 1VDD. However, the grafted chip has a wider high-level judgment range, such as 0.2VDD to 1VDD. This allows it to continue operating as long as the interfered chip select signal is still higher than 0.2VDD after interference, even if the chip select signal is still above its expected threshold. Specifically, VDD is typically 3.3V. The aforementioned logic low level can be between 0.2VDD and 0.7VDD, for example, 0.9V. The first electronic module will recognize this as not being a valid chip select signal and will stop working. However, the grafted chip will not be affected by this logic low level and will continue to operate. The first electronic module is in its first state when it receives the first level, and the first signal output by the second electronic module causes the chip select signal to no longer be at the first level.

[0046] The above embodiments are implemented by lowering the voltage of the second port of the second chip select terminal of the grafted chip. In the research, the applicant discovered that in addition to the chip select signal controlling the first circuit board, the first circuit board can also be controlled by one or a combination of power signal, clock signal, data signal and ground signal. That is to say, the target signal mentioned above can be one or a combination of power signal, clock signal, data signal and ground signal, thereby controlling whether the first circuit board can receive a valid power signal or clock signal or ground signal or data signal by the grafted chip, so as to achieve a similar effect to the above-mentioned chip select signal control.

[0047] The following will combine Figure 9 and Figure 10This paper describes the working method of how the grafting chip 30 and the used first circuit board 210 work together in the consumable chip 40' of this application. Both the grafting chip 30 and the first circuit board 210 can simultaneously receive data signals sent by the printing device. As described in the previous embodiments, the grafting chip can control whether the first circuit board responds to the printing device by interfering with the first circuit board receiving one or a combination of chip select signals, clock signals, power signals, data signals, or ground signals. Therefore, the interfering chip select signals, clock signals, power signals, data signals, or ground signals or a combination thereof output by the grafting chip to the first circuit board through its second port can be collectively referred to as the first signal (also called the interference signal). When the second port of the grafting chip outputs the first signal to the first port of the first circuit board, the first circuit board is in a non-working state; when it does not output the first signal to the first port of the first circuit board, the first circuit board is in a working state. The usage status information recorded by the used first circuit board may no longer reflect the actual situation of a brand new consumable box or a recycled and disposed consumable box. Therefore, the grafting chip is needed to replace the first circuit board in responding to the access and usage status signals of the printing device. Conversely, the first circuit board also has some functional modules that can continue to respond to signals normally, such as encryption algorithm processing and installation detection. These signals can be responded to by the first circuit board. In some embodiments, these functional modules can be reduced on the grafting chip, thereby reducing the development cost of the grafting chip.

[0048] exist Figure 10In step S01, the grafting chip of the consumable chip and the first circuit board simultaneously receive the chip select signal sent by the printing device. The printing device can send corresponding instructions to the consumable chip according to the desired function, such as read instructions, write instructions, encryption instructions, etc. Some printing devices also have functions such as detecting whether the consumable cartridge is installed, detecting sensor status, detecting the remaining material level, or whether the connection terminal is short-circuited. Therefore, the printing device can also send relevant instruction information to the consumable chip accordingly. In some embodiments, the conventional instructions sent by the printing device adopt a verification method combining the original code and the inverse code. For example, the control code included in the read instruction is hexadecimal 51 (binary record is 0101 0001), and the inverse code of 51 is AE (binary record is 1010 1110). Therefore, the read instruction issued by the printing device includes at least 51 AE; similarly, the control code of the write instruction is hexadecimal 21, so the write instruction issued by the printing device includes at least 21 DE. In contrast, the instructions issued by the printing device to detect whether the consumable cartridge (i.e. the consumable chip) has been installed use a verification method that combines the original code with the copy code. For example, the installation detection instruction to detect whether the BK (black) consumable cartridge has been installed includes the control code 81 in hexadecimal, and its copy code is also 81. Therefore, the installation detection instruction issued by the printing device includes at least 81 81.

[0049] Since the instruction information sent by the printing device has the distinguishable characteristics described above, the grafting chip can determine whether the first circuit board needs to respond based on the characteristics or content of the instruction information (step S02).

[0050] To ensure that the first circuit board 210 can also respond to the printing device's commands in a timely manner, Figure 9 In the circuit connection diagram, both the first circuit board 210 and the grafting chip 30 can receive data signals transmitted by the printing device to the data terminal via the data line. The data signals include instruction information issued by the printing device. The printing device transmits various signals to the consumable chip through multiple signal lines, including data signals, clock signals, power signals, chip select signals, and ground signals. When the data signal sent by the printing device contains an installation detection instruction, the grafting chip does not output a first signal to the first circuit board, making the first circuit board in an active state. When the data signal sent by the printing device does not contain an installation detection instruction, the grafting chip outputs a first signal to the first circuit board through the second port, making the first circuit board in a non-active state.

[0051] In some embodiments, if the first circuit board 210 can continue to respond normally to the installation detection command, the grafting chip 30 can choose to have the first circuit board 210 respond to the installation detection command, i.e., the first circuit board 210 is in a working state; while other commands are responded to by the grafting chip itself, i.e., the first circuit board 210 is in a non-working state. Since the installation detection command has the first information of original code + copy code, i.e., special detection information, the second electronic module of the grafting chip can determine whether the command is an installation detection command simply by judging whether the received command information has the characteristics of "original code + copy code", without needing to specifically confirm whether the command information includes the specific value of "81 81". When the command received by the consumable chip does not include the first information, the target signal is interfered with, and the second electronic module responds to the command; when the received command includes the first information, the target signal is not interfered with, and the first electronic module responds to the command.

[0052] Such grafted chips can be judged using relatively simple logic comparison circuits or programs, which speeds up the judgment process and reduces the complexity of the grafted chip. On the other hand, the grafted chip can also use an elimination method to determine whether the received instruction information has the characteristics of "original code + inverted code" rather than "original code + copy code". If it does, it indicates that the instruction is not an installation detection instruction. This method of judging the characteristics of the instruction control code allows the grafted chip to complete the judgment using relatively simple logic comparison circuits or programs. Moreover, when the grafted chip detects the "original code + inverted code" characteristic, it does not need to receive the complete instruction information to complete the instruction type judgment, enabling faster instruction type differentiation.

[0053] Therefore, when the grafting chip 30 determines that the printing device's instruction requires its own response (e.g., the aforementioned read or write instruction), it can output a first signal to the first port of the first circuit board through the second port (step S03) during or after the instruction is received, according to the aforementioned determination method. Specifically, the grafting chip lowers the voltage of the chip select signal at the second port, causing the voltage at the first port to be interfered with and drop to a preset voltage range. This prevents the first circuit board from receiving the corresponding valid signal (for the first circuit board, this means not receiving a valid chip select signal, clock signal, power signal, data signal, or ground signal) and thus prevents it from continuing to respond to the just received instruction. On the other hand, when the grafting chip 30 determines that the printing device's instruction requires the first circuit board to respond (e.g., the aforementioned installation detection instruction), it does not output the first signal to the first circuit board (step S04) and does not lower the voltage of the chip select signal at the second port, allowing the first circuit board to respond to the just received instruction, thereby meeting the communication and detection requirements of the printing device. As an optional example, the second electronic module of the grafting chip can remain silent for this installation detection instruction to avoid interfering with the normal response of the first circuit board. The consumable chip of this application enables the first circuit board and the grafting chip to receive chip select signals simultaneously, so that when the first circuit board needs to respond, it can respond quickly without waiting for the grafting chip to parse and process the data.

[0054] When the printing device communicates with the consumable chip, the printing device sends a clock signal to the first circuit board. This clock signal includes a specific clock cycle, which consists of a continuous low-level first clock and a high-level second clock. When the first circuit board responds to the installation detection command, it sends a high-level signal to the printing device during the first clock and outputs a low-level signal during the second clock. If the printing device can detect this high-level signal during the first clock cycle, it considers that the consumable cartridge corresponding to the installation detection command (such as the BK consumable cartridge mentioned above) has been installed on the printing device. In this embodiment, because the consumable chip uses the first circuit board to respond to this installation detection command, the consumable chip can output the desired high-level, low-level, or high-impedance state of the printing device during the corresponding clock cycle.

[0055] This application also provides a consumable cartridge, which includes a cartridge body and a consumable chip from any of the foregoing embodiments, the consumable chip being mounted on the cartridge body. The consumable cartridge is detachably mounted on a printing device. When the consumable chip is mounted on the consumable cartridge, a first circuit board is located between the cartridge body and the grafting chip. When the consumable chip is mounted on the printing device, the grafting chip covers a portion of a first area of ​​a plurality of first connection terminals, the area of ​​which is less than 1 / 2 of the area of ​​the first connection terminals; wherein, the first area does not contact the aforementioned plurality of contact pins.

[0056] In the above embodiments, the second electronic module of the grafted chip may specifically include a control unit and a storage unit. The storage unit can be a common non-volatile storage unit, such as EPROM, EEPROM, FLASH, ferroelectric storage unit, phase-change storage unit, etc., or it can be a volatile storage unit plus a power supply, such as SRAM plus a battery or capacitor, DRAM plus a battery or capacitor, etc. The control unit is used to control the communication between the consumable chip and the printing device. The printing device reads information from the electronic module and stores information in the electronic module. The control unit may specifically be a microcontroller (MCU), FPGA, application-specific integrated circuit (ASIC), etc. The composition of the electronic module can be selected according to actual needs, and is not limited here.

[0057] The above description is merely a preferred embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A consumable chip, the consumable chip being mounted in a consumable box, the consumable box being detachably mounted in an image forming apparatus, the image forming apparatus including a plurality of styluses, the plurality of styluses including a target styluse, the consumable chip including a first electronic module and a first circuit board, the first circuit board including a plurality of first connection terminals, the first electronic module being electrically connected to the plurality of first connection terminals; Its features are, It also includes a grafting chip, which includes a second circuit board and a second electronic module; The second circuit board includes a plurality of second connection terminals, and the second electronic module is electrically connected to the plurality of second connection terminals; the plurality of second connection terminals are electrically connected to the plurality of first connection terminals in a one-to-one correspondence; when the consumable chip is installed in the image forming device, the contact portions of the plurality of first connection terminals respectively contact the plurality of contact pins; At least one of the plurality of first connection terminals receives a target signal from the target stylus; the first connection terminal is defined as a first target terminal, and the second connection terminal electrically connected to the first target terminal is defined as a second target terminal. If the first electronic module receives the target signal, it is in a first state. The second electronic module is configured to change the target signal in a specified state, so that the first electronic module is in a second state.

2. The consumable chip according to claim 1, characterized in that, The second electronic module is configured as follows: When it is determined that the instruction sent by the image forming device needs to be responded to by the first circuit board, the first circuit board receives the target signal, and the first electronic module is in a first state, wherein the first state is characterized by the first electronic module outputting response data. The designated state is defined as determining that the instruction sent by the image forming device needs to be responded to by the grafting chip. The second electronic module changes the target signal in the designated state so that the first electronic module is in the second state, wherein the second state indicates that the first electronic module does not send response data.

3. The consumable chip according to claim 2, characterized in that, The first target terminal is a first chip select terminal, the second target terminal is a second chip select terminal, and the target signal is a chip select signal.

4. The consumable chip according to claim 3, wherein the first circuit board is in the first state when it receives the chip select signal at a first level; and the first electronic module is in the second state when the second electronic module changes the chip select signal to a level different from the first level.

5. The consumable chip according to claim 4, characterized in that, When the received instruction does not include the first information, the target signal is interfered with, and the second electronic module responds to the instruction; when the received instruction includes the first information, the target signal is not interfered with, and the first electronic module responds to the instruction. The image forming apparatus sends a clock signal to the first circuit board. The clock signal includes a specific clock cycle, which comprises a continuous low-level first clock and a high-level second clock. When the first electronic module responds to the instruction, it sends a high-level signal to the image forming device at the first clock and outputs a low-level signal to the image forming device at the second clock.

6. The consumable chip according to claim 1, characterized in that, When the image forming device sends an instruction that requires a response from the second electronic module, the second electronic module pulls down the voltage received by the first target terminal. The second electronic module receives the pulled-down voltage and sends response data. The first electronic module receives the pulled-down voltage and is in a second state. The second state indicates that the first electronic module does not send response data.

7. The consumable chip according to claim 6, characterized in that, The first connection terminal also includes a first data terminal, a first clock terminal, a first power supply terminal, and a first ground terminal. The first data terminal, the first clock terminal, the first power terminal, and the first chip select terminal are located on the first side of the first circuit board, and the first ground terminal is located on the second side of the first circuit board. The arrangement of the first connection terminals on the first side is asymmetrical with the arrangement of the first connection terminals on the second side.

8. The consumable chip according to any one of claims 1 to 7, characterized in that, The consumable box includes a box body. When the consumable chip is installed in the box body, the first circuit board is located between the box body and the grafting chip.

9. The consumable chip according to claim 8, characterized in that... When the consumable chip is installed in the image forming device, the grafting chip covers a portion of the first area of ​​the plurality of first connection terminals, and the area of ​​the portion of the first area is less than 1 / 2 of the area of ​​the first connection terminals; wherein, the first area does not contact the plurality of contact pins.

10. A consumable box, characterized in that, It includes a housing and a consumable chip as described in claim 9, wherein the consumable chip is mounted in the housing.

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