Band-gap reference circuit capable of configuring curvature compensation current
By introducing a configurable curvature compensation current into the bandgap reference circuit, and combining the reference module and the curvature compensation module, the curvature effect problem of traditional bandgap reference circuits in the high temperature and ultra-low temperature regions is solved, achieving ultra-low temperature drift across the entire temperature range, which is suitable for power management, data converters and sensor systems.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-01-13
- Publication Date
- 2026-04-14
AI Technical Summary
Traditional bandgap reference circuits exhibit significant curvature effects in both high-temperature and ultra-low-temperature regions, causing the output voltage to deviate nonlinearly with temperature changes. Existing solutions cannot effectively suppress the effects of second-order and higher temperatures, and cannot achieve ultra-low temperature drift across the entire temperature range.
A bandgap reference circuit with configurable curvature compensation current is adopted. By combining the reference module and the curvature compensation module, a reference voltage and a curvature compensation current are generated to accurately compensate the output voltage. The reference module consists of a first PNP bipolar transistor, a second PNP bipolar transistor, an operational amplifier, a field-effect transistor, and a resistor network. The curvature compensation module consists of multiple transistors and resistors. The magnitude of the compensation current is controlled by an external configuration code.
It achieves ultra-low temperature drift across the entire temperature range, reducing the output voltage temperature drift to less than 1 ppm/℃, significantly improving the temperature characteristics of traditional bandgap reference circuits, and is suitable for power management, data converters, and sensor systems.
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Figure CN121857896A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of integrated circuit design, and more particularly to a bandgap reference circuit with configurable curvature compensation current. Background Technology
[0002] A bandgap reference circuit (BGR) is a core module in analog integrated circuits that provides a stable, temperature-independent reference voltage (typically 1.2V~1.25V, close to the silicon bandgap voltage). It is widely used in power management, data converters, sensors, and other systems. Its basic principle is to use a reference voltage with a positive temperature coefficient (PTC), such as the base-emitter voltage V0 of a bipolar transistor. BE ) and negative temperature coefficient (NTC, such as thermal voltage V) T The voltage components (a linear combination of kT / q) are added together to achieve a zero-temperature-drift reference output across the entire temperature range.
[0003] While traditional bandgap reference circuits can achieve low temperature drift (e.g., ±10ppm / ℃) in the medium-low temperature range (e.g., -40℃ to 85℃), they exhibit significant curvature effects in the high-temperature range (e.g., 125℃ and above) or ultra-low temperature range (e.g., -40℃). This means the second derivative of the temperature coefficient is not zero, leading to a non-linear deviation in the output voltage with temperature (typically ±30~50ppm / ℃). The curvature distortion of the bandgap output voltage mainly originates from the base-emitter voltage Vo of the bipolar transistor. BE The temperature coefficient includes not only a linear term for temperature (approximately -2 mV / ℃), but also a quadratic term (proportional to the square of the temperature), and the quadratic term has a significant impact on V under high-temperature conditions. BE The impact is more significant; in actual manufacturing, deviations in parameters such as the emitter area ratio and base resistance of transistors will further amplify higher-order temperature effects; existing solutions (such as linear superposition of first-order PTC / NTC and simple exponential compensation) can only eliminate the first-order temperature coefficient and cannot effectively suppress the effects of second-order and higher-order temperatures.
[0004] Therefore, there is an urgent need for a structure that can accurately compensate for the curvature distortion of the bandgap reference circuit and achieve ultra-low temperature drift (e.g., within ±1ppm / ℃) across the entire temperature range (especially at extreme temperature points). Summary of the Invention
[0005] To address the aforementioned technical problems, this application provides a bandgap reference circuit with configurable curvature compensation current. This bandgap reference circuit with configurable curvature compensation current includes: a reference module and a curvature compensation module;
[0006] The reference module is used to generate a reference voltage. The reference module consists of a first PNP bipolar transistor, a second PNP bipolar transistor, an operational amplifier, a first field-effect transistor, a second field-effect transistor, a third field-effect transistor, and a resistor network.
[0007] The resistor network includes a first adjustable resistor, a second resistor, a third resistor, a fourth resistor, a fifth adjustable resistor, and a sixth resistor;
[0008] The curvature compensation module is used to generate curvature compensation current. The curvature compensation module includes an eleventh transistor, a twelfth transistor, a thirteenth transistor, a fourteenth transistor, a fifteenth transistor, a sixteenth transistor, a seventeenth transistor, an eighteenth transistor, a nineteenth transistor, a twentieth transistor, a twenty-first transistor, a twenty-second transistor, a twenty-third transistor, a twenty-fourth transistor, a twenty-fifth transistor, a twenty-sixth transistor, a twenty-seventh transistor, a twenty-eighth transistor, a twenty-ninth transistor, and a thirtieth transistor.
[0009] Optionally, the source of the first field-effect transistor in the reference module is connected to the power supply voltage, the gate of the first field-effect transistor is connected to the drain of the first field-effect transistor, the drain of the first field-effect transistor is connected to the drain of the third field-effect transistor, the gate of the third field-effect transistor is connected to the output stage of the operational amplifier, the source of the third field-effect transistor is connected to one end of the sixth resistor, the other end of the sixth resistor is grounded, the source of the second field-effect transistor is connected to the power supply voltage, the drain of the second field-effect transistor is connected to one end of the fourth resistor, the other end of the fourth resistor is connected to one end of the fifth adjustable resistor, the other end of the fifth adjustable resistor is connected to one end of the first adjustable resistor and one end of the second resistor, the other end of the first adjustable resistor is connected to the negative input terminal of the operational amplifier and one end of the third resistor, the other end of the third resistor is connected to the emitter of the first PNP bipolar transistor, the other end of the second resistor is connected to the emitter of the second PNP bipolar transistor and the positive input terminal of the operational amplifier, the base and collector of the first PNP bipolar transistor are grounded, and the base and collector of the second PNP bipolar transistor are grounded.
[0010] Optionally, in the curvature compensation module, the source of the eleventh transistor is connected to the power supply voltage, the gate of the eleventh transistor is connected to the gates of the thirteenth, eighteenth, and twenty-fifth transistors respectively, the drain of the eleventh transistor is connected to the source of the twelfth transistor, the gate of the twelfth transistor is connected to the gates of the nineteenth and twenty-sixth transistors respectively, the source of the thirteenth transistor is connected to the power supply voltage, the drain of the thirteenth transistor is connected to the sources of the fourteenth and fifteenth transistors, the gate of the fourteenth transistor is connected to the second voltage divider, and the drain of the fourteenth transistor is connected to the drain of the sixteenth transistor. The gate of the fifteenth transistor is connected to the base-emitter voltage of the second PNP bipolar transistor. The drain of the fifteenth transistor is connected to the drain of the seventeenth transistor. The gate of the sixteenth transistor is connected to the drain of the sixteenth transistor. The source of the sixteenth transistor is grounded. The gate of the seventeenth transistor is connected to the drain of the seventeenth transistor. The source of the seventeenth transistor is grounded. The source of the eighteenth transistor is connected to the power supply voltage. The drain of the eighteenth transistor is connected to the source of the nineteenth transistor. The drain of the nineteenth transistor is connected to the source of the twentieth and twenty-first transistors. The gate of the twentieth transistor is connected to the power supply voltage. The drain of the eighteenth transistor is connected to the source of the nineteenth transistor. The drain of the nineteenth transistor is connected to the source of the twentieth and twenty-first transistors. Connected to the third voltage divider, the drain of the twentieth transistor is connected to the drain of the twenty-third transistor. The gate of the twenty-first transistor is connected to the base-emitter voltage of the second PNP bipolar transistor. The drain of the twenty-first transistor is connected to the drain of the twenty-fourth transistor. The gate of the twenty-second transistor is connected to the drain of the seventeenth transistor. The source of the twenty-second transistor is grounded. The gate of the twenty-fourth transistor is connected to the drain of the twenty-fourth transistor. The source of the twenty-fourth transistor is grounded. The source of the twenty-fifth transistor is connected to the power supply voltage. The drain of the twenty-fifth transistor is connected to the source of the twenty-sixth transistor. The drain of transistor 26 is connected to the source of transistors 27 and 28. The gate of transistor 27 is connected to the first voltage divider. The drain of transistor 27 is connected to the gate of transistor 30. The gate of transistor 28 is connected to the base-emitter voltage of transistor 2. The drain of transistor 28 is connected to the drain of transistor 29. The gate of transistor 29 is connected to the drain of transistor 29. The source of transistor 29 is grounded. The source of transistor 30 is grounded. The gate of transistor 30 is connected to the drain of transistor 24.
[0011] Optionally, the fifth adjustable resistor includes: a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, a tenth transistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, and a fifteenth resistor. One end of the seventh resistor is connected to the source of the fourth, fifth, sixth, seventh, eighth, ninth, and tenth transistors, as well as one end of the fifteenth resistor. The drain of the fourth transistor is connected to one end of the eighth resistor, and the drain of the fifth transistor is connected to one end of the ninth resistor. One end of the resistor is connected, the drain of the sixth transistor is connected to one end of the tenth resistor, the drain of the seventh transistor is connected to one end of the eleventh resistor, the drain of the eighth transistor is connected to one end of the twelfth resistor, the drain of the ninth transistor is connected to one end of the thirteenth resistor, the drain of the tenth transistor is connected to one end of the fourteenth resistor, the other end of the tenth resistor is connected to the eleventh resistor, the other end of the twelfth resistor is connected to one end of the thirteenth resistor, the other end of the thirteenth resistor is connected to one end of the fourteenth resistor, and the other end of the fifteenth resistor is connected to the other ends of the fourteenth, eleventh, ninth, and eighth resistors respectively.
[0012] Optionally, the drain of the second field-effect transistor outputs a reference voltage, and the other end of the fourth resistor is connected to a curvature compensation current.
[0013] Optionally, the drain of the twelfth transistor is connected to an external current, and the drain of the thirtieth transistor outputs a curvature compensation current.
[0014] This application provides a bandgap reference circuit with configurable curvature compensation current, comprising: a reference module and a curvature compensation module; the reference module generates a reference voltage and is composed of a first PNP bipolar transistor, a second PNP bipolar transistor, an operational amplifier, a first field-effect transistor, a second field-effect transistor, a third field-effect transistor, and a resistor network; the resistor network includes a first adjustable resistor, a second resistor, a third resistor, a fourth resistor, a fifth adjustable resistor, and a sixth resistor; the curvature compensation module generates a curvature compensation current and includes eleventh to thirtieth transistors. This bandgap reference circuit compensates for the output voltage using the compensation current generated by the curvature compensation module, thereby improving the accuracy of the output voltage. Attached Figure Description
[0015] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.
[0016] Figure 1 A schematic diagram of the circuit structure of the reference module provided in the embodiments of this application;
[0017] Figure 2 A schematic diagram of the circuit structure of the fifth adjustable resistor provided in the embodiments of this application;
[0018] Figure 3 A schematic diagram of the circuit structure of the curvature compensation module provided in the embodiments of this application.
[0019] The accompanying drawings have illustrated specific embodiments of this application, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concept of this application to those skilled in the art through reference to specific embodiments. Detailed Implementation
[0020] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0021] The terms "first," "second," "third," "fourth," etc. (if present) in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein.
[0022] In this application, the terms "exemplary" or "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design described as "exemplary" or "for example" in this application should not be construed as being more preferred or advantageous than other embodiments or designs. Specifically, the use of terms such as "exemplary" or "for example" is intended to present the relevant concepts in a specific manner.
[0023] The technical solution of this application and how the technical solution of this application solves the above-mentioned technical problems are described in detail below with specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments. The embodiments of this application will now be described with reference to the accompanying drawings.
[0024] This application provides a bandgap reference circuit with configurable curvature compensation current, comprising: a reference module and a curvature compensation module; wherein, the reference module is used to generate a reference voltage, and the curvature compensation module is used to generate a curvature compensation current, and the bandgap reference circuit accurately compensates the reference voltage through the generated curvature compensation current.
[0025] Figure 1 This is a schematic diagram of the circuit structure of a reference module provided in an embodiment of this application. Figure 1 As shown, the reference module consists of a first PNP bipolar transistor Q1, a second PNP bipolar transistor Q2, an operational amplifier AMP, a first field-effect transistor M1, a second field-effect transistor M2, a third field-effect transistor M3, and a resistor network; wherein the resistor network includes a first adjustable resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth adjustable resistor R5, and a sixth resistor R6.
[0026] Specifically, in the reference module, the source of the first field-effect transistor M1 is connected to the power supply voltage, the gate of the first field-effect transistor M1 is connected to the drain of the first field-effect transistor M1, the drain of the first field-effect transistor M1 is connected to the drain of the third field-effect transistor M3, the gate of the third field-effect transistor M3 is connected to the output stage of the operational amplifier AMP, the source of the third field-effect transistor M3 is connected to one end of the sixth resistor R6, and the other end of the sixth resistor R6 is grounded. The source of the second field-effect transistor M2 is connected to the power supply voltage, the drain of the second field-effect transistor M2 is connected to one end of the fourth resistor R4, and the other end of the fourth resistor R4 is connected to the fifth... One end of the adjustable resistor R5 is connected to the ground. The other end of the fifth adjustable resistor R5 is connected to one end of the first adjustable resistor R1 and one end of the second resistor R2. The other end of the first adjustable resistor R1 is connected to the negative input terminal of the operational amplifier AMP and one end of the third resistor R3. The other end of the third resistor R3 is connected to the emitter of the first PNP bipolar transistor Q1. The other end of the second resistor R2 is connected to the emitter of the second PNP bipolar transistor Q2 and the positive input terminal of the operational amplifier AMP. The base and collector of the first PNP bipolar transistor Q1 are grounded, and the base and collector of the second PNP bipolar transistor Q2 are grounded. The drain of the second field-effect transistor M2 outputs a reference voltage VOUT. The other end of the fourth resistor is connected to the curvature compensation current Iadj.
[0027] Understandably, the reference module achieves the effect of canceling out the positive and negative temperature coefficients of the output voltage by superimposing the base-emitter voltage of the bipolar transistor with a positive temperature coefficient and the resistive thermal voltage with a negative temperature coefficient, thus realizing a zero temperature coefficient output of the bandgap reference voltage across the entire temperature range.
[0028] Figure 2 A schematic diagram of the circuit structure of the fifth adjustable resistor provided in an embodiment of this application. Figure 2As shown, the fifth adjustable resistor includes: fourth transistor M4, fifth transistor M5, sixth transistor M6, seventh transistor M7, eighth transistor M8, ninth transistor M9, tenth transistor M10, seventh resistor R7, eighth resistor R8, ninth resistor R9, tenth resistor R10, eleventh resistor R11, twelfth resistor R12, thirteenth resistor R13, fourteenth resistor R14, and fifteenth resistor R15; wherein, one end of the seventh resistor R7 is connected to the source of the fourth transistor M4, fifth transistor M5, sixth transistor M6, seventh transistor M7, eighth transistor M8, ninth transistor M9, and tenth transistor M10, as well as one end of the fifteenth resistor R15; the drain of the fourth transistor M4 is connected to one end of the eighth resistor R8, and the drain of the fifth transistor M5 is connected to... One end of the ninth resistor R9 is connected to the first end of the tenth resistor R10. The drain of the sixth transistor M6 is connected to one end of the eleventh resistor R11. The drain of the eighth transistor R8 is connected to one end of the twelfth resistor R12. The drain of the ninth transistor M9 is connected to one end of the thirteenth resistor R13. The drain of the tenth transistor M10 is connected to one end of the fourteenth resistor R14. The other end of the tenth resistor R10 is connected to the eleventh resistor R11. The other end of the twelfth resistor R12 is connected to one end of the thirteenth resistor R13. The other end of the thirteenth resistor R13 is connected to one end of the fourteenth resistor R14. The other end of the fifteenth resistor R15 is connected to the other ends of the fourteenth resistor R14, the eleventh resistor R11, the ninth resistor R9, and the eighth resistor R8, respectively.
[0029] Specifically, the gates of transistors M4, M5, M6, M7, M8, M9, and M10 are controlled by a combination of switching signals D0-D3, thereby controlling the conduction of the corresponding transistors. The adjustable resistor R5 is configured using control codes D3-D0 to form different resistance values, which are used to adjust the output voltage VOUT of the bandgap reference. The correspondence between the resistance value of the fifth adjustable resistor R5 and the switching signals D0-D3 is shown in Table 1.
[0030] Table 1. Correspondence between the resistance value of the fifth adjustable resistor and the switching signals D0-D3
[0031]
[0032] Figure 3 This is a schematic diagram of the circuit structure of the curvature compensation module provided in an embodiment of this application. Figure 3As shown, in the curvature compensation module, the source of the eleventh transistor M11 is connected to the power supply voltage VDD. The gate of the eleventh transistor M11 is connected to the gates of the thirteenth transistor M13, the eighteenth transistor M18, and the twenty-fifth transistor M25. The drain of the eleventh transistor M11 is connected to the source of the twelfth transistor M12. The gate of the twelfth transistor M12 is connected to the gates of the nineteenth transistor M19 and the twenty-sixth transistor M26. The source of the thirteenth transistor M13 is connected to the power supply voltage VDD. The drain of the thirteenth transistor M13 is connected to the sources of the fourteenth transistor M14 and the fifteenth transistor M15. The gate of the fourteenth transistor M14 is connected to the second voltage divider V2. The drain of the fourteenth transistor M14 is connected to the source of the tenth transistor M15. The drains of six transistors M16 are connected together. The gate of the fifteenth transistor M15 is connected to the base-emitter voltage Vbe2 of the second PNP bipolar transistor. The drain of the fifteenth transistor M15 is connected to the drain of the seventeenth transistor M17. The gate of the sixteenth transistor M16 is connected to the drain of the sixteenth transistor M16. The source of the sixteenth transistor M16 is grounded. The gate of the seventeenth transistor M17 is connected to the drain of the seventeenth transistor M17. The source of the seventeenth transistor M17 is grounded. The source of the eighteenth transistor M18 is connected to the power supply voltage VDD. The drain of the eighteenth transistor M18 is connected to the source of the nineteenth transistor M19. The drain of the nineteenth transistor M19 is connected to the drain of the twentieth transistor M20 and the twenty-first transistor M20. The source of transistor M17 is connected to the source of transistor M28. The gate of transistor M20 is connected to the third voltage divider V3. The drain of transistor M20 is connected to the drain of transistor M23. The gate of transistor M21 is connected to the base-emitter voltage Vbe2 of the second PNP bipolar transistor. The drain of transistor M21 is connected to the drain of transistor M24. The gate of transistor M22 is connected to the drain of transistor M17. The source of transistor M22 is grounded. The gate of transistor M24 is connected to the drain of transistor M24. The source of transistor M24 is grounded. The source of transistor M25 is connected to the power supply voltage VDD. The drain of transistor M25 is connected to the source of transistor M26 (the 26th transistor). The drain of transistor M26 is connected to the sources of transistors M27 (the 27th transistor) and M28 (the 28th transistor). The gate of transistor M27 is connected to the first voltage divider voltage V1. The drain of transistor M27 is connected to the gate of transistor M30 (the 30th transistor). The gate of transistor M28 is connected to the base-emitter voltage Vbe2 of the second PNP bipolar transistor. The drain of transistor M28 is connected to the drain of transistor M29 (the 29th transistor). The gate of transistor M29 is connected to the drain of transistor M29. The source of transistor M29 is grounded. The source of transistor M30 is grounded.The gate of the thirtieth transistor M30 is connected to the drain of the twenty-fourth transistor M24. An external current I0 is connected to the drain of the twelfth transistor M20, and the drain of the thirtieth transistor M30 outputs a curvature compensation current Iadj.
[0033] Understandably, the curvature compensation module circuit is based on an external current I0 and configures the first voltage divider V1, the second voltage divider V2, and the third voltage divider V3 to control the curvature compensation current Iadj, thereby accurately compensating the output voltage of the bandgap reference and meeting the requirements of systems with higher precision requirements for the reference.
[0034] like Figure 1 As shown, without considering curvature compensation, we have:
[0035]
[0036]
[0037]
[0038]
[0039] From the above formula, we can obtain:
[0040]
[0041]
[0042] in, This is the base-emitter voltage of the second PNP bipolar transistor Q2. This is the base-emitter voltage of the first PNP bipolar transistor Q1. This is the base-emitter current of the first PNP bipolar transistor Q1. V is the base-emitter current of the second PNP bipolar transistor Q2. c V is the voltage at the lower node of the adjustable resistor R5. a V is the negative input voltage of the operational amplifier AMP. b V is the voltage at the positive input terminal of the operational amplifier AMP. In theoretical calculations, V... a =V b According to the final formula, the VOUT output can be adjusted by changing the resistance ratio. Simulation results show that the temperature drift of the output reference voltage without curvature compensation can reach 14.7 ppm / ℃.
[0043] Considering curvature compensation, the curvature correction current Iadj is drawn from between R4 and R5 based on the VOUT level. At this time, the current through R4 increases Iadj, thus increasing the VOUT level.
[0044]
[0045] As can be seen from the above expression, a compensation voltage component Iadj is added to the original bandgap reference output voltage. Through simulation, it can be seen that the temperature drift of the output reference voltage after curvature compensation is reduced to within 1ppm / ℃, which is a significant improvement compared to the temperature drift of 14.7ppm / ℃ of the traditional bandgap reference voltage.
[0046] The bandgap reference circuit with configurable curvature compensation current proposed in this application includes a reference module and a curvature compensation module. The reference module generates a reference voltage and is composed of a first PNP bipolar transistor, a second PNP bipolar transistor, an operational amplifier, a first field-effect transistor, a second field-effect transistor, a third field-effect transistor, and a resistor network. The resistor network includes a first adjustable resistor, a second resistor, a third resistor, a fourth resistor, a fifth adjustable resistor, and a sixth resistor. The curvature compensation module generates a curvature compensation current and includes eleventh to thirtieth transistors. The curvature compensation module of this bandgap reference circuit configures the magnitude of the compensation current through an external configuration code, achieving the purpose of compensating the output voltage curve of the bandgap reference, improving the output voltage accuracy, and solving the influence of the high-order temperature characteristics of the base-emitter voltage of bipolar transistors on the final output voltage in traditional bandgap reference circuits. This provides a superior bandgap reference solution for the field of sensor signal detection.
[0047] Other embodiments of this application will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of this application that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this application are indicated by the following claims.
[0048] It should be understood that this application is not limited to the precise structure described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this application is limited only by the appended claims.
Claims
1. A bandgap reference circuit with configurable curvature compensation current, characterized in that, include: Reference module and curvature compensation module; The reference module is used to generate a reference voltage. The reference module consists of a first PNP bipolar transistor, a second PNP bipolar transistor, an operational amplifier, a first field-effect transistor, a second field-effect transistor, a third field-effect transistor, and a resistor network. The resistor network includes a first adjustable resistor, a second resistor, a third resistor, a fourth resistor, a fifth adjustable resistor, and a sixth resistor; The curvature compensation module is used to generate curvature compensation current. The curvature compensation module includes an eleventh transistor, a twelfth transistor, a thirteenth transistor, a fourteenth transistor, a fifteenth transistor, a sixteenth transistor, a seventeenth transistor, an eighteenth transistor, a nineteenth transistor, a twentieth transistor, a twenty-first transistor, a twenty-second transistor, a twenty-third transistor, a twenty-fourth transistor, a twenty-fifth transistor, a twenty-sixth transistor, a twenty-seventh transistor, a twenty-eighth transistor, a twenty-ninth transistor, and a thirtieth transistor.
2. The method according to claim 1, characterized in that, The source of the first field-effect transistor in the reference module is connected to the power supply voltage. The gate of the first field-effect transistor is connected to the drain of the first field-effect transistor. The drain of the first field-effect transistor is connected to the drain of the third field-effect transistor. The gate of the third field-effect transistor is connected to the output stage of the operational amplifier. The source of the third field-effect transistor is connected to one end of the sixth resistor, and the other end of the sixth resistor is grounded. The source of the second field-effect transistor is connected to the power supply voltage. The drain of the second field-effect transistor is connected to one end of the fourth resistor. The other end of the fourth resistor is connected to one end of the fifth adjustable resistor. The other end of the fifth adjustable resistor is connected to one end of the first adjustable resistor and one end of the second resistor. The other end of the first adjustable resistor is connected to the negative input terminal of the operational amplifier and one end of the third resistor. The other end of the third resistor is connected to the emitter of the first PNP bipolar transistor. The other end of the second resistor is connected to the emitter of the second PNP bipolar transistor and the positive input terminal of the operational amplifier. The base and collector of the first PNP bipolar transistor are grounded, and the base and collector of the second PNP bipolar transistor are grounded.
3. The method according to claim 1, characterized in that, The source of the eleventh transistor in the curvature compensation module is connected to the power supply voltage. The gate of the eleventh transistor is connected to the gates of the thirteenth, eighteenth, and twenty-fifth transistors, respectively. The drain of the eleventh transistor is connected to the source of the twelfth transistor. The gate of the twelfth transistor is connected to the gates of the nineteenth and twenty-sixth transistors, respectively. The source of the thirteenth transistor is connected to the power supply voltage. The drain of the thirteenth transistor is connected to the sources of the fourteenth and fifteenth transistors. The gate of the fourteenth transistor is connected to the second voltage divider, and the drain of the fourteenth transistor is connected to the drain of the sixteenth transistor. The gate of the fifteenth transistor is connected to the base-emitter voltage of the second PNP bipolar transistor. The drain of the fifteenth transistor is connected to the drain of the seventeenth transistor. The gate of the sixteenth transistor is connected to the drain of the sixteenth transistor. The source of the sixteenth transistor is grounded. The gate of the seventeenth transistor is connected to the drain of the seventeenth transistor. The source of the seventeenth transistor is grounded. The source of the eighteenth transistor is connected to the power supply voltage. The drain of the eighteenth transistor is connected to the source of the nineteenth transistor. The drain of the nineteenth transistor is connected to the source of the twentieth and twenty-first transistors. The gate of the twentieth transistor is connected to the base-emitter voltage of the second PNP bipolar transistor. The voltage is divided into three parts. The drain of the twentieth transistor is connected to the drain of the twentieth transistor. The gate of the twentieth transistor is connected to the base-emitter voltage of the second PNP bipolar transistor. The drain of the twentieth transistor is connected to the drain of the twentieth transistor. The gate of the twentieth transistor is connected to the drain of the seventeenth transistor. The source of the twentieth transistor is grounded. The gate of the twentieth transistor is connected to the drain of the twentieth transistor. The source of the twentieth transistor is grounded. The source of the twentieth transistor is connected to the power supply voltage. The drain of the twentieth transistor is connected to the source of the twentieth transistor. The drain of transistor 16 is connected to the source of transistors 27 and 28. The gate of transistor 27 is connected to the first voltage divider. The drain of transistor 27 is connected to the gate of transistor 30. The gate of transistor 28 is connected to the base-emitter voltage of transistor 2. The drain of transistor 28 is connected to the drain of transistor 29. The gate of transistor 29 is connected to the drain of transistor 29. The source of transistor 29 is grounded. The source of transistor 30 is grounded. The gate of transistor 30 is connected to the drain of transistor 24.
4. The method according to claim 2, characterized in that, The fifth adjustable resistor includes: a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, a tenth transistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, and a fifteenth resistor. One end of the seventh resistor is connected to the source of the fourth, fifth, sixth, seventh, eighth, ninth, and tenth transistors, as well as one end of the fifteenth resistor. The drain of the fourth transistor is connected to one end of the eighth resistor. The drain of the fifth transistor is connected to one end of the ninth resistor. The drain of the sixth transistor is connected to one end of the tenth resistor. The drain of the seventh transistor is connected to one end of the eleventh resistor. The drain of the eighth transistor is connected to one end of the twelfth resistor. The drain of the ninth transistor is connected to one end of the thirteenth resistor. The drain of the tenth transistor is connected to one end of the fourteenth resistor. The other end of the tenth resistor is connected to the eleventh resistor. The other end of the twelfth resistor is connected to one end of the thirteenth resistor. The other end of the thirteenth resistor is connected to one end of the fourteenth resistor, the eleventh resistor, the ninth resistor, and the eighth resistor, respectively.
5. The method according to claim 2, characterized in that, The drain of the second field-effect transistor outputs a reference voltage, and the other end of the fourth resistor is connected to a curvature compensation current.
6. The method according to claim 3, characterized in that, The drain of the twelfth transistor is connected to an external current, and the drain of the thirtieth transistor outputs a curvature compensation current.