Single-ended MEMS input-to-differential output circuit and implementation method thereof

Abstract

The invention belongs to the technical field of integrated circuits, and provides a single-ended MEMS input-to-differential output circuit and an implementation method thereof. Through the CMFB circuit, effective signals of the CMEMS are averagely distributed to the VBIAS end and the VIN end, the maximum signal range which can be processed by the Pre-amplifier is doubled, meanwhile, a single-end-to-differential circuit is omitted, power consumption and noise are reduced, and circuit performance is improved. Compared with the prior art, according to the technical scheme, an impedance matching circuit or a capacitance compensation circuit is omitted, so that signal attenuation caused by parasitism is reduced, and performance is improved. Particularly, the stray capacitance of the VBIAS end can be ignored. The problem of performance deterioration under the condition that the stray capacitance of the VBIAS end is too large in the prior art is solved.

Description

Technical Field

[0001] This invention belongs to the field of integrated circuit technology, and specifically relates to a single-ended MEMS input-to-differential output circuit and its implementation method. Background Technology

[0002] A pre-amplifier is a signal conditioning circuit used to amplify weak signals. In various sensors, such as MEMS microphones, after receiving external sound pressure signals, the MEMS outputs a weak voltage signal. This signal has almost no driving capability and cannot directly drive external circuits. Therefore, a pre-amplifier is needed to amplify the signal or enhance its driving capability. A pre-amplifier needs to have very low noise, easily adjustable signal gain, the ability to accept sufficiently large input signals, and ideally, support differential output to directly drive subsequent differential circuits.

[0003] Prior art 1 is a traditional solution, see [link to previous text] Figure 1 The input signal is received from the VIN terminal, buffered by a gain G, and then buffered by a gain of -1 to convert it into a differential signal. Since the signal appears entirely at the VIN terminal, when processing large signals, a capacitor divider is required for the input signal, which reduces the effective signal amplitude. Furthermore, the gain stage with a gain of -1 increases noise, consumes more power, and has lower performance.

[0004] Prior art 2, see Figure 2 By treating VBIAS and VIN as differential signal inputs and connecting them to single-ended preamplifiers, differential output is achieved. Because the signal is differentially distributed across the VBIAS and VIN ports, both ports receive half of the total signal, reducing the risk of overflow. This allows for more efficient processing of large signals with lower noise. However, since the sensor's C_MEMS is not an ideal capacitor (e.g., a large parasitic capacitance (C_PARA) exists at the VBIAS port), the signal cannot be evenly distributed across the VBIAS and VIN ports, necessitating impedance matching. This impedance matching, however, leads to significant signal attenuation, ultimately resulting in severe performance degradation. Summary of the Invention

[0005] In view of the above problems, the present invention proposes a single-ended MEMS input to differential output circuit, comprising:

[0006] The first amplifier circuit, the second amplifier circuit, and the common-mode feedback circuit

[0007] The input terminal of the first amplifier circuit is electrically connected to the first port of C_MEMS, and the input terminal of the first amplifier circuit is also electrically connected to the first charge pump circuit; the input terminal of the second amplifier circuit is electrically connected to the second port of C_MEMS; wherein, C_MEMS is a variable capacitor in the MEMS sensor;

[0008] The output terminals of the first amplifier circuit and the second amplifier circuit are connected to the input terminal of the common-mode feedback circuit, and the output terminal of the common-mode feedback circuit is connected to the second port of C_MEMS to directly drive C_MEMS.

[0009] Furthermore, the output terminal of the common-mode feedback circuit is connected to the input terminal of either the first amplifier circuit or the second amplifier circuit.

[0010] Furthermore, the Charge Pump circuit is a DC-DC converter circuit that provides polarization voltage to the MEMS capacitor. The first Charge Pump circuit is electrically connected to the first amplifier circuit through a first high-impedance device.

[0011] Furthermore, the first amplifier circuit includes:

[0012] First amplifier, second high-impedance device, VCM_BIAS common-mode voltage bias circuit and AC coupling capacitor;

[0013] The VCM_BIAS common-mode voltage bias circuit is connected in series with the second high-impedance device and then electrically connected to the input terminal of the first amplifier to provide bias voltage for the first amplifier. The input terminal of the first amplifier is also electrically connected to the first Charge pump circuit and the first port of capacitor C_MEMS through AC coupling capacitors respectively.

[0014] Furthermore, the second amplifier circuit includes:

[0015] Second amplifier;

[0016] The input terminal of the second amplifier is electrically connected to the second port of C_MEMS. At the same time, the capacitor C_PARA is electrically connected to the input terminal of the second amplifier and the second port of C_MEMS at the same node.

[0017] Furthermore, the output terminal of the common-mode feedback circuit is electrically connected to the capacitor C_PARA, the input terminal of the second amplifier, and the second port of C_MEMS at a common node, forming the VBIAS terminal of the common-mode feedback circuit output driving C_MEMS;

[0018] The output terminals of the first amplifier and the second amplifier are connected to the input terminal of the common-mode feedback circuit.

[0019] The output of the first amplifier is connected to the input of the common-mode feedback circuit via series resistors R1 and R2; a node is led out between series resistors R1 and R2 and connected to the negative input of the first amplifier.

[0020] The output of the second amplifier is connected to the input of the common-mode feedback circuit through series resistors R4 and R3; a node is led out between series resistors R4 and R3 and connected to the negative input of the second amplifier.

[0021] Furthermore, the circuit also includes:

[0022] Capacitor C_PARA is electrically connected to C_MEMS, and a node is led out between capacitors C_PARA and C_MEMS and electrically connected to the second amplifier through a third capacitor C1.

[0023] The output of the common-mode feedback circuit is electrically connected to the input of the second amplifier via the device VDC. The output of the common-mode feedback circuit is also connected to the second charge pump circuit, which is connected to the VBIAS port of C_MEMS via a third high-impedance device.

[0024] Based on the same inventive concept, this invention also provides a method for implementing a single-ended MEMS input-to-differential output circuit, including:

[0025] The charge pump circuit provides polarization voltage to the VIN terminal of the C_MEMS through a high-impedance device; the VIN terminal is the terminal with the smaller parasitic capacitance among the two terminals of the C_MEMS.

[0026] The voltage at the VIN terminal is coupled to the input terminal of the first amplifier through an AC coupling capacitor.

[0027] The signal is amplified by the first amplifier and then output to VOUTP; wherein, the input bias of the first amplifier is provided by a bias circuit formed by the second high-impedance device and the VCM_BIAS common-mode bias circuit connected in series.

[0028] Furthermore, the method also includes:

[0029] The VBIAS terminal of C_MEMS is connected to the parasitic capacitor C_PARA, and the signal at the VBIAS terminal is driven by the signal of the device VDC(321) through the CMFB.

[0030] The signal is amplified by the second amplifier and then output to VOUTN.

[0031] The input terminal of the common-mode feedback circuit detects the output voltages of the first amplifier and the second amplifier. The voltage detected by the input terminal of the common-mode feedback circuit is compared with the voltage at the VCM terminal. After comparison, the voltage is amplified by operation and output to the VBAS terminal. The output signals VOUTP and VOUTN of the first amplifier and the second amplifier are a pair of common-mode differential signals of the VCM.

[0032] Furthermore, the method also includes:

[0033] The gain of the first and second amplifiers and the common-mode signal are adjusted by resistors R1 / R2 / R3 / R4. The resistance values ​​of resistors R1 and R4 are set to be equal, the resistance values ​​of resistors R2 and R3 are set to be equal, and VOUTP and VOUTN directly output the common-mode signal.

[0034] The output voltage of the charge pump provides polarization voltage to the VBIAS port of C_MEMS through a high-impedance device, while the CMFB provides feedback signal through the device VDC and capacitor C1.

[0035] The beneficial effects of this invention are:

[0036] 1. Compared with the prior art 1, the technical solution of this application realizes the average distribution of the effective signal of C_MEMS on VBIAS and VIN terminals through the CMFB circuit, which doubles the maximum signal range that the pre-amplifier can process. At the same time, it eliminates the single-ended to differential circuit, reduces power consumption and noise, and improves circuit performance.

[0037] 2. Compared with prior art 2, the technical solution of this application eliminates the impedance matching circuit, or capacitor compensation circuit, thereby reducing signal attenuation caused by parasitic capacitance and improving performance. In particular, it can ignore the parasitic capacitance at the VBIAS terminal. This solves the problem of performance degradation in prior art solution 2 when the parasitic capacitance at the VBIAS terminal is too large.

[0038] Other features and advantages of the invention will be set forth in the following description, and will be apparent in part from the description, or may be learned by practicing the invention. The objects and other advantages of the invention may be realized and obtained by means of the structures pointed out in the description and the drawings. Attached Figure Description

[0039] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0040] Figure 1 This is a circuit topology diagram of the prior art 1 in this invention;

[0041] Figure 2 This is a circuit topology diagram of the prior art 2 in this invention;

[0042] Figure 3 This is a topology diagram of a single-ended MEMS input-to-differential output circuit according to an embodiment of the present invention;

[0043] Figure 4 This is a topology diagram of a single-ended MEMS input-to-differential output circuit according to an embodiment of the present invention;

[0044] Figure 5 This is a topology diagram of a single-ended MEMS input-to-differential output circuit according to an embodiment of the present invention. Detailed Implementation

[0045] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0046] It should be noted that the terms "first," "second," etc., used in this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate for the embodiments of this application described herein. In this application, the terms "upper," "lower," "left," "right," "front," "rear," "top," "bottom," "inner," "outer," "middle," "vertical," "horizontal," "lateral," "longitudinal," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings.

[0047] This invention proposes a single-ended MEMS input-to-differential output circuit, see [link to relevant documentation]. Figure 3 include:

[0048] The first amplifier circuit, the second amplifier circuit, and the common-mode feedback circuit

[0049] The input terminal of the first amplifier circuit is electrically connected to the first port of C_MEMS304, and the input terminal of the first amplifier circuit is also electrically connected to the first charge pump circuit; the input terminal of the second amplifier circuit is electrically connected to the second port of C_MEMS; wherein, C_MEMS304 is a variable capacitor in the MEMS sensor;

[0050] The output terminals of the first amplifier circuit and the second amplifier circuit are connected to the input terminal of the common-mode feedback circuit, and the output terminal of the common-mode feedback circuit is connected to the second port of C_MEMS304 to directly drive C_MEMS304.

[0051] The output of the common-mode feedback circuit is connected to the input of either the first amplifier circuit or the second amplifier circuit.

[0052] The Charge Pump circuit is a DC-DC converter circuit that provides polarization voltage to the MEMS capacitor. The first Charge Pump circuit is electrically connected to the first amplifier circuit through the first high-impedance device 302.

[0053] In some specific embodiments, the first amplifier circuit includes:

[0054] The first amplifier 307, the second high-impedance device 306, the VCM_BIAS common-mode voltage bias circuit 310, and the AC coupling capacitor 303;

[0055] The VCM_BIAS common-mode voltage bias circuit 310 is connected in series with the second high-impedance device 306 and then electrically connected to the input terminal of the first amplifier 307 to provide bias voltage for the first amplifier 307. The input terminal of the first amplifier 307 is also electrically connected to the first port of the first charge pump circuit 301 and the first port of C_MEMS 304 through the AC coupling capacitor 303 respectively.

[0056] In some specific embodiments, the second amplifier circuit includes:

[0057] Second amplifier 308;

[0058] The input terminal of the second amplifier 308 is electrically connected to the second port of C_MEMS304. Meanwhile, the capacitor C_PARA305 is electrically connected to the input terminal of the second amplifier 308 and the second port of C_MEMS304 at the same node.

[0059] In some specific embodiments, the output terminal of the common-mode feedback circuit 309 is electrically connected to the capacitor C_PARA305, the input terminal of the second amplifier 308, and the second port of C_MEMS304 at a common node, forming the output of the common-mode feedback circuit 309 driving the VBIAS terminal of C_MEMS304;

[0060] The output terminals of the first amplifier 307 and the second amplifier 308 are connected to the input terminal of the common-mode feedback circuit 309;

[0061] The output terminal of the first amplifier 307 is connected to the input terminal of the common-mode feedback circuit through series resistors R1 (313) and R2 (314); a node is led out between series resistors R1 (313) and R2 (314) and connected to the negative input terminal of the first amplifier 307.

[0062] The output of the second amplifier 308 is connected to the input of the common-mode feedback circuit 309 through series resistors R4 (316) and R3 (315); a node is led out between series resistors R4 (316) and R3 (315) and connected to the negative input of the second amplifier 308.

[0063] In some alternative embodiments, see Figure 4 The circuit further includes:

[0064] The output of the common-mode feedback circuit 309 is electrically connected to the input of the second amplifier 308 through the device VDC321. The output of the common-mode feedback circuit 309 is also connected to the second charge pump circuit 331, which is connected to the VBIAS port of C_MEMS through the third high-impedance device 322.

[0065] In some alternative embodiments, see Figure 5 The circuit further includes:

[0066] Capacitor C_PARA305 is electrically connected to C_MEMS304, and a node is led out between capacitors C_PARA305 and C_MEMS304 and electrically connected to the second amplifier 308 through a third capacitor C1 (320);

[0067] The output of the common-mode feedback circuit 309 is electrically connected to the input of the second amplifier 308 through the device VDC321. The output of the common-mode feedback circuit 309 is also connected to the second charge pump circuit 331, which is connected to the VBIAS port of C_MEMS through the third high-impedance device 322.

[0068] Specifically, the common-mode feedback circuit 309 outputs a low-voltage CMFB signal, which drives the input of amplifier 308 through device VDC. If the common-mode voltage of the CMFB low-voltage signal matches the common-mode input voltage of the amplifier, device VDC321 is not needed. VBIAS is the high-voltage terminal, providing polarization voltage to C_MEMS304. Device 322 is a high-impedance device; the high-voltage output of the second Chargepump 331 provides polarization voltage to the VBIAS port of C_MEMS304 through the high-impedance device 322. At the same time, the common-mode feedback circuit 309 provides a feedback signal for CMFB through device VDC (321) and capacitor C1 (320).

[0069] Based on the same inventive concept, this invention also provides a method for implementing a single-ended MEMS input-to-differential output circuit, applied in the single-ended MEMS input-to-differential output circuit of this invention, comprising:

[0070] The first charge pump circuit provides polarization voltage to the VIN terminal of C_MEMS304 through the high-impedance device 302; wherein, the VIN terminal is the terminal with smaller parasitic capacitance among the two terminals of C_MEMS;

[0071] The voltage at the VIN terminal is coupled to the input terminal of the first amplifier 307 via the AC coupling capacitor 303.

[0072] The signal is amplified by the first amplifier 307 and then output to VOUTP; wherein, the input bias of the first amplifier 307 is provided by a bias circuit formed by the second high-impedance device 306 and the VCM_BIAS common-mode voltage connected in series.

[0073] In some optional embodiments, the method further includes:

[0074] The VBIAS terminal of C_MEMS304 is connected to the parasitic capacitor C_PARA305. The VBIAS terminal is a port with a large parasitic capacitance. The signal at the VBIAS terminal is transmitted to the input terminal of the second amplifier 308 through the third capacitor C1.

[0075] The signal is amplified by the second amplifier 308 and then output to VOUTN;

[0076] The input terminal of the common-mode feedback circuit 309 detects the output voltage of the first amplifier 307 and the second amplifier 308, compares it with VCM311, and outputs it to the VBAS terminal after operational amplification. The negative feedback adjusts the outputs VOUTP and VOUTN of the first amplifier 307 and the second amplifier 308 to be a pair of differential signals of VCM in common mode.

[0077] In some optional embodiments, the method further includes:

[0078] The gain of the first and second amplifiers and the common-mode signal are adjusted by resistors R1 / R2 / R3 / R4. The resistance values ​​of resistors R1 and R4 are set to be equal, the resistance values ​​of resistors R2 and R3 are set to be equal, and VOUTP and VOUTN directly output the common-mode signal.

[0079] The high voltage output of the second charge pump circuit 331 provides polarization voltage to the VBIAS port of C_MEMS304 through the high impedance device 322, while VCMFB provides feedback signal through device VDC321 and capacitor C1 (320).

[0080] The following is combined Figure 3 The embodiments of the present invention will be described in detail below.

[0081] 301 is the first charge pump circuit, used to provide polarization voltage to the MEMS capacitor. 302 is a high-impedance device. The first charge pump 301 applies voltage to device 304, i.e., the VIN terminal of C_MEMS, through the high-impedance device 302. The VIN terminal is the end of C_MEMS with smaller parasitic capacitance. C_MEMS is the variable capacitor of the MEMS sensor, which changes with changes in external physical signals. In this embodiment, the VIN terminal is a high-voltage terminal, or it can be a negative-voltage terminal. Through AC coupling capacitor 303, the voltage at the VIN terminal is coupled to the input port of the first amplifier 307. The operating bias voltage of the input port of the first amplifier 307 is provided by the second high-impedance device 306 and the VCM_BIAS common-mode voltage bias circuit 310. The VBIAS terminal of C_MEMS is the port with larger parasitic capacitance, which is C_PARA305. In this embodiment, VBIAS is driven by the CMFB common-mode feedback circuit 309. Since the output of the CMFB common-mode feedback circuit 309 is a low-impedance output, the parasitic capacitance 305 has no effect on the signal, i.e., it will not cause signal attenuation. VBIAS is connected to the input of the second amplifier 308. VOUTP and VOUTN are the outputs of the first amplifier 307 and the second amplifier 308, respectively. CMFB is the common-mode feedback circuit 309. The function of the common-mode feedback circuit 309 is to detect the common-mode signals of VOUTP and VOUTN, which is usually considered to be (VOUTP+VOUTN) / 2, and then compare it with VCM311. After being amplified by the operational amplifier, it is used as the output of the CMFB common-mode feedback circuit 309. The function of the CMFB common-mode feedback circuit 309 is to make (VOUTP+VOUTN) / 2 = VCM through negative feedback, so that VOUTP and VOUTN are a pair of differential signals with a common-mode ...

[0082] Unlike existing technology 2, the larger parasitic capacitance end of C_MEMS, typically the VBIAS terminal, is driven by the common-mode feedback circuit. Therefore, this capacitor C_PARA can be completely ignored, instead of forming a signal attenuation circuit with the C_MEMS common-mode feedback circuit 309, which would cause signal attenuation and performance degradation. The CMFB common-mode feedback circuit 309 drives the VBIAS terminal by detecting the outputs of VOUTP and VOUTN, making VIN and VBIAS a pair of differential signals with opposite amplitudes, and VOUTP and VOUTN also a pair of differential signals. This allows half of the C_MEMS signal to act on the first amplifier 307, and the other half on the second amplifier 308, enabling the pre-amplifier to handle larger input signals without clipping. Simultaneously, the reduction in single-ended to differential circuitry also reduces noise.

[0083] The signal balancing of VOUTP and VOUTN in this application is achieved by the CMFB circuit, which is independent of the impedance matching across the C_MEMS capacitor. Therefore, there is no need to compensate for the parasitic capacitance, eliminating the need for the impedance matching circuit in prior art 2. Furthermore, the size of the parasitic capacitance 305C_PARA no longer affects the distribution of the useful signal at the VBIAS and VIN terminals.

[0084] Compared to prior art 1, the technical solution of this application achieves an even distribution of the effective signal of C_MEMS across the VBIAS and VIN terminals through the CMFB circuit, doubling the maximum signal range that the pre-amplifier can handle. It also eliminates the need for a single-ended to differential converter circuit, reducing power consumption and noise, and improving circuit performance. Furthermore, compared to prior art 2, it eliminates the need for an impedance matching circuit, or capacitor compensation circuit, thereby reducing signal attenuation caused by parasitic capacitance and improving performance. In particular, it can ignore the parasitic capacitance at the VBIAS terminal. This solves the performance degradation problem of prior art solution 2 when the parasitic capacitance 305 at the VBIAS terminal is too large.

[0085] The following is combined Figure 4 The embodiments of the present invention will be described in detail below.

[0086] See Figure 4 Amplifiers 307 and 308 amplify and enhance the MEMS signal. The amplifier outputs are VOUTP and VOUTN, respectively. Resistors R1 / R2 / R3 / R4 are used for gain adjustment and common-mode signal extraction. R1, R2, R3, and R4 form a series resistor voltage divider circuit. If R1 = R4 and R2 = R3, then signal 312 is the common-mode signal of VOUTP and VOUTN.

[0087] It should be noted that resistors R1 and R4 may not be required in this invention, in which case the amplifier gain is 1. The common-mode signal is compared with and amplified by VCM to obtain the output signal VCMFB of the CMFB amplifier. The VCMFB signal is a low-voltage signal, which drives the input terminal of amplifier 308 through device VDC. If the common-mode of VCMFB matches the common-mode input level of the amplifier, device VDC321 is not required. VBIAS is the high-voltage terminal, providing polarization voltage to C_MEMS. Device 322 is a high-impedance device. The high-voltage output of the second Charge pump circuit 331 provides polarization voltage to the VBIAS port of C_MEMS through the high-impedance device 322, while VCMFB provides feedback signal through device VDC321 and capacitor C1 (320). Device 306 is a high-impedance device, providing common-mode bias voltage to amplifier 307.

[0088] The following is combined Figure 5 The embodiments of the present invention will be described in detail below.

[0089] See Figure 5 This invention utilizes a first charge pump circuit 301 and a second charge pump circuit 331. The first charge pump circuit 301 provides a positive voltage, while the second charge pump circuit 305 provides a negative voltage, thus expanding the amplitude of the MEMS polarization voltage. One end of the C_MEMS is positively charged, and the other end is negatively charged, but a bias voltage is provided through AC coupling capacitor 303, capacitor 320, and a second high-impedance device 306. Device VDC 321 provides a feedback signal, ensuring that the amplifier's input common-mode voltage remains within the normal common-mode range.

[0090] The above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application.

Claims

1. A single-ended MEMS input to differential output circuit, characterized in that, include: The first amplifier circuit, the second amplifier circuit, and the common-mode feedback circuit The input terminal of the first amplifier circuit is electrically connected to the first port of C_MEMS, and the input terminal of the first amplifier circuit is also electrically connected to the first charge pump circuit (301); the input terminal of the second amplifier circuit is electrically connected to the second port of C_MEMS (304); wherein, C_MEMS (304) is a variable capacitor in the MEMS sensor; The output terminals of the first amplifier circuit and the second amplifier circuit are connected to the input terminal of the common-mode feedback circuit, and the output terminal of the common-mode feedback circuit is connected to the second port of C_MEMS(304) to directly drive C_MEMS(304).

2. The circuit according to claim 1, characterized in that, The output of the common-mode feedback circuit is connected to the input of either the first amplifier circuit or the second amplifier circuit.

3. The circuit according to claim 1, characterized in that, The Charge Pump circuit is a DC-DC converter circuit that provides polarization voltage to the MEMS capacitor. The first Charge Pump circuit (301) is electrically connected to the first amplifier circuit through the first high-impedance device (302).

4. The circuit according to claim 3, characterized in that, The first amplifier circuit includes: The first amplifier (307), the second high-impedance device (306), the VCM_BIAS common-mode voltage bias circuit (310), and the AC coupling capacitor (303) are included. The VCM_BIAS common-mode voltage bias circuit (310) is connected in series with the second high-impedance device (306) and then electrically connected to the input terminal of the first amplifier (307) to provide bias voltage for the first amplifier (307). The input terminal of the first amplifier (307) is also electrically connected to the first port of the first Charge pump circuit (301) and the capacitor C_MEMS (304) through the AC coupling capacitor (303).

5. The circuit according to claim 4, characterized in that, The second amplifier circuit includes: Second amplifier (308); The input terminal of the second amplifier (308) is electrically connected to the second port of C_MEMS (304). At the same time, the capacitor C_PARA (305) is electrically connected to the input terminal of the second amplifier (308) and the second port of C_MEMS (304) at the same node.

6. The circuit according to claim 5, characterized in that, The output terminal of the common-mode feedback circuit (309) is electrically connected to the capacitor C_PARA (305), the input terminal of the second amplifier (308), and the second port of C_MEMS (304) at a common node, forming the output of the common-mode feedback circuit driving the VBIAS terminal of C_MEMS (304); The output terminals of the first amplifier (307) and the second amplifier (308) are connected to the input terminal of the common-mode feedback circuit (309); The output terminal of the first amplifier (307) is connected to the input terminal of the common-mode feedback circuit through series resistors R1 (313) and R2 (314); a node is led out between series resistors R1 (313) and R2 (314) and connected to the negative input terminal of the first amplifier (307). The output of the second amplifier (308) is connected to the input of the common-mode feedback circuit through series resistors R4 (316) and R3 (315); a node is led out between series resistors R4 (316) and R3 (315) and connected to the negative input of the second amplifier (308).

7. The circuit according to claims 1-6, characterized in that, The circuit also includes: Capacitor C_PARA is electrically connected to C_MEMS (304), and a node is led out between capacitor C_PARA and C_MEMS and electrically connected to the second amplifier (308) through a third capacitor C1; The output of the common-mode feedback circuit is electrically connected to the input of the second amplifier (308) through the device VDC (321). The output of the common-mode feedback circuit (309) is also connected to the second charge pump circuit (331). The second charge pump circuit (331) is connected to the VBIAS port of C_MEMS (304) through the third high-impedance device (322).

8. A method for implementing a single-ended MEMS input-to-differential output circuit, characterized in that, include: The charge pump circuit provides polarization voltage to the VIN terminal of C_MEMS (304) through a high-impedance device (302); wherein, the VIN terminal is the terminal with smaller parasitic capacitance among the two terminals of C_MEMS; The voltage at the VIN terminal is coupled to the input terminal of the first amplifier (307) via an AC coupling capacitor. The signal is amplified by the first amplifier (307) and then output to VOUTP; wherein the input bias of the first amplifier (307) is provided by a bias circuit formed by the second high-impedance device (306) and the VCM_BIAS common-mode bias circuit (310) connected in series.

9. The method according to claim 8, characterized in that, The method further includes: The VBIAS terminal of C_MEMS(304) is connected to the parasitic capacitance C_PARA, and the signal at the VBIAS terminal is driven by the signal of the device VDC(321) through the CMFB. The signal is amplified by the second amplifier (308) and then output to VOUTN; The input terminal of the common-mode feedback circuit detects the output voltage of the first amplifier (307) and the second amplifier (308). The voltage detected by the input terminal of the common-mode feedback circuit is compared with the voltage of the VCM terminal. After comparison, the voltage is amplified by operation and output to the VBAS terminal. Among them, the output VOUTP and VOUTN signals of the first amplifier (307) and the second amplifier (308) are a pair of common-mode differential signals of the VCM.

10. The method according to claim 9, characterized in that, The method further includes: The gain of the first amplifier (307) and the second amplifier (308) are adjusted and the common-mode signal is extracted by resistors R1 / R2 / R3 / R4. The resistance values ​​of resistors R1 and R4 are set to be equal, the resistance values ​​of resistors R2 and R3 are set to be equal, and VOUTP and VOUTN directly output the common-mode signal. The output voltage of the charge pump (331) provides polarization voltage to the VBIAS port of C_MEMS through the high-impedance device (322), while the CMFB provides feedback signal through the device VDC (321) and capacitor C1 (320).

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