Fan control system and method

Abstract

The embodiment of the invention discloses a fan control system and method, and relates to the technical field of computers, the fan control system comprises a BMC (baseboard management controller), a two-wire serial bus I2C switcher and a fan board, the fan board comprises a CPLD (complex programmable logic device), a fan and a signal switching module, the CPLD is connected with the fan through the signal switching module, and the signal switching module is connected with the BMC. The control module is used for controlling the fan through a pulse width modulation (PWM) signal; the BMC is connected with the CPLD and the signal switching module through the I2C switcher, and the BMC is used for monitoring the running state of the CPLD through a two-way heartbeat detection mechanism, determining that the PWM signal is continuously at a low level under the condition that the CPLD is detected to be abnormal, obtaining the control right of the fan through the signal switching module, controlling the fan and adjusting the duty ratio of the PWM signal to be the highest.

Description

Technical Field

[0001] This application relates to the field of computer technology, and in particular to a fan control system and method. Background Technology

[0002] In current server architectures, thermal management is a critical aspect of ensuring system stability and extending hardware lifespan. Numerous electronic devices within a server (such as the Central Processing Unit (CPU) and Graphics Processing Unit (GPU)) generate significant heat during operation. To effectively dissipate this heat, servers are typically equipped with multiple fans. Traditionally, the control and monitoring of these fans are implemented using Complex Programmable Logic Devices (CPLDs). CPLDs send pulse width modulation (PWM) signals to the PWM inputs of the fans via their output pins to finely adjust fan speeds to meet varying cooling requirements.

[0003] In modern high-performance servers, the rise of artificial intelligence (AI) applications has led to the deployment of more GPUs, which has not only significantly increased computing power but also substantially increased system heat generation. To cope with high power consumption and high heat output, servers typically employ a multi-layer fan board design, with each fan board controlled by a complex programmable logic device (CPLD) for centralized management and control of the fans. The CPLD connects to each fan via control pins on the fan board, controlling fan speed by sending PWM signals and reading fan speed feedback (Tach) and presence signals.

[0004] However, as the control center, the Complex Programmable Logic Device (CPLD) operates under high load and complex environments, posing certain risks of failure, such as program crashes, communication interruptions, or hardware malfunctions. If the CPLD malfunctions, it will be unable to effectively control the fans, potentially causing fan speed reduction or even shutdown. This can lead to abnormally high internal server temperatures, and in severe cases, even hardware damage or system crashes. Particularly when multiple fans controlled by the CPLD fail simultaneously, the server's thermal management mechanism faces significant challenges, posing a direct threat to the server's stability and security.

[0005] Furthermore, in related technologies, when an anomaly is detected in a complex programmable logic device (CPLD), the Baseboard Management Controller (BMC) typically executes fallback strategies, such as system shutdown or power cutoff, to prevent further hardware damage. However, this approach not only affects server availability and continuity but may also lead to data loss, impacting the normal operation of customer businesses, especially in AI server applications with extremely high business continuity requirements. Summary of the Invention

[0006] This application provides a fan control system and method to at least solve the problem of not being able to detect CPLD malfunctions in a timely manner, and being unable to effectively control the fan when CPLD malfunctions.

[0007] This application provides a fan control system, including: a baseboard management controller (BMC), a two-wire serial bus (I2C) switch, and a fan board. The fan board includes a complex programmable logic device (CPLD), a fan, and a signal switching module. The CPLD is connected to the fan through the signal switching module and is used to control the fan using a pulse width modulation (PWM) signal. The BMC is connected to the CPLD and the signal switching module through the I2C switch. The BMC monitors the operating status of the CPLD through a bidirectional heartbeat detection mechanism. When an abnormality is detected in the CPLD, the BMC determines that the PWM signal is continuously low. The BMC then obtains control of the fan through the signal switching module and controls the fan, adjusting the duty cycle of the PWM signal to the highest level.

[0008] This application also provides a fan control method applied to the aforementioned fan control system. The method includes: a baseboard management controller (BMC) monitoring the operating status of a complex programmable logic device (CPLD) on a fan board through a bidirectional heartbeat detection mechanism, wherein the CPLD is used to control the fan on the fan board; and the BMC controlling the fan when an abnormality is detected in the CPLD.

[0009] This application also provides a fan control method applied to the aforementioned fan control system. The method includes: a complex programmable logic device (CPLD) controlling the fan on the fan board; and the CPLD receiving operational status monitoring from the baseboard management controller (BMC) based on a bidirectional heartbeat detection mechanism.

[0010] This application also provides an electronic device, including: a memory for storing a computer program; and a processor for executing the computer program to implement the steps of any of the above-described fan control methods.

[0011] This application also provides a computer-readable storage medium storing a computer program, wherein the computer program, when executed by a processor, implements the steps of any of the above-described fan control methods.

[0012] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of any of the above-described fan control methods.

[0013] In related technologies, server cooling systems may require complex fault diagnosis and manual intervention when the CPLD fails, increasing maintenance time and costs. This application's embodiment employs a bidirectional heartbeat detection mechanism between the BMC and the CPLD, enabling real-time monitoring of the CPLD's operating status. If the CPLD malfunctions (e.g., program crash or communication failure), the BMC can intervene quickly, taking over fan control via a signal switching module. To ensure continuous fan operation, the BMC adjusts the PWM signal duty cycle to its maximum, keeping the PWM signal continuously high and forcing the fan to run at maximum speed. This mechanism ensures that even in the event of CPLD failure, the system's cooling performance is maintained, preventing server damage due to overheating and improving the overall availability and reliability of the server system. When a CPLD malfunction is detected, the fan continues to run. Even in the event of a complete CPLD failure, the system can avoid system damage due to insufficient cooling through BMC intervention. This application's embodiment solves the problems of failing to detect CPLD malfunctions in a timely manner and being unable to effectively control the fan when a CPLD malfunction occurs. Attached Figure Description

[0014] To more clearly illustrate the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0015] Figure 1 This is a schematic diagram of a traditional server system;

[0016] Figure 2 This is a schematic diagram of a fan control system according to an embodiment of this application;

[0017] Figure 3 This is a schematic diagram of the signal switching module according to an embodiment of this application;

[0018] Figure 4 This is a flowchart of a fan control method according to an embodiment of this application;

[0019] Figure 5This is a flowchart of a fan control method according to another embodiment of this application;

[0020] Figure 6 This is a structural block diagram of a fan control device according to an embodiment of this application;

[0021] Figure 7 This is a structural block diagram of a fan control device according to another embodiment of this application;

[0022] Figure 8 This is a flowchart of a fan control method according to another embodiment of this application;

[0023] Figure 9 This is a flowchart of a fan control method according to another embodiment of this application. Detailed Implementation

[0024] In modern server systems, fan pulse width modulation, speed feedback, and presence detection are the core functional pins of the fan to ensure normal operation and external management.

[0025] In current server systems, especially in current AI projects, in addition to CPUs, there are often more GPUs, requiring more or more powerful fans to cope with the high power consumption and heat output of the GPUs. The Baseboard Management Controller (BMC), which acts as the fan controller, does not have enough hardware control pins to control the fans, and due to structural limitations, it may require several layers of fans. Therefore, AI servers commonly use fan boards to control the fan speed (connected to the fan's PWM via the pins of the Complex Programmable Logic Device (CPLD) on the fan board) and to obtain the fan speed feedback (connected to the pins of the CPLD on the fan board).

[0026] Figure 1 This is a diagram of a traditional server system, such as... Figure 1As shown, the Baseboard Management Controller (BMC) is located on the server motherboard and is responsible for monitoring the server status, including but not limited to temperature, voltage, and fan speed, and executing corresponding management strategies. The Complex Programmable Logic Device (CPLD) is mounted on the fan board and primarily handles fan control, controlling the fan via PWM signals, speed feedback signals, and power signals. An I2C switch, located on the server motherboard, connects the BMC and the CPLD, enabling communication between them. A Pulse Width Modulation (PWM) signal is an electronic signal used to control motor speed (including server fans). It adjusts the average voltage by changing the length of the high-level (or "on") period within a cycle, thereby controlling the motor speed. The duration of the high level within a complete PWM cycle is called the "duty cycle." For example, if a PWM signal has a high-level time of 50% within a cycle, then the duty cycle of this signal is 50%, and the corresponding fan will rotate at a moderate speed. In server fan control, PWM signals are typically generated by a microprocessor (such as a Baseboard Management Controller, BMC) and sent to a control circuit (such as a Complex Programmable Logic Device, CPLD), which then transmits the signal to the fan to adjust its speed. Pulse Width Modulation (PWM) signals are electronic signals used to control motor speed (including server fans). They regulate the average voltage by changing the length of the high-level (or "on") time within a cycle, thereby controlling the motor speed. The duration of the high level within a complete PWM cycle is called the "duty cycle." For example, if a PWM signal has a high-level time of 50% within a cycle, then the duty cycle of this signal is 50%, and the corresponding fan will rotate at a moderate speed. In server fan control, PWM signals are typically generated by a microprocessor (such as a Baseboard Management Controller, BMC) and sent to a control circuit (such as a Complex Programmable Logic Device, CPLD), which then transmits the signal to the fan to adjust its speed. A tachometer signal is a signal used to monitor and report fan speed. It is typically generated by a sensor built into the fan, producing a pulse each time a fan blade passes the sensor. The fan speed can be accurately measured by calculating the number of pulses received per unit time. The Tach signal is sent back to the control circuitry (such as a complex programmable logic device, CPLD), and then transmitted to the monitoring system (such as a board management controller, BMC). This allows the system to understand the fan's operating status in real time and make necessary adjustments to maintain system cooling efficiency and reduce noise levels. In this context, the Power signal refers to the signal or line that supplies power to the fan.It is a fundamental condition for the normal operation of a fan. Without a power signal, the fan will not receive any energy and therefore will not rotate. In a server environment, the power signal may be managed and distributed by a Complex Programmable Logic Device (CPLD) or other control unit to ensure that the fan receives sufficient power when needed. When the CPLD detects that the system needs more cooling, it can turn on or increase the power signal to a specific fan, and vice versa.

[0027] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application.

[0028] It should be noted that, in the description of this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. The terms "first," "second," etc., in this application are used to distinguish similar objects and are not used to describe a specific order or sequence.

[0029] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0030] The specific application environment architecture or specific hardware architecture on which the execution of the fan control system method depends is described here.

[0031] Embodiments of this application provide a fan control system. Figure 2 This is a schematic diagram of a fan control system according to an embodiment of this application, as shown below. Figure 2 As shown, the system includes: a baseboard management controller (BMC), a two-wire serial bus I2C switch, and a fan board. The fan board includes a complex programmable logic device (CPLD), a fan, and a signal switching module. The CPLD is connected to the fan through the signal switching module and is used to control the fan using a pulse width modulation (PWM) signal. The BMC is connected to the CPLD and the signal switching module through the I2C switch. The BMC monitors the operating status of the CPLD through a bidirectional heartbeat detection mechanism. When an abnormality is detected in the CPLD, the BMC determines that the PWM signal is continuously low. The BMC then obtains control of the fan through the signal switching module and controls the fan, adjusting the duty cycle of the PWM signal to the highest level.

[0032] It's important to note that the Baseboard Management Controller (BMC) is a dedicated microcontroller used to monitor and manage the health of a server. It operates independently of the server's main processor, monitoring and reporting server temperature, voltage, fan status, and more. It can also be remotely accessed and managed via a network interface. BMCs typically conform to the IPMI (Intelligent Platform Management Interface) standard, an industry-standard protocol for server management and monitoring.

[0033] An I2C switch, also known as an I2C multiplexer or demultiplexer, is a hardware device that allows multiple I2C slave devices to share two I2C signal lines (Serial Data Line (SDA) and Serial Clock Line (SCL)) of a master device. By switching different addresses, the master device can communicate between multiple slave devices. This is particularly useful for dense networks of sensors and control chips in server hardware, reducing the number of physical connections required. In one embodiment, the master device is a Baseboard Management Controller (BMC), and the slave devices are Complex Programmable Logic Devices (CPLDs) and signal switching modules. It's important to note that the serial data line is primarily used for data transmission and reception. The serial data line is bidirectional, and all data (including address and data) is transmitted on this line. Data transmission and reception are controlled by the serial clock line, typically sampling the data on the serial data line at the rising edge of the serial clock line. The serial clock line provides a clock signal to synchronize data transmission on the serial data line. The clock signal on the serial clock line determines the data transmission rate, and all data transmission is controlled by the serial clock line. Whenever the serial clock line transitions from low to high, data on the serial data line is read or written.

[0034] A fan plate is a heat dissipation component used in servers and other high-performance computing systems. It houses multiple fans, along with necessary circuitry and control logic. Fan plates are typically located in critical positions within the server, such as above the central processing unit (CPU), graphics processing unit (GPU), or near other heat-generating components, to expel hot air from the system and keep the hardware within a safe operating temperature range.

[0035] A Complex Programmable Logic Device (CPLD) is an integrated circuit that can be programmed to perform complex digital logic functions. In server hardware, CPLDs are commonly used for tasks such as controlling fan speed, power management, and signal conditioning. They can process input signals from different sensors through preset logic circuits and adjust fan speed and other operating parameters accordingly to optimize system cooling efficiency and power consumption.

[0036] A fan is a device used to force airflow to enhance cooling. In servers, fans are used to draw in hot air or push cool air through heatsinks and fins, thereby reducing the temperature of critical hardware such as the CPU and GPU. Fan speed is typically controlled by a PWM signal to adapt to different cooling needs.

[0037] In this application embodiment, Pulse Width Modulation (PWM) signal is a technique for controlling fan speed. A PWM signal is a digital signal composed of a series of repeating pulses, each with a fixed period, but the duration of the high-level pulse (i.e., duty cycle) can vary. In a server fan control system, the PWM signal adjusts the fan speed by controlling the duration of the high-level pulse (i.e., duty cycle). Specifically, a higher duty cycle results in a higher average fan voltage and a faster speed; a lower duty cycle results in a lower average fan voltage and a slower speed. Typically, the frequency of the PWM signal is set within a certain range to ensure smooth fan response. When the Complex Programmable Logic Device (CPLD) is functioning normally, it generates a PWM signal based on system temperature or other sensor data, dynamically controlling the fan speed by adjusting the duty cycle. However, when the CPLD hangs, this invention proposes that the Baseboard Management Controller (BMC) take over control, fixing the PWM signal to a high level. This means the duty cycle is always 100%, ensuring the fan operates at maximum speed to avoid system overheating. While this mode ensures heat dissipation, it may also lead to increased system power consumption. Therefore, in this case, the PWM signal serves as a control signal for the fan speed. By adjusting its duty cycle, the fan speed is dynamically adjusted to meet the thermal management requirements of the server. When the control of the Complex Programmable Logic Device (CPLD) fails, the Baseboard Management Controller (BMC) takes over the control of the PWM signal, fixing the duty cycle to its maximum value to ensure that the system's heat dissipation function remains effective even in the event of a control failure.

[0038] In exemplary embodiments of this application, as Figure 3As shown, the signal switching module includes a multiplexer, a thermal converter, and a fan controller. The multiplexer is connected to both the thermal converter and the fan controller. The thermal converter and the fan controller are connected to the fan. The multiplexer is also connected to the BMC and the CPLD.

[0039] In one embodiment, the Baseboard Management Controller (BMC) acquires power supply and fan speed control for the fan via a multiplexer. A multiplexer is an electronic switching device that selects one of multiple input signals and routes it to a single output. In server hardware design, multiplexers are commonly used for signal switching.

[0040] In one embodiment, the Baseboard Management Controller (BMC) controls the power supply of the fan via a thermal converter, controlling the fan to be on or off, and controls the fan speed via a fan controller.

[0041] In one embodiment, the CPLD controls the power supply of the fan via a heat exchanger and controls the fan speed via a fan controller.

[0042] A multiplexer is an electronic switching device used to selectively transmit multiple input signals to a single output signal line. In the context of server fan control, the multiplexer's role is to allow switching of control signals between the Baseboard Management Controller (BMC) and the Complex Programmable Logic Device (CPLD). When the CPLD is functioning normally, the multiplexer transmits control signals from the CPLD to the fan. However, when the CPLD malfunctions (i.e., the CPLD is "hanging up"), the multiplexer can switch back to the control signals from the BMC, thus ensuring uninterrupted fan control.

[0043] The thermal converter is responsible for controlling the power status of each fan. It can independently control the power-on and power-off of each fan. When a hangup of the complex programmable logic device (CPLD) is detected, and the fan power supply may be affected, the thermal converter, under the instruction of the board management controller (BMC), ensures that all fans are powered on, thereby preventing heat dissipation problems caused by fan power failure.

[0044] A fan controller is a functional module that controls the fan speed. It adjusts the PWM (Pulse Width Modulation) signal to change the voltage of the fan motor, thereby controlling the fan speed. Under normal operating conditions, the Complex Programmable Logic Device (CPLD) adjusts the PWM signal of each fan through the fan controller. However, if the CPLD fails, the Baseboard Management Controller (BMC) takes over this function. Through multiplexing, it sets the PWM signal to a high level, thus setting the fan speed to maximum to ensure the system's heat dissipation requirements.

[0045] In related technologies, server cooling systems may require complex fault diagnosis and manual intervention when the CPLD fails, increasing maintenance time and costs. This application's embodiment employs a bidirectional heartbeat detection mechanism between the Baseboard Management Controller (BMC) and the CPLD, enabling real-time monitoring of the CPLD's operating status. If the CPLD malfunctions (e.g., program crash or communication failure), the BMC can intervene quickly, taking over fan control via a signal switching module. To ensure continuous fan operation, the BMC adjusts the PWM signal duty cycle to its maximum, keeping the PWM signal continuously high and forcing the fan to run at maximum speed. This mechanism ensures that even in the event of CPLD failure, the system's cooling performance is maintained, preventing server damage due to overheating and improving the overall availability and reliability of the server system. When a CPLD malfunction is detected, the fan continues to run. Even in the event of a complete CPLD failure, the system can avoid system damage due to insufficient cooling through the intervention of the BMC. This application's embodiment solves the problems of failing to detect CPLD malfunctions in a timely manner and being unable to effectively control the fan when a CPLD malfunction occurs.

[0046] An embodiment of this application provides a fan control method applied to the aforementioned fan control system. Figure 4 This is a flowchart of a fan control method according to an embodiment of this application, such as... Figure 4 As shown, the process includes the following steps:

[0047] In step S402, the substrate management controller (BMC) monitors the operating status of the complex programmable logic device (CPLD) on the fan board through a bidirectional heartbeat detection mechanism. The CPLD is used to control the fan on the fan board.

[0048] In an exemplary embodiment of this application, the Baseboard Management Controller (BMC) monitors the operating status of the Complex Programmable Logic Device (CPLD) on the fan board through a bidirectional heartbeat detection mechanism, including: the BMC sending a heartbeat command to the CPLD through a preset monitoring cycle and receiving the inverted data returned by the CPLD in response to the heartbeat command; the BMC confirming whether the CPLD has malfunctioned based on the CPLD's response.

[0049] In one embodiment, during the initial startup of the server, the Baseboard Management Controller (BMC) initializes the heartbeat detection mechanism, sets the monitoring period (e.g., once every 500 milliseconds), and sends a heartbeat command to the Complex Programmable Logic Device (CPLD) on the fan board via the i2C bus.

[0050] This application's embodiments improve the accuracy of fault detection: the bidirectional heartbeat detection mechanism not only checks the communication capability of the Complex Programmable Logic Device (CPLD) but also verifies its data processing capability through data inversion, enhancing the sensitivity and accuracy of fault detection. Real-time monitoring and rapid response are achieved: this monitoring mechanism can quickly detect abnormal states of the CPLD within an acceptable timeframe for heat dissipation, enabling the Baseboard Management Controller (BMC) to take immediate action to prevent damage caused by system overheating. The risk of system downtime is reduced: when an abnormality is detected in the CPLD, the BMC can immediately take over fan control instead of passively shutting down the system, reducing the likelihood of downtime and improving system reliability and high availability. Thermal management is optimized: by directly controlling the fan through the BMC, even in the case of a CPLD failure, the fan can continue to operate, thus controlling system heat dissipation to a certain extent and preventing overheating from damaging the hardware.

[0051] In an exemplary embodiment of this application, the BMC confirms whether the CPLD is malfunctioning based on the CPLD's response, including: the BMC compares the inverted data returned by the CPLD this time with the inverted data returned last time, and if it is confirmed that the inverted data returned this time is generated by inverting the inverted data returned last time according to a preset rule, the BMC confirms that the CPLD is in normal operating condition.

[0052] In one embodiment, a Complex Programmable Logic Device (CPLD) generates inverted data by inverting register data and sends the inverted data to a Baseboard Management Controller (BMC). Generating inverted data by the CPLD includes modifying a first register value stored in the CPLD's registers to a second register value, or modifying a second register value to a first register value. For example, upon receiving a heartbeat command, the CPLD performs data inversion (e.g., inverting 0x55 to 0xAA) and stores the inverted data value in a specific register. Subsequently, the CPLD responds to the heartbeat command via the I2C bus, sending the inverted data value (0xAA) back to the BMC.

[0053] The embodiments of this application improve the accuracy of anomaly detection: by employing a data inversion method for heartbeat detection, false alarms caused by network latency, brief communication interference, or other non-fatal errors can be effectively avoided. This ensures that the fault recovery mechanism is only triggered when a real anomaly occurs in the complex programmable logic device (CPLD) (such as program crashes or hardware failures). This precise detection mechanism helps reduce false alarms and unnecessary system interventions, thereby improving system stability and availability.

[0054] In an exemplary embodiment of this application, after comparing the inverted data returned by the CPLD this time with the inverted data returned last time, the BMC further includes: if it is confirmed that the inverted data returned this time is not generated by inverting the inverted data returned last time according to a preset rule, the BMC confirms that the CPLD has an anomaly.

[0055] In an exemplary embodiment of this application, the BMC confirms whether the CPLD is abnormal based on the CPLD's response, including: if the BMC data reception failure conforms to a preset rule, confirming that the CPLD is abnormal.

[0056] In one embodiment, if the data read by the Baseboard Management Controller (BMC) in the next heartbeat command is not the result of reversing the data read in the previous heartbeat according to a preset rule, the BMC will consider that the Complex Programmable Logic Device (CPLD) may be malfunctioning. The preset rule can be a simple binary bit reversal (e.g., 0xAA becomes 0x55), or any other pre-agreed data transformation rule.

[0057] In one embodiment, the Baseboard Management Controller (BMC) also confirms the status of the Complex Programmable Logic Device (CPLD) by determining whether it can successfully receive data from the CPLD. If multiple attempts to read data fail, and such failures conform to preset rules (e.g., the number of consecutive failures reaches a certain threshold, or data cannot be successfully read within a certain time), the BMC will also confirm that the CPLD is malfunctioning. This detection mechanism can identify data transmission interruptions caused by communication failures, hardware failures, or other reasons, thereby determining whether the CPLD is stuck or unable to respond normally.

[0058] Through these two detection mechanisms, the Baseboard Management Controller (BMC) can promptly detect anomalies in the Complex Programmable Logic Device (CPLD) and trigger subsequent protective measures, such as taking over fan control, to ensure the stable operation of the server system and prevent overheating issues caused by CPLD malfunctions. This detection mechanism is designed to fully consider the diversity of faults, improving the system's fault tolerance and the reliability of thermal management.

[0059] In an exemplary embodiment of this application, the failure of BMC data reception conforms to a preset rule, including: the number of times BMC data reception fails reaches a preset number, or no inverted data returned by the complex programmable logic device CPLD is received within a preset time interval after the heartbeat command is sent.

[0060] This application enhances the system's fault tolerance: by setting preset counts and time intervals, the system can tolerate certain communication anomalies without immediately resorting to extreme measures such as power outages or restarts. This improves system stability and user experience, as the system can continue to operate even under network fluctuations or minor errors. It also enables timely identification and response to CPLD (Complex Programmable Logic Device) failures: preset rules help the Baseboard Management Controller (BMC) quickly identify whether the CPLD is truly dead or experiencing a temporary communication failure. Once it is determined that the CPLD is not responding normally, the BMC can immediately take over fan control to prevent system overheating caused by fan failure. Furthermore, it reduces the risk of misoperation: the preset counts and time intervals prevent misjudging the CPLD status due to occasional communication failures or brief system fluctuations, thereby reducing unnecessary system interventions, such as unnecessary full-speed fan operation, which helps save energy and reduce hardware wear.

[0061] In step S404, if an abnormality is detected in the CPLD, the BMC controls the fan.

[0062] In an exemplary embodiment of this application, the BMC controls the fan, including: the BMC obtaining power control rights and fan speed control rights of the fan through a multiplexer; and the BMC controlling the power supply and speed of the fan.

[0063] This application's embodiments achieve the following improvements: When the Complex Programmable Logic Device (CPLD) fails and cannot control the fan's power supply and speed, the Baseboard Management Controller (BMC) can immediately take over control, ensuring normal fan operation and preventing system overheating, thereby improving system stability and reliability. Furthermore, real-time fault response is achieved: The BMC can monitor the CPLD's status in real time. Once an CPLD anomaly is detected, it can quickly switch control via a multiplexer, avoiding insufficient heat dissipation due to control delays. Enhanced flexibility in heat dissipation control is also achieved: The BMC can not only control the fan's power supply status but also adjust the fan speed as needed. This provides additional heat dissipation management methods when the CPLD fails; for example, the fan speed can be dynamically adjusted based on system temperature to achieve optimal heat dissipation.

[0064] In an exemplary embodiment of this application, the BMC controls the power supply and speed of the fan, including: the BMC controls the power supply of the fan to be turned on through the heat exchanger, and controls all the fans to be rotated through the fan controller.

[0065] In one embodiment, the thermal converter is a hardware module capable of switching power control paths. When the Complex Programmable Logic Device (CPLD) is operating normally, power control is performed by the CPLD. When a CPLD failure is detected, the Baseboard Management Controller (BMC) switches power control to itself by changing the state of the thermal converter. This ensures that even if the CPLD fails, the BMC can keep the fans powered on, allowing them to receive further control commands. In the CPLD failure scenario, the BMC takes over the fan controller's responsibilities, ensuring all fans operate at full speed. The fan controller typically refers to the fan speed control logic handled by the CPLD or other microcontrollers. It adjusts the fan speed based on system requirements and temperature sensor data to optimize heat dissipation and reduce noise.

[0066] In an exemplary embodiment of this application, controlling all fans to rotate by a fan controller includes: adjusting the duty cycle of the fan's pulse width modulation (PWM) signal to the highest value to control the fans to rotate.

[0067] In one embodiment, the Baseboard Management Controller (BMC) acquires control of the thermal converter module via a multiplexer, thereby directly controlling the fan's power supply status and ensuring power supply to the fan even in the event of a CPLD (Complex Programmable Logic Device) failure. Regarding speed control: the BMC also takes over control of the fan controller via a multiplexer. Typically, the BMC's control capabilities are relatively limited; it may not be able to provide the fine-grained pulse-width modulation (PWM) signal control of a CPLD. However, to handle emergencies, the BMC can ensure the fan operates at full speed by setting all PWM pins high, which is equivalent to setting the fan's PWM duty cycle to 100%, thereby maximizing heat dissipation efficiency.

[0068] In one embodiment, the CPLD controls the power supply of the fan via a heat exchanger and controls the fan speed via a fan controller.

[0069] An embodiment of this application also provides a fan control method applied to the aforementioned fan control system. Figure 5 This is a flowchart of a fan control method according to another embodiment of this application, as follows: Figure 5 As shown, the process includes the following steps:

[0070] In step S502, the complex programmable logic device (CPLD) controls the fan on the fan board.

[0071] In an exemplary embodiment of this application, a complex programmable logic device (CPLD) controls a fan on a fan board, including: the CPLD controlling the power supply of the fan via a heat exchanger and controlling the fan speed via a fan controller.

[0072] This application's embodiments achieve precise control and response: Complex Programmable Logic Devices (CPLDs) can quickly adjust the power state and speed of fans based on real-time changes in the server environment (such as temperature and load), ensuring effective heat dissipation under different operating conditions, thereby improving server operating efficiency and stability. Hardware-level flexibility is achieved: Using CPLDs for fan control allows for independent control of different fans through programming, such as dynamically adjusting the speed of different fans to achieve balanced heat dissipation and energy saving. This hardware-level programmability enables the fan control system to adapt to complex changes in the internal temperature distribution of the server. Regarding the optimization of heat dissipation strategies: The dynamic control capability of CPLDs allows the system to implement more complex heat dissipation strategies, such as automatic temperature-based fan speed adjustment or automatic increase in fan speed under high load to cope with instantaneous heat increases. This strategy optimization can minimize unnecessary power consumption while ensuring the server's thermal performance.

[0073] In step S504, the CPLD receives operational status monitoring from the Baseboard Management Controller (BMC) based on a bidirectional heartbeat detection mechanism.

[0074] In an exemplary embodiment of this application, the CPLD receives operational status monitoring from the Baseboard Management Controller (BMC) based on a bidirectional heartbeat detection mechanism, including: the CPLD determining whether it has received a heartbeat command from the BMC; if the determination result is yes, the CPLD generates inverted data by inverting register data and sends the inverted data to the BMC.

[0075] This application's embodiments achieve real-time operational status monitoring: by allowing the Baseboard Management Controller (BMC) to monitor the operational status of the Complex Programmable Logic Device (CPLD) in real time, continuous and effective management of the fan control logic is ensured. The bidirectional heartbeat detection mechanism can promptly detect abnormal states of the CPLD, such as program crashes or communication failures. It also enhances system reliability: through register data reversal, the CPLD can report changes in its operating status to the BMC, proving that the CPLD is still responding and operating normally. This mechanism improves the system's fault tolerance, ensuring the stability of the fan control system even under high load or unstable environments. Fault detection and recovery are also achieved: when the CPLD does not receive a heartbeat command from the BMC or the reversed data it replies with is inconsistent with expectations, the BMC can quickly identify a potential CPLD hang. This rapid fault detection mechanism is the basis for the system to take remedial measures, such as the BMC taking over fan control to prevent system overheating or component damage.

[0076] In one embodiment, the Baseboard Management Controller (BMC) monitors the operating status of the Complex Programmable Logic Device (CPLD) on the fan board through a bidirectional heartbeat detection mechanism, including: the Baseboard Management Controller (BMC) sending a heartbeat command to the CPLD through a preset monitoring cycle, and receiving the inverted data returned by the CPLD in response to the heartbeat command; the Baseboard Management Controller (BMC) confirms whether the CPLD is malfunctioning based on the CPLD's response.

[0077] In an exemplary embodiment of this application, the CPLD generates inverted data by reversing register data, including: modifying a first register value stored in the CPLD's register to a second register value, or modifying a second register value to a first register value.

[0078] In one embodiment, when the Complex Programmable Logic Device (CPLD) starts up or resets, an initial register value is set, for example, the value of register R1 is set to 0xAA. Simultaneously, the value of another register, R2, is set to the opposite value of R1, for example, 0x55, thus forming a data pair. The Baseboard Management Controller (BMC) periodically sends heartbeat commands to the CPLD to query its status. Upon receiving the heartbeat command, the CPLD begins the data inversion process: the CPLD checks the current data in register R1. If the current value of R1 is 0xAA, the CPLD modifies it to the value of R2, i.e., 0x55; if the current value of R1 is 0x55, the CPLD modifies it back to the original value of R1, i.e., 0xAA. After completing the above operations, the CPLD sends the updated R1 value back to the Baseboard Management Controller (BMC), completing one heartbeat cycle.

[0079] In one embodiment, the Baseboard Management Controller (BMC) determines whether the Complex Programmable Logic Device (CPLD) is malfunctioning based on the response of the CPLD. This includes: the Baseboard Management Controller (BMC) comparing the inverted data returned by the CPLD this time with the inverted data returned last time. If it is confirmed that the inverted data returned this time is generated by inverting the inverted data returned last time according to a preset rule, the Baseboard Management Controller (BMC) confirms that the CPLD is in normal operating condition.

[0080] In one embodiment, after comparing the inverted data returned by the CPLD this time with the inverted data returned last time, the substrate management controller (BMC) further includes: if it is confirmed that the inverted data returned this time was not generated by inverting the inverted data returned last time according to a preset rule, the substrate management controller (BMC) confirms that the CPLD is abnormal.

[0081] In one embodiment, the Baseboard Management Controller (BMC) confirms whether the CPLD is malfunctioning based on the CPLD's response, including: if the Baseboard Management Controller (BMC) fails to receive data in accordance with a preset rule, it confirms that the CPLD is malfunctioning.

[0082] In one embodiment, the failure of the Baseboard Management Controller (BMC) to receive data conforms to a preset rule, including: the number of times the Baseboard Management Controller (BMC) fails to receive data reaches a preset number, or no inverted data returned by the Complex Programmable Logic Device (CPLD) is received within a preset time interval after sending a heartbeat command.

[0083] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method.

[0084] Embodiments of this application also provide a fan control device. Figure 6 This is a structural block diagram of the fan control device according to an embodiment of this application, as shown below. Figure 6 As shown, the device includes a first monitoring module 10 and a first control module 20:

[0085] The first monitoring module 10 is used to monitor the operating status of the complex programmable logic device (CPLD) on the fan board through a two-way heartbeat detection mechanism. The CPLD is used to control the fan on the fan board.

[0086] In an exemplary embodiment of this application, the first monitoring module 10 is further configured to send a heartbeat command to the CPLD through a preset monitoring period, and receive the reverse data returned by the CPLD in response to the heartbeat command; and confirm whether the CPLD has an abnormality based on the CPLD's response.

[0087] In an exemplary embodiment of this application, the first monitoring module 10 is further configured to compare the inverted data returned by the CPLD this time with the inverted data returned last time, and if it is confirmed that the inverted data returned this time is generated by inverting the inverted data returned last time according to a preset rule, the CPLD is confirmed to be in normal operating condition.

[0088] In an exemplary embodiment of this application, the first monitoring module 10 is further configured to confirm that the CPLD is abnormal if the BMC data reception failure conforms to a preset rule.

[0089] In an exemplary embodiment of this application, the device is further configured to confirm that the CPLD is abnormal if it is confirmed that the reversed data returned this time is not generated by reversing the reversed data returned last time according to a preset rule.

[0090] In an exemplary embodiment of this application, the first control module 20 is used to control the fan when an abnormality is detected in the CPLD.

[0091] In an exemplary embodiment of this application, the first control module 20 is further configured to obtain power control rights and fan speed control rights of the fan through a multiplexer; and to control the power supply and speed of the fan.

[0092] In an exemplary embodiment of this application, the first control module 20 is further configured to control the power supply of the fan to be turned on via the heat exchanger, and to control all fans to be rotated via the fan controller.

[0093] In an exemplary embodiment of this application, the first control module 20 is further configured to control the fan to rotate by adjusting the duty cycle of the fan's pulse width modulation (PWM) signal to the highest value.

[0094] This application also provides a fan control device. Figure 7 This is a structural block diagram of a fan control device according to another embodiment of this application, as shown below. Figure 7 As shown, the device includes a second control module 30 and a second monitoring module 40:

[0095] The second control module 30 is used to control the fan on the fan board.

[0096] In an exemplary embodiment of this application, the second control module 30 is further configured to control the power supply of the fan via a heat exchanger and to control the fan speed via a fan controller.

[0097] The second monitoring module 40 is used to receive operational status monitoring from the baseboard management controller (BMC) based on a two-way heartbeat detection mechanism.

[0098] In an exemplary embodiment of this application, the second monitoring module 40 is further configured to determine whether a heartbeat command sent by the BMC has been received; if the determination result is yes, inverted data is generated by inverting register data and the inverted data is sent to the BMC.

[0099] In an exemplary embodiment of this application, the second monitoring module 40 is further configured to modify the first register value stored in the CPLD register to the second register value, or modify the second register value to the first register value.

[0100] For a description of the features in the embodiment corresponding to the fan control device, please refer to the relevant description of the embodiment corresponding to the fan control device method, which will not be repeated here.

[0101] This application also provides a fan control method. Figure 8 This is a flowchart of a fan control method according to another embodiment of this application, as follows: Figure 8 As shown, the process includes the following steps:

[0102] Step S801, BMC starts.

[0103] Step S802: Determine whether the data obtained by the heartbeat command twice in a row is the same or whether the data reception failed.

[0104] Specifically, if the judgment result is yes, proceed to step S803; if the judgment result is no, continue to judge whether the data obtained by the heartbeat command twice in a row is the same or whether the data reception failed.

[0105] Specifically, the information obtained last time might have been 0xAA, and this time it might be 0x55, or the information obtained last time might also be 0xAA, and this time it might also be 0xAA.

[0106] Step S803: Determine whether the data reception failure has reached a preset threshold.

[0107] Specifically, if the judgment result is yes, proceed to step S804; if the judgment result is no, proceed to step S802.

[0108] In step S804, the BMC determines that the complex programmable logic device (CPLD) is malfunctioning and obtains control of the fan through the signal switching module.

[0109] In step S805, the BMC continues to monitor the complex programmable logic device (CPLD).

[0110] This application also provides a fan control method. Figure 9 This is a flowchart of a fan control method according to another embodiment of this application, such as... Figure 9 As shown, the process includes the following steps:

[0111] Step S901: The complex programmable logic device (CPLD) is started.

[0112] Step S902: Determine whether a heartbeat acquisition command has been received from the BMC.

[0113] If the judgment result is yes, proceed to step S903.

[0114] Step S903: Reverse the data.

[0115] Specifically, in a complex programmable logic device (CPLD), if the original register value is 0x55, it is inverted to 0xAA; if the original register value is 0xAa, it is inverted to 0x55.

[0116] In this embodiment, to ensure the power switching control logic powers all fans, regardless of whether the original fans were powered, this step guarantees that all fans on the faulty fan board are powered, thus ensuring that subsequent fan speed control can proceed normally. If the fans are not powered, all control is meaningless. The heat exchanger controls the power-on status of each fan, and each fan can be controlled independently. Whether the BMC or the CPLD on the fan board controls the fan is determined by the system strategy. By default, the CPLD controls the fan. If the BMC determines that the CPLD is down, the control of the heat exchanger needs to be transferred to the BMC via a multiplexer (MUX).

[0117] Regarding fan control, the fan controller can control the fan speed. Each fan can be controlled independently. Whether the BMC or the CPLD (Complex Programmable Logic Device) on the fan board controls the fan speed is determined by the system strategy. By default, the CPLD controls the fan speed. If the BMC determines that the CPLD is down, the control of the fan controller needs to be transferred to the BMC via a multiplexer (MUX). Generally, the mechanism for controlling the fan speed by the BMC is relatively simple. It cannot output a square wave of ordinary PWM. It can only control high or low. Usually, all the PWM pins of all fans are pulled high. This is actually a hardware pull-up. The BMC only needs to ensure that the output to the PWM is the input, that is, in a high-impedance state. It should be noted that pulling the PWM pin high means that the PWM duty cycle of the fan is 100%, that is, the duty cycle is the highest, and all fans will run at full speed. All fans running at full speed may result in higher system power consumption, but it will definitely keep the system in a normal cooling state.

[0118] When the Complex Programmable Logic Device (CPLD) on the server fan board fails, i.e., when the CPLD malfunctions, the fan speed becomes uncontrollable (including a speed of 0). The technical problems that this application aims to solve include: how to ensure that the fan has power. Currently, the power supply of the fan on the fan board is mainly enabled by the CPLD. If the CPLD fails, the fan power supply may also be turned off, resulting in the fan having no power. To make the fan rotate, it is necessary to ensure that the fan has power. How to ensure that the fan has a speed, that is, a duty cycle needs to be provided to the PWM of the fan to ensure that the fan can rotate. In this application embodiment, it is sufficient to ensure that the PWM is high level, because a fixed high level for the PWM means a 100% duty cycle, which allows the fan to rotate at full speed. A fully rotating fan will definitely solve all heat dissipation problems, but the power consumption will increase relatively.

[0119] The key to this application's embodiments lies in the heartbeat interaction mechanism between the BMC and the Complex Programmable Logic Device (CPLD). When the CPLD fails to respond, a system security mechanism is automatically triggered, and a hardware-switchable strategy ensures the system switches to a secure operating environment. Even when the CPLD is suspended, the system fan can still ensure the system's safe and normal operation.

[0120] This application's embodiments construct a multi-layered protection system by combining hardware redundancy with intelligent fault detection. Its innovation lies in the remedial measures that do not affect the normal operation of the system when the system heat dissipation is uncontrollable after the complex programmable logic device (CPLD) fails. It is especially suitable for scenarios with stringent requirements for heat dissipation reliability (such as AI servers).

[0121] This application's embodiments effectively solve the problem of potential fan stoppage caused by the failure of a Complex Programmable Logic Device (CPLD) in current fan control systems through hardware design and an automatic fault recovery mechanism. The following technical effects are achieved: High reliability is ensured by using a bidirectional heartbeat detection mechanism with the CPLD to monitor its operating status in real time. Once an anomaly is detected (such as program crash or communication interruption), the BMC can trigger a rapid recovery of fan control within a time acceptable for heat dissipation (the specific time needs to be evaluated based on the system), avoiding the risk of system overheating caused by CPLD failure. Seamless fault switching is achieved by integrating a hardware PWM backup module within the CPLD. When the main logic fails, it automatically switches to a preset safe speed mode (such as 100% duty cycle), ensuring continuous fan operation and providing a fundamental guarantee for system heat dissipation. This solves the problem of current solutions lacking an effective recovery mechanism, which can only detect potential problems and then shut down the system to ensure safety, preventing overheating damage or system fire.

[0122] Embodiments of this application also provide an electronic device, including a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to perform the steps in any of the above-described fan control method embodiments.

[0123] Embodiments of this application also provide a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the above-described fan control method embodiments when it is run.

[0124] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as USB flash drives, read-only memory (ROM), random access memory (RAM), portable hard drives, magnetic disks, or optical disks.

[0125] Embodiments of this application also provide a computer program product, which includes a computer program that, when executed by a processor, implements the steps in any of the above-described fan control method embodiments.

[0126] Embodiments of this application also provide another computer program product, including a non-volatile computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps in any of the above-described fan control method embodiments.

[0127] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0128] The fan control system and method provided in this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are only for the purpose of helping to understand the method and its core ideas. It should be noted that those skilled in the art can make several improvements and modifications to this application without departing from the principles of this application, and these improvements and modifications also fall within the protection scope of the claims of this application.

Claims

1. A fan control system, characterized in that, include: The system comprises a baseboard management controller (BMC), a two-wire serial bus (I2C) switch, and a fan board. The fan board includes a complex programmable logic device (CPLD), a fan, and a signal switching module. The CPLD is connected to the fan through the signal switching module and is used to control the fan through a pulse width modulation (PWM) signal. The BMC is connected to the CPLD and the signal switching module through the I2C switch. The BMC is used to monitor the operating status of the CPLD through a bidirectional heartbeat detection mechanism. When an abnormality is detected in the CPLD, the BMC determines that the PWM signal is continuously low. The BMC obtains control of the fan through the signal switching module and controls the fan to adjust the duty cycle of the PWM signal to the highest level.

2. The system according to claim 1, characterized in that, The signal switching module includes a multiplexer, a heat exchanger, and a fan controller, wherein... The multiplexer is connected to the heat exchanger and the fan controller respectively; The heat exchanger and fan controller are connected to the fan.

3. A fan control method, characterized in that, Applied to the system of claim 1 or 2, comprising: The Baseboard Management Controller (BMC) monitors the operating status of the Complex Programmable Logic Device (CPLD) on the fan board through a bidirectional heartbeat detection mechanism. The CPLD is used to control the fan on the fan board. If an anomaly is detected in the CPLD, the BMC controls the fan.

4. The method according to claim 3, characterized in that, The Baseboard Management Controller (BMC) monitors the operating status of the Complex Programmable Logic Device (CPLD) on the fan board through a bidirectional heartbeat detection mechanism, including: The BMC sends a heartbeat command to the CPLD through a preset monitoring cycle and receives the reverse data returned by the CPLD in response to the heartbeat command. The BMC determines whether the CPLD is malfunctioning based on the CPLD's response.

5. The method according to claim 4, characterized in that, The BMC determines whether the CPLD is malfunctioning based on the CPLD's response, including: The BMC compares the inverted data returned by the CPLD this time with the inverted data returned last time. If it is confirmed that the inverted data returned this time is generated by inverting the inverted data returned last time according to a preset rule, the BMC confirms that the CPLD is in normal operating condition.

6. The method according to claim 5, characterized in that, After comparing the inverted data returned by the CPLD this time with the inverted data returned last time, the BMC further includes: If it is confirmed that the reversed data returned this time was not generated by reversing the reversed data returned last time according to the preset rules, the BMC confirms that the CPLD has an anomaly.

7. The method according to claim 4, characterized in that, The BMC determines whether the CPLD is malfunctioning based on the CPLD's response, including: If the failure to receive BMC data conforms to a preset rule, it is confirmed that the CPLD is abnormal.

8. The method according to claim 7, characterized in that, The BMC data reception failure conforms to preset rules, including: The number of times the BMC data reception fails reaches a preset number, or the inverted data returned by the CPLD is not received within a preset time interval after the heartbeat command is sent.

9. The method according to claim 3, characterized in that, The BMC controls the fan, including: The BMC obtains power control and fan speed control of the fan through a multiplexer; The BMC controls the power supply and speed of the fan.

10. The method according to claim 9, characterized in that, The BMC controls the power supply and speed of the fan, including: The BMC controls the power supply of the fan to be turned on through the heat exchanger, and controls all the fans to rotate through the fan controller.

11. The method according to claim 10, characterized in that, The step of controlling all the fans to rotate via the fan controller includes: The fan is controlled to rotate by adjusting the duty cycle of the pulse width modulation (PWM) signal of the fan to the highest value.

12. A fan control method, characterized in that, Applied to the system of claim 1 or 2, comprising: A complex programmable logic device (CPLD) controls the fan on the fan board; The CPLD receives operational status monitoring from the Baseboard Management Controller (BMC) based on a bidirectional heartbeat detection mechanism.

13. The method according to claim 12, characterized in that, The CPLD receives operational status monitoring from the Baseboard Management Controller (BMC) based on a bidirectional heartbeat detection mechanism, including: The CPLD determines whether it has received a heartbeat command sent by the BMC; If the determination result is yes, the CPLD generates inverted data by reversing the register data and sends the inverted data to the BMC.

14. The method according to claim 13, characterized in that, The CPLD generates inverted data by inverting register data, including: The first register value stored in the CPLD's register is modified to the second register value, or the second register value is modified to the first register value.

15. The method according to claim 12, characterized in that, The complex programmable logic device (CPLD) controls the fan on the fan board, including: The CPLD controls the power supply of the fan through a heat exchanger and controls the fan speed through a fan controller.

16. A fan control device, characterized in that, include: The monitoring module is used to monitor the operating status of the complex programmable logic device (CPLD) on the fan board through a two-way heartbeat detection mechanism, wherein the CPLD is used to control the fan on the fan board; The control module is used to control the fan when an abnormality is detected in the CPLD.

17. A fan control device, characterized in that, include: A control module is used to control the fan on the fan plate; The monitoring module is used to receive operational status monitoring from the Baseboard Management Controller (BMC) based on a two-way heartbeat detection mechanism.

18. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor, configured to implement the steps of the fan control method as described in any one of claims 3 to 11 or 12 to 15 when executing the computer program.

19. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, wherein when the computer program is executed by a processor, it implements the steps of the fan control method as described in any one of claims 3 to 11 or 12 to 15.

20. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the fan control method as described in any one of claims 3 to 11 or 12 to 15.

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