Current sensing circuit

Abstract

The invention discloses a current sensing circuit which allows secondary proportional adjustment of an intermediate sensing current characterizing the current flowing through a main power transistor after generation of the intermediate sensing current by introducing a second proportional adjustable trimming circuit. Thus, even if the first proportion between the sensing transistor and the main power transistor deviates from a design value due to process deviation, compensation can be performed by adjusting the second proportion of the trimming circuit, so that a desired and accurate total proportion relation is achieved between the final first sensing current and the output current of the main power transistor, and the output current of the main power transistor can be compensated by adjusting the second proportion of the trimming circuit. Therefore, the ratio of the final first sensing current to the output current can be adjusted in a large range.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit technology, and more particularly to a current sensing circuit with an adjustable ratio. Background Technology

[0002] In existing analog and power integrated circuits for power management, motor drives, and battery protection, it is often necessary to monitor the output current flowing through the main power transistor in real time to achieve functions such as overcurrent protection, current feedback control, and load status monitoring. One common current sensing technique is to use a sensing transistor matched to the main power transistor to generate a sensing current proportional to the output current of the main power transistor by mirroring or proportionally replicating it.

[0003] However, in actual manufacturing, due to process deviations, mask errors, and limitations in transistor matching, the actual size ratio between the sensing transistor and the main power transistor may deviate from the design value, resulting in an inaccurate ratio between the sensed current and the output current of the main power transistor. This ratio error directly affects the accuracy of current monitoring, and consequently, the performance and reliability of the entire system. This error is unacceptable, especially in applications requiring high-precision current control, such as high-precision voltage regulators or battery management systems. Therefore, it is necessary to provide a current sensing circuit capable of flexibly and accurately adjusting the sensing ratio to compensate for process deviations and improve current sensing accuracy. Summary of the Invention

[0004] In view of this, the present invention provides a current sensing circuit that can improve the current sensing accuracy of the main power transistor and make the current sampling ratio adjustable.

[0005] In a first aspect, the present invention provides a current sensing circuit, comprising:

[0006] The main power transistor is configured to generate output current;

[0007] A sensing transistor having a control terminal connected to the control terminal of the main power transistor, a first power terminal connected to the first power terminal of the main power transistor, and generating an intermediate sensing current at its second power terminal, the intermediate sensing current having a first ratio to the output current;

[0008] The adjustment circuit receives the intermediate sensing current and outputs a first sensing current. The first sensing current and the intermediate sensing current have a second ratio, and the second ratio is adjustable.

[0009] Preferably, the adjustment circuit includes a first branch module and a second branch module connected in parallel. The first branch module is configured to output the first sensing current, and the adjustment circuit adjusts the second ratio by changing the proportion of the intermediate sensing current shunted to the first branch module.

[0010] Preferably, the second branch module includes multiple second sub-branches, and the adjustment circuit changes the on / off state of each second sub-branch to change the proportion of the intermediate sensing current shunted to the first branch module.

[0011] Preferably, the first branch module includes a first transistor, each second sub-branch includes a second transistor, and each second transistor has a control terminal connected to the control terminal of the first transistor and a first power terminal connected to the first power terminal of the first transistor, wherein the first transistor and all the second transistors are transistors of the same type.

[0012] Preferably, the dimensions of the second transistors in the plurality of second sub-branches are different from each other, and are different integer powers of 2 of the dimensions of one of the second transistors.

[0013] Preferably, each second sub-branch further includes a second switch connected in series with the second transistor, and the tuning circuit changes the on / off state of the corresponding second sub-branch by changing the on / off state of each second switch.

[0014] Preferably, it further includes a first adjustment circuit, which is used to adjust the voltage of the second power terminal of the main power transistor and the voltage of the second power terminal of the sensing transistor to be closer to the same.

[0015] Preferably, the first adjustment circuit includes a first operational amplifier, the two input terminals of the first operational amplifier being coupled to the second power terminal of the main power transistor and the second power terminal of the sensing transistor, respectively, and the output signal of the first operational amplifier being used to adjust the current flowing through the sensing transistor so that the voltage of the second power terminal of the main power transistor tends to be consistent with the voltage of the second power terminal of the sensing transistor.

[0016] Preferably, the system further includes a second adjustment circuit, which is used to stabilize the drain-source voltage at the reference voltage when the drain-source voltage of the main power transistor is less than the reference voltage, so as to eliminate the influence of the offset voltage of the first operational amplifier on the first sensing current.

[0017] Preferably, the second adjustment circuit includes a second operational amplifier, one input terminal of which is coupled to the second power terminal of the main power transistor, and the other input terminal receives the reference voltage. The main power transistor and the sensing transistor are controlled by the output signal of the second operational amplifier to adjust the current flowing through them respectively, so that the voltage at the second power terminal of the main power transistor tends to be consistent with the reference voltage.

[0018] Preferably, when the main power transistor is on the high side, all transistors in the trimming circuit are P-type transistors; when the main power transistor is on the low side, all transistors in the trimming circuit are N-type transistors.

[0019] Preferably, the sensing transistor has a channel width that is reduced by a factor of n compared to the main power transistor, where n is greater than 1.

[0020] Preferably, the first branch module includes a first resistor, each second sub-branch includes a second resistor and a third switch connected in series with the second resistor, all second sub-branches are connected in parallel, and the tuning circuit changes the on / off state of the corresponding second sub-branch by changing the on / off state of each third switch.

[0021] Preferably, the conductivities of the multiple second resistors within the multiple second sub-branches are different from each other.

[0022] Preferably, the adjustment circuit further includes a sensing control switch, which is turned on when the current sensing function is enabled and the voltage between the two power terminals of the sensing transistor is less than the power supply voltage. When the sensing control switch is turned on, the first branch module outputs the first sensing current.

[0023] Preferably, the sensing control switch is connected in series with the first transistor.

[0024] Preferably, the first ratio is greater than a preset ratio, where the preset ratio is the ratio of the desired first sensing current to the output current.

[0025] Preferably, the adjustment circuit adjusts the second ratio based on the comparison result between the measured value of the first sensed current and the target value, wherein the target value is determined based on the output current and the preset ratio.

[0026] This invention aims to provide a current sensing circuit that, by introducing a second proportionally adjustable trimming circuit, allows for secondary proportional adjustment of the intermediate sensed current, which characterizes the current flowing through the main power transistor, after its generation. Thus, even if the first ratio between the sensed transistor and the main power transistor deviates from the design value due to process variations, it can be compensated for by adjusting the second ratio of the trimming circuit. This ensures that the final first sensed current and the output current of the main power transistor achieve a desired and accurate overall proportional relationship, and allows the final ratio of the first sensed current to the output current to be adjustable within a wide range. Attached Figure Description

[0027] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0028] Figure 1 This is a schematic diagram of a comparative current sensing circuit;

[0029] Figure 2 This is a schematic diagram of the current sensing circuit according to the first embodiment of the present invention;

[0030] Figure 3 This is a schematic diagram of the current sensing circuit according to the second embodiment of the present invention;

[0031] Figure 4 This is a schematic diagram of the current sensing circuit according to the third embodiment of the present invention;

[0032] Figure 5 This is a schematic diagram of the current sensing circuit according to the fourth embodiment of the present invention;

[0033] Figure 6 This is a schematic diagram of the current sensing circuit according to the fifth embodiment of the present invention;

[0034] Figure 7 This is a schematic diagram of the current sensing circuit according to the sixth embodiment of the present invention;

[0035] Figure 8 This is a schematic diagram of the current sensing circuit according to the seventh embodiment of the present invention. Detailed Implementation

[0036] The present invention is described below based on embodiments, but the invention is not limited to these embodiments. In the detailed description of the invention below, certain specific details are described in detail. Those skilled in the art will fully understand the invention even without these details. To avoid obscuring the essence of the invention, well-known methods, processes, flows, elements, and circuits are not described in detail.

[0037] Furthermore, those skilled in the art should understand that the accompanying drawings provided herein are for illustrative purposes only and are not necessarily drawn to scale.

[0038] Furthermore, it should be understood that in the following description, "circuit" refers to a conductive loop consisting of at least one element or sub-circuit connected by electrical or electromagnetic connections. When an element or circuit is said to be "connected" to another element or "connected" between two nodes, it can be directly coupled or connected to another element, or there may be intermediate elements. The connection between elements can be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected" to another element, it means that there are no intermediate elements between them.

[0039] Unless the context explicitly requires it, the words "comprising," "including," and similar terms throughout the specification and claims should be interpreted as encompassing rather than being exclusive or exhaustive; that is, meaning "including but not limited to."

[0040] In the description of this invention, it should be understood that the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance. Furthermore, in the description of this invention, unless otherwise stated, "a plurality of" means two or more.

[0041] Figure 1 This is a schematic diagram of a current sensing circuit as a comparative example of the present invention. Figure 1 As shown in the comparative example, when sampling the current of the main power transistor MP, the current sensing ratio is adjusted by the ratio of the effective size of the main power transistor MP and the sensing transistor MS, that is, the sensing current I is adjusted. SENSE The ratio of the current sensing ratio to the output current Iout. However, due to non-ideal factors in the layout and manufacturing process, the actual current sensing ratio will deviate from the design value, and the sensing ratio will also vary under different output currents; furthermore, the effective size ratio of the main power transistor MP and the sensing transistor MS is fixed and cannot be flexibly adjusted. Therefore, a current sensing circuit with high sampling accuracy and an adjustable sensing ratio needs to be proposed.

[0042] Figure 2This is a schematic diagram of a current sensing circuit according to a first embodiment of the present invention. The current sensing circuit of this embodiment includes a main power transistor MP, a sensing transistor MS, and a trimming circuit 20.

[0043] The main power transistor MP can be an NMOS or PMOS transistor. In this embodiment of the invention, the main power transistor MP and the sensing transistor MS are illustrated using an MMOS transistor as an example. The first power terminal (drain) of the main power transistor MP is connected to a high-potential node, such as the power supply voltage VS in this embodiment of the invention. Its second power terminal (source) outputs the output current Iout required by the load, and its control terminal (gate) receives the drive signal V. DRV .

[0044] The control terminal (gate) of the sensing transistor MS is connected to the control terminal (gate) of the main power transistor MP, and its first power terminal (drain) is connected to the same node as the power supply voltage VS. This connection method makes the gate-source voltage Vgs of the main power transistor MP and the sensing transistor MS approximately the same. The second power terminal (source) of the sensing transistor MS outputs an intermediate sensing current I. S According to the transistor's current formula, in the saturation region or linear region, the intermediate sense current I... S The ratio of the current to the output current Iout is denoted as the first ratio K1, which is theoretically equal to the ratio of the effective size of the sensing transistor MS to the main power transistor MP, for example, (W / L)_MS / (W / L)_MP. Here, (W / L)_MS refers to the ratio of the channel width to the channel length of the sensing transistor MS, and (W / L)_MP refers to the ratio of the channel width to the channel length of the main power transistor MP. However, due to process variations, the actual implemented first ratio K1 may have a certain error compared to the preset ratio K1_design. In this embodiment of the invention, the ratio of the effective size of the sensing transistor MS to the main power transistor MP is 1:n, then the first ratio K1 is 1 / n.

[0045] In a preferred embodiment, the sensing transistor operates simultaneously with the main power transistor in the linear region during current sampling. The linear region refers to a region where the gate-source voltage of the transistor is greater than the turn-on voltage, and the drain-source voltage is less than the difference between the gate-source voltage and the turn-on voltage. In this region, the drain-source voltage is relatively small, and the channel resistance is essentially controlled only by the gate-source voltage. When the gate-source voltage is constant, the drain current has a linear relationship with the drain-source voltage, and in this region, the drain and source of the transistor are equivalent to a variable resistor controlled by the gate-source voltage. In another embodiment, the sensing transistor operates simultaneously with the main power transistor in the saturation region during current sampling. The saturation region refers to a region where the drain-source voltage of the transistor is relatively large, and the drain current does not change significantly with increasing voltage.

[0046] The input terminal of the adjustment circuit 20 receives the intermediate sensing current I. S The adjustment circuit has 20 pairs of intermediate sensing currents I. S The process is performed to output the final first sensing current I. S1 The adjustment circuit is configured to make the first sense current I... S1 With intermediate sensing current I S It has an adjustable second ratio K2, i.e., I S1 =K2*I S Therefore, the first sensing current I S1 The total ratio K of the output current Iout is: K = K1 * K2. The core idea of ​​this invention is to compensate for the process deviation of the first ratio K1 by adjusting the second ratio K2 of the adjustment circuit 20, thereby making the total ratio K precisely equal to a preset ratio (e.g., K1_design). Alternatively, by adjusting the second ratio K2 of the adjustment circuit 20, the value of the total ratio K can be changed, thereby ensuring that the final first sensing current Iout... S1 The ratio of the first sensing current Iout to the output current Iout is adjusted from K1 to be adjustable within the range of K1*K2 to K1, thereby making the first sensing current I... S1 The ratio can be adjusted within a wide range.

[0047] This embodiment of the invention, by introducing a second proportionally adjustable trimming circuit 20, allows for the sensing of the intermediate current I. S After generation, a secondary proportional adjustment is performed. This way, even if the first ratio between the sensing transistor MS and the main power transistor MP deviates from the design value due to process variations, it can be compensated for by adjusting the second ratio K2 of the adjustment circuit 20, ensuring that the final first sensing current I... S1 Achieving a desired, precise overall proportional relationship between the output current Iout of the main power transistor MP and the final first sensing current I... S1 The ratio of the output current Iout to the current can be adjusted within a wide range.

[0048] Figure 3 This is a schematic diagram of a current sensing circuit according to a second embodiment of the present invention. In this embodiment, a circuit structure of a trimming circuit 30 is illustrated.

[0049] The adjustment circuit 30 includes a first branch module 31 and a second branch module 32 connected in parallel. The first branch module 31 is used to output a first sensing current I. S1 The first branch module 31 includes a first transistor M1. The second branch module 32 includes multiple ( Figure 3 The diagram shows N second sub-branches 321, 322, ..., 32N connected in parallel (where N is an integer greater than or equal to 1). The tuning circuit 30 adjusts the intermediate sensing current I... SThe proportion of current shunted to the first branch module 31 is used to adjust the second proportion K2. More specifically, the tuning circuit 30 changes the intermediate sensed current I by altering the on / off state of each second sub-branch. S The proportion of current shunted to the first branch module 31. Each second sub-branch includes a second transistor and a second switch connected in series with the second transistor. The tuning circuit 30 dynamically changes the intermediate sensing I by changing the on / off state of each second sub-branch. S The proportion of current diverted to the second branch module 32 reverses the flow of current into the first branch module 31 (i.e., the first sensing current). IS1 ) intermediate sensing current I S The proportion.

[0050] The second sub-branch 321 includes a second transistor M11 and a second switch M12 connected in series. Similarly, the second sub-branch 322 includes a second transistor M21 and a second switch M22 connected in series, and so on, with the second sub-branch 32N including a second transistor MN1 and a second switch MN2 connected in series. The control terminals (gates) of all the second transistors and the control terminal of the first transistor M1 are connected together and connected to the bias voltage V. PB The first power terminals (sources) of all the second transistors and the first power terminal (source) of the first transistor M1 are connected together as the input terminal of the tuning circuit 30, receiving the intermediate sensing current I. S The second power terminal (drain) of the first transistor M1 is coupled to the output terminal SENSE of the tuning circuit 30, and the first sensing current I is output at the output terminal SENSE. S1 The second power terminal (drain) of each second transistor Mx1 is connected to ground or a low-potential node via the corresponding second switch Mx2, which is connected to ground GND.

[0051] The second switch can be a MOS switch, a transmission gate, or other controllable switching device, which can be easily controlled by an external control signal (such as a modifier code from a register).

[0052] In a preferred embodiment, the adjustment circuit 30 further includes a sensing control switch M2, which is turned on when the current sensing function is enabled and the voltage between the two power terminals of the sensing transistor MS is less than the power supply voltage VS. When the sensing control switch M2 is controlled by the sensing enable signal V... CTRL When turned on, the first branch module 31 outputs the first sensed current I. S1 In this embodiment of the invention, the sensing control switch M2 is connected in series with the first transistor M1.

[0053] The first transistor M1 and all the second transistors M11 to MN1 are of the same type (e.g., all NMOS or all PMOS). This arrangement ensures that the transistors in the first branch module 31 and the second branch module 32 operate at the same gate-source voltage. When they have the same threshold voltage and mobility, the ratio of their on-currents depends only on their size ratio, thus ensuring the accuracy and stability of the current shunting ratio. Since the control terminals and first power terminals of the first transistor M1 and all the second transistors M11 to MN1 are forced to be the same, when all transistors operate in the linear region, the current flowing through each transistor is proportional to the ratio of its channel width to channel length (W / L), i.e., the width-to-length ratio. Intermediate sensing current I S As the total current, it is shunted according to the relative size of the transistors in each parallel branch.

[0054] In one implementation, let the size of the first transistor M1 be SM1 (representing its W / L). Let the size of the second transistor Mx1 in the x-th second sub-branch be Sx1. When the second switch Mx2 is closed, this branch is conducting, and the current it carries is proportional to its size Sx1. When Mx2 is open, the current in this branch is zero. Let the total size of all conducting second transistors be Total = Σ(Sx1 of the conducting branches). Then, the current flowing into the first transistor M1, i.e., the first sensing current I... S1 , and intermediate sensing current I S The ratio is: K2 = I S1 / I S =SM1 / (SM1+Stotal) Therefore, by controlling the on and off of each of the second switches M12 to MN2, the value of the total size Stotal of all the conducting second transistors can be changed, thereby finely adjusting the second ratio K2.

[0055] In a preferred embodiment, to achieve more efficient and higher resolution tuning, the dimensions of the second transistors in the multiple second sub-branches within the second branch module 32 are different from each other. Furthermore, each transistor's size is a different integer power of 2 multiple of the size of one of the second transistors; that is, the second transistors can employ a binary-weighted size design. This binary-weighted size design allows for a wide range of second proportional adjustments to be achieved with minimal step sizes by combining the on / off control of these second sub-branches, providing high-resolution tuning capabilities. For example:

[0056] Let the size of the smallest second transistor (such as M11) be S11 = Sunit.

[0057] Let the size of M21 be S21 = 2 * Sunit.

[0058] Let the size of M31 be S31 = 4 * Sunit. ...

[0060] Let the size of MN1 be SN1 = 2^(N-1)*Sunit.

[0061] The size SM1 of the first transistor M1 can be set to a base value, for example, SM1 = M * Sunit, where M is a positive integer.

[0062] Thus, by using an N-bit trim code [b0,b1,...,b{n-1}] to control M12 to MN2 (assuming bx=1 indicates conduction and bx=0 indicates deactivation), then Total = (b0*1+b1*2+b2*4+...+b{N-1}*2^{N-1})*Sunit.

[0063] Therefore, K2 = M / [M + (b0*1 + b1*2 + ... + b{N-1}*2^{N-1})].

[0064] By changing the adjustment control word, K2 can be varied in discrete steps within a certain range. The step accuracy is determined by the minimum unit Sunit, N, and the value of M. By appropriately selecting M and N, sufficient compensation for the deviation of K1 can be achieved. The adjustment accuracy J is:

[0065] J=1 / [M*Sunit+(b0*1+b1*2+...+b{N-1}*2^{N-1})*Sunit]

[0066] In practical applications, the adjustment process can be completed during the chip testing phase. The test equipment measures the actual total ratio Ktotal, compares it with the target value, calculates the required adjustment control word, and writes this control word into a non-volatile memory (such as EEPROM or fuse register) inside the chip. When the chip is powered on, the adjustment circuit automatically loads this control word, sets the second ratio K2, and thus completes the permanent adjustment of the current sensing circuit. It can also be designed to adjust in real time via an interface for adaptive systems or more complex calibration scenarios.

[0067] In a more preferred embodiment, the first ratio K1 is greater than the preset ratio K1_design, where the preset ratio K1_design is the desired first sensing current I. S1 The ratio of the current to the output current Iout. The adjustment circuit 30 adjusts the current based on the first sensed current I... S1 The second ratio K2 is adjusted based on the comparison between the measured value and the target value. The target value is determined by K1_design based on the output current Iout and the preset ratio. More specifically, the first sensing current Iout... S1The target value is the product of the output current Iout and the preset ratio K1_design.

[0068] The adjustment circuit 30 adjusts according to the first sensed current I S1 The comparison between the measured value and the target value determines the on / off state of each second sub-branch. The target value is determined based on the preset ratio K1_design of the output current Iout and the current sensing. When the first sensed current Iout... S1 When the measured value is greater than the target value, more of the second sub-branch is activated to transfer more of the intermediate sensing current I. S The circuit bypasses to the second branch module 32; when the first sensing current I S1 When the measured value is less than the target value, more of the second sub-branch is turned off to allow more intermediate sensing current I to be released. S The current is diverted to the first branch module 31, which allows the first sensing current I to... S1 The measured value gradually approaches the target value, thereby improving the accuracy of current sensing by finely adjusting the second ratio K2.

[0069] It should be noted that the advantage of setting the first ratio K1 to be greater than the preset ratio K1_design is that, regardless of the first sensing current I... S1 When the measured value is greater than or less than the target value, the adjustment circuit 30 has sufficient adjustment space to ensure that the first sensing current I... S1 The measured value gradually approaches the target value. This is because when the first ratio K1 is greater than the preset ratio K1_design, the intermediate sensing current I is allowed to be shunted to the first branch module 31. S The output current can be greater than or less than the preset ratio K1_design multiple. Therefore, regardless of the first sensing current I... S1 If the measured value is too high or too low, it can be adjusted to the target value.

[0070] In summary, the current sensing circuit provided by this invention, by introducing a digitally programmable adjustment circuit, utilizes the bypass portion of the intermediate sensing current in the adjustment circuit to adjust the accuracy and / or current sensing ratio. This effectively compensates for the process mismatch between the main power transistor and the sensing transistor, significantly improving the accuracy of current sensing or broadening the inductive sensing ratio. The circuit structure is simple, easy to integrate, flexible in adjustment, and highly accurate.

[0071] Figure 4 This is a schematic diagram of a current sensing circuit according to a third embodiment of the present invention. In this embodiment, a circuit structure of a trimming circuit 40 is illustrated.

[0072] The adjustment circuit 40 includes a first branch module 41 and a second branch module 42 connected in parallel. The first branch module 41 is used to output a first sensing current I. S1 The first branch module 41 includes a first resistor RM. The second branch module 42 includes multiple ( Figure 4 The diagram shows N second sub-branches 421, 422, ..., 42N connected in parallel (where N is an integer greater than or equal to 1). The tuning circuit 40 adjusts the intermediate sensing current I... S The proportion of current shunted to the first branch module 41 is used to adjust the second proportion K2. More specifically, the tuning circuit 40 changes the intermediate sensed current I by altering the on / off state of each second sub-branch. S The proportion of current shunted to the first branch module 41. Each second sub-branch also includes a second resistor and a third switch connected in series with the second resistor. The adjustment circuit 40 dynamically changes the intermediate sensing current I by changing the on / off state of each second sub-branch. S The total proportion of current diverted to the second branch module 42, thereby reversing the current flowing into the first branch module 41 (i.e., the first sensing current). IS1 ) intermediate sensing current I S The proportion.

[0073] The second sub-branch 421 includes a second resistor R1 and a third switch M12 connected in series. Similarly, the second sub-branch 422 includes a second resistor R2 and a third switch M22 connected in series, and so on, with the second sub-branch 42N including a second resistor RN and a third switch MN2 connected in series. The first terminals of all the second resistors and the first terminal of the first resistor RM are connected together as the input terminal of the tuning circuit 40, receiving the intermediate sensed current I. S The second terminal of the first resistor RM is coupled to the output terminal SENSE of the adjustment circuit 40, and the first sensing current I is output at the output terminal SENSE. S1 The second terminal of each second resistor Rx is connected to ground or a low-potential node via the corresponding third switch Mx2, which is connected to ground GND.

[0074] In a preferred embodiment, the adjustment circuit 40 further includes a sensing control switch M2, which is turned on when the current sensing function is enabled and the voltage between the two power terminals of the sensing transistor MS is less than the power supply voltage VS. When the sensing control switch M2 is turned on, the first branch module 41 outputs the first sensing current I. S1 In this embodiment of the invention, the sensing control switch M2 is coupled in series with the first resistor RM.

[0075] The conductivities (i.e., the reciprocals of the resistance values) of the multiple second resistors corresponding to the multiple second sub-branches within the second branch module 42 are all different. In one embodiment, let the conductance of the first resistor RM be D1 (representing 1 / RM). Let the conductance of the second resistor Rx in the x-th second sub-branch be Dx. When the third switch Mx2 is closed, this branch is conducting, and the current it carries is proportional to the conductance Dx. When the third switch Mx2 is open, the current in this branch is zero. Let the total conductance of the second resistors Rx in all conducting second sub-branches be Dtotal = Σ(Dx of conducting branches). Then, the current flowing into the first resistor RM, i.e., the first sensing current I... S1 , and intermediate sensing current I S The ratio is: K2 = I S1 / I S =D1 / (D1+Dtotal). Therefore, by controlling the on and off of each of the third switches M12 to MN2, the total conductance Dtotal of all the conducting second resistors can be changed, thereby finely adjusting the second proportional K2.

[0076] In summary, the current sensing circuit provided by this invention, by introducing a trimming circuit and utilizing the bypassing of a portion of the current in the trimming circuit to adjust the accuracy and / or current sensing ratio, effectively compensates for the process mismatch between the main power transistor and the sensing transistor, significantly improving the accuracy of current sensing or broadening the inductive sensing ratio. This circuit has a simple structure, is easy to integrate, offers flexible adjustment, and provides high accuracy.

[0077] Figure 5 This is a schematic diagram of a current sensing circuit according to a fourth embodiment of the present invention. The current sensing circuit of this embodiment includes a main power transistor MP, a sensing transistor MS, and a trimming circuit 50. The difference between this invention and the third embodiment is that both the main power transistor MP and the sensing transistor MS are PMOS transistors. The other circuit modules in this embodiment have the same circuit structure and working principle as the corresponding circuit modules in the current sensing circuit of the third embodiment, and will not be described again here.

[0078] It should be noted that the power switch in the embodiments of the present invention uses a P-type metal-oxide-semiconductor transistor (MOSFET), while the power switch in the above embodiments uses an N-type metal-oxide-semiconductor transistor. It should be understood that other electrically controlled switching devices, such as bipolar transistors (BJTs) or insulated-gate bipolar transistors (IGBTs), can also be used as the main power transistor MP and the sensing transistor MS of the present invention.

[0079] Figure 6This is a schematic diagram of a current sensing circuit according to the fifth embodiment of the present invention. The current sensing circuit of this embodiment includes a main power transistor MP, a sensing transistor MS, and a trimming circuit 60. The difference between this invention and the third embodiment is that it also includes a first adjustment circuit 61. The other circuit modules in this embodiment have the same circuit structure and working principle as the corresponding circuit modules in the current sensing circuit of the third embodiment, and will not be described again here.

[0080] The first adjustment circuit 61 is used to, on the basis that the gate-source voltage Vgs of the main power transistor MP and the sensing transistor MS are the same, add a feedback circuit to further make the drain-source voltage Vds of the main power transistor MP and the sensing transistor MS equal as well. This allows the circuit to sense the current exactly according to the ratio of the effective size of the two transistors, thereby reducing the impact of the difference in drain-source voltage Vds on the first sensed current I. S1 The impact.

[0081] In a preferred embodiment, the first adjustment circuit 61 includes a first operational amplifier AMP1. The two input terminals of the first operational amplifier AMP1 are respectively coupled to the second power terminal (source) of the main power transistor MP and the second power terminal (source) of the sensing transistor MS. The output signal of the first operational amplifier AMP1 is used to adjust the current flowing through the sensing transistor MS, so that the voltage at the second power terminal of the main power transistor MP and the voltage at the second power terminal of the sensing transistor MS tend to be consistent. Based on this, the main power transistor MP and the sensing transistor MS can have the same drain-source voltage Vds.

[0082] The current sensing circuit of this embodiment of the invention, by introducing a second proportionally adjustable trimming circuit 60, allows for sensing of the intermediate current I. S After generation, a secondary proportional adjustment is performed. This way, even if the first ratio between the sensing transistor MS and the main power transistor MP deviates from the design value due to process variations, it can be compensated for by adjusting the second ratio K2 of the adjustment circuit 60, ensuring that the final first sensing current I... S1 Achieving a desired, precise overall proportional relationship between the output current Iout of the main power transistor MP and the final first sensing current I... S1 The ratio of the output current Iout can be adjusted within a wide range. Furthermore, by introducing a first adjustment circuit 61, the gate-source voltage Vgs and drain-source voltage Vds of the main power transistor MP and the sensing transistor MS are made equal, so that the current sensing circuit senses the current exactly according to the ratio of the effective size of the two transistors, thereby further improving the accuracy of current sensing.

[0083] Figure 7This is a schematic diagram of a current sensing circuit according to the sixth embodiment of the present invention. The current sensing circuit of this embodiment includes a main power transistor MP, a sensing transistor MS, and a trimming circuit 70. The difference between this invention and the fifth embodiment is that it also includes a second adjustment circuit 72. The other circuit modules in this embodiment have the same circuit structure and working principle as the corresponding circuit modules in the current sensing circuits of the third and fifth embodiments, and will not be described again here.

[0084] The second adjustment circuit 72 is used to adjust the drain-source voltage Vds of the main power transistor MP when it is less than the reference voltage V. REF At that time, the drain-source voltage Vds is stabilized at the reference voltage V. REF To eliminate the effect of the offset voltage Voff of the first operational amplifier AMP1 on the first sense current I S1 The impact.

[0085] The second adjustment circuit 72 includes a second operational amplifier AMP2. One input terminal of the second operational amplifier AMP2 is coupled to the second power terminal of the main power transistor MP, and the other input terminal receives a reference voltage V. REF The main power transistor MP and the sensing transistor MS are controlled by the output signal of the second operational amplifier AMP2 to adjust the current flowing through them, so that the voltage at the second power terminal of the main power transistor MP is equal to the reference voltage V. REF Towards consensus.

[0086] The offset voltage Voff of the first operational amplifier AMP1 affects the first sense current I. S1 The reason for the impact is as follows:

[0087] The formula for calculating the output current Iout flowing through the main power transistor MP is:

[0088] Iout = a * (Vgs - Vth) * Vds;

[0089] The intermediate sensing current I flowing through the sensing transistor MS S The calculation formula is:

[0090] I S = b*(Vgs-Vth)*(Vds+Voff);

[0091] First sensing current I S1 The ratio of the current to the output current Iout is:

[0092] I S / Iout=(b / a)*[(Vds+Voff) / Vds];

[0093] Therefore, it can be seen that when the drain-source voltage Vds is large, the offset voltage Voff affects the first sensing current I.S1 The effect is negligible; however, when the drain-source voltage Vds is small, the offset voltage Voff has a significant impact on the first sensing current I. S1 The accuracy has a significant impact. Therefore, in this embodiment of the invention, a second adjustment circuit 72 is further added to adjust the voltage when the drain-source voltage Vds of the main power transistor MP is less than the reference voltage V. REF At this time, the gate-source voltage Vgs is reduced by the adjustment function of the second operational amplifier circuit 72, which in turn increases the on-resistance Ron of the main power transistor MP, thereby increasing the drain-source voltage Vds, thus stabilizing the drain-source voltage Vds at the reference voltage V. REF This is to reduce the impact of the offset voltage Voff of the first operational amplifier AMP1 on the first sensing current I. S1 The purpose of the influence. Here, preferably, the reference voltage V REF The value of is less than a certain threshold relative to the power supply voltage VS.

[0094] The current sensing circuit of this embodiment of the invention, by introducing a second proportionally adjustable trimming circuit 70, allows for sensing of the intermediate current I. S After generation, a secondary proportional adjustment is performed. This way, even if the first ratio between the sensing transistor MS and the main power transistor MP deviates from the design value due to process variations, it can be compensated for by adjusting the second ratio K2 of the adjustment circuit 70, ensuring that the final first sensing current I... S1 Achieving a desired, precise overall proportional relationship between the output current Iout of the main power transistor MP and the final first sensing current I... S1 The ratio of the output current Iout to the current can be adjusted over a wide range. Furthermore, by introducing a first adjustment circuit, the gate-source voltage Vgs and drain-source voltage Vds of both the main power transistor MP and the sensing transistor MS are made equal, allowing the current sensing circuit to sense the current precisely according to the effective size ratio of the two transistors, thereby further improving the accuracy of current sensing. Additionally, by further introducing a second adjustment circuit 72, when the drain-source voltage Vds of the main power transistor MP is less than the reference voltage V... REF At that time, the drain-source voltage Vds is stabilized at the reference voltage V. REF To eliminate the effect of the offset voltage Voff of the first operational amplifier AMP1 on the first sense current I S1 This will further improve the accuracy of current sensing.

[0095] Figure 8 This is a schematic diagram of a current sensing circuit according to a fourth embodiment of the present invention. The current sensing circuit of this embodiment includes a main power transistor MP, a sensing transistor MS, and a trimming circuit 80.

[0096] In this embodiment of the invention, the main power transistor MP and the sensing transistor MS are illustrated using an MMOS transistor as an example, and the main power transistor MP is a low-side transistor. The first power terminal (source) of the main power transistor MP is connected to a low-potential node, such as ground GND in this embodiment of the invention, and its second power terminal (drain) outputs the output current Iout required by the load, and its control terminal (gate) receives the drive signal V. DRV The control terminal (gate) of the sensing transistor MS is connected to the control terminal (gate) of the main power transistor MP, and its first power terminal (source) and the first power terminal (source) of the main power transistor MP are connected to ground potential GND.

[0097] This connection method ensures that the gate-source voltage Vgs of the main power transistor MP and the sensing transistor MS are the same. The second power terminal (drain) of the sensing transistor MS outputs an intermediate sensing current I. S According to the transistor's current formula, the intermediate sense current I... S The ratio of the current to the output current Iout is denoted as the first ratio K1. In this embodiment of the invention, the effective size ratio of the sensing transistor MS to the main power transistor MP is 1:n, then the first ratio K1 is 1 / n.

[0098] The input terminal of the adjustment circuit 80 receives the intermediate sensing current I. S The adjustment circuit has 80 pairs of intermediate sensing currents I. S The process is performed, and the final first sensing current I is output at the SENSE terminal. S1 The adjustment circuit is configured to make the first sense current I... S1 With intermediate sensing current I S It has an adjustable second ratio K2, i.e., I S1 =K2*I S In this embodiment of the invention,

[0099] The adjustment circuit 80 includes a first branch module 81 and a second branch module 82 connected in parallel. The first branch module 81 is used to output a first sensing current I. S1 The first branch module 81 includes a first transistor K1. The second branch module 82 includes multiple parallel second sub-branches 821, 822, ... 82n.

[0100] Each second sub-branch includes a second transistor and a second switch connected in series with the second transistor. Second sub-branch 821 includes a second transistor K11 and a second switch K12 connected in series. Similarly, second sub-branch 822 includes a second transistor K21 and a second switch K22 connected in series, and so on, with second sub-branch 82N including a second transistor KN1 and a second switch KN2 connected in series. The control terminals (gates) of all second transistors and the control terminal of the first transistor K1 are connected together and connected to a bias voltage V. PB1 The first power terminals (sources) of all the second transistors and the first power terminal (source) of the first transistor M1 are connected together as the input terminal of the tuning circuit 80, receiving the intermediate sensing current I. S The second power terminal (drain) of the first transistor M1 is coupled to the output terminal SENSE of the tuning circuit 80, and the first sensing current I is output at the output terminal SENSE. S1 The second power terminal (drain) of each second transistor Kx1 is connected to the power supply voltage VS through the corresponding second switch Kx2.

[0101] It should be noted that in this embodiment of the invention, the main power transistor MP is located on the low side. Preferably, all transistors in the trimming circuit 80 are N-type transistors. This is because the threshold voltage of a P-type transistor is negative, so its gate voltage is at least ground potential. When the voltage at the SENSE terminal is less than the threshold voltage of the P-type transistor, the P-type transistor will be cut off, which will cause the current sensing function to fail. The threshold voltage of an N-type transistor is positive, and its gate will be connected to the source. When the voltage at the SENSE terminal is high, it is in the saturation region; when it is low, it is in the linear region, both of which can function normally. Conversely, when the main power transistor MP is located on the high side, as illustrated in the current sensing circuits of the first to sixth embodiments, all transistors in the trimming circuit are P-type transistors to provide a larger control margin for the circuit.

[0102] The current sensing circuit of this embodiment of the invention, by introducing a second proportionally adjustable trimming circuit 80, allows for sensing of the intermediate current I. S After generation, a secondary proportional adjustment is performed. This way, even if the first ratio between the sensing transistor MS and the main power transistor MP deviates from the design value due to process variations, it can be compensated for by adjusting the second ratio K2 of the adjustment circuit 80, ensuring that the final first sensing current I... S1 Achieving a desired, precise overall proportional relationship between the output current Iout of the main power transistor MP and the final first sensing current I... S1The ratio of the output current Iout to the main power transistor is adjustable over a wide range. Furthermore, the technical solution of this invention is not limited to the main power transistor MP being on the high side; it is equally applicable when the main power transistor MP is on the low side.

[0103] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. For those skilled in the art, the present invention can be modified and varied in various ways. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principle of the present invention should be included within the scope of protection of the present invention.

Claims

1. A current sensing circuit, comprising: The main power transistor is configured to generate output current; A sensing transistor having a control terminal connected to the control terminal of the main power transistor, a first power terminal connected to the first power terminal of the main power transistor, and generating an intermediate sensing current at its second power terminal, the intermediate sensing current having a first ratio to the output current; The adjustment circuit receives the intermediate sensing current and outputs a first sensing current. The first sensing current and the intermediate sensing current have a second ratio, and the second ratio is adjustable.

2. The current sensing circuit according to claim 1, characterized in that, The tuning circuit includes a first branch module and a second branch module connected in parallel. The first branch module is configured to output the first sense current. The tuning circuit adjusts the second ratio by changing the proportion of the intermediate sense current shunted to the first branch module.

3. The current sensing circuit according to claim 2, characterized in that, The second branch module includes multiple second sub-branches, and the adjustment circuit changes the on / off state of each second sub-branch to change the proportion of the intermediate sensing current shunted to the first branch module.

4. The current sensing circuit according to claim 3, characterized in that, The first branch module includes a first transistor, each second sub-branch includes a second transistor, and each second transistor has a control terminal connected to the control terminal of the first transistor and a first power terminal connected to the first power terminal of the first transistor. The first transistor and all the second transistors are transistors of the same type.

5. The current sensing circuit according to claim 4, characterized in that, The dimensions of the second transistors in the plurality of second sub-branches are different from each other, and are different integer powers of 2 of the size of one of the second transistors.

6. The current sensing circuit according to claim 4, characterized in that, Each second sub-branch also includes a second switch connected in series with the second transistor. The tuning circuit changes the on / off state of the corresponding second sub-branch by changing the on / off state of each second switch.

7. The current sensing circuit according to claim 1, characterized in that, It also includes a first adjustment circuit, which is used to adjust the voltage of the second power terminal of the main power transistor to be closer to the voltage of the second power terminal of the sensing transistor.

8. The current sensing circuit according to claim 7, characterized in that, The first adjustment circuit includes a first operational amplifier. The two input terminals of the first operational amplifier are respectively coupled to the second power terminal of the main power transistor and the second power terminal of the sensing transistor. The output signal of the first operational amplifier is used to adjust the current flowing through the sensing transistor so that the voltage of the second power terminal of the main power transistor tends to be consistent with the voltage of the second power terminal of the sensing transistor.

9. The current sensing circuit according to claim 8, characterized in that, It also includes a second adjustment circuit, which is used to stabilize the drain-source voltage at the reference voltage when the drain-source voltage of the main power transistor is less than the reference voltage, so as to eliminate the influence of the offset voltage of the first operational amplifier on the first sensing current.

10. The current sensing circuit according to claim 9, characterized in that, The second adjustment circuit includes a second operational amplifier. One input terminal of the second operational amplifier is coupled to the second power terminal of the main power transistor, and the other input terminal receives the reference voltage. The main power transistor and the sensing transistor are controlled by the output signal of the second operational amplifier to adjust the current flowing through them respectively, so that the voltage at the second power terminal of the main power transistor tends to be consistent with the reference voltage.

11. The current sensing circuit according to claim 4, characterized in that, When the main power transistor is on the high side, all transistors in the trimming circuit are P-type transistors; when the main power transistor is on the low side, all transistors in the trimming circuit are N-type transistors.

12. The current sensing circuit according to claim 1, characterized in that, The sensing transistor has a channel width that is reduced by a factor of n compared to the main power transistor, where n is greater than 1.

13. The current sensing circuit according to claim 3, characterized in that, The first branch module includes a first resistor, each second sub-branch includes a second resistor and a third switch connected in series with the second resistor, all second sub-branches are connected in parallel, and the tuning circuit changes the on / off state of the corresponding second sub-branch by changing the on / off state of each third switch.

14. The current sensing circuit according to claim 13, characterized in that, The conductivities of the multiple second resistors within the multiple second sub-branches are all different.

15. The current sensing circuit according to claim 4, characterized in that, The adjustment circuit also includes a sensing control switch, which is turned on when the current sensing function is enabled and the voltage between the two power terminals of the sensing transistor is less than the power supply voltage. When the sensing control switch is turned on, the first branch module outputs the first sensing current.

16. The current sensing circuit according to claim 15, characterized in that, The sensing control switch is connected in series with the first transistor.

17. The current sensing circuit according to claim 1, characterized in that, The first ratio is greater than a preset ratio, where the preset ratio is the ratio of the desired first sensing current to the output current.

18. The current sensing circuit according to claim 17, characterized in that, The adjustment circuit adjusts the second ratio based on the comparison between the measured value of the first sensed current and the target value, and the target value is determined based on the output current and the preset ratio.

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