Motor drive circuit with duty cycle dynamic modulation mechanism

Abstract

The invention discloses a motor driving circuit with a duty ratio dynamic modulation mechanism. A motor drive circuit includes a magnetic field change detection circuit, a control circuit, a drive circuit, and an output stage circuit. The magnetic field change detection circuit detects a plurality of voltages generated by magnetic intensity changes when a rotor of the motor rotates so as to output a commutation signal. The control circuit sets a plurality of control duty ratios according to the commutation signal, and outputs a control duty ratio signal according to each control duty ratio. The driving circuit outputs a driving signal according to the control duty ratio signal. The output stage circuit operates according to the driving signal to output a plurality of output stage signals to the motor.

Description

Motor drive circuit with duty cycle dynamic modulation mechanism Technical Field

[0001] This invention relates to electric motors, and more particularly to an electric motor drive circuit with a duty cycle dynamic modulation mechanism. Background Technology

[0002] With the rapid advancement of technology and the increasing prevalence of mobile devices, the need for heat dissipation has grown alongside miniaturization, thinning, and enhanced functionality. Mighty Mini Fans are finding wider applications, including in gaming phones, mobile devices, computer systems, network communications, consumer electronics, the medical industry, and security monitoring—all in next-generation portable products. These precision, miniature fans are characterized by their small size (e.g., 9×9×3 mm), low inductance (e.g., 40uH), and high resistance (e.g., 200 ohms). Therefore, traditional electric motor drive circuits would generate significant current ripple and relatively high noise levels. Summary of the Invention

[0003] Drive circuit. The electric motor drive circuit of the present invention includes a magnetic field change detection circuit, a control circuit, a drive circuit, and an output stage circuit. The magnetic field change detection circuit is disposed on the electric motor. The magnetic field change detection circuit is configured to detect multiple voltages generated by the change in magnetic strength when a rotor of the electric motor rotates, and output a commutation signal. The control circuit is connected to the magnetic field change detection circuit. The control circuit is configured to set multiple control duty cycles according to the commutation signal, and output a control duty cycle signal according to each control duty cycle. The drive circuit is connected to the control circuit and the electric motor. The drive circuit is configured to output a drive signal according to the control duty cycle signal. The output stage circuit is connected to the drive circuit and the electric motor. The output stage circuit is configured to operate according to the drive signal to output multiple output stage signals to the electric motor.

[0004] As described above, the present invention provides a motor drive circuit with a duty cycle dynamic modulation mechanism. Compared with the motor drive mechanism used in traditional motor drive circuits, which causes ripple in the motor current signal and high motor operating noise, the motor drive mechanism used in the motor drive circuit of the present invention does not cause ripple in the current signal flowing through the motor, and generates less noise when the motor is running.

[0005] To further understand the features and technical content of the present invention, please refer to the following detailed description and drawings of the present invention. However, the drawings provided are for reference and illustration only and are not intended to limit the present invention. Attached Figure Description

[0006] Figure 1 is a block diagram of a motor drive circuit with a duty cycle dynamic modulation mechanism according to the first embodiment of the present invention.

[0007] Figure 2 is a block diagram of a motor drive circuit with a duty cycle dynamic modulation mechanism according to a second embodiment of the present invention.

[0008] Figure 3 is a waveform diagram of the signal of the motor drive circuit with duty cycle dynamic modulation mechanism according to the second embodiment of the present invention.

[0009] Figure 4 is a waveform diagram of the signal of the motor drive circuit with duty cycle dynamic modulation mechanism according to the second embodiment of the present invention.

[0010] Figure 5 is a block diagram of a motor drive circuit with a duty cycle dynamic modulation mechanism according to the third embodiment of the present invention. Detailed Implementation

[0011] The following specific embodiments illustrate the implementation of the present invention. Those skilled in the art can understand the advantages and effects of the present invention from the content disclosed in this specification. The present invention can be implemented or applied through other different specific embodiments, and various details in this specification can also be modified and changed based on different viewpoints and applications without departing from the concept of the present invention. Furthermore, the accompanying drawings of the present invention are for simple illustrative purposes only and are not depictions of actual dimensions, as stated in advance. The following embodiments will further describe the relevant technical content of the present invention in detail, but the disclosed content is not intended to limit the scope of protection of the present invention. In addition, the term "or" as used herein may, depending on the actual situation, include any or more combinations of the associated listed items.

[0012] Please refer to Figure 1, which is a block diagram of a motor drive circuit with a duty cycle dynamic modulation mechanism according to the first embodiment of the present invention.

[0013] The electric motor drive circuit with a duty cycle dynamic modulation mechanism of the present invention includes a magnetic field change detection circuit HSE, a control circuit CTR, a drive circuit DRV, and an output stage circuit OTG.

[0014] The magnetic field change detection circuit HSE is located on the motor MT. The magnetic field change detection circuit HSE may include a Hall sensor. The magnetic field change detection circuit HSE is configured to detect multiple voltages (including multiple positive voltages and multiple negative voltages) generated by the change in magnetic strength of one rotor of the motor MT as it rotates, and outputs a commutation signal PHS.

[0015] The control circuit CTR is connected to the magnetic field change detection circuit HSE. Based on a commutation signal PHS received from the magnetic field change detection circuit HSE, the control circuit CTR sets multiple control duty cycles.

[0016] For example, the control circuit CTR can compare multiple voltages of the commutation signal PHS at multiple time points with a commutation reference voltage to generate a comparison result. Based on this comparison result, multiple modulation duty cycles are determined. Multiple control duty cycles are then determined based on these multiple modulation duty cycles and multiple indicated duty cycles received from an external pulse width modulation signal generator. For instance, the control circuit CTR detects multiple duty cycles of a pulse width modulation signal output from an external pulse width modulation signal generator as multiple indicated duty cycles. The control circuit CTR can multiply these multiple modulation duty cycles by the multiple duty cycles of the pulse width modulation signal to calculate multiple ratios as multiple control duty cycles.

[0017] The control circuit CTR outputs a control duty cycle output signal DYOUT based on each of the aforementioned control duty cycles. The drive circuit DRV connects to the control circuit CTR and the motor MT. The drive circuit DRV sets and outputs multiple drive signals based on the multiple control duty cycles indicated by the control duty cycle output signal DYOUT received from the control circuit CTR.

[0018] The output stage circuit OTG connects to the drive circuit DRV and the motor MT. The OTG operates based on multiple drive signals received from the drive circuit DRV to output multiple output stage signals to multiple terminals of the motor MT (e.g., but not limited to, the first terminal OUT1 and the second terminal OUT2 of a single-phase motor) to drive the motor MT. Each output stage signal output by the OTG may contain multiple waveforms, such as, but not limited to, multiple sine waves, multiple third harmonic waves, or multiple trapezoidal waves.

[0019] Please refer to Figures 2 to 4, where Figure 2 is a block diagram of a motor drive circuit with a duty cycle dynamic modulation mechanism according to the second embodiment of the present invention, and Figures 3 and 4 are waveform diagrams of the signals of the motor drive circuit with a duty cycle dynamic modulation mechanism according to the second embodiment of the present invention.

[0020] The electric motor drive circuit with a duty cycle dynamic modulation mechanism of the present invention includes a magnetic field change detection circuit HSE, a control circuit CTR, a drive circuit DRV, and an output stage circuit OTG.

[0021] As shown in Figure 2, the control circuit CTR may include a duty cycle generation circuit TDY, a duty cycle setting circuit MDY, and a duty cycle output circuit DOT. The drive circuit DRV may include a digital-to-analog converter DAC. The output stage circuit OTG may include one or more operational amplifiers, such as, but not limited to, the two operational amplifiers AMP shown in Figure 2, and may include multiple first feedback resistors R1 and multiple second feedback resistors R2, but this is only illustrative and the invention is not limited thereto.

[0022] As shown in Figure 2, the input terminal of the modulation duty cycle setting circuit MDY is connected to the output terminal of the magnetic field change detection circuit HSE, and the input terminal of the control duty cycle output circuit DOT is connected to the output terminal of the duty cycle generation circuit TDY, the output terminal of the modulation duty cycle setting circuit MDY, and the input terminal of the digital-to-analog converter DAC.

[0023] Each operational amplifier (AMP) has a first input terminal, such as a non-inverting input terminal, a second input terminal, such as an inverting input terminal, and an output terminal. The first input terminal, such as the non-inverting input terminal, of each AMP is connected to a digital-to-analog converter (DAC). The second input terminal, such as the inverting input terminal, of each AMP is coupled to a reference voltage.

[0024] The first terminal of each first feedback resistor R1 is grounded. The second terminals of the multiple first feedback resistors R1 are respectively connected to the first terminals of multiple second feedback resistors R2. The second terminals of the multiple second feedback resistors R2 are respectively connected to the output terminals of multiple operational amplifiers (AMPs). The voltage at the node between the second terminal of each first feedback resistor R1 and the first terminal of each second feedback resistor R2 is used as the aforementioned reference voltage.

[0025] The outputs of multiple operational amplifiers (AMPs) are connected to multiple terminals of the motor MT (e.g., but not limited to, the first terminal OUT1 and the second terminal OUT2 of a single-phase motor). If necessary, each operational amplifier (AMP) may also have a third input terminal, which is connected to the output of the magnetic field change detection circuit HSE.

[0026] The duty cycle indicator generation circuit TDY outputs multiple duty cycles DY1. For example, the duty cycle indicator generation circuit TDY detects multiple duty cycles of multiple pulses of a pulse width modulation signal PWM output by an external pulse width modulation signal generator (not shown) as multiple duty cycles DY1.

[0027] The magnetic field change detection circuit HSE detects multiple voltages (including multiple positive voltages and multiple negative voltages) generated by the change in magnetic strength of one rotor of the motor MT during rotation, and outputs a commutation signal PHS. The commutation signal PHS shown in Figure 2 can be the same as the commutation signal PHS shown in Figure 3 or Figure 4. Next, the modulation duty cycle setting circuit MDY sets multiple modulation duty cycles DY2 based on the commutation signal PHS received from the magnetic field change detection circuit HSE.

[0028] For example, the modulation duty cycle setting circuit MDY receives a commutation signal PHS from the magnetic field change detection circuit HSE. PHS is a voltage signal with multiple waveforms. The MDY can compare multiple voltages at multiple time points on the multiple waveforms of the commutation signal PHS with a commutation reference voltage to determine multiple levels of the modulation duty cycle signal at multiple time points. Then, the MDY can set multiple modulation duty cycles DY2 based on the multiple phase times (including multiple operating cycles and multiple non-operating cycles) of the multiple waveforms of this modulation duty cycle signal.

[0029] For example, the modulation duty cycle setting circuit MDY can store multiple reference phase times and their corresponding multiple reference modulation duty cycles DY2. The modulation duty cycle setting circuit MDY can obtain a reference modulation duty cycle DY2 corresponding to a reference phase time that is the same as the phase time of the aforementioned modulation duty cycle signal, and use it as a modulation duty cycle DY2. In this way, the modulation duty cycle setting circuit MDY can obtain multiple modulation duty cycles DY2 for multiple phase times of a modulation duty cycle signal.

[0030] Furthermore, the control duty cycle output circuit DOT sets multiple control duty cycles (or sets multiple control duty cycle values ​​as described above) based on multiple indicated duty cycles DY1 received from the indicated duty cycle generation circuit TDY and multiple modulation duty cycles DY2 received from the modulation duty cycle setting circuit MDY. Each indicated duty cycle DY1 can, for example, be a duty cycle of 100% corresponding to the value 255 shown in Figure 3, or all of them can be a duty cycle of 50% corresponding to the value 127 shown in Figure 3. The multiple modulation duty cycles DY2 shown in Figure 2 can be the same as the multiple duty cycles corresponding to the multiple values ​​shown in Figure 3 or Figure 4. It should be understood that 8d shown in Figure 3 or Figure 4 represents 8 bits.

[0031] For example, the control duty cycle output circuit DOT can multiply a modulation duty cycle (a ratio, such as, but not limited to, 50%) obtained within the same time interval with an indication duty cycle (a ratio, such as, but not limited to, 100%) to calculate a ratio as a control duty cycle. In other words, the control duty cycle output circuit DOT multiplies multiple modulation duty cycles DY2 by multiple indication duty cycles DY1 to calculate multiple ratios as multiple control duty cycles.

[0032] Alternatively, the control duty cycle output circuit DOT can be set to a range of values ​​from 0% to 225, as shown in Figure 3 or Figure 4, corresponding to duty cycles from 0% to 100%. The value corresponding to a modulation duty cycle DY2 obtained from the modulation duty cycle setting circuit MDY (e.g., the value 255 corresponding to 100%) is multiplied by the value corresponding to an indication duty cycle (e.g., 255 corresponding to 50%), and then divided by the value corresponding to a maximum duty cycle (e.g., 100%) (e.g., 255) to calculate a value as a control duty cycle value.

[0033] The control duty cycle output circuit DOT outputs a control duty cycle output signal DYOUT based on each control duty cycle or each control duty cycle value mentioned above.

[0034] The drive circuit DRV outputs a drive signal DVS based on a control duty cycle output signal DYOUT received from the control duty cycle output circuit DOT. The drive signal DVS shown in Figure 2 can be the same as the drive signal DVS shown in Figure 3 or Figure 4.

[0035] If the control duty cycle output circuit DOT outputs a control duty cycle output signal DYOUT that is a digital signal, the drive circuit DRV may include a digital-to-analog converter DAC to convert the control duty cycle output signal DYOUT from a digital signal into an analog signal as a drive signal DVS.

[0036] Each operational amplifier (AMP) receives a drive signal DVS from the drive circuit DRV at its first input terminal, such as the non-inverting input terminal. Each AMP receives a reference voltage from the node between the first terminal of the second feedback resistor R2 and the second terminal of the first feedback resistor R1 at its second input terminal. Each AMP receives a commutation signal PHS from the magnetic field change detection circuit HSE.

[0037] Each operational amplifier (AMP) multiplies a default gain by the difference between each of the multiple voltages of multiple waveforms of a drive signal DVS or a commutation signal PHS and a reference voltage to generate an operationally amplified signal. The multiple operational amplifiers (AMPs) output the generated operationally amplified signals to multiple terminals of the motor MT, such as the first terminal OUT1 and the second terminal OUT2, to drive the motor MT.

[0038] By adjusting the duty cycle of the pulse width modulation signal (PWM) output by the external pulse width modulation signal generator (not shown), the voltage signal at the first terminal OUT1 of the motor MT and the voltage signal at the second terminal OUT2 of the motor MT can be controlled.

[0039] For example, the voltage signal at the first terminal OUT1 of the motor MT can be the same as a voltage signal OUT1S as shown in Figure 3 or Figure 4, and the voltage signal at the second terminal OUT2 of the motor MT can be the same as a voltage signal OUT2S as shown in Figure 3 or Figure 4.

[0040] The amplitude of the voltage signal on the coil between the first terminal OUT1 and the second terminal OUT2 of the motor MT can be between -VCC×DTPWM and VCC×DTPWM, where VCC represents the power supply voltage (the power supply voltage coupled to the positive power input terminal of the drive circuit DRV, the output stage circuit OTG, or each operational amplifier AMP), and DTPWM is the duty cycle of the pulse width modulation signal PWM. Assuming VCC=5V and PWM=100% as shown in Figure 3, the amplitude of V(OUT1)-V(OUT2) = -5V to 5V. Assuming VCC=5V and PWM=50% as shown in Figure 4, the amplitude of V(OUT1)-V(OUT2) = -2.5V to 2.5V.

[0041] It is worth noting that, as shown in Figure 3 or Figure 4, the drive signal DVS output by the drive circuit DRV of the motor drive circuit of the present invention, the voltage signal OUT1S at the first terminal OUT1 of the motor MT, and the voltage signal OUT2 at the second terminal OUT2 of the motor MT are free of ripple. Therefore, the motor drive circuit of the present invention can stably drive the motor MT to operate.

[0042] Please refer to Figure 5, which is a block diagram of a motor drive circuit with a duty cycle dynamic modulation mechanism according to the third embodiment of the present invention.

[0043] The third embodiment of the present invention is the same as the second embodiment, and will not be repeated herein.

[0044] The difference between the third embodiment of the present invention and the second embodiment is that the drive circuit DRV of the motor drive circuit of the second embodiment of the present invention, as shown in FIG2, contains only a single digital-to-analog converter (DAC), while the drive circuit DRV of the motor drive circuit of the third embodiment of the present invention, as shown in FIG5, contains multiple digital-to-analog converters (DACs).

[0045] In the third embodiment, the control duty cycle output circuit DOT sets multiple control duty cycles (or sets multiple control duty cycle values ​​as described above) based on multiple indication duty cycles DY1 received from the indication duty cycle generation circuit TDY and multiple modulation duty cycles DY2 received from the modulation duty cycle setting circuit MDY. The control duty cycle output circuit DOT outputs multiple control duty cycle output signals DYOUT to multiple digital-to-analog converters (DACs) based on each control duty cycle or each control duty cycle value.

[0046] Multiple digital-to-analog converters (DACs) are configured to convert multiple control duty cycle output signals (DYOUT) from multiple digital signals into multiple analog signals, which are then output as multiple drive signals (DVS) to multiple first input terminals, such as non-inverting input terminals, of multiple operational amplifiers (AMPs).

[0047] In summary, this invention provides a motor drive circuit with a duty cycle dynamic modulation mechanism. Compared to the motor drive mechanisms used in traditional motor drive circuits, which cause ripple in the motor's current signal and high motor operating noise, the motor drive mechanism used in this invention does not cause ripple in the current signal flowing through the motor, and generates less noise during motor operation.

[0048] The above-disclosed content is only a preferred and feasible embodiment of the present invention and is not intended to limit the claims of the present invention. Therefore, all equivalent technical changes made based on the description and drawings of the present invention are included in the claims of the present invention.

Claims

1. A motor drive circuit with a duty cycle dynamic modulation mechanism, characterized in that, The motor drive circuit includes: a magnetic field change detection circuit, disposed on the motor, configured to detect multiple voltages generated by the change in magnetic strength when a rotor of the motor rotates, and output a commutation signal; and a control circuit, connected to the magnetic field change detection circuit, configured to set multiple control duty cycles according to the commutation signal, and output a control duty cycle signal according to each control duty cycle. A drive circuit, connected to the control circuit and the motor, is configured to output a drive signal according to the control duty cycle signal; And an output stage circuit, connected to the drive circuit and the motor, configured to operate according to the drive signal to output multiple output stage signals to the motor.

2. The motor drive circuit with a duty cycle dynamic modulation mechanism according to claim 1, characterized in that, The control circuit is configured to compare a plurality of voltages of the commutation signal with a commutation reference voltage to determine a plurality of modulation duty cycles, and to determine a plurality of control duty cycles based on the plurality of modulation duty cycles and the plurality of duty cycles of a plurality of pulses of a pulse width modulation signal.

3. The motor drive circuit with a duty cycle dynamic modulation mechanism according to claim 2, characterized in that, The control circuit is configured to multiply the plurality of modulation duty cycles by the plurality of duty cycles of the plurality of pulses of the pulse width modulation signal to calculate the plurality of control duty cycles.

4. The motor drive circuit with a duty cycle dynamic modulation mechanism according to claim 1, characterized in that, The control circuit includes: an indication duty cycle generation circuit configured to output a plurality of indication duty cycles; and a modulation duty cycle setting circuit connected to the magnetic field change detection circuit, configured to set a plurality of modulation duty cycles according to the commutation signal respectively. And a control duty cycle output circuit, connected to the indication duty cycle generation circuit and the modulation duty cycle setting circuit, configured to set a plurality of control duty cycles based on a plurality of the indication duty cycles and a plurality of the modulation duty cycles.

5. The motor drive circuit with a duty cycle dynamic modulation mechanism according to claim 4, characterized in that, The duty cycle indicator generation circuit is configured to detect multiple duty cycles of multiple pulses of a pulse width modulation signal output by an external pulse width modulation signal generator, as multiple indicated duty cycles.

6. The motor drive circuit with a duty cycle dynamic modulation mechanism according to claim 4, characterized in that, The control duty cycle output circuit is configured to multiply the plurality of modulation duty cycles by the plurality of indication duty cycles to obtain the plurality of control duty cycles.

7. The motor drive circuit with a duty cycle dynamic modulation mechanism according to claim 4, characterized in that, The modulation duty cycle setting circuit is configured to compare multiple voltages of the commutation signal at multiple time points with a commutation reference voltage to determine multiple levels of the modulation duty cycle signal at the multiple time points, and is configured to set multiple modulation duty cycles based on multiple phase times of multiple waveforms of the modulation duty cycle signal, wherein the multiple phase times include multiple working cycles and multiple non-working cycles of the multiple waveforms.

8. The motor drive circuit with a duty cycle dynamic modulation mechanism according to claim 7, characterized in that, The modulation duty cycle setting circuit is configured to store multiple reference phase times and their corresponding multiple reference modulation duty cycles, and the reference modulation duty cycle corresponding to the reference phase time that is the same as the phase time of the modulation duty cycle signal is used as the modulation duty cycle.

9. The motor drive circuit with a duty cycle dynamic modulation mechanism according to claim 1, characterized in that, The output stage circuit includes: a plurality of operational amplifiers, each operational amplifier having a first input terminal, a second input terminal, and an output terminal; the first input terminal of each operational amplifier is connected to the driving circuit to receive the driving signal; the second input terminal of each operational amplifier is coupled to a reference voltage; and the plurality of output terminals of the plurality of operational amplifiers are respectively connected to the plurality of terminals of the motor.

10. The motor drive circuit with a duty cycle dynamic modulation mechanism according to claim 9, characterized in that, Each of the operational amplifiers further has a third input terminal, which is connected to the magnetic field change detection circuit and configured to receive the commutation signal from the magnetic field change detection circuit.

11. The motor drive circuit with a duty cycle dynamic modulation mechanism according to claim 9, characterized in that, The output stage circuit further includes: a plurality of first feedback resistors, each first feedback resistor having a first terminal and a second terminal, the first terminal of each first feedback resistor being grounded, the plurality of second terminals of the plurality of first feedback resistors being respectively connected to the plurality of second input terminals of the plurality of operational amplifiers, and the voltage of the second terminal of each first feedback resistor being used as the reference voltage. And a plurality of second feedback resistors, wherein a plurality of first terminals of the plurality of second feedback resistors are respectively connected to a plurality of second terminals of the plurality of first feedback resistors, and the second terminals of the second feedback resistors are respectively connected to a plurality of output terminals of the plurality of operational amplifiers.

12. The motor drive circuit with a duty cycle dynamic modulation mechanism according to claim 9, characterized in that, The driving circuit includes a digital-to-analog converter, the input terminal of which is connected to the output terminal of the control circuit, and the output terminal of which is connected to the first input terminal of each of the operational amplifiers.

13. The motor drive circuit with a duty cycle dynamic modulation mechanism according to claim 9, characterized in that, The driving circuit includes: a plurality of digital-to-analog converters, the input terminal of each digital-to-analog converter being connected to the output terminal of the control circuit, and the plurality of input terminals of the plurality of digital-to-analog converters being respectively connected to the plurality of first input terminals of the plurality of operational amplifiers.

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