Multi-input multi-output full-switching radio frequency switch matrix and control method thereof

Abstract

The invention discloses a multi-input multi-output full-switching radio frequency switch matrix and a control method thereof. The switch matrix comprises a controller, Mi primary switch modules and C1 switch groups. The switch group comprises Mi second-level switch modules and C2 third-level switch modules. The first-stage switch module, the second-stage switch module and the third-stage switch module are solid-state radio Wherein the first-stage Mi is divided into C1, the second-stage Mi is divided into C2, and the third-stage Mi is 1. The output of the primary switch module is crossly connected with the input of the switch group; and in the switch group, the output of the second-stage switch module and the input of the third-stage switch module are in cross connection, so that a full-exchange radio frequency switch matrix with Mi inputs and C1 * C2 outputs is formed. And the controller is connected with each solid-state radio frequency switch through the expansion of the plurality of SPI adapter plates. The method has high expansibility, and the control method is simple.

Description

A MIMO fully switched radio frequency switch matrix and its control method Technical Field

[0001] This invention relates to a switching matrix for radio frequency signal switching transmission. Background Technology

[0002] RF switch matrices are commonly used in the field of RF automated testing. Their main function is to switch a large number of RF switches according to the actual RF channel switching requirements, and finally achieve the switching of the specified RF channel. In other words, the RF switch matrix realizes the transmission of RF signals through different channels.

[0003] Currently, in the RF switch matrix industry, most multi-input / output (MIMO) fully switched switch matrices often use mechanical switches for RF signal switching. However, mechanical switches are typically bulky and have a large number of control signal lines. As the overall number of mechanical switches increases, the total number of independent signal lines on each switch also increases dramatically. This results in a large-scale fully switched switch matrix device with complex internal control circuit wiring, sometimes requiring multiple control boards to accommodate the numerous control pins on the switches. Ultimately, this leads to highly complex control methods for multi-input / output switch matrices, meaning managing numerous power-on states of the various mechanical RF switches and resulting in poor system scalability. Summary of the Invention

[0004] The problem that this invention aims to solve is that existing technologies suffer from problems such as excessively large size, complex control, poor scalability, and poor stability of fully switched radio frequency switch matrices.

[0005] To solve the above problems, the present invention adopts the following solution: According to the present invention, a multi-input multi-output fully switched radio frequency switch matrix includes Mi primary switch modules and C1 switch groups; the switch groups include Mi secondary switch modules and C2 tertiary switch modules; the primary switch modules are 1-to-1 C1 solid-state radio frequency switches, the secondary switch modules are 1-to-2 C2 solid-state radio frequency switches, and the tertiary switch modules are Mi-to-1 solid-state radio frequency switches; the inputs of the Mi primary switch modules correspond one-to-one with the Mi inputs of the switch matrix; the C1 outputs of the primary switch modules are respectively connected to the inputs of one secondary switch module of each of the C1 switch groups, and the switch groups... Each of the Mi secondary switch modules has its input connected to one output of each of the Mi primary switch modules, such that the C1*Mi outputs of the Mi primary switch modules are cross-connected to the inputs of the C1*Mi secondary switch modules. Within the switch group, the C2 outputs of each secondary switch module are connected to one input of each of the C2 tertiary switch modules, and the Mi inputs of each tertiary switch module are connected to one output of each of the Mi secondary switch modules, such that the C2*Mi outputs of the Mi secondary switch modules are cross-connected to the inputs of the C2*Mi tertiary switch modules. The outputs of each tertiary switch module in the C1 switch group correspond one-to-one with the C1*C2 outputs of the switch matrix.

[0006] Furthermore, the switch matrix according to the present invention also includes a controller; the controller is connected to each solid-state RF switch; the controller is used to receive instructions and instruction mapping; the receiving instruction: receiving a switch matrix switching instruction issued by a host computer; the switch matrix switching instruction includes at least one channel input / output switching information MetrixSwitch(Inx,Outy); where Inx represents an input of the switch matrix, 1≤Inx≤Mi; Outy represents an output of the switch matrix, 0≤Outy≤C1*C2; MetrixSwitch(Inx,Outy) represents the output Outy of the switch matrix that the input Inx of the switch matrix needs to be connected to, when Outy is 0, it means that the input Inx of the switch matrix is ​​not connected to any output of the switch matrix; the instruction mapping: calculating the solid-state RF switch that needs to be switched according to the channel input / output switching information in the received switch matrix switching instruction, and generating a corresponding switch switching change instruction and issuing it to the corresponding solid-state RF switch.

[0007] Furthermore, according to the switch matrix of the present invention, the connection between the controller and the solid-state RF switch is based on SPI; the controller is connected to a plurality of SPI adapter boards, and each solid-state RF switch is connected through the expansion of the SPI adapter boards.

[0008] Furthermore, according to the switch matrix of the present invention, the input of the i-th primary switch module 201 corresponds to the i-th input of the switch matrix; the j-th output of the i-th primary switch module 201 corresponds to the input of the i-th secondary switch module 202 connected to the j-th switch group; within the switch group, the k-th output of the i-th secondary switch module 202 is connected to the i-th input of the k-th tertiary switch module 203; the output of the k-th tertiary switch module 203 of the j-th switch group corresponds to the (j-1)*C2+k-th output of the switch matrix; where 1≤i≤Mi, 1≤j≤C1, 1≤k≤C2.

[0009] Furthermore, according to the switch matrix of the present invention, the instruction mapping includes the following modules: Module M1, used to: calculate and issue the instruction Switch(SH1(Inx),V1(Inx)); where V1(Inx)=Int((Outy+C2-1) / C2); Int represents taking an integer; SH1(Inx) represents the Inx-th first-level switch module; V1(Inx) represents the output to be connected to the input of the Inx-th first-level switch module; Switch(SH1(Inx),V1(Inx)) represents Switch the output of the xth primary switch module to V1(Inx); Module M2 is used to: calculate and issue the instruction Switch(SH2T(Inx),V2(Inx)) when V1(Inx) is not equal to 0; where SH2T(Inx)=SHG(V1(Inx)).SH2(Inx); V2(Inx)=(Outy-1)%C2+1; SH2T(Inx) represents the secondary switch module connected to the xth channel; V2(Inx) represents the secondary switch module connected to the xth channel. The input of the secondary switch module is the output to be connected; SHG(V1(Inx)) represents the V1(Inx)th switch group; SHG(V1(Inx)).SH2(Inx) represents the Inxth secondary switch module in the V1(Inx)th switch group; Switch(SH2T(Inx),V2(Inx)) means switching the output of the secondary switch module connected to the Inxth channel to V2(Inx); % is the modulo operation; Module M3 is used to: calculate and issue the instruction Switch(SH3T( Inx),Inx); where SH3T(Inx)=SHG(V1(Inx)).SH3(V2(Inx)); SH3T(Inx) represents the three-level switch module connected to the Inx-th channel; SHG(V1(Inx)).SH3(V2(Inx)) represents the V2(Inx)-th three-level switch module in the V1(Inx)-th switch group; Switch(SH3T(Inx),Inx) represents switching the input of the three-level switch module connected to the Inx-th channel to Inx.

[0010] Furthermore, according to the switch matrix of the present invention, the controller stores the switching information of the current switch matrix; the controller is also used for switch matching; the switch matching: by comparing the received switch matrix switching instruction with the stored switch matrix switching information, input / output switching information that does not need to be switched is removed from the received switch matrix switching instruction; the instruction mapping is processed based on the switch matrix switching instruction after removing the input / output switching information that does not need to be switched.

[0011] According to a control method for a multi-input multi-output fully switched radio frequency switch matrix of the present invention, the method is used for the control of the aforementioned switch matrix, including a receiving instruction step and an instruction mapping step; the receiving instruction step: receiving a switch matrix switching instruction issued by a host computer; the switch matrix switching instruction includes at least one channel input / output switching information MetrixSwitch(Inx,Outy); wherein, Inx represents an input of the switch matrix, 1≤Inx≤Mi; Outy represents an output of the switch matrix, 0≤Outy≤C1*C2; MetrixSwitch(Inx,Outy) represents the output Outy of the switch matrix to which the input Inx of the switch matrix needs to be connected, and when Outy is 0, it means that the input Inx of the switch matrix is ​​not connected to any output of the switch matrix; the instruction mapping step: calculating the solid-state radio frequency switch that needs to be switched according to the channel input / output switching information in the received switch matrix switching instruction, and generating a corresponding switch switching change instruction and issuing it to the corresponding solid-state radio frequency switch.

[0012] Furthermore, according to the control method of the present invention, the instruction mapping step includes the following steps: Step S1: Calculate and issue the instruction Switch(SH1(Inx),V1(Inx)); where V1(Inx)=Int((Outy+C2-1) / C2); Int represents taking an integer; SH1(Inx) represents the Inx-th first-level switch module; V1(Inx) represents the output to be connected to the input of the Inx-th first-level switch module; Switch(SH1(Inx),V1(Inx)) represents... The output of the xth primary switch module is switched to V1(Inx); Step S2: When V1(Inx) is not equal to 0, calculate and issue the instruction Switch(SH2T(Inx),V2(Inx)); where SH2T(Inx)=SHG(V1(Inx)).SH2(Inx); V2(Inx)=(Outy-1)%C2+1; SH2T(Inx) represents the secondary switch module connected to the xth channel; V2(Inx) represents the secondary switch module connected to the xth channel. The input of the secondary switch module is the output to be connected; SHG(V1(Inx)) represents the V1(Inx)th switch group; SHG(V1(Inx)).SH2(Inx) represents the Inxth secondary switch module in the V1(Inx)th switch group; Switch(SH2T(Inx),V2(Inx)) means switching the output of the secondary switch module connected to the Inxth channel to V2(Inx); % is the modulo operation; Step S3: Calculate and issue the instruction Switch(SH3T(I nx),Inx); where SH3T(Inx)=SHG(V1(Inx)).SH3(V2(Inx)); SH3T(Inx) represents the three-level switch module connected to the Inx-th channel; SHG(V1(Inx)).SH3(V2(Inx)) represents the V2(Inx)-th three-level switch module in the V1(Inx)-th switch group; Switch(SH3T(Inx),Inx) represents switching the input of the three-level switch module connected to the Inx-th channel to Inx.

[0013] Furthermore, according to the control method of the present invention, the method further includes an instruction verification step; the instruction verification step involves determining whether each input of the switch matrix has the same output as the switch matrix based on the received switch matrix switching instruction.

[0014] Furthermore, according to the control method of the present invention, the method further includes a switching matching step; the switching matching step: by comparing the received switch matrix switching command and the stored switch matrix switching information, input / output switching information that does not need to be switched is removed from the received switch matrix switching command; the command mapping is processed based on the switch matrix switching command after removing the input / output switching information that does not need to be switched.

[0015] The technical advantages of this invention are as follows: Compared with fully switched RF switches based on mechanical switches, the fully switched RF switch based on RF solid-state switches of this invention has a significantly smaller size, is simpler to control, is easier to expand, and has high stability. Attached Figure Description

[0016] Figure 1 is a schematic diagram of the overall structure of the switch matrix according to an embodiment of the present invention.

[0017] Figure 2 is a schematic diagram of the switch array according to an embodiment of the present invention.

[0018] Figure 3 is a schematic diagram of the switch group according to an embodiment of the present invention.

[0019] In the above diagrams, 100 is the controller, 101 is the processor, 102 is the memory, 103 is the uplink communication module, and 104 is the SPI communication module; 200 is the switch array, 201 is the first-level switch module, 220 is the switch group, 202 is the second-level switch module, and 203 is the third-level switch module; 300 is the SPI adapter board; IN is the only input of the 1-to-many solid-state RF switch; OUT is the only output of the 1-to-1 solid-state RF switch; o1, o2, o3, o4, o5, o6, o7, o8 are the numbers of multiple output terminals of the component; i1, i2, i3, and i4 are the numbers of multiple input terminals of the component; SH1_1, SH1_2, SH1_3, and SH1_4 are the numbers of the first-level switch modules; SH2_1, SH2_2, SH2_3, and SH2_4 are the numbers of the second-level switch modules; SH3_1, SH3_2, SH3_3, SH3_4, SH3_5, SH3_6, SH3_7, and SH3_8 are the numbers of the third-level switch modules; and SHG_1, SHG_2, SHG_3, SHG_4, SHG_5, and SHG_6 are the numbers of the switch groups. Detailed Implementation

[0020] The present invention will now be described in further detail with reference to the accompanying drawings.

[0021] Figure 1 illustrates a switch matrix, which is a multi-input multi-output fully switched radio frequency switch matrix used for switching radio frequency signals. The switch matrix includes a controller 100 and a switch array 200 formed by connecting solid-state radio frequency switches. In this embodiment, the controller 100 includes a processor 101 and a memory 102, an uplink communication module 103, and an SPI communication module 104 connected to the processor 101, used to control the solid-state radio frequency switches in the switch array 200.

[0022] In this embodiment, the controller 100 is a von Neumann-style computing device constructed from a processor 101 and a memory 102. The processor 101 implements its corresponding functions by executing a set of computer program instructions stored in the memory 102. That is, in this embodiment, the control of the solid-state radio frequency switches in the switch array 200 is achieved by the processor 101 executing the corresponding computer program instructions.

[0023] In another alternative implementation, the processor 101 and memory 102 in the controller 100 can also be implemented by programming an FPGA. In this case, the controller 100 implements its corresponding functions by circuitry pre-programmed into the corresponding FPGA.

[0024] The controller 100 communicates with the host computer via the uplink communication module 103, for example, by receiving instructions sent by the host computer or sending the status of the switch matrix to the host computer. The uplink communication module 103 can be a wireless communication module, such as Wi-Fi, Bluetooth, or even a 3G / 4G / 5G / GPRS mobile communication module, or it can be a wired communication module, such as Ethernet or serial communication.

[0025] In this embodiment, the communication between the controller 100 and the solid-state RF switches in the switch array 200 is based on SPI. That is, the controller 100 connects to each solid-state RF switch in the switch array 200 through the SPI communication module 104. Considering that there are many solid-state RF switches in the switch array 200, this embodiment adds several additional SPI adapter boards 300. The solid-state RF switches in the switch array 200 are connected through the expansion of the SPI adapter boards 300. That is, the SPI communication module 104 connects to the solid-state RF switches in the switch array 200 through the SPI adapter boards 300.

[0026] Those skilled in the art will understand that the controller 100 may also be connected to the solid-state RF switches in the switch array 200 in other ways.

[0027] In this embodiment, the solid-state RF switches in the switch array 200 are divided into primary, secondary, and tertiary switch modules. Referring to FIG2, the switch array 200 includes several primary switch modules 201 and several switch groups 220 composed of secondary and tertiary switch modules. Referring to FIG3, the switch group 220 includes several secondary switch modules 202 and several tertiary switch modules 203. The primary switch module 201 is a multi-level solid-state RF switch, and its input is the input of the entire switch matrix, or it corresponds one-to-one with and is connected to the input of the switch matrix. Therefore, the number of primary switch modules 201 is the same as the number of inputs of the entire switch matrix. Similarly, the secondary switch module 202 is also a multi-level solid-state RF switch, and its input is the input of the switch group 220. Therefore, the number of inputs of the switch group 220 is the same as the number of secondary switch modules 202 in the switch group 220. Each output of the primary switch module 201 is connected to the input of a different switch group 220, and each input of the switch group 220 is connected to the output of a different primary switch module 201. The number of switch groups 220 is the same as the number of branches of the primary switch module 201, so that the outputs of the primary switch module 201 and the inputs of the switch group 220 form a one-to-one cross-connection. The tertiary switch module 203 is a multi-select solid-state RF switch. The output of the tertiary switch module 203 is the output of the switch group 220, which is also the output of the entire switch matrix, or it corresponds one-to-one with and is connected to the output of the switch matrix. Therefore, the number of tertiary switch modules 203 in the switch group 220 is the number of outputs of the switch group 220, and the total number of tertiary switch modules 203 in all switch groups 220 is the same as the number of outputs of the entire switch matrix. Within the switch group 220, each output of the secondary switch module 202 is connected to the input of a different tertiary switch module 203, and each input of the tertiary switch module 203 is connected to the output of a different secondary switch module 202, so that the output of the secondary switch module 202 and the input of the tertiary switch module 203 form a one-to-one cross connection.

[0028] More specifically, if the total number of switches in the entire switch matrix is ​​defined as Mi, the first-level switch module 201 is a solid-state RF switch with 1 C1 component, and the second-level switch module 202 is a solid-state RF switch with 1 C2 component, then: the number of first-level switch modules 201 in the switch array 200 is Mi; the number of switch groups 220 is C1; within the switch group 220, the number of second-level switch modules 202 is Mi, and the number of third-level switch modules 203 is C2; the third-level switch module 203 is a solid-state RF switch with Mi selection.

[0029] Therefore, the number of inputs to switch group 220, i.e., the inputs to the secondary switch modules 202 within switch group 220, is Mi. The number of outputs to switch group 220, i.e., the outputs to the tertiary switch modules 203 within switch group 220, is C2. The entire switch array 200 includes Mi primary switch modules 201, Mi*C1 secondary switch modules 202, and C1*C2 tertiary switch modules 203, with Mi inputs and C1*C2 outputs. In other words, the switch matrix includes Mi inputs and C1*C2 outputs.

[0030] The cross-connection between the output of the primary switch module 201 and the input of the switch group 220 can also be described as follows: the C1 outputs of the primary switch module 201 are respectively connected to the input of one secondary switch module 202 of the C1 switch group 220, and the inputs of the Mi secondary switch modules 202 of the switch group 220 are respectively connected to one output of the Mi primary switch modules 201, so that the C1*Mi outputs of the Mi primary switch modules 201 are cross-connected with the inputs of the C1*Mi secondary switch modules 202.

[0031] Within the switch group 220, the cross-connection between the output of the secondary switch module 202 and the input of the tertiary switch module 203 can also be described as follows: Within the switch group 220, the C2 outputs of the secondary switch module 202 are respectively connected to one input of the C2 tertiary switch modules 203, and the Mi inputs of the tertiary switch modules 203 are respectively connected to one output of the Mi secondary switch modules 202, so that the C2*Mi outputs of the Mi secondary switch modules 202 are cross-connected with the C2*Mi inputs of the tertiary switch modules 203.

[0032] Referring to Figures 2 and 3, specifically in this embodiment, Mi is 4, C1 is 6, and C2 is 8. Therefore: the first-level switch module 201 is a 1-to-6 solid-state RF switch; the second-level switch module 202 is a 1-to-8 solid-state RF switch; the third-level switch module 203 is a 4-to-1 solid-state RF switch; there are four first-level switch modules 201, labeled SH1_1, SH1_2, SH1_3, and SH1_4 respectively; the input of the first-level switch module 201 is labeled I in Figure 2. N, the 6 outputs are labeled o1, o2, o3, o4, o5, o6 in Figure 2; there are 6 switch groups 220, labeled SHG_1, SHG_2, SHG_3, SHG_4, SHG_5, SHG_6; the switch group 220 has 4 inputs, and the 4 inputs of the switch group 220 correspond to the inputs of the 4 secondary switch modules 202 within the switch group 220; the 4 inputs of the switch group 220 are labeled i1, i2, i3, i4, i5, i6, i7, i8, i9, i1 ... The four secondary switch modules 202 within switch group 220 are labeled SH2_1, SH2_2, SH2_3, and SH2_4 respectively in Figure 3; the four secondary switch modules 202 within switch group 220 are labeled IN in Figure 3; the four inputs of switch group 220 correspond to the inputs of the four secondary switch modules 202 within switch group 220, that is, the four inputs i1, i2, i3, and i4 of switch group 220 are respectively associated with the secondary switch module SH2_1, i3, and i4. The four ports marked IN (SH2_2, SH2_3, SH2_4) correspond to each other. The number of outputs of switch group 220 is 8. The 8 outputs of switch group 220, that is, the 8 ports marked OUT in Figure 3, correspond to the outputs of 8 three-level switch modules 203 in switch group 220. The 8 three-level switch modules 203 are marked as SH3_1, SH3_2, SH3_3, SH3_4, SH3_5, SH3_6, SH3_7 and SH3_8 respectively.

[0033] The entire switch matrix has 4 inputs and 48 outputs, including 4 primary switch modules 201, 24 secondary switch modules, and 48 tertiary switch modules, for a total of 76 solid-state RF switches.

[0034] Referring to Figure 2, the cross-connection between the outputs of the first-level switch module 201 and the switch groups 220 is as follows: the six outputs of the first-level switch module 201 are respectively connected to the inputs of the first-level switch modules 202 of the six switch groups 220, that is, the six outputs of the first-level switch module 201 marked SH1_1 are respectively connected to the input i1 marked SH2_1 in the six switch groups 220; the six outputs of the second-level switch module 201 are respectively connected to the inputs of the second-level switch modules 202 of the six switch groups 220, that is, the six outputs of the first-level switch module 201 marked SH1_2 are respectively connected to the input i2 marked SH2_2 in the six switch groups 220; ... the six outputs of the fourth-level switch module 201 are respectively connected to the inputs of the fourth-level switch module 202 of the six switch groups 220, that is, the input i2 marked SH1_2_1... The six outputs of the first-level switch module 201 of the fourth stage are respectively connected to the input i4 marked SH2_4 in the six switch groups 220; correspondingly, the four inputs of the first switch group 220 are respectively connected to the first output of the four first-level switch modules 201, that is, the four inputs of the switch group marked SHG_1 are respectively connected to the first output o1 of the four first-level switch modules 201; the four inputs of the second switch group 220 are respectively connected to the second output of the four first-level switch modules 201, that is, the four inputs of the switch group marked SHG_2 are respectively connected to the second output o2 of the four first-level switch modules 201; ... the four inputs of the sixth switch group 220 are respectively connected to the sixth output of the four first-level switch modules 201, that is, the four inputs of the switch group marked SHG_6 are respectively connected to the sixth output o6 of the four first-level switch modules 201.

[0035] Referring to Figure 3, within the switch group 220, the cross-connection between the outputs of the secondary switch module 202 and the inputs of the tertiary switch module 203 is as follows: the eight outputs of the first secondary switch module 202 are respectively connected to the first inputs of the eight tertiary switch modules 203, that is, the eight outputs of the secondary switch module 202 marked SH2_1 are respectively connected to the first input i1 of the eight tertiary switch modules 203; the eight outputs of the second secondary switch module 202 are respectively connected to the second inputs of the eight tertiary switch modules 203, that is, the eight outputs of the secondary switch module 202 marked SH2_2 are respectively connected to the second input i2 of the eight tertiary switch modules 203; ... the eight outputs of the fourth secondary switch module 202 are respectively connected to the fourth inputs of the eight tertiary switch modules 203, that is, the eight outputs of the secondary switch module 202 marked SH2_4 are respectively connected to the fourth inputs of the eight tertiary switch modules 203. The fourth input i4 of each of the eight three-level switch modules 203 is connected; correspondingly, the four inputs of the first three-level switch module 203 are connected to the first outputs of the four two-level switch modules 202, that is, the four outputs of the three-level switch module 203 marked SH3_1 are connected to the first output o1 of the four two-level switch modules 202; the four inputs of the second three-level switch module 203 are connected to the second outputs of the four two-level switch modules 202, that is, the four outputs of the three-level switch module 203 marked SH3_2 are connected to the second output o2 of the four two-level switch modules 202; ... the four inputs of the eighth three-level switch module 203 are connected to the eighth outputs of the four two-level switch modules 202, that is, the four outputs of the three-level switch module 203 marked SH3_8 are connected to the eighth output o8 of the four two-level switch modules 202.

[0036] It should be noted that for solid-state RF switches, there is no difference between the aforementioned "one-to-many" splitter in primary and secondary switch modules and the "one-to-many" selection in tertiary switch modules. The "one-to-many" splitter in primary and secondary switch modules refers to the solid-state RF switch using a fixed connection terminal as input and the selected terminal as output; while the tertiary switch module is the opposite, using the selected terminal as input and the fixed connection terminal as output. In other words, for solid-state RF switches, the only difference between the "one-to-many" splitter in primary and secondary switch modules and the "one-to-many" selection in tertiary switch modules is the input / output connection method.

[0037] Furthermore, the C1 in the aforementioned primary switch module 201, the C2 in the secondary switch module 202, and the C1, C2, and Mi in the Mi selection of the tertiary switch module 203 are merely the number of the selected terminals of the solid-state RF switches used in the connection of this invention. In some alternative embodiments, considering the cost of bulk procurement of solid-state RF switches, the primary switch module 201, secondary switch module 202, and tertiary switch module 203 may not use C1, C2, or Mi, and there may be redundancy.

[0038] For example, in one implementation, Mi is 3, C1 is 5, and C2 is 7. However, solid-state RF switch suppliers can only provide 1-to-4 and 1-to-8 solid-state RF switches. If 1-to-3, 1-to-5, or 1-to-7 switches are required, customization is necessary. Customization is costly and expensive. Therefore, the first-level switch module 201 and the second-level switch module 202 use 1-to-8 solid-state RF switches. In this case, the first-level switch module 201 uses only 5 outputs, leaving 3 redundant switch selection terminals. Similarly, the second-level switch module 202 uses only 1 output, leaving 1 redundant switch selection terminal. Likewise, the third-level switch module 203 uses a 1-to-4 solid-state RF switch. Since the third-level switch module 203 is a 3-to-1 switch, it uses 3 switch selection terminals, leaving 1 redundant switch selection terminal.

[0039] According to the connection method described above in this embodiment, corresponding to the parameters Mi, C1, and C2, specifically: the input of the i-th primary switch module 201 corresponds to the i-th input of the switch matrix; the j-th output of the i-th primary switch module 201 corresponds to the input of the i-th secondary switch module 202 connected to the j-th switch group; 1≤j≤C1; within the switch group, the k-th output of the i-th secondary switch module 202 is connected to the i-th input of the k-th tertiary switch module 203; 1≤k≤C2; the output of the k-th tertiary switch module 203 of the j-th switch group corresponds to the (j-1)*C2+k-th output of the switch matrix; where 1≤i≤Mi, 1≤j≤C1, and 1≤k≤C2.

[0040] Furthermore, in this embodiment, each SPI adapter board 300 is configured with 4 SPI signals. To reduce the number of slave select lines on the SPI signal connection lines between the SPI adapter board and the solid-state RF switches, each SPI signal is connected to each solid-state RF switch in a daisy-chain manner. That is, each SPI signal shares a slave control select line with each solid-state RF switch and is connected in series with each solid-state RF switch. Thus, each SPI signal can connect up to 8 solid-state RF switches, and each SPI adapter board 300 can connect up to 32 solid-state RF switches. In this embodiment, with Mi = 4, C1 = 6, and C2 = 8, there are a total of 76 solid-state RF switches, therefore, 3 SPI adapter boards 300 are required. In Figure 1, the 3 SPI adapter boards 300 are labeled as SPI adapter board one, SPI adapter board two, and SPI adapter board three, respectively. When Mi, C1, and C2 are other values, those skilled in the art can configure the corresponding number of SPI adapter boards 300 according to the total number of solid-state RF switches. For example, in another implementation where Mi is 4, C1 is 8, and C2 is 8, there are a total of 100 solid-state RF switches, which would require 4 SPI adapter boards.

[0041] In this embodiment, the controller 100 controls the solid-state RF switches in the switch array 200, including receiving commands and command mapping, which is the control method mentioned above in this invention.

[0042] The receiving instruction step, specifically, involves receiving the switch matrix switching instruction from the host computer. The instruction mapping step, specifically, involves calculating the solid-state RF switch that needs to be switched based on the channel input / output switching information in the received switch matrix switching instruction, generating the corresponding switch switching change instruction, and sending it to the corresponding solid-state RF switch.

[0043] The switch matrix switching command includes one or more channel input / output switching information. Here, a channel refers to the path formed by connecting the switch matrix input to the switch matrix output via solid-state RF switches in the switch array 200. The i-th channel corresponds to the i-th input of the switch matrix. The channel input / output switching information records the switch matrix input and the corresponding switch matrix output, and can be represented as MetrixSwitch(Inx,Outy); where Inx represents an input of the switch matrix, usually indicated by the switch matrix input index, thus 1 ≤ Inx ≤ Mi; Outy represents an output of the switch matrix, usually indicated by the switch matrix output index, thus 0 ≤ Outy ≤ C1*C2; MetrixSwitch(Inx,Outy) indicates that the switch matrix input Inx needs to be connected to the switch matrix output Outy. When Outy is 0, it means that the switch matrix input Inx is not connected to any switch matrix output.

[0044] In one optional implementation, the switch matrix switching instruction includes an array of Mi elements, which can be represented as SwitchTarget[Mi]. Each element of the SwitchTarget array corresponds to the output that needs to be connected to an input of the switch matrix, that is, the value of SwitchTarget[i]|i∈[1..Mi] corresponds to Outy in the aforementioned channel input / output switching information. Those skilled in the art will understand that the information recorded in this array is essentially the channel input / output switching information corresponding to each input of the switch matrix, which is essentially the same as the channel input / output switching information included in the aforementioned switch matrix switching instruction.

[0045] In this embodiment, a set-based approach is preferred to represent the channel input / output switching information in the switch matrix switching command. That is, the switch matrix switching command includes a set of channel input / output switching information. The channel input / output switching information in this set can correspond to all or part of the inputs of the switch matrix. For example, in this embodiment, when Mi is 4, the set of channel input / output switching information included in the switch matrix switching command is {MetrixSwitch(1,7), MetrixSwitch(3,34)}. This set lacks the channel input / output switching information corresponding to the 2nd and 4th inputs of the switch matrix, indicating that the channel input / output switching information corresponding to the 2nd and 4th inputs of the switch matrix remains unchanged.

[0046] The instruction mapping process is divided into three steps: mapping to the first-level switch module, mapping to the second-level switch module, and mapping to the third-level switch module.

[0047] The step of mapping to the first-level switch module is the aforementioned step S1: calculate and issue the instruction Switch(SH1(Inx),V1(Inx)); where V1(Inx)=Int((Outy+C2-1) / C2); Int represents taking an integer; SH1(Inx) represents the Inx-th first-level switch module; V1(Inx) represents the output that the Inx-th first-level switch module needs to connect to; Switch(SH1(Inx),V1(Inx)) means switching the output of the Inx-th first-level switch module to V1(Inx).

[0048] The step of mapping to the secondary switch module is the aforementioned step S2: When V1(Inx) is not equal to 0, calculate and issue the instruction Switch(SH2T(Inx),V2(Inx)); where SH2T(Inx)=SHG(V1(Inx)).SH2(Inx); V2(Inx)=(Outy-1)%C2+1; SH2T(Inx) represents the secondary switch module connected to the Inx-th channel; V2(Inx) represents the secondary switch module connected to the Inx-th channel. The input of the secondary switch module is the output to be connected; SHG(V1(Inx)) represents the V1(Inx)th switch group; SH2(Inx) represents the Inxth secondary switch module; SHG(V1(Inx)).SH2(Inx) represents the Inxth secondary switch module in the V1(Inx)th switch group; Switch(SH2T(Inx),V2(Inx)) means switching the output of the secondary switch module connected to the Inxth channel to V2(Inx); % is the modulo operation.

[0049] The step of mapping to the three-level switch module is the aforementioned step S3: calculate and issue the instruction Switch(SH3T(Inx),Inx); where SH3T(Inx)=SHG(V1(Inx)).SH3(V2(Inx)); SH3T(Inx) represents the three-level switch module connected to the Inx-th channel; SHG(V1(Inx)) represents the V1(Inx)-th switch group; SH3(V2(Inx)) represents the V2(Inx)-th three-level switch module; SHG(V1(Inx)).SH3(V2(Inx)) represents the V2(Inx)-th three-level switch module in the V1(Inx)-th switch group; Switch(SH3T(Inx),Inx) means switching the input of the three-level switch module connected to the Inx-th channel to Inx.

[0050] In the above steps, the command sent refers to the corresponding solid-state RF switch to send a switching command. For example, sending the command Switch(SH1(Inx),V1(Inx)) means sending a command to the first-level switch module SH1(Inx) to switch the output to V1(Inx); sending the command Switch(SH2T(Inx),V2(Inx)) means sending a command to the second-level switch module SH2T(Inx) to switch the output to V2(Inx); and sending the command Switch(SH3T(Inx),Inx) means sending a command to the third-level switch module SH3T(Inx) to switch the input to Inx.

[0051] According to the aforementioned corresponding connection method, the Outy-th output of the switch matrix corresponds to the output of the (Outy-1)%C2+1-th third-level switch module 203 of the Int((Outy-C2+1) / C2)-th switch group; the Inx-th input of the switch matrix corresponds to the input of the Inx-th second-level switch module 202 in the switch group, and also corresponds to the Inx-th input of the third-level switch module 203.

[0052] In other words, V1(Inx) = Int((Outy + C2 - 1) / C2) in the aforementioned calculation formula corresponds to the V1(Inx)th switch group. Specifically, when Outy is 0, V1(Inx) is 0 accordingly, indicating that the Inxth input of the switch matrix is ​​cut off by the switch matrix, and no specified path connecting to the output is formed within the switch matrix. Accordingly, there is no need to process the switching of the secondary switch module 202 and the tertiary switch module 203. Therefore, steps S3 and S2 above are operations and processes performed when V1(Inx) is not 0.

[0053] Based on the aforementioned connection method, within the switch matrix, as long as the final outputs do not conflict, there will be no connection conflict issues. In other words, as long as the outputs corresponding to each input are different, there will be no other connection conflicts. Therefore, when the controller 100 receives the switch matrix switching command from the host computer, it only needs to verify whether the outputs connected to each input are the same to determine if a connection conflict exists. Furthermore, due to this characteristic of the switch matrix, for channel switching of a specified output corresponding to a specified input, only the primary switch module 201, secondary switch module 202, and tertiary switch module 203 traversed by the channel path need to be switched specifically. This will not interfere with the primary, secondary, or tertiary switch modules on the channels corresponding to other inputs, and their conflicts need not be considered.

[0054] In another optional embodiment, the controller 100 stores the switching information of the current switch matrix in its memory 102. The control implemented by the controller 100 over the solid-state RF switches in the switch array 200 also includes switch matching, and the corresponding control method further includes a switch matching step. Specifically, the switch matching step involves comparing the received switch matrix switching command with the stored switch matrix switching information, and removing input / output switching information that does not require switching from the received switch matrix switching command. Thus, the command mapping is processed based on the switch matrix switching command after removing the input / output switching information that does not require switching.

[0055] For example, controller 100 stores the current switching information of the switch matrix as {MetrixSwitch(1,3), MetrixSwitch(2,8), MetrixSwitch(3,34), MetrixSwitch(4,45)}. The channel input / output switching information included in the switch matrix switching command is {MetrixSwitch(1,7), MetrixSwitch(3,34)}; where the channel input / output switching information corresponding to the third input of the switch matrix is ​​the same as the current switching information stored by controller 100. At this point, the actual channel input / output switching information that needs to be switched is {MetrixSwitch(1,7)}. After the switch, the switching information of the switch matrix is: {MetrixSwitch(1,7), MetrixSwitch(2,8), MetrixSwitch(3,34), MetrixSwitch(4,45)}.

[0056] Furthermore, as mentioned earlier, there may be conflicts between the outputs connected to the inputs of the switch matrix. Those skilled in the art will understand that after receiving the switch matrix switching command from the host computer, command verification is typically required. That is, the control implemented by the controller 100 over the solid-state RF switches in the switch array 200 also includes command verification, and the corresponding control method includes a command verification step. Specifically, command verification, or the command verification step, involves determining whether any of the inputs of the switch matrix have the same output as the received switch matrix switching command.

[0057] For example, if the channel input / output switching information contained in the switch matrix switching instruction is {MetrixSwitch(1,7),MetrixSwitch(2,7),MetrixSwitch(3,34),MetrixSwitch(4,45)}, and the outputs corresponding to the first and second inputs of the switch matrix are the same, then after the instruction verification step, a channel input / output switching conflict error message is returned to the host computer.

[0058] As mentioned above, when the controller 100 saves the switching information of the current switch matrix, the instruction verification also needs to be compared with the saved switching information.

[0059] For example, controller 100 stores the current switching information of the switch matrix as {MetrixSwitch(1,3), MetrixSwitch(2,8), MetrixSwitch(3,34), MetrixSwitch(4,45)}. The channel input / output switching information included in the switch matrix switching command is {MetrixSwitch(1,8), MetrixSwitch(3,34)}. The actual channel input / output switching information that needs to be switched is {MetrixSwitch(1,8)}. After the switch, the switching information of the switch matrix is: {MetrixSwitch(1,8), MetrixSwitch(2,8), MetrixSwitch(3,34), MetrixSwitch(4,45)}. After the switch, there is a conflict where the outputs corresponding to the first and second inputs are the same. Therefore, after the instruction verification step, a channel input / output switching conflict error message is returned to the host computer.

[0060] In addition, in some more optimized implementations, the controller 100 can further store the switching information of each solid-state RF switch. Before sending a switching command to the solid-state RF switch, the controller 100 can further match and compare the command sent to the solid-state RF switch with the current switching information of the solid-state RF switch. If the two are the same, there is no need to send the switching command to the solid-state RF switch again.

[0061] Furthermore, in this embodiment, the modules included in the aforementioned instruction mapping are virtual devices implemented by executing computer program instructions, corresponding one-to-one with the steps in the control method described above. In another implementation where the controller 100 is implemented using an FPGA, the modules included in these instruction mappings are the corresponding circuit modules in the FPGA.

Claims

1. A multi-input multi-output fully switched radio frequency switch matrix, characterized in that, The system includes Mi primary switch modules and C1 switch groups; each switch group includes Mi secondary switch modules and C2 tertiary switch modules; each primary switch module is a 1-to-1 C1 solid-state RF switch, each secondary switch module is a 1-to-1 C2 solid-state RF switch, and each tertiary switch module is a Mi-to-1 solid-state RF switch; the inputs of the Mi primary switch modules correspond one-to-one with the Mi inputs of the switch matrix; the C1 outputs of each primary switch module are connected to the inputs of one secondary switch module in each of the C1 switch groups, and the inputs of the Mi secondary switch modules in each switch group are connected to the inputs of the Mi primary switch modules. One output of each switch module is connected, such that the C1*Mi outputs of the Mi primary switch modules are cross-connected with the inputs of the C1*Mi secondary switch modules; within the switch group, the C2 outputs of the secondary switch modules are respectively connected to one input of the C2 tertiary switch modules, and the Mi inputs of the tertiary switch modules are respectively connected to one output of the Mi secondary switch modules, such that the C2*Mi outputs of the Mi secondary switch modules are cross-connected with the inputs of the C2*Mi tertiary switch modules; the outputs of each tertiary switch module in the C1 switch group correspond one-to-one with the C1*C2 outputs of the switch matrix.

2. The switching matrix according to claim 1, characterized in that, It also includes a controller; the controller is connected to each solid-state RF switch; the controller is used to receive instructions and instruction mapping; the received instructions: receive switch matrix switching instructions issued by the host computer; the switch matrix switching instructions include at least one channel input / output switching information MetrixSwitch(Inx,Outy); where Inx represents an input of the switch matrix, 1≤Inx≤Mi; Outy represents an output of the switch matrix, 0≤Outy≤C1*C2; MetrixSwitch(Inx,Outy) represents the output Outy of the switch matrix that the input Inx of the switch matrix needs to be connected to, when Outy is 0, it means that the input Inx of the switch matrix is ​​not connected to any output of the switch matrix; the instruction mapping: calculate the solid-state RF switch that needs to be switched according to the channel input / output switching information in the received switch matrix switching instructions, and generate the corresponding switch switching change instructions and send them to the corresponding solid-state RF switches.

3. The switching matrix according to claim 2, characterized in that, The connection between the controller and the solid-state RF switches is based on SPI; the controller is connected to several SPI adapter boards, and each solid-state RF switch is connected through the expansion of the SPI adapter boards.

4. The switching matrix according to claim 1, 2, or 3, characterized in that, The input of the i-th primary switch module 201 corresponds to the i-th input of the switch matrix; the j-th output of the i-th primary switch module 201 corresponds to the input of the i-th secondary switch module 202 connected to the j-th switch group; within the switch group, the k-th output of the i-th secondary switch module 202 is connected to the i-th input of the k-th tertiary switch module 203; the output of the k-th tertiary switch module 203 of the j-th switch group corresponds to the (j-1)*C2+k-th output of the switch matrix; where 1≤i≤Mi, 1≤j≤C1, 1≤k≤C2.

5. The switching matrix according to claim 2, characterized in that, The instruction mapping includes the following modules: Module M1, used to: calculate and issue the instruction Switch(SH1(Inx),V1(Inx)); where V1(Inx)=Int((Outy+C2-1) / C2); Int represents taking an integer; SH1(Inx) represents the Inx-th first-level switch module; V1(Inx) represents the output to be connected to the input of the Inx-th first-level switch module; Switch(SH1(Inx),V1(Inx)) represents the Inx-th first-level switch module The block output switches to V1(Inx); module M2 is used to: calculate and issue the instruction Switch(SH2T(Inx),V2(Inx)) when V1(Inx) is not equal to 0; where SH2T(Inx)=SHG(V1(Inx)).SH2(Inx); V2(Inx)=(Outy-1)%C2+1; SH2T(Inx) represents the secondary switch module connected to the Inx-th channel; V2(Inx) represents the secondary switch module connected to the Inx-th channel. The block input is the output to be connected; SHG(V1(Inx)) represents the V1(Inx)th switch group; SHG(V1(Inx)).SH2(Inx) represents the Inxth secondary switch module in the V1(Inx)th switch group; Switch(SH2T(Inx),V2(Inx)) means switching the output of the secondary switch module connected to the Inxth channel to V2(Inx); % is the modulo operation; Module M3 is used to: calculate and issue the instruction Switch(SH3T(Inx)). ),Inx); where SH3T(Inx)=SHG(V1(Inx)).SH3(V2(Inx)); SH3T(Inx) represents the three-level switch module connected to the Inx-th channel; SHG(V1(Inx)).SH3(V2(Inx)) represents the V2(Inx)-th three-level switch module in the V1(Inx)-th switch group; Switch(SH3T(Inx),Inx) represents switching the input of the three-level switch module connected to the Inx-th channel to Inx.

6. The switching matrix according to claim 2, 3, or 5, characterized in that, The controller stores the switching information of the current switch matrix; the controller is also used for switch matching; the switch matching is: by comparing the received switch matrix switching command with the stored switch matrix switching information, the input / output switching information that does not need to be switched is removed from the received switch matrix switching command; The instruction mapping is processed based on the switch matrix switching instructions after removing input / output switching information that does not require switching.

7. A control method for a multi-input multi-output fully switched radio frequency switch matrix, characterized in that, This method is used for controlling the switch matrix as described in claim 1, including a receiving instruction step and an instruction mapping step. The receiving instruction step involves receiving a switch matrix switching instruction from a host computer. The switch matrix switching instruction includes at least one channel input / output switching information, `MetrixSwitch(Inx,Outy)`. Here, `Inx` represents an input of the switch matrix, 1 ≤ Inx ≤ Mi; `Outy` represents an output of the switch matrix, 0 ≤ Outy ≤ C1*C2; `MetrixSwitch(Inx,Outy)` represents the output `Outy` of the switch matrix to which the input `Inx` of the switch matrix needs to be connected. When `Outy` is 0, it indicates that the input `Inx` of the switch matrix is ​​not connected to any output of the switch matrix. The instruction mapping step involves calculating the solid-state RF switch that needs to be switched based on the channel input / output switching information in the received switch matrix switching instruction, and generating a corresponding switch switching change instruction to send to the corresponding solid-state RF switch.

8. The control method according to claim 7, characterized in that, The instruction mapping step includes the following steps: Step S1: Calculate and issue the instruction Switch(SH1(Inx),V1(Inx)); where V1(Inx) = Int((Outy + C2 - 1) / C2); Int represents the integer part; SH1(Inx) represents the Inx-th first-level switch module; V1(Inx) represents the output that the Inx-th first-level switch module needs to connect to; Switch(SH1(Inx),V1(Inx)) means switching the output of the Inx-th first-level switch module to V1(Inx) / C2. nx); Step S2: When V1(Inx) is not equal to 0, calculate and issue the instruction Switch(SH2T(Inx),V2(Inx)); where SH2T(Inx)=SHG(V1(Inx)).SH2(Inx); V2(Inx)=(Outy-1)%C2+1; SH2T(Inx) represents the secondary switch module connected to the Inx-th channel; V2(Inx) represents the input required to connect the secondary switch module connected to the Inx-th channel. Output; SHG(V1(Inx)) represents the V1(Inx)th switch group; SHG(V1(Inx)).SH2(Inx) represents the Inxth secondary switch module in the V1(Inx)th switch group; Switch(SH2T(Inx),V2(Inx)) means switching the output of the secondary switch module connected to the Inxth channel to V2(Inx); % is the modulo operation; Step S3: Calculate and issue the instruction Switch(SH3T(Inx),Inx) Where, SH3T(Inx)=SHG(V1(Inx)).SH3(V2(Inx)); SH3T(Inx) represents the three-level switch module connected to the Inxth channel; SHG(V1(Inx)).SH3(V2(Inx)) represents the V2(Inx)th three-level switch module in the V1(Inx)th switch group; Switch(SH3T(Inx),Inx) means switching the input of the three-level switch module connected to the Inxth channel to Inx.

9. The control method according to claim 7 or 8, characterized in that, The method further includes an instruction verification step; the instruction verification step involves determining whether each input of the switch matrix has the same output as the switch matrix based on the received switch matrix switching instruction.

10. The control method according to claim 7 or 8, characterized in that, The method further includes a switching matching step; the switching matching step: by comparing the received switch matrix switching command with the stored switch matrix switching information, input / output switching information that does not need to be switched is removed from the received switch matrix switching command; The instruction mapping is processed based on the switch matrix switching instructions after removing input / output switching information that does not require switching.

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