Low-resistance metal semiconductor contact structure for germanium-based device, preparation method of low-resistance metal semiconductor contact structure and germanium-based device

Abstract

The invention discloses a low-resistance metal semiconductor contact structure for a germanium-based device, a preparation method of the low-resistance metal semiconductor contact structure and the germanium-based device. The low-resistance metal semiconductor contact structure comprises a germanium-doped layer, a graphene layer and a metal electrode which are sequentially stacked, the germanium doping concentration in the germanium doping layer is 1 * 10 < 19 > cm <-3 > to 5 * 10 < 19 > cm <-3 >; the graphene layer at least comprises a layer of graphene crystals; the upper surface of the germanium-doped layer is a stable hydrogen terminal surface, and the graphene layer is in contact with the hydrogen terminal surface through Van der Waals' force; the low-resistance metal semiconductor contact structure comprises an electrode region and a non-electrode region, and the metal electrode is arranged in the electrode region. Graphene is introduced as an atomic-scale flat Van der Waals contact interface layer, so that low-resistance contact between metal and a semiconductor of a germanium-based device is realized, and the overall performance of the device is further optimized.

Description

Low-resistivity metal-semiconductor contact structures for germanium-based devices and their fabrication methods; devices Technical Field

[0001] This invention belongs to the field of semiconductor device technology, specifically relating to a low-resistivity metal-semiconductor contact structure for germanium-based devices, its preparation method, and the device thereof. Background Technology

[0002] Germanium (Ge) has high hole and electron mobilities of up to 1900 cm⁻¹. 2 / V·s and 3800 cm 2 Ge, with a voltage level of / V·s, far exceeding that of silicon, is an ideal channel material for constructing high-performance logic devices in the post-Moore era. However, the severe Fermi level pinning (FLP) effect at the metal-Ge interface has become a fundamental technical obstacle faced by all types of Ge-based devices, severely restricting their full performance.

[0003] The physical basis of this effect lies in the fact that when a metal comes into direct contact with Ge, the electron wavefunction of the metal tunnels into the band gap of Ge, forming a high density of metal-induced interstitial states (MIGS). Simultaneously, dangling bonds on the Ge surface and interface defect states formed during the process together constitute efficient Fermi level "pinning centers." Due to the high density of interface states, after the metal comes into contact with Ge, the unified Fermi level (E_F) of the system is strongly pinned to approximately 0.1-0.3 eV above the top of the Ge valence band (Ev). Therefore, the final height of the Schottky barrier is almost independent of the work function of the selected metal.

[0004] This common bottleneck imposes the same but different constraints on the performance of various Ge-based devices: (1) In Ge-based MOSFETs: the FLP effect causes an electronic Schottky barrier of up to about 0.6 eV to form between n-type Ge and any metal. The huge barrier results in extremely high source / drain contact resistance (R_C), which severely limits the drive current (I_ON) of n-MOSFETs, making their performance far inferior to p-MOSFETs, and making it extremely difficult to build high-performance, balanced Ge-based CMOS integrated circuits. (2) In Ge-based TFETs: the FLP effect also restricts the selection and optimization of device architecture. In order to avoid the n-type contact problem, research work is usually forced to prioritize p-type TFETs. + - The source-side n-TFET architecture. However, this is not the physically optimal solution. The FLP effect still indirectly affects the band alignment and built-in electric field distribution of the tunnel junction by constraining the doping design of the contact region and band engineering, thereby limiting the ultimate potential of the on-state current (I_ON).

[0005] Existing technologies, such as ultrathin dielectric tunneling layers (e.g., SiO2, Al2O3) or surface passivation processes (e.g., sulfide treatment), have failed to fundamentally solve the FLP problem caused by MIGS, and often introduce new reliability, uniformity, or integration compatibility challenges. Therefore, developing a universal low-resistance contact technology that can suppress FLP at its physical source and is applicable to various Ge-based devices has become an urgent need in this field.

[0006] It should be noted that the information disclosed in the background section above is only used to enhance the understanding of the background of the present invention, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention

[0007] To address the aforementioned problems in the prior art, this invention provides a low-resistivity metal-semiconductor contact structure for germanium-based devices, its fabrication method, and the device thereof. The technical problem to be solved by this invention is achieved through the following technical solution: Firstly, this invention provides a low-resistivity metal-semiconductor contact structure for germanium-based devices, comprising a germanium-doped layer, a graphene layer, and a metal electrode sequentially stacked; the germanium doping concentration in the germanium-doped layer is 1×10⁻⁶. 19 cm -3 Up to 5×10 19 cm -3 The graphene layer comprises at least one layer of graphene crystal; the upper surface of the germanium-doped layer is a stable hydrogen-terminated surface, and the graphene layer is in contact with the hydrogen-terminated surface through van der Waals forces; the low-resistivity metal-semiconductor contact structure includes an electrode region and a non-electrode region, and the metal electrode is disposed in the electrode region.

[0008] In one embodiment of the present invention, the graphene layer is a single-layer graphene crystal, a double-layer graphene crystal, or a triple-layer graphene crystal; the material of the metal electrode is at least one of titanium, silver, and TiN.

[0009] Secondly, the present invention provides a method for preparing the above-mentioned low-resistivity metal semiconductor contact structure for germanium-based devices, comprising the following steps: S1, obtaining a germanium substrate and subjecting it to hydrofluoric acid treatment; the hydrofluoric acid treatment is performed by immersing the substrate in a hydrofluoric acid solution with a volume concentration of 0.5% to 2% for 30 to 90 seconds under a nitrogen atmosphere, followed by rinsing with deionized water and drying to obtain a pretreated germanium-doped layer; growing a graphene layer on a copper foil using chemical vapor deposition; S2, transferring the graphene layer onto the pretreated germanium-doped layer using a polymethyl methacrylate-assisted wet transfer process; S3, forming a metal electrode on the graphene layer.

[0010] In one embodiment of the present invention, the time for obtaining the pretreated germanium-doped layer is defined as t0, the time for transferring the graphene layer to the pretreated germanium-doped layer is defined as t1, and the time interval between t1 and t0 is less than 1 hour.

[0011] In one embodiment of the present invention, step S2 includes: S21, spin-coating a polymethyl methacrylate film on the side of the graphene layer away from the copper foil, wherein the thickness of the polymethyl methacrylate film is 280 nm to 320 nm; S22, etching away the copper foil using ammonium persulfate solution, and cleaning with deionized water to obtain a graphene layer-polymethyl methacrylate film stack; S23, uniformly covering the surface of the pretreated germanium-doped layer with the graphene layer-polymethyl methacrylate film stack, and drying it by heating at 120°C to 180°C for 6 to 15 minutes to obtain a composite structure with a graphene layer; wherein the graphene layer is in contact with the surface of the pretreated germanium-doped layer; S24, immersing the composite structure with the graphene layer in acetone at 50°C to 70°C for 40 to 80 minutes to remove the polymethyl methacrylate film, and then rinsing it sequentially with acetone and isopropanol and drying it with nitrogen.

[0012] In one embodiment of the present invention, step S3 includes: S31, using a low-damage reactive ion etching process to etch away the graphene layer in the non-electrode region, exposing the pretreated germanium doped layer to obtain a patterned graphene layer; S32, using an electron beam evaporation process to deposit a metal electrode layer, the metal electrode layer covering the patterned graphene layer and the pretreated germanium doped layer in the non-electrode region; S33, forming a patterned photoresist on the upper surface of the metal electrode layer, the patterned photoresist covering the electrode region to protect the metal electrode layer in the electrode region; S34, etching the metal electrode layer in the non-electrode region to expose the pretreated germanium doped layer in the non-electrode region; and then placing it in a rapid thermal annealing apparatus under a pure nitrogen atmosphere and annealing at a temperature of 250°C to 350°C for 40s to 80s.

[0013] In one embodiment of the present invention, step S31 includes: spin-coating photoresist onto the graphene layer, forming a photoresist mask by photolithography, exposure, and development; the photoresist mask exposes the non-electrode region; and performing low-damage reactive ion etching using oxygen plasma, wherein the O2 flow rate is 20 sccm, the chamber pressure is 100 mTorr, the radio frequency power is 100 W, and the etching time is 30 s, to etch away the graphene layer in the non-electrode region.

[0014] In one embodiment of the present invention, in step S1, the germanium substrate is n-type (100) crystal orientation.

[0015] In one embodiment of the present invention, after obtaining the germanium substrate, it is first subjected to RCA cleaning and then hydrofluoric acid treatment.

[0016] Thirdly, the present invention provides a semiconductor device including the low-resistivity metal-semiconductor contact structure described above for germanium-based devices.

[0017] Compared with existing technologies, the beneficial effects of this invention are as follows: 1. The low-resistance metal-semiconductor contact structure for germanium-based devices provided by this invention introduces graphene as an atomically flat van der Waals contact interface layer, enabling low-resistance contact in n-type Ge. This low-resistance metal-semiconductor contact structure can be widely used to improve the performance of various devices such as Ge-based metal-oxide-semiconductor field-effect transistors (MOSFETs) and tunneling field-effect transistors (TFETs), and is a key core technology for promoting the practical application of Ge-based CMOS technology.

[0018] 2. The low-resistivity metal-semiconductor contact structure provided by this invention fundamentally solves the FLP effect. First-principles calculations (HSE06 hybrid functional) confirm that this structure can reduce the interface state density (D_it) from 10 13 ~10 14 eV -1 cm -2 The magnitude dropped significantly to 10 11 eV -1 cm -2 The Fermi level pinning strength parameter (S = dΦ_B / dΦ_M) recovered from ~0.1 (strong pinning) to ~0.7 (close to the ideal Schottky-Mott rule), indicating that the FLP effect was fundamentally suppressed.

[0019] 3. Achieving ultra-low resistance ohmic contacts in n-type Ge. Calculations show that the electronic Schottky barrier height (Φ_BN) of n-type Ge significantly decreases from ~0.6 eV in the strongly pinned state to the 0.2-0.4 eV range, providing a solid theoretical foundation for achieving low-resistance ohmic contacts. Thus, n-type contacts are no longer a performance bottleneck, freeing device design from constraints and allowing for the free selection of physically optimal device architectures (e.g., more freedom to explore n-type contact potentials). + - The source of the n-TFET does not need to be constrained by contact limitations, thus allowing more focus on optimizing the band engineering and electric field distribution of the tunnel junction itself, unlocking new degrees of freedom for Ge-based TFET architecture design.

[0020] 4. The method provided by this invention can achieve atomically flat and non-destructive van der Waals interfaces. By introducing a graphene layer, atomically flat contact is achieved, and the process is gentle, causing minimal damage to the sensitive Ge surface, fully preserving the high intrinsic carrier mobility of the substrate, and the technologies involved in the entire fabrication process are compatible with mainstream CMOS back-end processes.

[0021] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0022] Figure 1 is a three-dimensional structural schematic diagram of a low-resistivity metal-semiconductor contact structure for germanium-based devices provided in an embodiment of the present invention; Figure 2 is a flowchart of step S1 in the preparation method of the low-resistivity metal-semiconductor contact structure for germanium-based devices provided in embodiment 3 of the present invention; Figure 3 is a flowchart of step S2 in the preparation method of the low-resistivity metal-semiconductor contact structure for germanium-based devices provided in embodiment 3 of the present invention; Figure 4 is a flowchart of step S3 in the preparation method of the low-resistivity metal-semiconductor contact structure for germanium-based devices provided in embodiment 3 of the present invention; Figure 5 is a schematic diagram of Ag / n provided in an embodiment of the present invention. + -Ge contact model (a) and Ag / graphene / n + -Ge contact model (b) schematic diagram; Figure 6 is an Ag / n diagram provided in the embodiment of the present invention. + -Ge contact model projection density of states at different germanium doping concentrations; Figure 7 is the Ag / graphene / n provided in the embodiment of the present invention. + Figure 8 shows the projected density of states (DSO) of the Ag / graphene / p-Ge contact model under different germanium doping concentrations according to an embodiment of the present invention; Figure 9 shows the projected DSO of the Ag / graphene / n-Ge contact model under different germanium doping concentrations according to an embodiment of the present invention. + Comparison of projected density of states between monolayer and bilayer graphene crystals in the -Ge contact model.

[0023] Figure reference numerals: 1-Germ-doped layer; 11-Germ substrate; 2-Graphene layer; 3-Metal electrode; 4-Polymethyl methacrylate film; 5-Electrode region; 6-Non-electrode region; 7-Metal electrode layer. Detailed Implementation

[0024] To further illustrate the technical means and effects adopted by the present invention to achieve the intended purpose, the following, in conjunction with the accompanying drawings and specific embodiments, provides a detailed description of a low-resistivity metal-semiconductor contact structure for germanium-based devices, its preparation method, and the device thereof.

[0025] The foregoing and other technical contents, features, and effects of the present invention will be clearly presented in the following detailed description of specific embodiments in conjunction with the accompanying drawings. Through the description of the specific embodiments, a more in-depth and concrete understanding can be gained of the technical means and effects adopted by the present invention to achieve its intended purpose. However, the accompanying drawings are for reference and illustration only and are not intended to limit the technical solutions of the present invention.

[0026] It should be noted that, in this document, the terms "comprising," "including," or any other variations are intended to cover non-exclusive inclusion, such that an article or device that comprises a list of elements includes not only those elements but also other elements not expressly listed. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the article or device that includes said element.

[0027] Example 1: This embodiment of the invention provides a low-resistivity metal-semiconductor contact structure for germanium-based devices, as shown in Figure 1, comprising a germanium doped layer 1, a graphene layer 2, and a metal electrode 3 stacked sequentially.

[0028] Germanium-doped layer 1 serves as the source, drain, or contact lead region of the device, with a germanium doping concentration of 1×10⁻⁶. 19 cm -3 Up to 5×10 19 cm -3 Within this concentration range, the barrier width can be reduced by enhancing the field emission effect, resulting in lower contact resistance; simultaneously, doping concentrations exceeding 1 × 10⁻⁶ should be avoided. 20 cm -3 The extremely high doping of the crystal leads to severe lattice damage, low activation rate, and a surge in leakage current caused by bandgap narrowing, which in turn increases process complexity and side effects.

[0029] Graphene layer 2 contains at least one layer of graphene crystal. A single-layer graphene crystal is a two-dimensional crystal composed of a single carbon atom layer, with a theoretical thickness of 0.335 nm (i.e., 3.35 Å). A bilayer graphene crystal has a theoretical thickness of approximately 0.67 nm. The upper surface of germanium-doped layer 1 is a stable hydrogen-terminated surface, and graphene layer 2 contacts the hydrogen-terminated surface through van der Waals forces. The low-resistivity metal-semiconductor contact structure includes an electrode region and a non-electrode region, with the metal electrode disposed in the electrode region.

[0030] The graphene layer 2 serves as the core of the FLP suppression functional layer. Graphene, with its sp² hybridized two-dimensional carbon grid and highly delocalized π electron cloud, constitutes an ideal "energy filter" and "physical shielding layer." Graphene can effectively attenuate the penetration of the metal electronic wavefunction into the Ge bandgap, reducing the density of metal-induced interstitial states by nearly an order of magnitude, thereby relieving Fermi pinning and restoring the ability of the metal work function to regulate the Schottky barrier.

[0031] In some examples, graphene layer 2 can be a single-layer, bilayer, or triple-layer graphene crystal. Graphene layer 2 can be a single-layer graphene crystal, which provides basic shielding and charge transfer modulation, reducing the Schottky barrier height. Graphene layer 2 can also be a bilayer graphene crystal, which, due to its higher electronic state density and stronger interlayer coupling, provides superior shielding and more flexible work function / barrier height control, further reducing the Schottky barrier height (Φ_BN) by approximately 0.05-0.1 eV. Similarly, graphene layer 2 can also be a triple-layer graphene crystal. It should be noted that the number of graphene layers has a decisive influence on performance, but the relationship is not a simple linear superposition. The more layers, the stronger the shielding ability against the electronic wavefunction of the metal, and the more effectively the FLP effect can be reduced. However, the transport of charge carriers (electrons or holes) from the germanium-doped layer 1 through the graphene layer 2 to the metal electrode 3 (or vice versa) primarily relies on quantum tunneling. The tunneling probability decreases exponentially with increasing barrier (graphene) thickness. Therefore, the more layers there are, the significantly higher the contact resistance becomes, leading to a decrease in device current. Furthermore, the band structure changes directly affect the carrier transport mechanism, from zero-bandgap half-metals (single-layer) to bandgap-opening semiconductors (twisted bilayers or symmetry-broken bilayers), and then to half-metal-like structures (three or more layers). Therefore, insufficient shielding with a single-layer graphene crystal can partially reduce the FLP effect; however, too many graphene crystal layers result in excessively high contact resistance, impacting device performance. A balance needs to be struck between a low Schottky barrier and low contact resistance.

[0032] In one example, the metal electrode is made of at least one of titanium, silver, and TiN.

[0033] Example 2: This example provides a semiconductor device including the low-resistance metal-semiconductor contact structure described above for germanium-based devices. For example, the semiconductor device can be an n-type Ge-based MOSFET or an n-type Ge-based TFET.

[0034] Example 3 This example provides a method for preparing the low-resistivity metal semiconductor contact structure for germanium-based devices as described above, as shown in Figures 2 to 4, including the following steps: S1, obtaining a germanium substrate 11 and performing hydrofluoric acid treatment.

[0035] Specifically, referring to Figure 2, an n-type (100) oriented germanium substrate 11 was selected (as shown in Figure 2(a)). The surface was thoroughly cleaned using a standard RCA cleaning process (as shown in Figure 2(b), with specific parameters as follows: SC-1: NH4OH:H2O2:H2O=1:1:5; 75°C, 10min; SC-2:HCl:H2O2:H2O=1:1:6; 75°C, 10min).

[0036] Hydrofluoric acid treatment (as shown in Figure 2(c)): Immersing in a 0.5% hydrofluoric acid solution for 60 seconds under a nitrogen atmosphere (e.g., using a nitrogen-filled glove box ([O2], [H2O] < 0.1 ppm)) to completely remove the native oxide layer (GeO2) on the Ge surface, forming a stable hydrogen-terminated (Ge-H) surface with low dangling bond density for achieving high-quality van der Waals contacts.

[0037] After rinsing with a large amount of deionized water (resistivity ≥ 18 MΩ·cm), the pretreated germanium-doped layer 1 was obtained by blowing it dry with high-purity (≥99.999%) nitrogen gas (as shown in Figure 2(d)).

[0038] Graphene layer 2 was grown on copper foil using chemical vapor deposition (as shown in Figure 3(a)).

[0039] Specifically, large-area, continuous, high-quality, wrinkle-free monolayer graphene crystals were grown on electropolished copper foil catalyst using low-pressure chemical vapor deposition (LPCVD). The growth conditions were: methane (CH4, 5 sccm) as the carbon source, hydrogen (H2, 50 sccm) as the carrier and reducing gas, and growth was carried out at 1050°C and 20 mTorr for 30 minutes.

[0040] S2. A wet transfer process assisted by polymethyl methacrylate (PMMA) is used, as shown in Figures 3(b) to 3(f), to transfer graphene layer 2 onto the upper surface of pretreated germanium-doped layer 1. Further, the time to obtain pretreated germanium-doped layer 1 is defined as t0, the time to transfer graphene layer 2 to pretreated germanium-doped layer is defined as t1, and the time interval between t1 and t0 is less than 1 hour.

[0041] Specifically, step S2 includes: S21, as shown in Figure 3(b), a polymethyl methacrylate (PMMA) film 4 is formed by spin-coating the graphene layer 2 away from the copper foil. The PMMA film 4 has a thickness of 300 nm, the spin-coating speed is 3000 rpm, and the time is 60 s. Then, it is preheated on a hot plate at 180°C for 2 minutes.

[0042] S22. As shown in Figure 3(c), the Cu foil was etched away using a 1.0 mol / L ammonium persulfate ((NH4)2S2O8) solution, leaving the graphene layer-polymethyl methacrylate (PMMA) film stack. The PMMA film stack was then transferred to deionized water and soaked and cleaned three times, 10 minutes each time, to remove residual etchant.

[0043] S23. As shown in Figure 3(d), the graphene layer-polymethyl methacrylate film stack floating on the water surface is retrieved using a pretreated germanium-doped layer, so that graphene layer 2 uniformly covers the surface of the pretreated germanium-doped layer. Then, it is heated on a hot plate at 150°C for 10 minutes to remove moisture and enhance van der Waals adsorption between graphene layer 2 and the pretreated germanium-doped layer.

[0044] S24. As shown in Figures 3(e) and 3(f), the sample treated in step S23 is immersed in acetone at 60°C for 1 hour to completely dissolve and remove the PMMA film support layer. Then it is rinsed with acetone and isopropanol in sequence, and finally dried with high-purity nitrogen.

[0045] S3. Referring to Figure 4, a metal electrode 3 is formed on the graphene layer 2.

[0046] Specifically, step S3 includes: S31, using a low-damage reactive ion etching process to etch away the graphene layer 2 of the non-electrode region 6, exposing the germanium doped layer to obtain a patterned graphene layer; as shown in Figure 4(a), photoresist is spin-coated onto the graphene layer, and a photoresist mask is formed through photolithography, exposure, and development; the photoresist mask exposes the non-electrode region 6; as shown in Figure 4(b), low-damage reactive ion (RIE) etching is performed using oxygen plasma, wherein the O2 flow rate is 20 sccm, the chamber pressure is 100 mTorr, the RF power is 100 W, and the etching time is 30 s, to etch away the graphene layer of the non-electrode region 6. Under the conditions provided in this embodiment, the graphene exposing the non-electrode region 6 is removed rapidly and selectively, while causing minimal damage to the underlying germanium doped layer 1.

[0047] As shown in Figure 4(c), the photoresist is removed with acetone to obtain a patterned graphene layer.

[0048] S32. As shown in Figure 4(d), a metal electrode layer 7 is deposited using electron beam evaporation (E-beam evaporation). The metal electrode layer 7 covers the patterned graphene layer and the germanium-doped layer 1 in the non-electrode region 6. The material of the metal electrode layer 7 is silver (Ag). The electron beam evaporation process parameters are: background vacuum better than 5 × 10⁻⁶. -6 Torr, with the deposition rate controlled at 0.5 Å / s, resulted in a final silver (Ag) electrode thickness of 80 nm.

[0049] S33. As shown in Figure 4(e), a patterned photoresist is formed on the upper surface of the metal electrode layer 7, covering the electrode region 5 to protect the metal electrode layer 7 of the electrode region 5. S34. As shown in Figure 4(f), the metal electrode layer 7 of the non-electrode region 6 is etched to expose the germanium doped layer 1 of the non-electrode region 6. As shown in Figure 4(g), the sample is then placed in a rapid thermal annealing apparatus and annealed at 300°C for 60 seconds under a pure nitrogen (N2) atmosphere to obtain a low-resistance metal-semiconductor contact structure (as shown in Figure 4(h)). This further repairs microscopic defects that may be introduced during the transfer process, optimizes the interfacial coupling between graphene and germanium doped layer 1, and between graphene and metal, thereby stabilizing and further reducing the contact resistance.

[0050] Example 4 differs from Example 3 in that, in step S1, the graphene layer 2 grown on the copper foil using chemical vapor deposition is a bilayer graphene crystal. The remaining operations are the same as in Example 3.

[0051] Performance testing: 1. First-principles calculation verification of FLP inhibition effect and mechanism (1) As shown in Figure 5, the Ag / n without graphene layer was constructed by first-principles calculation. + -Ge contact model (a) and Ag / graphene / n + -Ge contact model (b), using HSE06 hybrid functionals to accurately describe the band gap. Figure 6 shows Ag / n + The projected density of states (PDOS) characterization diagram of the -Ge contact model, Figure 7 shows the Ag / graphene / n + Projected density of states (PDOS) characterization of the -Ge contact model. The results show that for a doping concentration of 1×10⁻⁶... 19 cm -3 In the n-type germanium doped layer, the Fermi level of the conventional Ag-Ge contact is firmly pinned at approximately 0.596 eV from the conduction band bottom (Figure 6). However, after introducing a monolayer graphene crystal (Ag-Gr-Ge structure), the Fermi level significantly shifts to the conduction band bottom, the pinning effect is significantly weakened, and the calculated Schottky barrier height (Φ_BN) decreases to 0.453 eV (Figure 7). For a doping concentration of 5 × 10⁻⁶ eV... 19 cm -3 In the n-type germanium-doped layer, the Fermi level of the conventional Ag-Ge contact is pinned to approximately 0.585 eV from the conduction band bottom (Figure 6). However, after introducing a monolayer graphene crystal (Ag-Gr-Ge structure), the Fermi level significantly shifts to the conduction band bottom, the pinning effect is significantly weakened, and the calculated Schottky barrier height (Φ_BN) decreases to 0.387 eV (Figure 7). Projected density of states (DOS) analysis shows a significant reduction in the MIGS density within the Ge band gap. Charge density difference analysis further reveals the existence of beneficial interfacial dipoles at the Ag-Gr interface, which synergistically contribute to the barrier reduction.

[0052] (2) As shown in Figure 8, an Ag / graphene / p-Ge contact model was constructed using first-principles calculations, and the HSE06 hybrid functional was used to accurately describe the band gap. The results show that the low-resistance metal-semiconductor contact structure provided by this invention can also ensure good low-resistance contact for the p electrode. Thus, under the same fabrication process, both the n and p electrodes can have good low-resistance contact, which is compatible with various existing production lines.

[0053] 2. The effect of graphene layer number modulation is shown in Figure 9. Simulation calculations of single-layer graphene crystals (left side of Figure 9) and bilayer graphene crystals (right side of Figure 9) show that, under the same doping conditions, compared with single-layer graphene (Φ_BN ~ 0.455 eV), bilayer graphene can further reduce Φ_BN to approximately 0.436 eV due to its higher density of states and stronger interlayer coupling. This example suggests that by controlling the number of graphene crystal layers, precise tailoring of contact characteristics can be achieved, providing optimized design space for germanium-based devices.

[0054] The low-resistance metal-semiconductor contact structure for germanium-based devices provided by this invention is highly versatile and can eliminate the FLP effect. It is not only for a specific type of device, but also solves the common bottleneck of excessively high n-type contact resistance for the entire Ge-based technology platform by introducing a graphene van der Waals interface layer. This enables Ge-based n-MOSFETs and n-TFETs to break free from the constraints of FLP and realize their due performance potential.

[0055] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. In addition, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.

[0056] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications and substitutions should be considered within the scope of protection of the present invention.

Claims

1. A low-resistivity metal-semiconductor contact structure for germanium-based devices, characterized in that, It includes a germanium-doped layer, a graphene layer, and a metal electrode stacked sequentially; the germanium doping concentration in the germanium-doped layer is 1×10⁻⁶. 19 cm -3 Up to 5×10 19 cm -3 The graphene layer comprises at least one layer of graphene crystal; the upper surface of the germanium-doped layer is a stable hydrogen-terminated surface, and the graphene layer is in contact with the hydrogen-terminated surface through van der Waals forces; the low-resistivity metal-semiconductor contact structure includes an electrode region and a non-electrode region, and the metal electrode is disposed in the electrode region.

2. The low-resistivity metal-semiconductor contact structure for germanium-based devices according to claim 1, characterized in that, The graphene layer is a single-layer graphene crystal, a double-layer graphene crystal, or a triple-layer graphene crystal; the material of the metal electrode is at least one of titanium, silver, and TiN.

3. A method for fabricating a low-resistivity metal-semiconductor contact structure for germanium-based devices as described in claim 1 or 2, characterized in that, Includes the following steps: S1. Obtain a germanium substrate and perform hydrofluoric acid treatment; the hydrofluoric acid treatment is carried out by immersing the substrate in a 0.5% to 2% hydrofluoric acid solution under nitrogen atmosphere for 30 to 90 seconds, followed by rinsing with deionized water and drying to obtain a pretreated germanium-doped layer; a graphene layer is grown on a copper foil using chemical vapor deposition; S2. The graphene layer is transferred onto the pretreated germanium-doped layer using a polymethyl methacrylate-assisted wet transfer process; S3. A metal electrode is formed on the graphene layer.

4. The method for fabricating a low-resistivity metal-semiconductor contact structure for germanium-based devices according to claim 3, characterized in that, The time to obtain the pretreated germanium-doped layer is defined as t0, the time to transfer the graphene layer to the pretreated germanium-doped layer is defined as t1, and the time interval between t1 and t0 is less than 1 hour.

5. The method for fabricating a low-resistivity metal-semiconductor contact structure for germanium-based devices according to claim 3 or 4, characterized in that, Step S2 includes: S21, spin-coating a polymethyl methacrylate (PMMA) film on the side of the graphene layer away from the copper foil, wherein the thickness of the PMMA film is 280 nm to 320 nm; S22, etching away the copper foil using ammonium persulfate solution, and cleaning with deionized water to obtain a graphene layer-PMMA film stack; S23, uniformly covering the surface of the pretreated germanium-doped layer with the graphene layer-PMMA film stack, and drying it at 120 °C to 180 °C for 6 to 15 min to obtain a composite structure with a graphene layer; wherein the graphene layer is in contact with the surface of the pretreated germanium-doped layer; S24, immersing the composite structure with the graphene layer in acetone at 50 °C to 70 °C for 40 to 80 min to remove the PMMA film, and then rinsing it sequentially with acetone and isopropanol, followed by nitrogen drying.

6. The method for fabricating a low-resistivity metal-semiconductor contact structure for germanium-based devices according to claim 5, characterized in that, Step S3 includes: S31, using a low-damage reactive ion etching process to etch away the graphene layer in the non-electrode region, exposing the pretreated germanium doped layer to obtain a patterned graphene layer; S32, using an electron beam evaporation process to deposit a metal electrode layer, the metal electrode layer covering the patterned graphene layer and the pretreated germanium doped layer in the non-electrode region; S33, forming a patterned photoresist on the upper surface of the metal electrode layer, the patterned photoresist covering the electrode region to protect the metal electrode layer in the electrode region; S34, etching the metal electrode layer in the non-electrode region to expose the pretreated germanium doped layer in the non-electrode region; and then placing it in a rapid thermal annealing apparatus under a pure nitrogen atmosphere and annealing at a temperature of 250°C to 350°C for 40 to 80 seconds.

7. The method for fabricating a low-resistivity metal-semiconductor contact structure for germanium-based devices according to claim 6, characterized in that, Step S31 includes: spin-coating photoresist onto the graphene layer, forming a photoresist mask through photolithography, exposure, and development; the photoresist mask exposes the non-electrode region; and performing low-damage reactive ion etching using oxygen plasma, wherein the O2 flow rate is 20 sccm, the chamber pressure is 100 mTorr, the radio frequency power is 100 W, and the etching time is 30 s, to etch away the graphene layer in the non-electrode region.

8. The method for fabricating a low-resistivity metal-semiconductor contact structure for germanium-based devices according to claim 3, characterized in that, In step S1, the germanium substrate is n-type (100) crystal orientation.

9. The method for fabricating a low-resistivity metal-semiconductor contact structure for germanium-based devices according to claim 3, characterized in that, After obtaining the germanium substrate, it is first cleaned with RCA and then treated with hydrofluoric acid.

10. A semiconductor device, characterized in that, Includes the low-resistivity metal-semiconductor contact structure for germanium-based devices as described in claim 1 or 2.

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