Substrate, display panel and preparation method of display panel

Abstract

The invention discloses a substrate, a display panel and a preparation method of the display panel, the substrate comprises a display area and a non-display area arranged on the periphery of the display area, and the substrate further comprises a substrate; the array layer is located on one side of the substrate, and the array layer is located in the display area; the circuit layer is located on one side of the substrate, the circuit layer is located in the non-display area, and at least part of film layers in the circuit layer and at least part of film layers in the array layer are arranged on the same layer; the protection layer is arranged on the side, away from the substrate, of the circuit layer, and the protection layer is located in the non-display area. According to the design, the reliability of the display panel can be improved.

Description

Substrate, display panel, and method for fabricating display panel Technical Field

[0001] This application relates to the field of display technology, and in particular to a substrate, a display panel, and a method for manufacturing the display panel. Background Technology

[0002] In recent years, with the development and widespread adoption of display technology, display panels have been applied to various electronic devices, such as mobile phones, tablets, or other portable electronic devices.

[0003] However, the inventors of this application have found that the reliability of current display panels needs further improvement. Summary of the Invention

[0004] This application provides a substrate, a display panel, and a method for manufacturing the display panel, which can improve the reliability of the display panel.

[0005] A first aspect of this application provides a substrate, the substrate including a display area and a non-display area disposed around the display area, the substrate further including: a substrate; an array layer located on one side of the substrate, the array layer being located in the display area; a circuit layer located on one side of the substrate, the circuit layer being located in the non-display area, at least a portion of the film layers in the circuit layer being disposed in the same layer as at least a portion of the film layers in the array layer; and a protective layer disposed on the side of the circuit layer facing away from the substrate, the protective layer being located in the non-display area.

[0006] In one embodiment, the protective layer is made of a conductive material.

[0007] Preferably, the protective layer is disposed in the same layer as at least a portion of the film layer located in the display area and is made of the same material.

[0008] In one embodiment, the substrate further includes: a pixel definition layer located on the side of the array layer opposite to the substrate, the pixel definition layer being located in the display area, and the pixel definition layer having a pixel opening; an isolation structure located on the side of the pixel definition layer opposite to the substrate, the isolation structure being located in the display area, the isolation structure having an isolation opening, the isolation opening at least partially overlapping the orthographic projection of the pixel opening on the substrate; and a first electrode at least partially formed in the pixel opening.

[0009] Preferably, in the display area, a film layer disposed in the same layer as the protective layer is located between the array layer and the encapsulation layer, wherein the encapsulation layer is located on the side of the isolation structure and the first electrode facing away from the substrate.

[0010] Preferably, the material of the isolation structure includes at least one of molybdenum, aluminum, and titanium.

[0011] Preferably, the isolation structure includes a first isolation layer and a second isolation layer stacked together, the first isolation layer being located between the second isolation layer and the pixel definition layer, and the orthographic projection of the first isolation layer on the substrate being located within the orthographic projection of the second isolation layer on the substrate.

[0012] Preferably, the isolation structure further includes a third isolation layer, which is located between the first isolation layer and the pixel definition layer, and the orthographic projection of the third isolation layer on the substrate is located within the orthographic projection of the second isolation layer on the substrate.

[0013] Preferably, the material of the first insulating layer includes molybdenum.

[0014] Preferably, the material of the second insulating layer includes aluminum.

[0015] Preferably, the material of the third insulating layer includes titanium.

[0016] In one embodiment, the protective layer is disposed in the same layer as at least a portion of the membrane layer in the isolation structure and is made of the same material.

[0017] In one embodiment, the protective layer is disposed in the same layer as at least a portion of the film layer in the first electrode and is made of the same material.

[0018] Preferably, the first electrode includes an anode.

[0019] Preferably, the material of the protective layer includes at least one of indium tin oxide and silver.

[0020] In one embodiment, the substrate further includes connection traces located in the display area, the connection traces being located between the array layer and the pixel definition layer and electrically connecting the first electrode to the array layer, wherein the protective layer is disposed in the same layer as the connection traces and is made of the same material.

[0021] Preferably, the orthographic projection of the connection trace on the substrate covers the orthographic projection of the first electrode on the substrate; the orthographic projection of the connection trace and the electrical connection portion of the array layer on the substrate does not coincide with the orthographic projection of the first electrode on the substrate.

[0022] Preferably, the protective layer is made of a transparent material.

[0023] Preferably, the material of the protective layer includes indium zinc oxide.

[0024] In one embodiment, the display area includes a light-transmitting area and a main screen area disposed around the light-transmitting area, wherein the isolation structures in the light-transmitting area are spaced apart, and the spaced area between the isolation structures is a light-transmitting opening. The substrate further includes a connecting layer, at least partially located in the light-transmitting opening, wherein the protective layer is disposed in the same layer as the connecting layer and is made of the same material.

[0025] Preferably, both the protective layer and the connecting layer are made of light-transmitting materials.

[0026] Preferably, both the connecting layer and the protective layer are made of indium zinc oxide.

[0027] Preferably, the connecting layer is electrically connected to the isolation structure.

[0028] A second aspect of this application also includes a display panel comprising the substrate described in any of the above embodiments.

[0029] A third aspect of this application also provides a method for manufacturing a display panel, the display panel including a display area and a non-display area, the method comprising: forming an array layer and a circuit layer on one side of a substrate, wherein the array layer is located in the display area, the circuit layer is located in the non-display area, and at least a portion of the film layers in the circuit layer are disposed in the same layer as at least a portion of the film layers in the array layer; forming a pixel definition layer on the side of the array layer away from the substrate, and patterning the pixel definition layer to form a pixel opening; forming a light-emitting element in the pixel opening; and removing a protective layer located in the non-display area, wherein, before forming the light-emitting element, the protective layer located in the non-display area is pre-formed on the side of the circuit layer away from the substrate.

[0030] In one embodiment, the protective layer is formed after the pixel definition layer is patterned and before the light-emitting element.

[0031] Preferably, before patterning the pixel definition layer to form a pixel opening, the method further includes: forming an isolation structure on the side of the pixel definition layer away from the substrate, the isolation structure having an isolation opening.

[0032] In one embodiment, before patterning the pixel definition layer to form a pixel opening, the method further includes: forming an isolation structure on the side of the pixel definition layer away from the substrate, and simultaneously forming the protective layer located in the non-display area on the circuit layer, wherein the protective layer and at least a portion of the film layer in the isolation structure are disposed in the same layer and are made of the same material.

[0033] In one embodiment, before forming a pixel definition layer on the side of the array layer away from the substrate, the method further includes: forming a first electrode layer located in the display area on the array layer, and simultaneously forming a protective layer located in the non-display area on the circuit layer, wherein the protective layer is disposed in the same layer as at least a portion of the film layer of the first electrode layer and is made of the same material; and patterning the first electrode layer to obtain a first electrode subsequently exposed in the pixel opening.

[0034] In one embodiment, before forming a pixel definition layer on the side of the array layer away from the substrate, the method further includes: forming a connection trace layer located in the display area on the array layer, and simultaneously forming the protective layer located in the non-display area on the circuit layer; patterning the connection trace layer to obtain connection traces, wherein the connection traces are electrically connected to a first electrode subsequently formed in the pixel opening.

[0035] In one embodiment, the display area includes a light-transmitting area and a main screen area located around the light-transmitting area; after patterning the pixel definition layer to form a pixel opening, the method further includes: forming a connection layer located in the light-transmitting area on the pixel definition layer, and simultaneously forming the protective layer located in the non-display area on the circuit layer, and patterning the connection layer; forming an isolation structure located in the display area on the pixel definition layer, wherein the isolation structure has an isolation opening and a light-transmitting opening spaced apart in the light-transmitting area, wherein the connection layer is exposed from the light-transmitting opening.

[0036] Unlike existing technologies, the beneficial effects of this application are as follows: This application sets a protective layer on the side of the non-display area circuit layer away from the substrate. Through the shielding effect of the protective layer, during the subsequent process of using the substrate to prepare the display panel, when the light-emitting element is prepared by the etching process, the protective layer can effectively protect the circuit layer from being etched, thereby ensuring that the circuit layer is not damaged and ultimately improving the reliability of the display panel. Attached Figure Description

[0037] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort, wherein:

[0038] Figure 1 is a top view of one embodiment of the substrate of this application;

[0039] Figure 2 is a cross-sectional view of the substrate in Figure 1 along the section lines M to M' in the first application scenario;

[0040] Figure 3 is a schematic diagram of one embodiment of the isolation structure in Figure 2;

[0041] Figure 4 is a schematic diagram of another embodiment of the isolation structure in Figure 2;

[0042] Figure 5 is a cross-sectional view of the substrate in Figure 1 along section lines M to M' in the second application scenario;

[0043] Figure 6 is a cross-sectional view of the substrate in Figure 1 along section lines M to M' in the third application scenario;

[0044] Figure 7 is a cross-sectional view of the substrate in Figure 1 along the section lines M to M' in the fourth application scenario;

[0045] Figure 8 is a cross-sectional view of the substrate in Figure 1 along section lines N to N' in the first application scenario;

[0046] Figure 9 is a flowchart illustrating one embodiment of the method for manufacturing the display panel of this application;

[0047] Figure 10 is a structural schematic diagram of one embodiment of step S100 in Figure 9;

[0048] Figure 11 is a structural schematic diagram of one embodiment of step S200 in Figure 9;

[0049] Figure 12 is a structural schematic diagram of one embodiment of step S300 in Figure 9;

[0050] Figure 13 is a structural schematic diagram of one embodiment of step S400 in Figure 9;

[0051] Figure 14 is a structural schematic diagram of one embodiment of step S210;

[0052] Figure 15 is a structural schematic diagram of one embodiment of step S201;

[0053] Figure 16 is a structural schematic diagram of one embodiment of step S202;

[0054] Figure 17 is a flowchart of one embodiment prior to step S200 in Figure 9;

[0055] Figure 18 is a structural schematic diagram of one embodiment of step S101 in Figure 17;

[0056] Figure 19 is a structural schematic diagram of one embodiment of step S102 in Figure 17;

[0057] Figure 20 is a flowchart of another embodiment prior to step S200 in Figure 9;

[0058] Figure 21 is a structural schematic diagram of one embodiment of step S111 in Figure 20;

[0059] Figure 22 is a structural schematic diagram of one embodiment of step S112 in Figure 20;

[0060] Figure 23 is a flowchart of one embodiment following step S200 in Figure 9;

[0061] Figure 24 is a structural schematic diagram of one embodiment of step S211 in Figure 23;

[0062] Figure 25 is a structural schematic diagram of one embodiment of step S212 in Figure 23. Detailed Implementation

[0063] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0064] Referring to FIG1, the first aspect of this application provides a substrate 10, which includes a display area AA and a non-display area NA disposed around the display area AA.

[0065] In one embodiment, the non-display area NA includes the border area WA, the bend area BA, and the step area SA. Of course, in some other embodiments, the non-display area NA may also include other areas.

[0066] Referring to Figure 2, the substrate 10 also includes a substrate 100, an array layer 200, a circuit layer 300, and a protective layer 400.

[0067] The array layer 200 is located on one side of the substrate 100 and is located in the display area AA.

[0068] Specifically, the array layer 200 is provided with a driving circuit for driving the light-emitting element. In one embodiment, the array layer 200 includes a first inorganic insulating layer 211, a second inorganic insulating layer 212, a third inorganic insulating layer 213, a first organic insulating layer 214, and a second organic insulating layer 215, which are sequentially stacked on one side of the substrate 100. The array layer 200 also includes a polysilicon layer 221, a first conductive layer 222, a second conductive layer 223, a third conductive layer 224, and a fourth conductive layer 225. In this array, a polysilicon layer 221 is located between the substrate 100 and the first inorganic insulating layer 211; a first conductive layer 222 is located between the first inorganic insulating layer 211 and the second inorganic insulating layer 212, serving as the gate of the thin-film transistor; a second conductive layer 223 is located between the second inorganic insulating layer 212 and the third inorganic insulating layer 213, serving as at least a portion of the capacitor layer; a third conductive layer 224 is located between the third inorganic insulating layer 213 and the first organic insulating layer 214, serving as the source and drain of the thin-film transistor and electrically connected to the polysilicon layer 221 via vias; and a fourth conductive layer 225 is located between the first organic insulating layer 214 and the second organic insulating layer 215, serving as a connection trace electrically connected to the source or drain of the thin-film transistor. Of course, in some other embodiments, the specific arrangement of the film layers in the array layer 200 can be different, and this application does not impose specific limitations on the film layers in the array layer 200.

[0069] The circuit layer 300 is located on one side of the substrate 100 and is located in the non-display area NA. At least a portion of the film layer in the circuit layer 300 is disposed in the same layer as at least a portion of the film layer in the array layer 200.

[0070] Specifically, the line layer 300 is electrically connected to the array layer 200, so that an external driving chip can transmit signals to the driving circuit in the array layer 200 through the line layer 300. The fact that the line layer 300 and at least some of the film layers in the array layer 200 are in the same layer means that the film layers in the line layer 300 can be prepared simultaneously with at least some of the film layers in the array layer 200, without the need to prepare the line layer 300 separately.

[0071] In one embodiment, the circuit layer 300 includes a fifth conductive layer 311, a sixth conductive layer 312, and a seventh conductive layer 313 located on one side of the substrate 100. The sixth conductive layer 312 is located between the fifth conductive layer 311 and the seventh conductive layer 313 and is electrically connected to the fifth conductive layer 311 and the seventh conductive layer 313. The fifth conductive layer 311 is on the same layer as the first conductive layer 222, the sixth conductive layer 312 is on the same layer as the third conductive layer 224, and the seventh conductive layer 313 is on the same layer as the fourth conductive layer 225.

[0072] In one embodiment, the circuit layer 300 in the bending area BA in the non-display area NA is provided with only the seventh conductive layer 313, and the bending effect of the bending area BA is guaranteed by reducing the number of conductive layers.

[0073] In one embodiment, the circuit layer 300 further includes a fourth inorganic insulating layer 321, a fifth inorganic insulating layer 322, a third organic insulating layer 323, and a fourth organic insulating layer 324 sequentially stacked on one side of the substrate 100. A fifth conductive layer 311 is located between the fourth inorganic insulating layer 321 and the fifth inorganic insulating layer 322. A sixth conductive layer 312 is located between the fifth inorganic insulating layer 322 and the third organic insulating layer 323. A seventh conductive layer 313 is located between the third organic insulating layer 323 and the fourth organic insulating layer 324. The fourth inorganic insulating layer 321 is on the same layer as the first inorganic insulating layer 211, the fifth inorganic insulating layer 322 is on the same layer as the second inorganic insulating layer 212, the third organic insulating layer 323 is on the same layer as the first organic insulating layer 214, and the fourth organic insulating layer 324 is on the same layer as the second organic insulating layer 215.

[0074] Of course, in some other implementations, the line layer 300 and the array layer 200 can also have other same-layer relationships.

[0075] The protective layer 400 is disposed on the side of the circuit layer 300 away from the substrate 100, and the protective layer 400 is located in the non-display area NA.

[0076] Specifically, the protective layer 400 is disposed on the side of the circuit layer 300 away from the substrate 100 to protect the circuit layer 300 from being etched, thereby avoiding affecting the function of the circuit layer 300.

[0077] Specifically, the substrate 10 of this application is used for the subsequent fabrication of the display panel. During the fabrication of the light-emitting element (not shown) in the display panel, the light-emitting element is formed at the position corresponding to the isolation opening K between the isolation structures 500. The composition and fabrication of the isolation structure 500 are further described in patents CN118251982A, 202410864269.8, PCT / CN2024 / 098407, PCT / CN2024 / 102783, PCT / CN2024 / 098217, PCT / CN2024 / 099419, and PCT / CN2024 / 099072, the contents of which are incorporated herein by reference. In the fabrication of light-emitting elements, a light-emitting film layer located within the display area AA is deposited across the entire surface of a conventional metal mask. Then, etching removes the light-emitting film layer outside the isolation opening K, forming the light-emitting element located inside the isolation opening K. However, during etching, the film layer in the non-display area NA is also etched, meaning the circuit layer 300 is also etched, resulting in damage to the circuit layer 300 and reducing the reliability of the display panel. However, this application addresses this issue by providing a protective layer 400 on the side of the circuit layer 300 facing away from the substrate 100. The orthographic projection of the protective layer 400 onto the substrate 100 covers the orthographic projection of the circuit layer 300 onto the substrate 100. This allows the protective layer 400 to shield the etching process during subsequent fabrication of the light-emitting elements in the display panel, thereby protecting the underlying circuit layer 300 and ultimately improving the reliability of the display panel.

[0078] In one embodiment, the protective layer 400 is made of a conductive material. The conductive material includes metals or alloys, and typically possesses strong etching resistance, thereby providing better protection for the circuit layer 300. Specific material configurations for the protective layer 400 can be found in the embodiments described below.

[0079] In one embodiment, the protective layer 400 is disposed in the same layer as at least a portion of the film layer located in the display area AA and is made of the same material.

[0080] Specifically, considering that the protective layer 400 includes conductive materials, during the fabrication of the substrate 10, before fabricating the light-emitting element, the substrate 10 will fabricate a variety of different conductive layers. At the same time as these conductive layers are fabricated, the line protective layer 400 is fabricated on the side of the line layer 300 away from the substrate 100. In this way, the protective layer 400 can be fabricated simultaneously using the existing substrate 10 fabrication process without adding any new fabrication steps. This can reduce fabrication costs and improve production efficiency.

[0081] Of course, in one embodiment, the protective layer 400 can also be prepared by a separate process.

[0082] In one embodiment, referring to FIG2, the substrate 10 further includes an isolation structure 500 and a pixel definition layer 600. The pixel definition layer 600 is located on the side of the array layer 200 away from the substrate 100 and is located in the display area AA. The pixel definition layer 600 has a pixel opening T. The isolation structure 500 is located on the side of the pixel definition layer 600 away from the substrate 100 and is located in the display area AA. The isolation structure 500 has an isolation opening K. The isolation opening K and the orthographic projection of the pixel opening T on the substrate 100 at least partially overlap. At least a portion of the first electrode 710 is formed in the pixel opening T.

[0083] Specifically, the pixel opening T of the pixel definition layer 600 is used to set the light-emitting element. One pixel opening T corresponds to one isolation opening K. The first electrode 710 is used to electrically connect the driving circuit in the array layer 200. The isolation structure 500 is used to electrically connect the second electrode (not shown). The second electrode is on the side of the first electrode 710 away from the substrate 100. The second electrode is the common electrode of all light-emitting elements.

[0084] Furthermore, in the display area AA, a film layer disposed in the same layer as the protective layer 400 is located between the array layer 200 and the encapsulation layer (not shown). The encapsulation layer is located on the side of the isolation structure 500 and the first electrode 710 facing away from the substrate 100. To reduce fabrication costs, the protective layer 400 is fabricated simultaneously with the film layer in the display area AA. This requires fabrication before or during the fabrication of the isolation structure 500, essentially before the encapsulation layer, since the encapsulation layer is used to encapsulate the display area AA and is fabricated after the isolation structure 500. This allows the protective layer 400 to be fabricated using a co-layer process, eliminating the need for a separate fabrication of the protective layer 400.

[0085] In one embodiment, the material of the isolation structure 500 includes at least one of molybdenum, aluminum, and titanium. This design ensures better conductivity.

[0086] In one embodiment, referring to Figures 2 and 3, the isolation structure 500 includes a first isolation layer 501 and a second isolation layer 502 stacked together. The first isolation layer 501 is located between the second isolation layer 502 and the pixel definition layer 600, and the orthographic projection of the first isolation layer 501 on the substrate 100 is located within the orthographic projection of the second isolation layer 502 on the substrate 100.

[0087] Specifically, considering that the isolation structure 500 will be connected to the second electrode through the first isolation layer 501 when it is subsequently connected, in order to ensure the connection effect between the second electrode and the first isolation layer 501, the edge of the second isolation layer 502 is located outside the edge of the first isolation layer 501, that is, the isolation structure is an eaves-like structure. The second isolation layer 502 can better shield the etching, thereby ensuring the connection effect between the second electrode and the first isolation layer 501.

[0088] In one embodiment, referring to Figures 2 and 4, the isolation structure 500 further includes a third isolation layer 503, which is located between the first isolation layer 501 and the pixel definition layer 600, and the orthographic projection of the third isolation layer 503 on the substrate 100 is located within the orthographic projection of the second isolation layer 502 on the substrate 100.

[0089] Specifically, by setting a third isolation layer 503 between the first isolation layer 501 and the pixel definition layer 600, which is in direct contact with the pixel definition layer 600, the bonding force with the pixel definition layer 600 can be improved, ensuring the stability of the isolation structure 500.

[0090] Preferably, the first isolation layer 501 is made of molybdenum, the second isolation layer 502 is made of aluminum, and the third isolation layer is made of titanium. Specifically, aluminum is easier to etch than titanium when forming the isolation structure 500, thus forming a roof-like structure, while molybdenum has a stronger bond with the pixel definition layer 600 than aluminum. Of course, the material of the isolation structure 500 can also be other than aluminum, and this application does not limit the specific material of the isolation structure 500.

[0091] In one embodiment, referring to FIG5, the protective layer 400 and at least a portion of the membrane layer in the isolation structure 500 are disposed in the same layer and are made of the same material.

[0092] Specifically, as can be seen from the above embodiments, the isolation structure 500 includes multiple conductive layers. The protective layer 400 can be made of the same material as some of the conductive layers and is prepared in the same layer, that is, it is prepared simultaneously with some of the film layers in the isolation structure 500 using the same process. Alternatively, it can be made of the same material as all the conductive layers and is prepared simultaneously with all the film layers in the isolation structure 500 using the same process. This can reduce the cost of preparation.

[0093] In one embodiment, referring to FIG6, the protective layer 400 is disposed in the same layer as at least a portion of the film layer in the first electrode 710 and is made of the same material.

[0094] Specifically, the first electrode 710 includes at least one conductive layer. The protective layer 400 can be made of the same material as some of the films in the first electrode 710 and be prepared in the same layer, that is, it can be prepared simultaneously with some of the films in the first electrode 710 using the same process. Alternatively, it can be made of the same material as all the conductive layers, that is, it can be prepared simultaneously with all the films in the first electrode 710 using the same process. This can reduce the cost of preparation.

[0095] In one embodiment, the first electrode 710 includes an anode and the second electrode includes a cathode.

[0096] Of course, in some other embodiments, the first electrode 710 includes a cathode and the second electrode includes an anode.

[0097] In one embodiment, the material of the protective layer 400 includes at least one of indium tin oxide and silver.

[0098] Specifically, when the first electrode 710 is used as the anode, indium tin oxide and silver are commonly used materials for the anode. The first electrode 710 and the protective layer 400 are made of the same material and are disposed in the same layer. Thus, the material of the protective layer 400 can be at least one of indium tin oxide and silver.

[0099] In one embodiment, referring to FIG7, the substrate 10 further includes a connection trace 810 located in the display area AA. The connection trace 810 is located between the array layer 200 and the pixel definition layer 600 and electrically connects the first electrode 710 and the array layer 200. The protective layer 400 is disposed in the same layer as the connection trace 810 and is made of the same material.

[0100] Specifically, unlike the embodiment in Figure 6, where the first electrode 710 is directly electrically connected to the conductive layer in the array layer 200 via a via, Figure 7 connects the first electrode 710 to the conductive layer in the array layer 200 via a connecting trace 810. The first electrode 710 is directly disposed on the surface of the connecting trace 810 facing away from the substrate 100, without needing to be formed in a via. Furthermore, in this embodiment, the material of the protective layer 400 is the same as the material of the connecting trace 810, and the protective layer 400 and the connecting trace 810 are in the same layer, which helps reduce manufacturing costs. In one embodiment, referring to Figure 7, the material of the protective layer 400 includes a transparent material. The orthographic projection of the connecting trace 810 on the substrate 100 overlaps with the orthographic projection of the first electrode 710 on the substrate 100. The orthographic projection of the portion of the connecting trace 810 electrically connected to the array layer 200 on the substrate 100 does not coincide with the orthographic projection of the first electrode 710 on the substrate 100.

[0101] Specifically, due to the arrangement of the connecting trace 810, the area of ​​the orthographic projection of the first electrode 710 on the substrate 100 can be reduced, as long as it can cover the orthographic projection of the pixel opening T on the substrate 100. The first electrode 710 has a reflective function and usually does not have the ability to transmit light. Therefore, reducing the area of ​​the first electrode 710 can reduce the obstruction of external light. The connecting trace 810, which is arranged in the same layer as the protective layer 400, is made of transparent material, which can improve the transmittance of the area, especially in the light-transmitting area, such as the under-display fingerprint or under-display camera area, where more external light needs to pass through. Since the connecting trace 810 includes transparent material, and the arrangement of the connecting trace 810 can reduce the area of ​​the first electrode 710, the transmittance of the isolation opening K can be increased, and the light transmission effect in the isolation opening K can be improved.

[0102] In one embodiment, the protective layer 400 is made of indium zinc oxide. Indium zinc oxide is a transparent conductive material. Of course, other transparent materials can also be used, and this application is not limited thereto.

[0103] In one embodiment, referring to Figures 1 and 8, the display area AA includes a light-transmitting area TA and a main screen area MA disposed around the light-transmitting area TA. The isolation structures 500 in the light-transmitting area TA are spaced apart, and the spaced area between the isolation structures 500 is a light-transmitting opening H. The substrate 10 also includes a connecting layer 900, which is at least partially located in the light-transmitting opening H. The protective layer 400 is disposed in the same layer as the connecting layer 900 and is made of the same material.

[0104] Specifically, in the light-transmitting area TA, such as the under-display camera area, to ensure light transmission, some light-transmitting openings H are provided to increase transmittance. The light-transmitting openings H are the interval areas between the isolation structures 500. Unlike the main screen area MA, the main screen area MA does not need to have such light-transmitting openings H. The isolation structures 500 in the main screen area MA are electrically connected to each other. However, in the light-transmitting area TA, because it is necessary to increase transmittance, the number or size of the light-emitting elements is generally reduced, and the isolation structures 500 cannot be in direct contact with each other. This leaves more light-transmitting areas as light-transmitting openings H. The light-transmitting openings H are only used for light transmission and do not have light-emitting elements. The pixel openings T that are separated from the light-transmitting openings H are used to set the light-emitting elements. This is the difference between the two. In the light-transmitting port H, a connecting layer 900 is provided on the side of the pixel definition layer 600 facing away from the substrate 100. The connecting layer 900 is a conductive layer with a shielding function, capable of shielding the conductive layers on both sides of the connecting layer 900. For example, in one application scenario, a touch layer is also provided on the side of the isolation structure 500 facing away from the substrate 100. The connecting layer 900 can shield the signals of the touch layer and the array layer 200, avoiding mutual interference of electrical signals between the touch layer and the array layer 200. Furthermore, the protective layer 400 and the connecting layer 900 are made of the same material and are set in the same layer, which can reduce the manufacturing cost. At the same time, the connecting layer 900 covers the pixel definition layer 600 in the light-transmitting port H. Therefore, when the light-emitting elements in the display panel are etched using an etching process, the connecting layer 900 can also provide a certain degree of protection for the underlying film layer, especially the conductive layer located between the pixel definition layer 600 and the substrate 100.

[0105] In one embodiment, both the protective layer 400 and the connecting layer 900 are made of light-transmitting material. The light-transmitting material can increase the transmittance of the connecting layer 900, thereby ensuring the light transmission effect of the light-transmitting port H.

[0106] In one embodiment, both the connecting layer 900 and the protective layer 400 are made of indium zinc oxide. Indium zinc oxide is a transparent conductive material.

[0107] In one embodiment, the connection layer 900 is electrically connected to the isolation structure 500. Electrically connecting the connection layer 900 to the isolation structure 500 reduces the transmission resistance between adjacent isolation structures 500.

[0108] A second aspect of this application provides a display panel including the substrate 10 in any of the above embodiments.

[0109] Specifically, during the process of preparing the light-emitting element of the display panel using the substrate 10, in the non-display area NA, since the circuit layer 300 has a protective layer 400 on the side away from the substrate 100, when the independent light-emitting element is etched, it is the protective layer 400 that is etched, and the circuit layer 300 is not etched, thereby ensuring the reliability of the display panel 20.

[0110] Furthermore, the protective layer 400 is made of a conductive material. In order to improve the performance of the display panel, after the light-emitting element is fabricated, the protective layer 400 in the non-display area NA is completely removed. This is because conductive materials are easily corroded by moisture, and placing them on the surface affects the reliability of the display panel. Removing the protective layer 400 can improve the reliability of the display panel. At the same time, removing the protective layer 400 can also reduce the thickness of the non-display area NA. For details, please refer to the display panel fabrication method below.

[0111] Referring to Figures 9 to 13, a third aspect of this application provides a method for manufacturing a display panel 20, the display panel 20 including a display area AA and a non-display area NA, the method comprising:

[0112] S100: An array layer 200 and a line layer 300 are formed on one side of the substrate 100, wherein the array layer 200 is located in the display area AA, the line layer 300 is located in the non-display area NA, and at least a portion of the film layer in the line layer 300 is disposed in the same layer as at least a portion of the film layer in the array layer 200.

[0113] Specifically, referring to Figure 10, at least a portion of the film layer in the circuit layer 300 and the array layer 200 are prepared in the same layer using the same process. For the specific implementation of the same layer arrangement of the circuit layer 300 and the array layer 200, please refer to the above implementation, which will not be repeated here. At the same time, this application does not limit the specific film layers of the circuit layer 300 and the array layer 200.

[0114] S200: A pixel definition layer 600 is formed on the side of the array layer 200 away from the substrate 100, and the pixel definition layer 600 is patterned to form a pixel opening T.

[0115] Specifically, referring to Figure 11, a pixel definition layer 600 is first formed on the side of the array layer 200 away from the substrate 100, covering the entire surface of the display area AA. Then, a portion of the pixel definition layer 600 is removed by an etching process to form a pixel opening T, which is used to set the light-emitting element.

[0116] S300: A light-emitting element 700 is formed in the pixel opening T.

[0117] Specifically, referring to Figure 12, the light-emitting element 700 includes a first electrode 710, a light-emitting material layer 720, and a second electrode 730. In one application scenario, a first encapsulation layer 740 is formed on the side of the second electrode 730 facing away from the substrate 100. The first encapsulation layer 740 can achieve pixel-level encapsulation of the light-emitting element 700. It should be noted that in some embodiments, the first electrode 710 can be pre-fabricated separately before the pixel definition layer 600, and does not need to be fabricated in this step.

[0118] S400: Remove the protective layer 400 located in the non-display area NA, wherein, before forming the light-emitting element 700, the protective layer 400 located in the non-display area NA is formed in advance on the side of the circuit layer 300 away from the substrate 100.

[0119] Specifically, referring to Figures 12 and 13, before forming the light-emitting element 700, a protective layer 400 located in the non-display area NA is prepared on the side of the circuit layer 300 facing away from the substrate 100. Therefore, when the independent light-emitting element 700 is etched out through the etching process, the non-display area NA is also etched simultaneously. Protected by the protective layer 400, the circuit layer 300 is not etched, thereby improving the reliability of the display panel 20. Of course, after the etching process is completed, the protective effect of the protective layer 400 ends, and the protective layer 400 in the non-display area NA is removed to reduce the film thickness of the non-display area NA.

[0120] In one embodiment, the protective layer 400 is made of a conductive material. The conductive material is prone to water vapor corrosion when placed on the surface of the non-display area NA. Therefore, removing the protective layer 400 can improve the reliability of the display panel 20.

[0121] In one embodiment, referring to FIG14, S210: the protective layer 400 is formed after the patterned pixel definition layer 600 and before the light-emitting element 700, that is, the protective layer 400 is formed between the above steps S200 and S300.

[0122] In one embodiment, referring to FIG15, before forming the pixel opening T in the patterned pixel definition layer 600 in step S200, the method further includes:

[0123] S201: An isolation structure 500 is formed on the side of the pixel definition layer 600 away from the substrate 100, and the isolation structure 500 is provided with an isolation opening K.

[0124] Specifically, an isolation structure 500 is first fabricated on the side of the pixel definition layer 600 facing away from the substrate 100 to form an isolation opening K. Subsequently, a pixel opening T will be formed in the isolation opening K. That is to say, in this embodiment, the isolation structure 500 is formed first, the pixel definition layer 600 is patterned, and finally the protective layer 400 is formed.

[0125] In one embodiment, referring to FIG16, before forming the pixel opening T in the patterned pixel definition layer 600 in step S200, the following steps are included:

[0126] S202: An isolation structure 500 is formed on the side of the pixel definition layer 600 away from the substrate 100, and a protective layer 400 located in the non-display area NA is formed on the line layer 300, wherein the protective layer 400 and at least a portion of the film layers in the isolation structure 500 are disposed in the same layer and are made of the same material.

[0127] Specifically, in this embodiment, at least one film layer in the protective layer 400 and the isolation structure 500 is prepared using the same process and in the same layer. This application does not make specific restrictions on which layer or all layers of the protective layer 400 are used. In addition, the material of the isolation structure 500 can be referred to the above embodiments, and will not be repeated here.

[0128] In one embodiment, referring to Figures 17 to 19, before step S200, the method further includes:

[0129] S101: A first electrode layer 701 located in the display area AA is formed on the array layer 200, and a protective layer 400 located in the non-display area NA is formed on the line layer 300 at the same time, wherein the protective layer 400 is disposed in the same layer as at least a portion of the film layer of the first electrode layer 701 and is made of the same material.

[0130] Specifically, in Figure 18, at least a portion of the protective layer 400 and the first electrode layer 701 are prepared simultaneously using the same material to obtain the protective layer 400 located in the non-display area NA and the first electrode layer 701 located in the display area AA. This helps to reduce preparation costs and improve production efficiency.

[0131] S102: Pattern the first electrode layer 701 to obtain the first electrode 710 subsequently exposed in the pixel opening T.

[0132] Specifically, in Figure 19, a portion of the first electrode layer 701 is removed by a patterning process, such as photolithography, to obtain an independent first electrode 710.

[0133] In one embodiment, referring to Figures 20 to 22, before step S200 described above, the method further includes:

[0134] S111: A connection trace layer 800 located in the display area AA is formed on the array layer 200, and a protective layer 400 located in the non-display area NA is formed on the line layer 300.

[0135] Specifically, in Figure 21, the same material is used to simultaneously fabricate the connection trace layer 800 and the protective layer 400. The connection trace layer 800 is also electrically connected to the driving circuit through vias. For example, the selected material can be indium zinc oxide, which is a transparent material that can increase the transmittance in the display area AA. Of course, other conductive materials can also be used, as long as electrical connection can be achieved in the display area AA and protection can be achieved in the non-display area NA. Simultaneously fabricating the connection trace layer 800 and the protective layer 400 helps to reduce the fabrication cost.

[0136] S112: Pattern the connection trace layer 800 to obtain the connection trace 810, wherein the connection trace 810 is electrically connected to the first electrode 710 subsequently formed in the pixel opening T.

[0137] Specifically, in Figure 22, a portion of the connection layer 800 is removed using a patterning process, such as photolithography, to obtain the connection line 810. Referring to Figure 7, in the subsequent fabrication process, the connection line 810 will correspond to the pixel opening T position. The first electrode 710 forms the side surface of the connection line 810 facing away from the substrate 100 and is electrically connected to the connection line 810.

[0138] In one embodiment, referring to Figures 23 to 25, the display area AA includes a light-transmitting area TA and a main screen area MA located around the light-transmitting area TA; after step S200, the method further includes:

[0139] S211: A connection layer 900 located in the light-transmitting area TA is formed on the pixel definition layer 600, and a protective layer 400 located in the non-display area NA is formed on the line layer 300, and the connection layer 900 is patterned.

[0140] Specifically, in Figure 24, the connecting layer 900 and the protective layer 400 are prepared simultaneously using the same material. The simultaneous preparation of the two film layers helps to reduce the preparation cost. At the same time, a portion of the connecting layer 900 is removed through a patterning process, such as photolithography.

[0141] S212: An isolation structure 500 located in the display area AA is formed on the pixel definition layer 600, wherein the isolation structure 500 is provided with an isolation opening K and a light-transmitting opening H located in the light-transmitting area TA at intervals, wherein the connecting layer 900 is exposed from the light-transmitting opening H.

[0142] Specifically, in Figure 25, the isolation opening K is used to further form pixel openings therein to set up light-emitting elements, while the light-transmitting opening H is only used for light transmission and will not set up light-emitting elements. The material of the connecting layer 900 includes a transparent material. At the same time, the connecting layer 900 is electrically connected to the isolation structure 500 to reduce the voltage drop of signal transmission in the isolation structure 500, and can also shield the mutual influence of signals in the conductive layers on both sides (the side closer to the substrate 100 and the side farther from the substrate 100).

[0143] It should be noted that the examples of materials cited in the above embodiments of this application are not limited to these. The same technical effect can be achieved by substitution, and it is also within the protection scope of this application.

[0144] The above description is merely an embodiment of this application and does not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.

Claims

1. A substrate, characterized in that, The substrate includes a display area and a non-display area disposed around the display area. The substrate further includes: a substrate; an array layer located on one side of the substrate and located in the display area; a circuit layer located on one side of the substrate and located in the non-display area, wherein at least a portion of the film layers in the circuit layer are disposed in the same layer as at least a portion of the film layers in the array layer; and a protective layer disposed on the side of the circuit layer opposite to the substrate and located in the non-display area.

2. The substrate according to claim 1, characterized in that, The protective layer is made of a conductive material; preferably, the protective layer is disposed in the same layer as at least a portion of the film layer located in the display area and is made of the same material.

3. The substrate according to claim 1, characterized in that, The substrate further includes: a pixel definition layer located on the side of the array layer facing away from the substrate, the pixel definition layer being located in the display area, and the pixel definition layer having a pixel opening; an isolation structure located on the side of the pixel definition layer facing away from the substrate, the isolation structure being located in the display area, the isolation structure having an isolation opening, the isolation opening at least partially overlapping the orthographic projection of the pixel opening on the substrate; a first electrode at least partially formed in the pixel opening; preferably, in the display area, a film layer disposed in the same layer as the protective layer is located between the array layer and the encapsulation layer, wherein the encapsulation layer is located on the side of the isolation structure and the first electrode facing away from the substrate; preferably, the material of the isolation structure includes The isolation structure comprises at least one of molybdenum, aluminum, and titanium; preferably, the isolation structure comprises a first isolation layer and a second isolation layer stacked thereon, the first isolation layer being located between the second isolation layer and the pixel definition layer, and the orthographic projection of the first isolation layer on the substrate being located within the orthographic projection of the second isolation layer on the substrate; preferably, the isolation structure further comprises a third isolation layer, the third isolation layer being located between the first isolation layer and the pixel definition layer, and the orthographic projection of the third isolation layer on the substrate being located within the orthographic projection of the second isolation layer on the substrate; preferably, the material of the first isolation layer comprises molybdenum; preferably, the material of the second isolation layer comprises aluminum; preferably, the material of the third isolation layer comprises titanium.

4. The substrate according to claim 3, characterized in that, The protective layer is disposed in the same layer as at least a portion of the membrane layer in the isolation structure and is made of the same material.

5. The substrate according to claim 3, characterized in that, The protective layer is disposed in the same layer as at least a portion of the film layer in the first electrode and is made of the same material; preferably, the first electrode includes an anode; preferably, the material of the protective layer includes at least one of indium tin oxide and silver.

6. The substrate according to claim 3, characterized in that, The substrate further includes connection traces located in the display area. The connection traces are located between the array layer and the pixel definition layer and electrically connect the first electrode to the array layer. The protective layer is disposed in the same layer as the connection traces and is made of the same material. Preferably, the orthographic projection of the connection traces on the substrate covers the orthographic projection of the first electrode on the substrate. The orthographic projection of the portion of the connection traces electrically connected to the array layer on the substrate does not coincide with the orthographic projection of the first electrode on the substrate. Preferably, the material of the protective layer includes a transparent material. Preferably, the material of the protective layer includes indium zinc oxide.

7. The substrate according to claim 3, characterized in that, The display area includes a light-transmitting area and a main screen area disposed around the light-transmitting area. The isolation structures within the light-transmitting area are spaced apart, with the space between the isolation structures forming a light-transmitting opening. The substrate further includes a connecting layer, at least partially located within the light-transmitting opening. The protective layer and the connecting layer are co-layered and made of the same material. Preferably, both the protective layer and the connecting layer are made of a light-transmitting material. Preferably, both the connecting layer and the protective layer are made of indium zinc oxide. Preferably, the connecting layer is electrically connected to the isolation structures. Preferably, multiple isolation structures are electrically connected through the connecting layer.

8. A display panel, characterized in that, The substrate includes any one of claims 1 to 7.

9. A method for manufacturing a display panel, characterized in that, The display panel includes a display area and a non-display area. The method includes: forming an array layer and a circuit layer on one side of a substrate, wherein the array layer is located in the display area, the circuit layer is located in the non-display area, and at least a portion of the film layer in the circuit layer is disposed in the same layer as at least a portion of the film layer in the array layer; forming a pixel definition layer on the side of the array layer away from the substrate, and patterning the pixel definition layer to form a pixel opening; forming a light-emitting element in the pixel opening; and removing a protective layer located in the non-display area, wherein the protective layer located in the non-display area is pre-formed on the side of the circuit layer away from the substrate before forming the light-emitting element.

10. The method according to claim 9, characterized in that, The protective layer is formed after the patterning of the pixel definition layer and before the light-emitting element; preferably, before the patterning of the pixel definition layer and the formation of the pixel opening, the method further includes: forming an isolation structure on the side of the pixel definition layer away from the substrate, the isolation structure having an isolation opening.

11. The method according to claim 9, characterized in that, Before patterning the pixel definition layer to form a pixel opening, the method further includes: forming an isolation structure on the side of the pixel definition layer away from the substrate, and simultaneously forming the protective layer located in the non-display area on the circuit layer, wherein the protective layer and at least a portion of the film layer in the isolation structure are disposed in the same layer and are made of the same material.

12. The method according to claim 9, characterized in that, Before forming a pixel definition layer on the side of the array layer away from the substrate, the method further includes: forming a first electrode layer located in the display area on the array layer, and simultaneously forming a protective layer located in the non-display area on the circuit layer, wherein the protective layer is disposed in the same layer as at least a portion of the film layer of the first electrode layer and is made of the same material; patterning the first electrode layer to obtain a first electrode subsequently exposed in the pixel opening.

13. The method according to claim 9, characterized in that, Before forming a pixel definition layer on the side of the array layer away from the substrate, the method further includes: forming a connection trace layer located in the display area on the array layer, and simultaneously forming the protective layer located in the non-display area on the line layer; patterning the connection trace layer to obtain connection traces, wherein the connection traces are electrically connected to a first electrode subsequently formed in the pixel opening.

14. The method according to claim 9, characterized in that, The display area includes a light-transmitting area and a main screen area located around the light-transmitting area; after the pixel definition layer is patterned to form a pixel opening, the method further includes: forming a connection layer located in the light-transmitting area on the pixel definition layer, and simultaneously forming the protective layer located in the non-display area on the circuit layer, and patterning the connection layer; forming an isolation structure located in the display area on the pixel definition layer, wherein the isolation structure has an isolation opening and a light-transmitting opening spaced apart in the light-transmitting area, wherein the connection layer is exposed from the light-transmitting opening.

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