Data migration method, controller, medium and product
By performing erase and rewrite operations and reread tests on flash memory samples, calculating the bit error rate, and migrating data based on the analysis results, the problem of premature data migration in flash memory was solved, and the read and write performance of the flash memory module was improved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- ARTMEM TECHNOLOGY CO LTD
- Filing Date
- 2025-12-30
- Publication Date
- 2026-05-05
AI Technical Summary
In existing technologies, the bit error rate under the default read voltage is used as the standard for flash memory data migration, which leads to premature data migration, increased write amplification, and reduced read and write performance of the flash memory module.
After erasing and writing multiple sets of flash memory samples, reread tests are performed at preset temperatures and cycles to calculate the bit error rate. Based on the analysis results, data is moved to avoid premature data migration from the flash memory.
It improves the read and write performance of the flash memory module, avoids unnecessary data migration, and extends the lifespan and performance of the flash memory.
Smart Images
Figure CN121983102A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of electronic chip technology, and in particular to a data transfer method, controller, medium, and product. Background Technology
[0002] Among related technologies, NAND Flash is a widely used storage product today, possessing excellent characteristics such as high speed and non-volatility. Internally, it actually represents data in the form of stored electrical charges. Changes in certain internal and external environments can cause changes in the amount of charge, leading to the generation of erroneous bits in the flash memory data.
[0003] In practical flash memory module applications, to ensure flash memory data security, when the bit error rate (BER) in a physical flash memory block rises to a certain level, the data in that physical block is moved to a new physical block to reduce the BER and ensure data security. However, using the BER at the default read voltage as the standard for data relocation can lead to premature data relocation. As the number of flash memory stacking layers increases, even in the early stages of life and when data is retained for a short period, the BER at the default voltage may become too high and the data cannot be corrected. In other words, using the BER at the default read voltage as the standard for data relocation can cause flash memory data to be moved prematurely, increasing write amplification and reducing the read and write performance of the flash memory module. Summary of the Invention
[0004] This application aims to address at least one of the technical problems existing in the prior art. To this end, this application proposes a data migration method, controller, medium, and product, which aims to avoid premature data migration in flash memory and improve the read and write performance of flash memory modules.
[0005] In a first aspect, embodiments of this application provide a data migration method, the method comprising: Obtain multiple sets of flash memory samples; The flash memory samples were erased and written a corresponding number of times to obtain the flash memory samples after the erase and write operations. Multiple sets of flash memory samples are placed at a preset temperature, and multiple sets of reread tests are performed on the multiple sets of flash memory samples at a preset period to calculate the bit error rate corresponding to each set of reread tests. The analysis is performed based on the bit error rate to obtain the analysis results, and the data is moved from the flash memory sample according to the analysis results.
[0006] According to some embodiments of this application, the preset temperature includes a first preset temperature and a second preset temperature, the preset period includes a first preset period and a second preset period, and the step of placing multiple sets of flash memory samples at the preset temperature and performing multiple reread tests on the multiple sets of flash memory samples at the preset period to calculate the bit error rate corresponding to each reread test includes: Multiple sets of the flash memory samples are placed at a first preset temperature, and multiple sets of reread tests are performed on the multiple sets of flash memory samples at a first preset period. After placing multiple sets of flash memory samples at the first preset temperature for a preset time, the first preset temperature is adjusted to the second preset temperature, and multiple reread tests are performed on the multiple sets of flash memory samples under the second preset period.
[0007] According to some embodiments of this application, the step of performing multiple reread tests on multiple sets of the flash memory samples under a first preset period includes: Under the first preset cycle, multiple sets of flash memory samples are read and tested using reread parameter groups with different reference voltages or different read timings.
[0008] According to some embodiments of this application, the step of performing multiple reread tests on multiple sets of the flash memory samples under a second preset period includes: In the second preset cycle, multiple sets of flash memory samples are read and tested using reread parameters with different reference voltages or different read timings.
[0009] According to some embodiments of this application, the step of analyzing the bit error rate to obtain analysis results, and then transferring data from the flash memory sample based on the analysis results, includes: If the bit error rate corresponding to a single reread parameter group or at least two reread parameter groups is lower than a preset bit error rate threshold, data correction is performed based on the single reread parameter group or at least two reread parameter groups to obtain a correction result. Data migration is performed based on the correction results.
[0010] According to some embodiments of this application, the data transfer based on the correction result includes: If a single reread parameter group or at least two reread parameter groups can correct the data, then the single reread parameter group or at least two reread parameter groups shall not be moved. If a single reread parameter group or at least two reread parameter groups cannot correct the data, then the single reread parameter group or at least two reread parameter groups are moved.
[0011] According to some embodiments of this application, after calculating the bit error rate corresponding to each group of reread tests, the method further includes: According to the preset encoding rules, a table is constructed based on the bit error rate to obtain a statistical table, and bit error rate analysis is performed based on the statistical table.
[0012] Secondly, embodiments of this application provide a controller, including: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the data transfer method described in the first aspect when running the computer program.
[0013] Thirdly, embodiments of this application provide a computer-readable storage medium storing computer-executable instructions for performing the data transfer method as described in the first aspect above.
[0014] Fourthly, embodiments of this application provide a computer program product, including a computer program or computer instructions, characterized in that the computer program or computer instructions are stored in a computer-readable storage medium, a processor of a computer device reads the computer program or computer instructions from the computer-readable storage medium, and the processor executes the computer program or computer instructions, causing the computer device to perform the data transfer method as described in the first aspect above.
[0015] The technical solution according to the embodiments of this application has at least the following beneficial effects: This application proposes a data transfer method, controller, medium, and product, applied in the field of electronic chip technology. The method includes: acquiring multiple sets of flash memory samples; performing erase and write operations on the multiple sets of flash memory samples a corresponding number of times to obtain multiple sets of flash memory samples after the erase and write operations; placing the multiple sets of flash memory samples at a preset temperature and performing multiple sets of reread tests on the multiple sets of flash memory samples at a preset period to statistically analyze the bit error rate corresponding to each set of reread tests; analyzing the bit error rate to obtain analysis results, and transferring data from the flash memory samples based on the analysis results. This application analyzes the bit error rate statistically obtained by performing multiple sets of reread tests on multiple sets of flash memory samples, and transfers data from the flash memory samples based on the analysis results, which can avoid premature data transfer from the flash memory and improve the read and write performance of the flash memory module.
[0016] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description
[0017] The accompanying drawings are used to provide a further understanding of the technical solutions of this application and constitute a part of the specification. They are used together with the embodiments of this application to explain the technical solutions of this application and do not constitute a limitation on the technical solutions of this application.
[0018] Figure 1 This is a flowchart of a data transfer method provided in one embodiment of this application; Figure 2 This is a flowchart of a data transfer method provided in another embodiment of this application; Figure 3 This is a flowchart of a data transfer method provided in another embodiment of this application; Figure 4 This is a schematic diagram of a controller for performing a data transfer method according to an embodiment of this application. Detailed Implementation
[0019] The embodiments of this application are described in detail below. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.
[0020] In the description of this application, it should be understood that the orientation descriptions, such as up, down, front, back, left, right, etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.
[0021] In the description of this application, "several" means one or more, "more than" means two or more, "greater than," "less than," and "exceeding" are understood to exclude the stated number, while "above," "below," and "within" are understood to include the stated number. The use of "first" and "second" in the description is merely for distinguishing technical features and should not be construed as indicating or implying relative importance, or implicitly indicating the number of indicated technical features, or implicitly indicating the order of the indicated technical features.
[0022] In the description of this application, unless otherwise expressly defined, terms such as "setup," "installation," and "connection" should be interpreted broadly, and those skilled in the art can reasonably determine the specific meaning of the above terms in this application in conjunction with the specific content of the technical solution.
[0023] In some cases, NAND Flash is a widely used storage product today, possessing excellent characteristics such as high speed and non-volatility. Internally, it actually represents data in the form of stored electrical charges. Changes in certain internal and external environments can cause changes in the amount of charge, leading to the generation of erroneous bits in the flash memory data.
[0024] In practical flash memory module applications, to ensure flash memory data security, when the bit error rate (BER) in a physical flash memory block rises to a certain level, the data in that physical block is moved to a new physical block to reduce the BER and ensure data security. However, using the BER at the default read voltage as the standard for data relocation can lead to premature data relocation. As the number of flash memory stacking layers increases, even in the early stages of life and when data is retained for a short period, the BER at the default voltage may become too high and the data cannot be corrected. In other words, using the BER at the default read voltage as the standard for data relocation can cause flash memory data to be moved prematurely, increasing write amplification and reducing the read and write performance of the flash memory module.
[0025] Based on the above, this application proposes a data migration method, controller, medium, and product, aiming to avoid premature migration of flash memory data and improve the read and write performance of flash memory modules.
[0026] The various embodiments of the data transfer method of this application will be further described below with reference to the accompanying drawings.
[0027] like Figure 1 As shown, Figure 1 This is a flowchart of a data transfer method provided in one embodiment of this application; the data transfer method may include, but is not limited to, steps S110, S120, S130 and S140.
[0028] Step S110: Obtain multiple sets of flash memory samples; Step S120: Perform erase and write operations on multiple sets of flash memory samples a corresponding number of times to obtain multiple sets of flash memory samples after the erase and write operations; Step S130: Place multiple sets of flash memory samples at a preset temperature and perform multiple reread tests on multiple sets of flash memory samples at a preset period to calculate the bit error rate corresponding to each reread test. Step S140: Analyze the bit error rate to obtain the analysis results, and transfer the data of the flash memory sample according to the analysis results.
[0029] In one embodiment, multiple sets of flash memory samples are obtained; each set of flash memory samples undergoes a corresponding number of erase and write operations to obtain multiple sets of flash memory samples after the erase and write operations; the multiple sets of flash memory samples are placed at a preset temperature, and multiple sets of reread tests are performed on the multiple sets of flash memory samples at a preset period to statistically analyze the bit error rate corresponding to each set of reread tests; the bit error rate is analyzed to obtain the analysis results, and data is moved from the flash memory samples according to the analysis results. This application analyzes the bit error rate statistically obtained by performing multiple sets of reread tests on multiple sets of flash memory samples, and moves the flash memory samples according to the analysis results, which can avoid premature data movement and improve the read and write performance of the flash memory module.
[0030] It is understood that the aforementioned multiple sets of flash memory samples could be 11 sets of flash memory samples, which can be set according to actual needs. This application embodiment does not specifically limit it.
[0031] It is understood that the number of erase / write operations mentioned above can be set according to actual needs, and this application embodiment does not impose specific limitations on it.
[0032] For example, select m flash memory samples and divide them into 11 groups. Perform erase and write operations on the 11 groups of samples according to the corresponding number of times. The first group of flash memory samples is erased and written 10 times, the second group is erased and written 300 times, the third group is erased and written 600 times, the fourth group is erased and written 900 times, and so on. The number of erase and write operations on each group of flash memory samples is 300 more than the number of erase and write operations on the previous group of flash memory samples. The 11th group of flash memory samples is erased and written 3000 times.
[0033] It is understood that the embodiments of this application also include: representing according to preset encoding rules, constructing a table based on the bit error rate to obtain a statistical table, and performing bit error rate analysis based on the statistical table.
[0034] Understandably, by statistically analyzing each cell in the table, we can obtain the reread and error rate coverage in that scenario. Based on the reread and error rate coverage, we can determine the appropriate migration conditions, thereby avoiding premature migration of flash memory data and improving the read and write performance of the flash memory module.
[0035] It is understood that the preset temperature includes a first preset temperature and a second preset temperature, and the preset cycle includes a first preset cycle and a second preset cycle.
[0036] In addition, such as Figure 2 As shown, Figure 2 This is a flowchart of a data transfer method provided in another embodiment of this application; regarding the above step S130, it may include, but is not limited to, steps S210 and S220.
[0037] Step S210: Place multiple sets of flash memory samples at a first preset temperature and perform multiple reread tests on the multiple sets of flash memory samples at a first preset period; Step S220: After placing multiple sets of flash memory samples at a first preset temperature for a preset time, adjust the first preset temperature to a second preset temperature, and perform multiple reread tests on the multiple sets of flash memory samples under a second preset period.
[0038] It is understandable that the above step "performing multiple reread tests on multiple sets of flash memory samples under the first preset cycle" includes the following steps: Under the first preset cycle, multiple sets of flash memory samples were read and tested using reread parameter groups with different reference voltages or different read timings.
[0039] It is understandable that the above step "perform multiple reread tests on multiple sets of flash memory samples under the second preset cycle" includes the following steps: In the second preset cycle, multiple sets of flash memory samples were read and tested using reread parameter groups with different reference voltages or different read timings.
[0040] It is understood that the first preset period mentioned above can be 24 hours, that is, multiple sets of reread tests are performed on multiple sets of flash memory samples every 24 hours, or it can be set according to actual needs. This application embodiment does not specifically limit it.
[0041] It is understood that the second preset period mentioned above can be 3 hours, that is, multiple sets of reread tests are performed on multiple sets of flash memory samples every 3 hours, or it can be set according to actual needs. This application embodiment does not specifically limit it.
[0042] It is understood that the aforementioned preset time can be 7 days, or it can be set according to actual needs. This application embodiment does not impose any specific limitations on it.
[0043] It is understood that the first preset temperature mentioned above can be 30 degrees Celsius, or it can be set according to actual needs. This application embodiment does not specifically limit it.
[0044] It is understood that the second preset temperature mentioned above can be 125 degrees Celsius, or it can be set according to actual needs. This application embodiment does not specifically limit it.
[0045] For example, multiple sets of flash memory samples were placed at room temperature (30°C) for 7 days, and the bit error rate was calculated every 24 hours under multiple reread conditions. Then, the multiple sets of flash memory samples were subjected to high-temperature accelerated baking at 125°C, and the bit error rate was calculated every 3 hours under multiple reread conditions.
[0046] In addition, such as Figure 3 As shown, Figure 3 This is a flowchart of a data transfer method provided in another embodiment of this application; regarding the above step S140, it may include, but is not limited to, steps S310 and S320.
[0047] Step S310: When the bit error rate corresponding to a single reread parameter group or at least two reread parameter groups is lower than the preset bit error rate threshold, data correction is performed based on the single reread parameter group or at least two reread parameter groups to obtain the correction result. Step S320: Transfer data based on the correction results.
[0048] It is understood that if data can be corrected by a single reread parameter group or at least two reread parameter groups, then the single reread parameter group or at least two reread parameter groups will not be moved; if data cannot be corrected by a single reread parameter group or at least two reread parameter groups, then the single reread parameter group or at least two reread parameter groups will be moved. Therefore, this application can avoid premature migration of flash memory data and improve the read and write performance of the flash memory module.
[0049] It is understood that the aforementioned preset bit error rate threshold refers to the decoding capability of the flash memory error correction unit, which can be set according to actual needs. This application embodiment does not specifically limit it.
[0050] Based on the data transfer methods of the above embodiments, the following presents an overall embodiment of the data transfer method of this application.
[0051] Taking a certain type of TLC flash memory as an example, assuming the preset bit error rate threshold is k, this application is implemented as follows: (1) Select m flash memory samples and divide them into 11 groups. Then, erase and write the flash memory samples for the corresponding number of times. The first group of samples is erased and written 10 times, the second group is erased and written 300 times, the third group is erased and written 600 times, and so on until the 11th group is erased and written up to 3000 times.
[0052] (2) Placed at room temperature (30°C) for 7 days, the bit error rate was calculated every 24 hours under multiple rereading conditions.
[0053] (3) High temperature accelerated baking, temperature 125°, and the bit error rate is calculated every 3 hours under multiple rereading conditions.
[0054] (4) The reread and bit error rate performance of all scenarios are statistically summarized in Table 1 below. Each cell represents the reread and bit error rate coverage in that scenario. For example, “2|3|7” means that the bit error rate of all test data for reread items 2, 3, and 7 in the corresponding scenario is lower than the preset bit error rate threshold. “3&5” means that the combination of reread group 3 and reread group 5 can guarantee that the bit error rate of all test data in the corresponding scenario is lower than the preset bit error rate threshold. “xxx” means that no reread item or reread item combination can guarantee that the bit error rate of all test data in the scenario is lower than the preset bit error rate threshold.
[0055] (5) Confirm suitable relocation conditions by analyzing rereading and error rate coverage.
[0056] For example, the analysis table shows that within the erase / write cycle (PE) range of 3000, reread group 2 can cover data security within 168 hours (6 days) of data retention. If it is required that the data is not moved in this scenario, reread group 2 can be defined as the relocation trigger condition. That is, if reread group 2 can correct the data, the physical block data will not be moved; if reread group 2 cannot correct the data, the physical block data will be moved.
[0057] Table 1
[0058] It is understood that the aforementioned preset bit error rate threshold refers to the decoding capability of the flash memory error correction unit, which can be set according to actual needs. This application embodiment does not specifically limit it.
[0059] It is understandable that 24h@30° in Table 1 means placing it at a normal temperature of 30° for 24 hours; similarly, 3h@125° means placing it at a high temperature of 125° for 3 hours.
[0060] Based on the data transfer methods described in the above embodiments, the following presents various embodiments of the controller, computer-readable storage medium, and computer program product of this application.
[0061] like Figure 4 As shown, Figure 4 This is a schematic diagram of a controller for performing a data transfer method according to an embodiment of this application. The controller 700 implemented in this application includes: a processor 710, a memory 720, and a computer program stored in the memory 720 and executable on the processor 710, wherein... Figure 4 The example uses a processor 710 and a memory 720.
[0062] The processor 710 and memory 720 can be connected via a bus or other means. Figure 4 Taking the example of a connection between China and Israel via a bus.
[0063] Memory 720, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs and non-transitory computer-executable programs. Furthermore, memory 720 may include high-speed random access memory, and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some embodiments, memory 720 may optionally include remotely located memories 720 relative to processor 710, which can be connected to controller 700 via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof.
[0064] Those skilled in the art will understand that Figure 4 The device structure shown does not constitute a limitation on the controller 700 and may include more or fewer components than shown, or combine certain components, or have different component arrangements.
[0065] exist Figure 4 In the controller 700 shown, the processor 710 can be used to call the control program stored in the memory 720 to implement the data transfer method described above. Specifically, the non-transitory software program and instructions required to implement the data transfer method of the above embodiment are stored in the memory 720, and when executed by the processor 710, the data transfer method of the above embodiment is executed.
[0066] It is worth noting that since the controller 700 of this application embodiment can execute the data transfer method of any of the above embodiments, the specific implementation method and technical effect of the controller 700 of this application embodiment can refer to the specific implementation method and technical effect of the data transfer method of any of the above embodiments.
[0067] Furthermore, one embodiment of this application provides a computer-readable storage medium storing computer-executable instructions for performing the data transfer method described above. Exemplarily, the above-described method is executed... Figures 1 to 3 The methods and steps in the text.
[0068] It is worth noting that, since the computer-readable storage medium of this application embodiment can execute the data transfer method of any of the above embodiments, the specific implementation and technical effects of the computer-readable storage medium of this application embodiment can be referred to the specific implementation and technical effects of the data transfer method of any of the above embodiments.
[0069] Furthermore, one embodiment of this application also provides a computer program product, including a computer program or computer instructions, which are stored in a computer-readable storage medium. A processor of a computer device reads the computer program or computer instructions from the computer-readable storage medium and executes the computer program or computer instructions, causing the computer device to perform the data transfer method described above. Exemplarily, the above-described method is performed... Figures 1 to 3 The methods and steps in the text.
[0070] It is worth noting that, since the computer program product of this application embodiment can execute the data transfer method of any of the above embodiments, the specific implementation method and technical effect of the computer program product of this application embodiment can refer to the specific implementation method and technical effect of the data transfer method of any of the above embodiments.
[0071] It will be understood by those skilled in the art that all or some of the steps and systems in the methods disclosed above can be implemented as software, firmware, hardware, and suitable combinations thereof. Some or all of the physical components can be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit. Such software can be distributed on a computer-readable medium, which can include computer storage media (or non-transitory media) and communication media (or transient media). As is known to those skilled in the art, the term computer storage media includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technologies, CD-ROM, digital versatile disc (DVD) or other optical disc storage, magnetic cartridges, magnetic tape, disk storage or other magnetic storage devices, or any other medium that can be used to store desired information and is accessible to a computer. Furthermore, as is known to those skilled in the art, communication media typically include computer-readable instructions, data structures, program modules, or other data in modulated data signals such as carrier waves or other transmission mechanisms, and may include any information delivery medium.
[0072] It should be understood that in this application, "at least one (item)" means one or more, and "more than" means two or more. "And / or" is used to describe the relationship between related objects, indicating that three relationships can exist. For example, "A and / or B" can represent three cases: only A exists, only B exists, and both A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.
[0073] In the several embodiments provided in this application, it should be understood that the disclosed systems, instruments, and methods can be implemented in other ways. For example, the instrument embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the shown or discussed mutual couplings, direct couplings, or communication connections may be through some interfaces; indirect couplings or communication connections between instruments or units may be electrical, mechanical, or other forms. Units described as separate components may or may not be physically separate, and components shown as units may or may not be physical units, i.e., they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.
[0074] It should also be understood that the various implementation methods provided in this application can be combined arbitrarily to achieve different technical effects.
[0075] The above provides a detailed description of the preferred embodiments of this application. However, this application is not limited to the above-described embodiments. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of this application. All such equivalent modifications or substitutions are included within the scope defined by the claims of this application.
Claims
1. A data migration method, characterized in that, The method includes: Obtain multiple sets of flash memory samples; The flash memory samples were erased and written a corresponding number of times to obtain the flash memory samples after the erase and write operations. Multiple sets of flash memory samples are placed at a preset temperature, and multiple sets of reread tests are performed on the multiple sets of flash memory samples at a preset period to calculate the bit error rate corresponding to each set of reread tests. The analysis is performed based on the bit error rate to obtain the analysis results, and the data is moved from the flash memory sample according to the analysis results.
2. The method according to claim 1, characterized in that, The preset temperature includes a first preset temperature and a second preset temperature, and the preset period includes a first preset period and a second preset period. The step of placing multiple sets of flash memory samples at the preset temperature and performing multiple reread tests on the multiple sets of flash memory samples within the preset period to calculate the bit error rate corresponding to each reread test includes: Multiple sets of the flash memory samples are placed at a first preset temperature, and multiple sets of reread tests are performed on the multiple sets of flash memory samples at a first preset period. After placing multiple sets of flash memory samples at the first preset temperature for a preset time, the first preset temperature is adjusted to the second preset temperature, and multiple reread tests are performed on the multiple sets of flash memory samples under the second preset period.
3. The method according to claim 2, characterized in that, The step of performing multiple reread tests on multiple sets of the flash memory samples under a first preset period includes: Under the first preset cycle, multiple sets of flash memory samples are read and tested using reread parameter groups with different reference voltages or different read timings.
4. The method according to claim 3, characterized in that, The step of performing multiple reread tests on multiple sets of the flash memory samples under the second preset period includes: In the second preset cycle, multiple sets of flash memory samples are read and tested using reread parameters with different reference voltages or different read timings.
5. The method according to claim 4, characterized in that, The step of analyzing the bit error rate to obtain analysis results, and then transferring data from the flash memory sample based on the analysis results, includes: If the bit error rate corresponding to a single reread parameter group or at least two reread parameter groups is lower than a preset bit error rate threshold, data correction is performed based on the single reread parameter group or at least two reread parameter groups to obtain a correction result. Data migration is performed based on the correction results.
6. The method according to claim 5, characterized in that, The data migration based on the correction result includes: If a single reread parameter group or at least two reread parameter groups can correct the data, then the single reread parameter group or at least two reread parameter groups shall not be moved. If a single reread parameter group or at least two reread parameter groups cannot correct the data, then the single reread parameter group or at least two reread parameter groups are moved.
7. The method according to claim 1, characterized in that, After calculating the bit error rate for each group of reread tests, the following is also included: According to the preset encoding rules, a table is constructed based on the bit error rate to obtain a statistical table, and bit error rate analysis is performed based on the statistical table.
8. A controller, characterized in that, include: A memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor, when executing the computer program, performs the data transfer method as described in any one of claims 1 to 7.
9. A computer-readable storage medium, characterized in that: The device stores computer-executable instructions for performing the data transfer method as described in any one of claims 1 to 7.
10. A computer program product, comprising a computer program or computer instructions, characterized in that, The computer program or the computer instructions are stored in a computer-readable storage medium, the processor of the computer device reads the computer program or the computer instructions from the computer-readable storage medium, and the processor executes the computer program or the computer instructions, causing the computer device to perform the data transfer method as described in any one of claims 1 to 7.