Optical modulator, method of manufacturing the same, and device including the same

Abstract

Disclosed are an optical modulator, a method of manufacturing the optical modulator, and an electronic device including the optical modulator. An optical modulator according to an embodiment includes: a first semiconductor layer; a second semiconductor layer disposed on the first semiconductor layer in the form of a microdisk and including a highly doped region having a relatively high doping concentration and a lowly doped region having a relatively low doping concentration; a first optical waveguide disposed adjacent to the second semiconductor layer; and a first electrode layer and a second electrode layer disposed spaced apart from each other on the highly doped region, in which the second semiconductor layer includes at least one recess, and the second semiconductor layer has at least one step due to the at least one recess, and the highly doped region, the lightly doped region, and the recess are concentric.

Description

Cross-references to related applications

[0001] This application is based on and claims priority to Korean Patent Application No. 10-2024-0155686 filed with the Korean Intellectual Property Office on November 5, 2024, and Korean Patent Application No. 10-2025-0085378 filed with the Korean Intellectual Property Office on June 26, 2025, the entire disclosure of which is incorporated herein by reference. Technical Field

[0002] Embodiments of this disclosure relate to optical devices, and more specifically, to optical modulators of photonic integrated circuits (PICs), methods of manufacturing optical modulators, and apparatus including optical modulators. Background Technology

[0003] In silicon (Si)-based PICs, Mach-Zehnder interferometers (MZI) and microring modulators (MRM) are mainly used as optical modulators.

[0004] For broadband information transmission, technologies are being applied to improve the modulation speed of optical modulators and to process signals in parallel, as well as wavelength division multiplexing (WDM) technology, which allows multiple wavelength signals to be transmitted simultaneously through a single waveguide.

[0005] Since MRM modulates only light whose wavelength matches the resonant wavelength of the microring, WDM optical paths can be constructed relatively simply, and MRM is widely used because it can be modulated at high speed.

[0006] To extend the WDM bandwidth, the diameter of the microring should be gradually reduced, but in this process, the curvature of the microring increases, which may lead to optical loss. Therefore, methods have been introduced to configure resonators in the form of microdisks (as an alternative to microrings), but these methods may involve elements that limit the optical modulation speed. Summary of the Invention

[0007] One or more embodiments provide an optical modulator capable of increasing the speed of optical modulation.

[0008] One or more embodiments also provide an optical modulator capable of mode filtering.

[0009] One or more embodiments also provide a method for manufacturing an optical modulator.

[0010] One or more embodiments also provide an apparatus including an optical modulator.

[0011] Additional aspects will be set forth in part in the description which follows, and will become apparent in part from the description, or may be learned by practicing the embodiments presented in this disclosure.

[0012] According to one or more embodiments, an optical modulator includes: a first semiconductor layer; a second semiconductor layer disposed on the first semiconductor layer in the form of a microdisk, and including a highly doped region having a relatively high doping concentration and a lightly doped region having a relatively low doping concentration; a first optical waveguide disposed adjacent to the second semiconductor layer; and a first electrode layer and a second electrode layer disposed spaced apart from each other on the highly doped region, wherein the second semiconductor layer includes at least one recess. The second semiconductor layer may have at least one step difference due to the at least one recess, and the highly doped region, the lightly doped region, and the recess may be concentric.

[0013] In one example, the second semiconductor layer may include a first recess, the bottom surface of which may include the upper surface of a highly doped region and the upper surface of a low-doped region, the side surface of which may include the inner surface of the low-doped region, and a first step difference may exist in the low-doped region due to the first recess. In one example, the highly doped region may include an N-type doped region doped with N-type dopant and a P-type doped region doped with P-type dopant, and the low-doped region may include an N-type doped region doped with N-type dopant and a P-type doped region doped with P-type dopant. The bottom surface of the first recess may include the upper surface of the N-type doped region of the highly doped region, the upper surface of the P-type doped region of the highly doped region, and the first upper surface of the P-type doped region of the low-doped region. The side surface of the first recess may include the inner surface of the P-type doped region of the low-doped region, and the first step difference may correspond to the height difference between the first upper surface of the P-type doped region of the low-doped region and a second upper surface that is higher than the first upper surface. In one example, the highly doped region may include an N-type doped region doped with an N-type dopant and a P-type doped region doped with a P-type dopant, and the low-doped region may include an N-type doped region doped with an N-type dopant and a P-type doped region doped with a P-type dopant. The bottom surface of the first recess may include the upper surfaces of the N-type doped region and the P-type doped region of the highly doped region, as well as the first upper surface of the P-type doped region of the low-doped region. The side surface of the first recess may include the inner surfaces of the P-type doped region and the N-type doped region of the low-doped region. The first step difference may correspond to the height difference between the first upper surface of the P-type doped region and the upper surface of the N-type doped region of the low-doped region. The N-type doped region of the low-doped region may be located between the P-type doped region and the first semiconductor layer, and may be in the form of completely surrounding the P-type doped region of the low-doped region around the first recess. The outer surface of the N-type doped region of the low-doped region may be the side surface of the second semiconductor layer.

[0014] In one example, the P-type doped region and the N-type doped region in the highly doped region can be concentric, and there can be a step difference between the center and the edge of the N-type doped region in the highly doped region. The thickness of the edge of the N-type doped region in the highly doped region can be less than the thickness of the center. The P-type doped region in the highly doped region can overlap with the edge of the N-type doped region in the highly doped region, and the upper surface of the P-type doped region in the highly doped region and the upper surface of the N-type doped region in the highly doped region can be the same plane.

[0015] In one example, the second semiconductor layer may include a second recess disposed inside the first recess and concentric with the first recess. The side and bottom surfaces of the second recess may include the surfaces of highly doped regions. Due to the second recess, a second step difference may exist within the first recess. The first step difference and the second step difference may be spaced apart from each other in a horizontal direction parallel to the upper surface of the first semiconductor layer, and the first step difference and the second step difference may have different heights.

[0016] In one example, the highly doped region may include an N-type doped region doped with an N-type dopant and a P-type doped region doped with a P-type dopant. The N-type doped region and the P-type doped region may be concentric. The bottom surface of the second recess may include the upper surface of the N-type doped region, the side surface of the second recess may include the side surface of the P-type doped region, and the second step difference may correspond to the height difference between the upper surface of the N-type doped region and the upper surface of the P-type doped region in the highly doped region.

[0017] In one example, the highly doped region may include an N-type doped region doped with N-type dopant and a P-type doped region doped with P-type dopant. The N-type and P-type doped regions may be concentric and spaced apart from each other in a direction perpendicular to the upper surface of the first semiconductor layer. The bottom surface of the second recess may include the upper surface of the N-type doped region, and the side surfaces of the second recess may include the side surfaces of the P-type doped regions. The second step difference may correspond to the height difference between the upper surfaces of the N-type doped region and the upper surfaces of the P-type doped region in the highly doped region. A portion of the low-doped region may exist between N-type doped regions and P-type doped regions that are spaced apart from each other. The side surface of the second recess may include the side surface of a portion of the low-doped region and the side surface of the P-type doped region. The low-doped region may include an N-type doped region doped with an N-type dopant and a P-type doped region doped with a P-type dopant. The N-type doped region and the P-type doped region of the low-doped region may be concentric. The bottom surface of the first recess may include the upper surface of the P-type doped region of the low-doped region, and the inner surface of the first recess may include the side surface of the P-type doped region of the low-doped region.

[0018] In one example, the second semiconductor layer may include a first recess, the bottom surface of which may include the upper surface of a lightly doped region, and the side surfaces of which may include the inner surface of a lightly doped region. Due to the first recess, a first step difference may exist within the lightly doped region. In another example, the second semiconductor layer may include a second recess disposed within and concentric with the first recess. The bottom surface of the second recess may include the surface of a heavily doped region, and the side surfaces of the second recess may include the inner surface of a lightly doped region. Due to the second recess, a second step difference may exist within the first recess. The first and second step differences may be spaced apart from each other in a horizontal direction parallel to the upper surface of the first semiconductor layer, and the first and second step differences may have different heights. In one example, the highly doped region may include an N-type doped region doped with an N-type dopant and a P-type doped region doped with a P-type dopant. The N-type and P-type doped regions may be concentric and may be spaced apart from each other in a direction perpendicular to the upper surface of the first semiconductor layer. The bottom surface of the second recess may include the upper surface of the N-type doped region, and the P-type doped region may be on the bottom surface of the first recess. The inner surface of the P-type doped region and the side surface of the second recess form the same side surface. The second step difference may correspond to the height difference between the upper surface of the N-type doped region in the highly doped region and the bottom surface of the first recess. The low-doped region may include an N-type doped region doped with an N-type dopant and a P-type doped region doped with a P-type dopant. The N-type and P-type doped regions in the low-doped region may be concentric. The bottom surface of the first recess may include the upper surface of the P-type doped region in the low-doped region, and the inner surface of the first recess may include the side surface of the P-type doped region in the low-doped region.

[0019] In one example, the second semiconductor layer may include a first recess, the side and bottom surfaces of which may include the surfaces of a highly doped region, and a first step difference may exist in the highly doped region due to the first recess. In one example, the highly doped region may include an N-type doped region doped with an N-type dopant and a P-type doped region doped with a P-type dopant, the bottom surface of the first recess may include the upper surface of the N-type doped region, the side surfaces of the first recess may include the side surfaces of the P-type doped region, the N-type and P-type doped regions may be configured to overlap each other around the first recess, and a low-doped region may be configured to completely surround the highly doped region in a planar view, the low-doped region may include an N-type doped region doped with an N-type dopant and a P-type doped region doped with a P-type dopant, and the N-type and P-type doped regions of the low-doped region may be sequentially arranged in a direction perpendicular to the upper surface of the first semiconductor layer.

[0020] In one example, the second semiconductor layer may include a first recess, the bottom surface of which may include the upper surface of a first doped region with high doping, the side surfaces of which may include the side surfaces of a low doped region and a second doped region with high doping, the first doped region and the second doped region may be spaced apart from each other, the first doped region, the second doped region and the first recess may be concentric, due to the first recess, there may be a step difference between the upper surfaces of the first doped region and the second doped region, the first doped region and the second doped region may include dopants of opposite types and may be spaced apart from each other in a direction perpendicular to the upper surface of the first semiconductor layer, the outer diameter of the first doped region and the inner diameter of the second doped region may be equal to each other, and the upper surface of the second doped region and the upper surface of the low doped region may form the same surface.

[0021] In one example, the optical modulator may further include a second optical waveguide spaced apart from the second semiconductor layer, wherein the second semiconductor layer may be disposed between the first and second optical waveguides.

[0022] According to one or more embodiments, a method of manufacturing an optical modulator is provided, the method comprising: forming a second semiconductor layer in the form of a microdisk on a first semiconductor layer; forming a first doped region in a region of the second semiconductor layer; and forming a second doped region in the second semiconductor layer around the first doped region, concentric with and surrounding the first doped region in a planar view. Next, a first step difference is formed in one of the first and second doped regions, and then an electrode layer is formed on the first doped region, the first doped region having a higher doping concentration than the second doped region.

[0023] In one example, the first step difference can be formed in the first doped region.

[0024] In one example, the manufacturing method may further include forming a second step difference in the second doped region. In one example, forming the second doped region may further include: forming a first doped layer; forming a second doped layer on the first doped layer to include the second step difference; and forming a third doped layer that covers the exterior of the second step difference of the second doped layer and contacts the first doped layer, wherein the first doped layer and the third doped layer may include the same type of dopant.

[0025] According to one or more embodiments, an electronic device includes: an optical source; an optical waveguide through which light emitted from the source is transmitted; a semiconductor layer disposed adjacent to the optical waveguide, disposed in the form of a microdisk, and including a plurality of doped regions; and an amplifier configured to amplify the light transmitted through the optical waveguide. The semiconductor layer may include a first doped region and a second doped region included in the plurality of doped regions at the center of the semiconductor layer. The remaining doped regions, other than the first and second doped regions, may be arranged around the first and second doped regions. The first and second doped regions may be regions doped with dopants of opposite types. The doping concentration of the first and second doped regions may be higher than the doping concentration of the remaining doped regions. The semiconductor layer may include at least one step difference. Attached Figure Description

[0026] The above and other aspects, features, and advantages of some embodiments of this disclosure will become clearer from the following description taken in conjunction with the accompanying drawings, in which:

[0027] Figure 1 This is a plan view of a first optical modulator according to one or more embodiments;

[0028] Figure 2 It is along Figure 1 A cross-sectional view taken from line 2-2';

[0029] Figure 3 It is along Figure 1 A cross-sectional view taken from line 3-3';

[0030] Figure 4 This is a cross-sectional view of a second optical modulator according to one or more embodiments;

[0031] Figure 5 This is a plan view of a third optical modulator according to one or more embodiments;

[0032] Figure 6 It is along Figure 5 A cross-sectional view taken from line 6-6';

[0033] Figure 7 It is along Figure 5 A cross-sectional view taken from line 7-7';

[0034] Figure 8 and Figure 9 It shows Figure 5 A modified cross-sectional view of the third optical modulator shown;

[0035] Figure 10 This shows a cross-sectional view of a fourth optical modulator according to one or more embodiments;

[0036] Figure 11 This is a plan view of a fifth optical modulator according to one or more embodiments;

[0037] Figure 12 It is along Figure 11 A cross-sectional view taken from line 12-12';

[0038] Figure 13 It is along Figure 11 A cross-sectional view taken from line 13-13';

[0039] Figure 14 This shows a cross-sectional view of a sixth optical modulator according to one or more embodiments;

[0040] Figure 15 This shows a cross-sectional view of a seventh optical modulator according to one or more embodiments;

[0041] Figure 16 This shows a cross-sectional view of an eighth optical modulator according to one or more embodiments;

[0042] Figure 17 It shows Figures 1 to 16 The diagram shows a plan view of an example optical modulator that includes multiple optical waveguides.

[0043] Figure 18 , Figure 19 , Figure 20 , Figure 21 , Figure 22 , Figure 23 , Figure 24 , Figure 25 and Figure 26 This is a cross-sectional view illustrating a method for manufacturing a third optical modulator according to one or more embodiments;

[0044] Figure 27 , Figure 28 , Figure 29 , Figure 30 , Figure 31 , Figure 32 , Figure 33 , Figure 34 , Figure 35 , Figure 36 and Figure 37 This is a cross-sectional view illustrating a method for manufacturing a fifth optical modulator according to one or more embodiments;

[0045] Figure 38 , Figure 39 , Figure 40 , Figure 41A , Figure 41B , Figure 42 , Figure 43 , Figure 44 , Figure 45 , Figure 46 , Figure 47 , Figure 48 , Figure 49 , Figure 50 , Figure 51 and Figure 52 This is a cross-sectional view illustrating a method of manufacturing an eighth optical modulator according to one or more embodiments;

[0046] Figure 53 This is a cross-sectional view illustrating the operation of a manufacturing process for a seventh optical modulator according to one or more embodiments;

[0047] Figure 54 , Figure 55 , Figure 56 , Figure 57 , Figure 58 , Figure 59 , Figure 60 , Figure 61 , Figure 62 , Figure 63 and Figure 64 This is a cross-sectional view illustrating a method of manufacturing a first optical modulator according to one or more embodiments;

[0048] Figure 65 Cross-sectional views of the first and second models used in the simulation are shown. This simulation was performed to confirm the difference (effect) between the case where a step difference exists in the highly doped region of the optical modulator and the case where no step difference exists; and

[0049] Figure 66 This is a schematic block diagram of an electronic device according to one or more embodiments. Detailed Implementation

[0050] Referring now to the embodiments, examples of which are illustrated in the accompanying drawings, wherein similar reference numerals throughout the drawings denote similar elements. In this respect, the present embodiments may take different forms and should not be construed as limited to the description set forth herein. Therefore, the embodiments are described below only with reference to the accompanying drawings to explain various aspects. The term “and / or” as used herein includes any and all combinations of one or more of the associated listed items. Expressions such as “at least one of…” modify the entire list of elements when following a list of elements, rather than modifying individual elements in the list. For example, the expression “at least one of a, b, and c” should be understood to include only a, only b, only c, both a and b, both a and c, both b and c, or all of a, b, and c.

[0051] In the following description, an optical modulator according to one or more embodiments, a method of manufacturing an optical modulator, and an apparatus including an optical modulator will be described in detail with reference to the accompanying drawings. In this process, the dimensions of each component in the drawings may be enlarged for clarity and ease of explanation.

[0052] One or more embodiments described herein are for illustrative purposes only, and various modifications may be made therein. In the layer structures described below, when an element or layer is referred to as "on" or "above" another element or layer, the element or layer may be directly on the other element or layer, or on an intermediate element or layer. In the following description, similar reference numerals refer to similar components.

[0053] Unless the context clearly indicates otherwise, the singular form includes the plural form. When a component in this specification "comprises" or "contains" an element, unless otherwise defined, that component does not exclude other elements, and that component may also include other elements.

[0054] The term "above" and similar directional terms can be applied to both the singular and plural. Operations constituting a method can be performed in any suitable order unless the order is clearly described or unless the context explicitly indicates otherwise. Operations do not necessarily have to be performed in order.

[0055] Additionally, in this specification, the terms "unit" or "module" refer to a unit or module that performs at least one function or operation, and can be implemented by hardware, software, or a combination of hardware and software.

[0056] The wire connections and connecting members between the constituent elements depicted in the accompanying drawings are examples of functional connections and / or physical or circuit connections, and therefore, in actual devices, they can be represented as alternative or additional functional connections, physical connections, or circuit connections.

[0057] All examples or example terms are used only to illustrate the technical scope of this disclosure in detail, and therefore the scope of this disclosure is not limited by the examples or example terms, unless they are defined by the claims.

[0058] Figure 1 This is a plan view showing a first optical modulator 20 according to one or more embodiments. Figure 2 It is along Figure 1 The cross-sectional view taken from line 2-2'. Figure 3 It is along Figure 1 The cross-sectional view taken from line 3-3'.

[0059] Let's refer to each other. Figures 1 to 3The optical waveguide 10 and the first optical modulator 20 are disposed on the insulating layer 14. In one example, the first optical modulator 20 and the optical waveguide 10 can be collectively referred to as an optical modulator. Other components may also be disposed on the insulating layer 14. In one example, the insulating layer 14 may include an oxide insulating layer. In one example, the insulating layer 14 may include silicon oxide, but is not limited thereto. The optical waveguide 10 and the first optical modulator 20 may be spaced apart from each other by a first gap G1, such as... Figure 3 As shown. In Figure 1 In the diagram, the optical waveguide 10 is shown as a straight line next to the first optical modulator 20, but the optical waveguide 10 may also include a curved portion. For example, the portion of the optical waveguide 10 near the first optical modulator 20 may be a curved portion having the same or substantially the same curvature as the edge of the first optical modulator 20. This curved portion and the first optical modulator 20 may be spaced apart by a first gap G1.

[0060] In one example, the first gap G1 may have a gap range within which light propagating through the optical waveguide 10 can be transmitted to the first optical modulator 20. In one example, a portion of the light propagating through the optical waveguide 10 at the first gap G1 may be concentrated on a predetermined region of the first optical modulator 20 in the form of an echo corridor mode. In one example, the first gap G1 may be in the range of about 50 nm to about 300 nm, but is not limited thereto. Some light may include light of the fundamental mode (TE0) and / or the first-order mode (TE1), and may also include light of higher-order modes. The predetermined region of the first optical modulator 20 may be the outermost region, boundary region, or edge region of the first optical modulator 20, and includes a PN junction region. Depending on the width or cross-sectional layer structure of the predetermined region, only light of the fundamental mode may be transmitted to the predetermined region of the first optical modulator 20, or light of the fundamental mode and the first-order mode may be transmitted, or even light of higher-order modes may be transmitted. Therefore, depending on the width and layer structure design of the predetermined region of the first optical modulator 20, the mode of light transmitted from the optical waveguide 10 to the first optical modulator 20 may be filtered.

[0061] In one example, optical waveguide 10 may be an optical waveguide configured to transmit light in the infrared band, but is not limited to light in the infrared band. In one example, multiple lights of different wavelengths may be transmitted through optical waveguide 10 simultaneously or with a time difference. Multiple lights may be included in the infrared band. In one example, optical waveguide 10 may be a waveguide comprising a material with a lower infrared absorption rate than visible light, such as a silicon-based optical waveguide, but is not limited thereto. In one example, optical waveguide 10 may be a silicon layer or may include a silicon layer. In one example, the silicon layer may include a single-crystal silicon layer, but is not limited thereto. In one example, optical waveguide 10 may include a III-V compound semiconductor with low infrared absorption rate or no infrared light absorption. For example, optical waveguide 10 may include silicon nitride (SiN).

[0062] The width of the optical waveguide 10 in the direction of optical transmission can be constant or substantially constant. In one example, in the first optical modulator 20, the material (substance) of the region where optical modulation occurs, except for the first electrode layer 16 and the second electrode layer 18, can be the same as, but not the same as, the optical waveguide 10.

[0063] The optical waveguide 10 and the first optical modulator 20 may be covered with an upper insulating layer having a refractive index different from that of silicon. In one example, the upper insulating layer may be a material layer with a refractive index lower than that of silicon. Due to the upper insulating layer, total internal reflection of light transmitted through the optical waveguide 10 can be maintained, and total internal reflection of light transmitted through the first optical modulator 20 can also be maintained. In one example, the upper insulating layer may include a gas (e.g., air) or a solid material layer (e.g., a silicon oxide layer), and is not limited to the illustrated materials.

[0064] The first optical modulator 20 includes a first semiconductor layer 22 and an insulating layer 14 stacked in sequence, and a second semiconductor layer 12 disposed on the insulating layer 14. In one example, the first semiconductor layer 22 may include a silicon layer, but is not limited thereto. The first semiconductor layer 22 and the insulating layer 14 stacked in sequence may be a silicon-on-insulator (SOI) substrate. The second semiconductor layer 12 may be disposed on the surface (e.g., the upper surface) of the insulating layer 14. The insulating layer 14 may be disposed between the first semiconductor layer 22 and the second semiconductor layer 12. The first semiconductor layer 22 and the second semiconductor layer 12 are spaced apart from each other and do not contact each other. In one example, the first semiconductor layer 22 and the second semiconductor layer 12 may include the same semiconductor material, but may also include different semiconductor materials. In one example, the second semiconductor layer 12 may include a semiconductor layer with a lower light absorption rate in the infrared band than in the visible light band. The semiconductor layer may include a single, binary, or more types of semiconductor material. In one example, the second semiconductor layer 12 may include a silicon layer, such as a single-crystal silicon layer. In one example, the second semiconductor layer 12 may include a III-V compound semiconductor with low infrared absorption or no infrared light absorption. In one example, the second semiconductor layer 12 may include silicon nitride (SiN).

[0065] like Figure 2 As shown, the second semiconductor layer 12 may include a first recess 13. The first recess 13 may be a recessed portion, a trench, or a groove. The first recess 13 is located at the center of the second semiconductor layer 12, and the depth of the first recess 13 may be constant throughout the first recess 13. The planar shape of the first recess 13 may be circular, and the center of the first recess 13 may coincide with the center of the second semiconductor layer 12. In one example, the second semiconductor layer 12 and the first recess 13 may be concentric, but are not limited thereto. The boundary of the first recess 13 is spaced apart from the edge of the second semiconductor layer 12. Therefore, the radius of the first recess 13 may be smaller than the radius of the second semiconductor layer 12. Due to the first recess 13, the second semiconductor layer 12 may have two upper surfaces 2S1 and 2S2 with different heights. That is, the upper surface of the second semiconductor layer 12 may consist of a flat first upper surface 2S1 in the first recess 13 and a flat second upper surface 2S2 around the first recess 13. The first upper surface 2S1 can be the bottom surface of the first recess 13. In the absence of the first recess 13, it can be formed by etching a portion of the upper surface of the second semiconductor layer 12 to a given depth. Therefore, the height of the first upper surface 2S1 can be lower than the height of the second upper surface 2S2. Thus, a step difference can exist between the first upper surface 2S1 and the second upper surface 2S2. The magnitude (e.g., height) of this step difference can be adjusted during the recess formation process.

[0066] The second semiconductor layer 12 may include the region where actual optical modulation occurs. The second semiconductor layer 12 may include multiple regions with different dopant concentrations. In one example, the second semiconductor layer 12 may include a highly doped region with a relatively high concentration of dopant and a lightly doped region with a relatively low concentration of dopant.

[0067] In one example, the second semiconductor layer 12 may include a first region 12A of a circle with a given radius at its center. The first region 12A may be within and concentric with the first recess 13. The first region 12A may be a region doped with a first dopant of a first concentration. In one example, the first dopant may include a p-type impurity (e.g., boron (B)) or an n-type impurity (e.g., phosphorus (P)). In one example, the first concentration may be approximately 1 × 10⁻⁶. 19 / cm 3 Approximately 3×10 20 / cm 3 Within this range, but not limited to this.

[0068] In one example, the radius of the first region 12A is smaller than the radius 12R1 of the second semiconductor layer 12 and smaller than the radius 12R3 of the first recess 13. The edge of the first region 12A is spaced apart from the edge of the second semiconductor layer 12 and the boundary of the first recess 13. The thickness of the first region 12A can vary in the radial direction. Since the central portion of the second semiconductor layer 12 is included in the region of the first recess 13, the thickness of the central portion can be less than the thickness of the edge of the second semiconductor layer 12. The first region 12A may include a first portion 12A1 with a first thickness at the center of the second semiconductor layer 12, and a second portion 12A2 surrounding the first portion 12A1 and having a second thickness. The second thickness is less than the first thickness. The upper surface of the first portion 12A1 may be the bottom surface of the first recess 13, i.e., a part of the first upper surface 2S1 of the second semiconductor layer 12. The second portion 12A2 is spaced apart from the first upper surface 2S1. The second portion 12A2 may contact the insulating layer 14. The bottom surface of the second portion 12A2 and the bottom surface of the first portion 12A1 can be at the same height and form the same plane. In one example, the bottom surface of the first portion 12A1 and the bottom surface of the second portion 12A2 can be part of the bottom surface of the second semiconductor layer 12. Since the upper surfaces of the first portion 12A1 and the second portion 12A2 are at different heights, a step difference can exist between the first portion 12A1 and the second portion 12A2 of the first region 12A. The entire thickness of the first portion 12A1 of the first region 12A can be uniform or substantially uniform. The entire thickness of the second portion 12A2 of the first region 12A can be uniform or substantially uniform. The thickness of the first portion 12A1 can be the same as the thickness of the second semiconductor layer 12 within the first recess 13. The first portion 12A1 and the second portion 12A2 of the first region 12A can be concentric.

[0069] The second semiconductor layer 12 may include a second region 12B located vertically on a second portion 12A2 of the first region 12A. The second region 12B may be a region formed directly above the second portion 12A2 of the first region 12A. The second region 12B is spaced apart from the center of the first region 12A. The second region 12B is located within a first recess 13 and spaced apart from the boundary of the first recess 13A. The thickness of the second region 12B may be the same as or substantially the same as the second thickness of the second portion 12A2. Figure 1As shown, the second region 12B can be formed to completely surround the first portion 12A1 of the first region 12A. In one example, the second region 12B can have a thickness corresponding to the step difference between the first portion 12A1 and the second portion 12A2 of the first region 12A. However, since a depletion layer can be formed between the second region 12B and the first region 12A, the thickness of the second region 12B is not necessarily exactly the same as the step difference. Since the thickness of the depletion layer is very thin compared to the thickness of the second region 12B, the thickness of the second region 12B is considered to be substantially the same as the step difference, and the second region 12B can be considered to have a thickness corresponding to the step difference.

[0070] The upper surface of the second region 12B and the upper surface of the first portion 12A1 of the first region 12A can be flat, at the same height, and form the same plane. In one example, the upper surface of the first portion 12A1 of the first region 12A and the upper surface of the second region 12B can be part of the first upper surface 2S1 of the second semiconductor layer 12.

[0071] The width of the second region 12B in the radial direction can be the same as or substantially the same as the width of the second portion 12A2 of the first region 12A. Since the depletion layer thickness between the first region 12A and the second region 12B is very thin, the inner diameter of the second region 12B can be substantially the same as the outer diameter 2*12R2 of the first portion 12A1 of the first region 12A. The outer diameter of the second region 12B can be equal to the outer diameter of the second portion 12A2 of the first region 12A. During the manufacturing process of the first optical modulator 20, the radii of the first region 12A and the second region 12B can be adjusted within a given range.

[0072] Therefore, in the plan view, the second region 12B can be strip-shaped or ring-shaped. In the cross section, the second portion 12A2 of the first region 12A and the second region 12B can be formed as a layer structure that is sequentially stacked in a direction perpendicular to the upper surface of the insulating layer 14.

[0073] In one example, the second region 12B can be a region doped with a second dopant of a second concentration, the type of which is opposite to that of the first dopant. Therefore, as described above, a depletion layer can be formed between the first region 12A and the second region 12B. The depletion layer is very thin, and for convenience, in Figures 1 to 3 Not shown. In one example, the second dopant may include either a p-type impurity or an n-type impurity. For example, if the first dopant includes a p-type impurity, the second dopant may include an n-type impurity, and vice versa. In one example, the second concentration may be the same as or substantially the same as the first concentration.

[0074] Since the first region 12A and the second region 12B are doped regions, the distance from the center of the first region 12A to the second region 12B can be adjusted during the manufacturing process of the first optical modulator 20. Therefore, the area of ​​the junction region between the first region 12A and the second region 12B can also be adjusted. Through this adjustment, the capacitance of the junction region based on the first region 12A and the second region 12B can also be adjusted. For example, as the width of the second region 12B decreases, the capacitance can decrease, and as the width of the second region 12B increases, the capacitance can increase. By adjusting the capacitance in this way, the optical modulation speed of the first optical modulator 20 can also be adjusted. For example, by adjusting the width of the second region 12B to reduce the capacitance, the optical modulation speed of the first optical modulator 20 can be increased.

[0075] A first electrode layer 16 is disposed on a first portion 12A1 of the first region 12A. The center of the first electrode layer 16 may be the same as or substantially coincide with the center of the first region 12A. In a plan view, the first electrode layer 16 may be circular, elliptical, or polygonal, but is not limited thereto. In one example, the first electrode layer 16 and the first region 12A may be configured as concentric circles.

[0076] The first electrode layer 16 is spaced apart from the second region 12B. The upper surface of the first electrode layer 16 may be flat, and the height of the upper surface of the first electrode layer 16 may be the same as, but may not be the same as, the height of the second upper surface 2S2 (the highest upper surface) of the second semiconductor layer 12. The first electrode layer 16 may include, but is not limited to, a metal or alloy that can be used as an electrode material.

[0077] The second electrode layer 18 is disposed on the second region 12B. The geometry of the second electrode layer 18 in a plan view may be the same as or substantially the same as the geometry of the second region 12B. In one example, the second electrode layer 18 may be configured to directly contact the upper surface of the second region 12B. The second electrode layer 18 may be configured to be concentric with the first region 12A, the second region 12B, and the first electrode layer 16, but may be configured in different ways. The second electrode layer 18 may be disposed at the same height as or substantially the same height as the first electrode layer 16, but may be configured in different ways. Here, "substantially the same height" may indicate a situation where a height difference unintentionally occurs between the first electrode layer 16 and the second electrode layer 18 during the manufacturing process, and this height difference is within an allowable tolerance. The second electrode layer 18 may be a single layer or multiple layers, and the first electrode layer 16 may also be a single layer or multiple layers. The material of the second electrode layer 18 may be the same as, but is not limited to, the material of the first electrode layer 16.

[0078] The second semiconductor layer 12 may include a third region 12C and a fourth region 12D surrounding the first region 12A and the second region 12B in a plane. The third region 12C may be formed in the form of a second portion 12A2 completely surrounding the first region 12A. The fourth region 12D may be formed in the form of a first portion 12A1 completely surrounding the first region 12A and the second region 12B. The third region 12C may be in horizontal contact with the second portion 12A2 of the first region 12A. The thickness of the third region 12C may be the same as or substantially the same as the thickness of the second portion 12A2. The bottom surface of the third region 12C may be in contact with the insulating layer 14 and may be part of the bottom surface of the second semiconductor layer 12. A portion of the third region 12C is below and inside the first recess 13, and the remainder of the third region 12C is outside the first recess 13. In a plan view, the edge of the third region 12C may coincide with the edge of the second semiconductor layer 12. The side surface of the third region 12C may be part of the side surface of the second semiconductor layer 12.

[0079] A fourth region 12D may be located on top of a third region 12C. The fourth region 12D may be in horizontal contact with a second region 12B. In the horizontal direction, a portion of the fourth region 12D is inside a first recess 13, and the remainder is outside the first recess 13. In other words, a first portion 12D1 of the fourth region 12D exists between the boundary of the first recess 13 and the second region 12B, i.e., between the step difference between the first upper surface 2S1 and the second upper surface 2S2 of the second semiconductor layer 12 and the second region 12B, and the remaining portion (second portion) 12D2 of the fourth region 12D exists between this step difference and the side surface of the second semiconductor layer 12. The first portion 12D1 can be considered a horizontal portion of the fourth region 12D, and the second portion 12D2 connected to the first portion 12D1 can be considered a vertical portion of the fourth region 12D. The upper surface of the first portion 12D1 is a portion of the first upper surface 2S1 of the second semiconductor layer 12, and the upper surface of the second portion 12D2 is a portion of the second upper surface 2S2 of the second semiconductor layer 12. Therefore, a step difference can also exist between the first part 12D1 and the second part 12D2 of the fourth region 12D. The thickness of the first part 12D1 is less than the thickness of the second part 12D2.

[0080] In the plane, the edge of the fourth region 12D may coincide with the edges of the second semiconductor layer 12 and the third region 12C. The side surface of the fourth region 12D may be a part of the side surface of the second semiconductor layer 12.

[0081] The third region 12C and the fourth region 12D may be regions formed sequentially in a direction perpendicular to the upper surface of the insulating layer 14. The third region 12C and the fourth region 12D may be the remaining regions of the second semiconductor layer 12 other than the first region 12A and the second region 12B.

[0082] On a plane, the shape of the third region 12C can be a circle in the form of a band or loop with a given width and radius, and the center of the third region 12C can be the same as the center of the first region 12A and the second region 12B, and the fourth region 12D can also be the same as the third region 12C. That is, the third region 12C and the fourth region 12D can be concentric with the first region 12A and the second region 12B.

[0083] The second portion 12D2 of the fourth region 12D may have a ring width Rw1 given in the radial direction. The ring width Rw1 may correspond to the gap or distance between the step difference 15 and the side surface of the second semiconductor layer 12. The ring width Rw1 may vary depending on the radius 12R3 of the first recess 13. Therefore, the ring width Rw1 can be adjusted during the formation of the first recess 13.

[0084] The contact region between the third region 12C and the fourth region 12D can be a PN junction region. Light propagating along the optical waveguide 10 can be transmitted to the PN junction region of the first optical modulator 20, and the mode of light transmitted from the optical waveguide 10 to the first optical modulator 20 can be limited by the ring width Rw1. For example, the narrower the ring width Rw1, the more fundamental mode or single-mode (e.g., TE0) light can be transmitted from the optical waveguide 10 to the first optical modulator 20, and the wider the ring width Rw1, the more higher-order modes or multi-mode (e.g., TE0, TE1) light can be transmitted from the optical waveguide 10 to the first optical modulator 20.

[0085] Therefore, by appropriately setting the radius 12R3 of the first recess 13 during the formation of the first recess 13, the mode of light transmitted from the optical waveguide 10 to the first optical modulator 20 can be restricted. Thus, only the light of the basic mode can be transmitted to the PN junction region, and the light of the higher-order mode can be prevented from being transmitted or can be controlled to be minimized.

[0086] For ease of explanation, the fourth region 12D is divided into a first part 12D1 and a second part 12D2, but the first part 12D1 and the second part 12D2 are a continuous and identical region, and there may be no physical boundary between the first part 12D1 and the second part 12D2.

[0087] In one example, the third region 12C can be a region doped with a first dopant at a third concentration. The third concentration can be lower than the first concentration. The fourth region 12D can be a region doped with a second dopant at a fourth concentration. The fourth concentration can be lower than the second concentration. The third and fourth concentrations can be equal to or substantially equal to each other.

[0088] When a voltage is applied to the first region 12A and the second region 12B through the first electrode layer 16 and the second electrode layer 18, the charge carrier concentrations of the third region 12C and the fourth region 12D can be changed by the voltage, and the refractive index changes due to the change in charge carrier concentration, which can modulate the light coupled to the microdisk (i.e., the second semiconductor layer 12).

[0089] Figure 4 A second optical modulator 400 according to one or more embodiments is shown. The second optical modulator 400 may correspond to an example in which a portion of the first optical modulator 20 is modified. Therefore, only the parts that differ from the first optical modulator 20 will be described.

[0090] refer to Figure 4 The second optical modulator 400 may include a third semiconductor layer 32 on the insulating layer 14. The third semiconductor layer 32 corresponds to the second semiconductor layer 12 of the first optical modulator 20, and may be a layer of the same semiconductor material as the second semiconductor layer 12. The layer structure or layer composition of the third semiconductor layer 32 may be different from the layer structure or layer composition of the second semiconductor layer 12.

[0091] The third semiconductor layer 32 includes a second recess 43 disposed in the first recess 13. The center of the second recess 43 may coincide with the center of the first recess 13, and the first recess 13 and the second recess 43 may be concentric in a plane. The planar geometry of the second recess 43 is not limited to a circle. The second recess 43 is located inside the second region 12B. The side surface of the second region 12B may be exposed through the second recess 43. The exposed side surface of the second region 12B may be the side surface of the second recess 43. The depth of the second recess 43 may be substantially the same as the thickness of the second region 12B. The second region 12B and the second recess 43 may be concentric circles. The upper surface 2S3 of the fifth region 32A may be exposed through the second recess 43. The upper surface 2S3 of the fifth region 32A may be flat, may be the bottom surface of the second recess 43, and may be the third upper surface of the third semiconductor layer 32. The entire region between the bottom surface of the second recess 43 and the bottom surface of the third semiconductor layer 32 can be the fifth region 32A. The fifth region 32A can extend below the second region 12B. The edge or boundary of the fifth region 32A can coincide with the outer edge (outer boundary) of the second region 12B. The fifth region 32A, the second region 12B, and the second recess 43 can be concentric circles. The radius of the fifth region 32A can be... Figure 2 The radius of the second portion 12A2 of the first region 12A is the same. The entire thickness of the fifth region 32A can be uniform or substantially uniform. In one example, the doping characteristics of the fifth region 32A (e.g., dopant type, doping concentration, etc.) can be the same as those of the first region 12A. In one example, the dopant implanted into the fifth region 32A can be the same n-type dopant as the dopant implanted into the third region 12C. The doping concentration of the fifth region 32A can be greater than that of the third region 12C. The doping concentration of the fifth region 32A can be the same as or substantially the same as that of the second region 12B. A depletion layer can be formed between the second region 12B and the fifth region 32A, which are highly doped regions and implanted with opposite dopants. That is, the second region 12B and the fifth region 32A can form a PN junction, and a capacitor can appear in the second optical modulator 400. This capacitor can vary depending on the radius of the second recess 43. That is, as the radius of the second recess 43 increases, the junction area of ​​the second region 12B and the fifth region 32A decreases, and therefore the capacitance can be reduced. Conversely, as the radius of the second recess 43 decreases, the junction area increases, and therefore the capacitance can be increased. Therefore, during the manufacture of the second optical modulator 400, by appropriately setting the radius of the second recess 43 to minimize the capacitance within an acceptable range, the optical modulation time of the second optical modulator 400 can be optimized.

[0092] The first electrode layer 16 can be disposed on the fifth region 32A and can be arranged to be spaced apart from the second region 12B and the second electrode layer 18.

[0093] Since the second recess 43 is disposed in the first recess 13 of the third semiconductor layer 32, the third semiconductor layer 32 can have a first upper surface 2S1 to a third upper surface 2S3 with different heights. Therefore, a first step difference 15 can exist between the first upper surface 2S1 and the second upper surface 2S2, and a second step difference 25 can exist between the second upper surface 2S2 and the third upper surface 2S3. The positions of the first step difference 15 and the second step difference 25 in the horizontal direction can be adjusted during the formation of the first recess 13 and the second recess 43.

[0094] The remaining areas of the third semiconductor layer 32 can be the same as the second semiconductor layer 12.

[0095] The second optical modulator 400 can correspond to the case where the thickness of the first portion 12A1 of the first region 12A of the second semiconductor layer 12 of the first optical modulator 20 is reduced to the thickness of the second portion 12A2 of the first region 12A.

[0096] Figure 5 This is a plan view showing a third optical modulator 500 according to one or more embodiments. Figure 6 It is along Figure 5 The cross-sectional view taken from line 6-6', and Figure 7 yes Figure 5 along Figure 5 The cross-sectional view taken by line 7-7'. Similar reference numerals to those described in the first optical modulator 20 and the second optical modulator 400 indicate similar components, and their descriptions are omitted.

[0097] Let's refer to each other. Figure 5 , Figure 6 and Figure 7 The optical waveguide 10 and the third optical modulator 500 can be disposed on the insulating layer 14. The optical waveguide 10 and the third optical modulator 500 can be spaced apart from each other by a first gap G1, such as... Figure 7As shown, the third optical modulator 500 includes a first semiconductor layer 22 and an insulating layer 14 stacked in sequence, and a fourth semiconductor layer 42 disposed on the insulating layer 14. The fourth semiconductor layer 42 may be disposed on one surface (e.g., the upper surface) of the insulating layer 14. In one example, the first semiconductor layer 22 and the fourth semiconductor layer 42 may include the same semiconductor material, but may include different semiconductor materials. In one example, the fourth semiconductor layer 42 may include the same semiconductor material as the second semiconductor layer 12 of the first optical modulator 20. Therefore, the semiconductor properties and optical properties of the fourth semiconductor layer 42 may be the same as those of the second semiconductor layer 12.

[0098] The fourth semiconductor layer 42 may include the region where actual optical modulation occurs. The fourth semiconductor layer 42 may include multiple regions with different dopants and / or doping concentrations. In one example, the fourth semiconductor layer 42 may include a sixth region 62A of a circle with a given radius at its center. In one example, the sixth region 62A may be a region doped with a given dopant and / or doping concentration. In one example, the type of dopant injected into the sixth region 62A and the doping concentration of the sixth region 62A may be the same as the type of dopant injected into the first region 12A of the second semiconductor layer 12 of the first optical modulator 20 and the doping concentration of the first region 12A.

[0099] The fourth semiconductor layer 42 includes a second region 12B formed on the sixth region 62A. The second region 12B is formed as a strip or ring of a given width on the edge region of the sixth region 62A. The second region 12B is spaced apart from the center of the sixth region 62A. The height of the upper surface of the second region 12B may differ from the height of the upper surface of the sixth region 62A. That is, the upper surface of the second region 12B may be higher than the upper surface of the sixth region 62A. Therefore, there is a step difference between the sixth region 62A and the second region 12B corresponding to the thickness of the second region 12B.

[0100] The distance from the center of the sixth region 62A to the second region 12B can be adjusted during the manufacturing process of the optical modulator 20, and correspondingly, the bonding area of ​​the bonding region between the sixth region 62A and the second region 12B can also be adjusted. This adjustment also allows for adjustment of the capacitance of the third optical modulator 500 resulting from the bonding region of the sixth region 62A and the second region 12B. For example, the greater the distance between the inner boundary of the second region 12B and the center of the sixth region 62A, i.e., the larger the second radius 12R2 of the inner boundary of the second region 12B, the greater the capacitance can be reduced. As the distance between the inner boundary of the second region 12B and the center of the sixth region 62A decreases, the capacitance can increase. In this way, the optical modulation speed of the third optical modulator 500 can be controlled because the capacitance is controlled. As an example, the capacitance can be reduced by decreasing the width of the second region 12B in the radial direction, and the optical modulation speed of the third optical modulator 500 can be increased by reducing the width of the second region 12B in the radial direction.

[0101] The outer boundary of the second region 12B may coincide with or substantially coincide with the outer boundary of the sixth region 62A. In other words, the outer radius of the second region 12B, measured from the center of the sixth region 62A, may be equal to or substantially equal to the radius of the sixth region 62A. The inner side of the second region 12B has a second radius 12R2 smaller than the radius of the sixth region 62A. The second region 12B and the sixth region 62A may define... Figure 4 The second recessed portion 43 corresponds to the recessed area. The side surface of the second region 12B can be the side surface of the recessed area, and the upper surface of the sixth region 62A can be the bottom surface of the recessed area.

[0102] On the plan view, the shape of the second region 12B can be a circular strip or ring with a given width. The sixth region 62A and the second region 12B can be concentric circles.

[0103] A first electrode layer 16 may be disposed on a sixth region 62A. The center of the first electrode layer 16 may coincide with or substantially coincide with the center of the sixth region 62A. In one example, the first electrode layer 16 and the sixth region 62A may be concentric. The first electrode layer 16 may be spaced apart from the second region 12B.

[0104] The second electrode layer 18 may be disposed on the second region 12B. In a plan view, the shape of the second electrode layer 18 may be the same as or substantially the same as the shape of the second region 12B. In one example, the second electrode layer 18 may be formed to cover the entire upper surface of the second region 12B and be in direct contact with the entire upper surface of the second region 12B. In one example, the second electrode layer 18 may be formed only on a portion of the upper surface of the second region 12B. The second electrode layer 18 may be configured to be concentric with the sixth region 62A, the second region 12B, and the first electrode layer 16, but may be configured in different ways. The second electrode layer 18 may be disposed at the same height as or substantially the same height as the first electrode layer 16. The second electrode layer 18 may be disposed only on the second region 12B.

[0105] The material of the second electrode layer 18 can be the same as that of the first electrode layer 16, but is not limited thereto.

[0106] The fourth semiconductor layer 42 may include a seventh region 62C surrounding the sixth region 62A and an eighth region 62D surrounding the second region 62B. The seventh region 62C and the eighth region 62D may be regions formed sequentially in a direction perpendicular to the upper surface of the insulating layer 14. The seventh region 62C may be configured to completely surround the sixth region 62A, and the eighth region 62D may be configured to completely surround the second region 62B. The seventh region 62C and the eighth region 62D may be the remaining regions of the fourth semiconductor layer 42 other than the second region 12B and the sixth region 62A. In a plan view, the shape of the seventh region 62C may be a circular shape in the form of a band or loop with a given width and radius. The center of the seventh region 62C may coincide with the center of the sixth region 62A. Therefore, the seventh region 62C, the sixth region 62A, and the second region 12B may be concentric circles.

[0107] In the plan view, the shape of the eighth region 62D can be a circular shape in the form of a band or ring with a given width and radius. The center of the eighth region 62D can coincide with the center of the sixth region 62A. Therefore, the eighth region 62D, the seventh region 62C, the sixth region 62A, and the second region 12B can be concentric circles. The seventh region 62C can include a first portion 62C1, a second portion 62C2, and a third portion 62C3. The first portion 62C1 can be a portion formed with the same thickness as the sixth region 62A. The second portion 62C2 can be a portion formed in a direction perpendicular to the first portion 62C1. The third portion 62C3 can be a portion extending from the second portion 62C2 toward the center of the sixth region 62A and parallel to the first portion 62C1. The first portion 62C1 and the third portion 62C3 are separated from each other in a direction perpendicular to the upper surface of the insulating layer 14. The second portion 62C2 can be a region formed in a direction perpendicular to the upper surface of the insulating layer 14. The side of the second part 62C2 is the side of the fourth semiconductor layer 42 and is located at a first radius 12R1 from the center of the sixth region 62A. For ease of explanation, the seventh region 62C is divided into a first part 62C1, a second part 62C2, and a third part 62C3, but the first part 62C1 to the third part 62C3 is a continuous region and there are no physical boundaries between the first part 62C1 and the third part 62C3.

[0108] The eighth region 62D may include a first portion 62D1 having the same thickness as the second region 12B, and a second portion 62D2 formed in a direction perpendicular to the first portion 62D1. The height of the vertical boundary of the second portion 62D2 (i.e., the upper boundary of the second portion 62D2) is higher than the upper surface of the first portion 62D1. Therefore, a step difference can be formed between the upper surface of the first portion 62D1 and the upper boundary of the second portion 62D2. The magnitude of this step difference can be adjusted by adjusting the length of the second portion 62D2 in a direction perpendicular to the upper surface of the insulating layer 14. During the manufacturing process of the third optical modulator 500, the length of the second portion 62D2 can be adjusted by adjusting the etching depth used to form the second portion 62D2. For ease of illustration, the eighth region 62D is divided into the first portion 62D1 and the second portion 62D2, but the first portion 62D1 and the second portion 62D2 can be a continuous identical region, and there may be no physical boundary between the first portion 62D1 and the second portion 62D2.

[0109] The first portion 62C1 of the seventh region 62C and the first portion 62D1 of the eighth region 62D can be parallel to each other. The second portion 62C2 of the seventh region 62C and the second portion 62D2 of the eighth region 62D can be parallel to each other. The seventh region 62C can be formed to surround the eighth region 62D from the outside. That is, the seventh region 62C can be configured to cover the bottom, sides, and top of the eighth region 62D. In other words, for ease of explanation, if the boundary between the eighth region 62D and the seventh region 62C is considered as a surface, then the bottom, outer side, and top surface of the eighth region 62D can be completely covered by the seventh region 62C.

[0110] The highest surface of the seventh region 62C can correspond to the upper surface of the third portion 62C3 of the seventh region 62C or the highest surface of the fourth semiconductor layer 42. The upper surface of the second electrode layer 18 can be at the same height as the highest surface of the seventh region 62C. The inner surface of the third portion 62C3 of the seventh region 62C and the inner surface (the inner surface of the step difference) of the second portion 62D2 of the eighth region 62D form the same side surface 12S1, and the side surface 12S1 can be spaced apart from the second electrode layer 18 and the second region 12B. The distance of the side surface 12S1 from the center of the sixth region 62A can correspond to the third radius 12R3, and this distance can be adjusted during the manufacturing process of the third optical modulator 500. That is, the distance between the side surface 12S1 and the second electrode layer 18 can be adjusted during the manufacturing process of the third optical modulator 500. Regions 62C and 62D can form a PN junction region with low doping, and some light propagating along the optical waveguide 10 can be transmitted to the PN junction region of the third optical modulator 500. Depending on the size of the PN junction region, in addition to the fundamental mode (TE0), light of higher-order modes (e.g., first-order modes) can also be transmitted to the PN junction region. Therefore, the size of the PN junction region can be controlled so that only the fundamental mode light is transmitted to the PN junction region, and the light of higher-order modes is not transmitted or is minimized. As the PN junction region becomes larger, the influence of the highly doped regions (i.e., the sixth region 62A and the second region 12B) on the fundamental mode light transmitted to the PN junction region can be reduced. Therefore, the distance between the side surface 12S1 and the second electrode layer 18 can be determined by taking this into account.

[0111] The distance Rw1 (Rw1 = first radius 12R1 - third radius 12R3) from the side surface 12S1 to the outer surface of the seventh region 62C (i.e., the outer surface of the fourth semiconductor layer 42) can be the ring width. The size of the PN junction region can also increase or decrease depending on whether the ring width Rw1 increases or decreases. Therefore, the ring width can be set such that only the fundamental mode light is transmitted from the optical waveguide 10 to the PN junction region, and the transmission of higher-order mode light is minimized. That is, depending on the setting of the ring width, higher-order mode light transmitted from the optical waveguide 10 to the PN junction region can be filtered out.

[0112] In one example, region 62C (seventh region) can be a region doped with a first dopant at a third concentration. The third concentration can be less than the first concentration. Region 62D (eighth region) can be a region doped with a second dopant at a fourth concentration. The fourth concentration can be less than the second concentration. The third and fourth concentrations can be the same or substantially the same.

[0113] Voltages can be applied to the sixth region 62A and the second region 12B through the first electrode layer 16 and the second electrode layer 18. The charge carrier concentrations of the seventh region 62C and the eighth region 62D can be varied depending on the voltage. Therefore, the light coupled to the microdisk (i.e., the fourth semiconductor layer 42) can be modulated due to the change in refractive index caused by the change in charge carrier concentration.

[0114] Figure 8 and Figure 9 It shows Figure 6 The example shown is a modified version of the third optical modulator 500. Only descriptions related to... Figure 6 Different parts, and with reference Figure 6 The same reference numerals in the accompanying drawings indicate the same components, and their descriptions will be omitted.

[0115] refer to Figure 8 The fifth semiconductor layer 82 can be disposed on the insulating layer 14. The fifth semiconductor layer 82 can correspond to the case where the sixth region 62A of the fourth semiconductor layer 42 of the third optical modulator 500 is replaced by the first region 12A of the second semiconductor layer 12 of the first optical modulator 20.

[0116] The layer structure and doping pattern of the remaining portion of the fifth semiconductor layer 82 can be the same as those of the fourth semiconductor layer 42. In the eighth region 62D of the fifth semiconductor layer 82, the height difference (i.e., step difference t1) between the upper surface of the second portion 62D2 and the upper surface of the first portion 62D1 can be the same as or different from the thickness t2 of the first portion 62D1. As an example, in the fifth semiconductor layer 82, the step difference t1 can be less than the thickness t2, but... Figure 9As shown, the step difference t1 can be greater than the thickness t2. The step difference t1 can correspond to the step difference between the first part 62D1 and the second part 62D2.

[0117] One of the first region 12A and the second region 12B can be a region doped with P-type conductive impurities (i.e., P-type dopant) (P-type region), and the other can be a region doped with N-type conductive impurities (i.e., N-type dopant) (N-type region). Therefore, according to the PN junction, a depletion layer can be formed at the interface (junction region) of the first region 12A and the second region 12B. The depletion layer can act as an insulating layer. In the accompanying drawings, the solid line between the first region 12A and the second region 12B symbolically represents the depletion layer. For the same reason, the solid line between the seventh region 62C and the eighth region 62D can also symbolically represent the depletion layer formed between the seventh region 62C and the eighth region 62D. However, the solid lines between the first region 12A and the seventh region 62C, and between the second region 12B and the eighth region 62D, do not represent depletion layers, but are introduced only to distinguish two adjacent regions.

[0118] Figure 10 A fourth optical modulator 1000 according to one or more embodiments is shown. The fourth optical modulator 1000 may be a modified example of the third optical modulator 500.

[0119] For the fourth optical modulator 1000, only the parts that differ from the third optical modulator 500 will be described. Reference numerals similar to those used in the above figures refer to similar elements, and their descriptions are omitted.

[0120] refer to Figure 10 The fourth optical modulator 1000 may include a sixth semiconductor layer 102 on the insulating layer 14. The material of the sixth semiconductor layer 102 may be the same as, but may be different from, the material of the fourth semiconductor layer 42 of the third optical modulator 500. The sixth semiconductor layer 102 may include a second region 12B, a third region 12C, a sixth region 62A, and a ninth region 102D doped with a dopant. The ninth region 102D may be arranged adjacent to the second region 12B and may be formed to completely surround the second region 12B in a plane. The ninth region 102D may be on the third region 12C and extend downward along the outer side of the third region 12C. That is, the ninth region 102D may be formed to include a first portion 102D1 covering the upper surface of the third region 12C and a second portion 102D2 covering the outer surface of the third region 12C. The second portion 102D2 of the ninth region 102D may be in contact with the upper surface of the insulating layer 14. Therefore, the ninth region 102D in the sixth semiconductor layer 102 can be formed to completely cover the upper and side surfaces of the third region 12C.

[0121] The thickness of the first portion 102D1 of the ninth region 102D on the third region 12C may be uniform and may be the same as or substantially the same as the thickness of the second region 12B. The second portion 102D2 of the ninth region 102D may have a given width in the lateral direction, and its width may vary depending on the outer diameter of the third region 12C. The upper surface of the first portion 102D1 may be part of the highest upper surface of the sixth semiconductor layer 102, and the side surface of the second portion 102D2 may be the side surface of the sixth semiconductor layer 102.

[0122] In one example, the doping concentration and type of the dopant injected into the ninth region 102D can be the same as the doping concentration and type of the dopant injected into the seventh region 62C of the fourth semiconductor layer 42 of the third optical modulator 500.

[0123] Figure 11 This is a plan view showing an optical waveguide 10 and a fifth optical modulator 1100 arranged adjacent thereto according to one or more embodiments.

[0124] Figure 12 It is along Figure 11 The cross-sectional view taken from line 12-12', and Figure 13 It is along Figure 11 The cross-sectional view taken from line 13-13'.

[0125] In one example, the fifth optical modulator 1100 could be Figure 4 This is a modified example of the second optical modulator 400. Therefore, only the parts that differ from the second optical modulator 400 will be described.

[0126] Let's refer to each other. Figure 11 , Figure 12 and Figure 13 The fifth optical modulator 1100 may include a seventh semiconductor layer 122 disposed on the insulating layer 14. The seventh semiconductor layer 122 may be a semiconductor layer of the same material as the third semiconductor layer 32 of the second optical modulator 400, but may also be a semiconductor layer of a different material. The planar shape of the seventh semiconductor layer 122 may be circular or non-circular (e.g., elliptical). In one example, the seventh semiconductor layer 122 may be in the form of a disk.

[0127] To simultaneously modulate multiple wavelengths of light in the fifth optical modulator 1100, it is necessary to widen the wavelength division multiplexing (WDM) bandwidth of the fifth optical modulator 1100, and to increase the WDM bandwidth, it is necessary to increase the free spectral range (FSR) of the fifth optical modulator 1100. The FSR increases as the radius of the seventh semiconductor layer 122 decreases, and decreases as the radius increases. In one example, the FSR can be tens of nanometers (nm), and the radius of the seventh semiconductor layer 122 can be several micrometers (μm) or smaller. Considering the size of the radius of the seventh semiconductor layer 122, the seventh semiconductor layer 122 can also be represented as a microdisk.

[0128] The seventh semiconductor layer 122 may include a first region 42A, a second region 42B, a third region 42C, and a fourth region 42D doped with p-type or n-type dopants. The basic arrangement of the first regions 42A to the fourth regions 42D may be similar to or the same as the arrangement of the doped regions 12B, 12C, 12D, and 32A of the third semiconductor layer 32 of the second optical modulator 400. For example, the formation positions and arrangement of the first region 42A and the second region 42B of the seventh semiconductor layer 122 may be the same as the formation positions and arrangement of the fifth region 32A and the second region 12B of the third semiconductor layer 32 of the second optical modulator 400.

[0129] Furthermore, the formation location of the third region 42C of the seventh semiconductor layer 122 can be the same as that of the third region 12C of the third semiconductor layer 32 of the second optical modulator 400. The formation location of the fourth region 42D of the seventh semiconductor layer 122 can be the same as that of the fourth region 12D of the third semiconductor layer 32 of the second optical modulator 400. The doping form and doping concentration of the first region 42A, the second region 42B, the third region 42C, and the fourth region 42D of the seventh semiconductor layer 122 can be the same as those of the fifth region 32A, the second region 12B, the third region 12C, and the fourth region 12D of the third semiconductor layer 32 of the second optical modulator 400.

[0130] However, the planar and cross-sectional shapes of the third region 42C and the fourth region 42D of the seventh semiconductor layer 122 may differ from those of the third region 12C and the fourth region 12D of the third semiconductor layer 32 of the second optical modulator 400. For example, in the seventh semiconductor layer 122, the third region 42C and the fourth region 42D may be formed sequentially in a vertical direction on the upper surface of the insulating layer 14, and the third region 42C and the fourth region 42D may completely overlap each other in the vertical direction. Unlike the third region 12C and the fourth region 12D of the third semiconductor layer 32 of the second optical modulator 400, the third region 42C and the fourth region 42D may only include portions parallel to the upper surface of the insulating layer 14, excluding portions extending in a direction perpendicular to the upper surface of the insulating layer 14. That is, the outer surfaces of the third region 42C and the fourth region 42D can form the same surface, the upper surface of the fourth region 42D can be separated from the third region 42C, and the radii 9R2 of the inner surfaces (boundaries) of the third region 42C and the fourth region 42D, which have annular planar shapes, can be the same as each other, and the radii 9R1 of the outer surfaces of the third region 42C and the fourth region 42D can also be the same as each other. The outer radius 9R1 corresponds to the radius of the seventh semiconductor layer 122. The radius 9R1 of the seventh semiconductor layer 122 can be determined by considering the FSR of the fifth optical modulator 1100.

[0131] The seventh semiconductor layer 122 can have different shapes. Specifically, the seventh semiconductor layer 122 may include a recess 123 of a given depth, a first region 42A below the recess 123, and a second region 42B and a fourth region 42D distributed around the recess 123. The center of the recess 123 may coincide with the center of the first region 42A, and the recess 123, the first region 42A, the second region 42B, the third region 42C, and the fourth region 42D may be concentric circles. A first electrode layer 16 may be disposed within the recess 123 on the first region 42A, and a second electrode layer 18 may be disposed around the recess 123. The recess 123 may be a groove or a trench.

[0132] During the fabrication process of the fifth optical modulator 1100, the second width Rw2 of the combined region of the second region 42B and the fourth region 42D, measured radially from the center of the first region 42A (e.g., along the radial direction of the first region 42A), in the seventh semiconductor layer 122 can be adjusted; that is, the ring width Rw2 of the seventh semiconductor layer 122. The second width Rw2 can be equal to the sum of the width of the second region 42B (=9R2-9R3) and the third width Rw3 of the fourth region 42D (=9R1-9R2).

[0133] When light transmitted from the optical waveguide 10 to the third region 42C and fourth region 42D of the fifth optical modulator 1100 for optical modulation approaches or contacts the highly doped regions (i.e., the first region 42A and the second region 42B), optical loss may occur, and the optical modulation efficiency may decrease. Therefore, the ring width Rw2 can be adjusted to minimize optical loss during the optical modulation process. For example, the third width Rw3 of the third region 42C and the fourth region 42D can be formed to be larger than the volume of the fundamental optical mode TE0. However, in order to prevent or minimize the intrusion of higher-order mode light (e.g., TE1) in optical modulation, the third width Rw3 can be narrowed such that a portion of the optical mode overlaps with the highly doped region.

[0134] exist Figure 11 , Figure 12 and Figure 13 In this context, the fifth optical modulator 1100 and the optical waveguide 10 can be collectively referred to as optical modulators. This also applies to the other optical modulators described later.

[0135] Figure 14 A sixth optical modulator 1200 according to one or more embodiments is shown. Only the parts that differ from the fifth optical modulator 1100 are described.

[0136] refer to Figure 14 In the sixth optical modulator 1200, the second region 42B in the eighth semiconductor layer 142 may not be on the first region 42A, but may be separate from the first region 42A. In the eighth semiconductor layer 142, the second region 42B, the third region 42C, and the fourth region 42D may be arranged to overlap each other vertically on the upper surface of the insulating layer 14. As an example, the second region 42B may be formed on a portion of the fourth region 42D, and the second electrode layer 18 may be disposed on the second region 42B. When comparing the seventh semiconductor layer 122 of the fifth optical modulator 1100 with the eighth semiconductor layer 142 of the sixth optical modulator 1200, the second region 42B of the eighth semiconductor layer 142 can be considered as a case where a portion of the fourth region 42D of the seventh semiconductor layer 122 is changed to a highly doped region (such as the second region 42B). Therefore, a separate ion implantation mask can be used to form the second region 42B of the eighth semiconductor layer 142.

[0137] In the eighth semiconductor layer 142, the second region 42B can be separated from the third region 42C, and the fourth region 42D can be located between the second region 42B and the third region 42C. The upper surfaces of the second region 42B and the fourth region 42D can have the same height, thus forming identical surfaces. In a plan view, the upper surfaces of the second region 42B and the fourth region 42D can form a circular or non-circular (e.g., elliptical) strip with the center of the first region 42A as a reference point. In a plan view, the first region 42A, the second region 42B, and the fourth region 42D are concentric circles, and the second region 42B can be located between the upper surface of the fourth region 42D and the first region 42A.

[0138] In the eighth semiconductor layer 142, the thickness of the second region 42B can be less than the thickness of the fourth region 42D, and the horizontal length of the second region 42B (the ring width in the radial direction in the plan view) can be adjusted to take into account the volume of the basic mode of the light to be modulated, or it can be adjusted to minimize the light loss during the light modulation process.

[0139] In the eighth semiconductor layer 142, the first region 42A and the second region 42B, which are highly doped regions, can be separated from each other and do not form a PN junction. Therefore, the capacitance caused by the PN junction can be avoided or minimized. As a result, the optical modulation speed can be improved.

[0140] The material of the eighth semiconductor layer 142 can be with Figure 2 The second semiconductor layer 12 is made of the same material, but can be different from each other.

[0141] Figure 15 A seventh optical modulator 1300 according to one or more embodiments is shown.

[0142] The seventh optical modulator 1300 may be a combination of the features of the third optical modulator 500 and the sixth optical modulator 1200.

[0143] refer to Figure 15In the ninth semiconductor layer 152, the second region 12B can be configured to be separate from the sixth region 62A, and a portion of the first part 62D1 of the eighth region 62D can be disposed between the second region 12B and the sixth region 62A. That is, the second region 12B of the ninth semiconductor layer 152 can be disposed in the first part 62D1 of the eighth region 62D in the same manner as the second region 42B disposed in the fourth region 42D in the sixth optical modulator 1200. The second region 12B can be disposed in the first part 62D1 of the eighth region 62D. Therefore, the eighth region 62D can include three regions with different thicknesses. For example, the portion to the left of the step difference 15 in the eighth region 62D can have a first thickness, the portion between the step difference 15 and the second region 12B can have a second thickness that is thinner than the first thickness, and the portion below the second region 12B can have a third thickness that is thinner than the second thickness.

[0144] In other words, the second region 12B can be located within the first portion 62D1 of the eighth region 62D. Therefore, the eighth region 62D can include a non-physical step difference 15' and a physical step difference 15 that occurs when the ninth semiconductor layer 152 is etched to form a recess. The non-physical step difference 15' can be located in a portion where the thickness of the ninth semiconductor layer 152 to the right of the physical step difference 15 is constant. Due to the presence of the second region 12B, the first portion 62D1 to the right of the step difference 15 can be divided into a portion with a thick doped region and a portion with a thin doped region (located below the second portion 12B). In the cross-sectional profile of the eighth region 62D, a step difference occurs due to the thickness difference between the thick and thin portions of the first portion 62D1. This step difference 15' is not an externally exposed step difference due to direct etching of the material layer, but exists within the ninth semiconductor layer 152, corresponding to the first portion 62D1 of the eighth region 62D. Therefore, the non-physical step difference 15' can be expressed as the internal step difference of the ninth semiconductor layer 152 or the step difference of the doped region inside the ninth semiconductor layer 152.

[0145] thus, Figure 15 The eighth region 62D can include two step differences 15 and 15'.

[0146] The remainder of the ninth semiconductor layer 152 of the seventh optical modulator 1300 may be the same as the fourth semiconductor layer 42 of the third optical modulator 500.

[0147] The material of the ninth semiconductor layer 152 can be with Figure 2 The material of the second semiconductor layer 12 can be the same, but it can also be different.

[0148] Figure 16 An eighth optical modulator 1400 according to one or more embodiments is shown.

[0149] The eighth optical modulator 1400 may correspond to one of the modifications of the seventh optical modulator 1300. Therefore, only the parts that differ from the seventh optical modulator 1300 will be described.

[0150] refer to Figure 16 The layer structure or layer profile of the tenth semiconductor layer 162 disposed on the insulating layer 14 in the eighth optical modulator 1400 can be similar to the layer structure or layer profile of the ninth semiconductor layer 152 in the seventh optical modulator 1300. For example, in the tenth semiconductor layer 162, the second region 12B can be on the upper surface of the first portion 62D1 of the eighth region 62D, and the second electrode 18 can be disposed on the second region 12B. In the eighth optical modulator 1400, the second region 12B can be disposed on the upper surface of the first portion 62D1 of the eighth region 62D, therefore no reference appears in the first portion 62D1. Figure 15 The non-physical step difference 15' is described. The remaining configuration of the eighth optical modulator 1400 can be the same as that of the seventh optical modulator 1300. The material of the tenth semiconductor layer 162 can be the same as... Figure 2 The second semiconductor layer 12 is made of the same material, but can be different from each other.

[0151] The aforementioned optical modulator may include multiple optical waveguides. Figure 17 An example of an optical modulator is shown.

[0152] refer to Figure 17 The first optical waveguide 13A may be arranged adjacent to the semiconductor layer 132, and the second optical waveguide 13B may be arranged parallel to the first optical waveguide 13A, with the semiconductor layer 132 situated between the first optical waveguide 13A and the second optical waveguide 13B. In one example, only the portions of the first optical waveguide 13A and the second optical waveguide 13B corresponding to the semiconductor layer 132 may be parallel to each other, while the remaining portions may not be parallel. The separation distance (spacing) between the semiconductor layer 132 and the first optical waveguide 13A may be the same as or substantially the same as the separation distance between the semiconductor layer 132 and the second optical waveguide 13B. The distance between the semiconductor layer 132 and the first optical waveguide 13A, and the distance between the semiconductor layer 132 and the second optical waveguide 13B, may be... Figure 3 The first gap G1 is the same as or substantially the same. Semiconductor layer 132 may be a reference. Figures 1 to 16And one of the semiconductor layers 12, 32, 42, 82, 102, 122, 142, 152, and 162 mentioned in the related description. The material and function of the first optical waveguide 13A may be the same as those of the optical waveguide 10. In one example, the material of the first optical waveguide 13A may be different from that of the optical waveguide 10. The material and dimensions of the second optical waveguide 13B may be the same as or substantially the same as those of the first optical waveguide 13A, but are not limited thereto.

[0153] From the light source (e.g., Figure 66 The light IL input to the first optical waveguide 13A (330) is transmitted to the semiconductor layer 132 and can be modulated according to the voltage applied to the semiconductor layer 132. A portion ML1 of the modulated light ML in the semiconductor layer 132 can be output through the first optical waveguide 13A, and the remaining portion ML2 of the modulated light can be output through the second optical waveguide 13B.

[0154] Next, a method for manufacturing an optical modulator according to one or more embodiments will be described.

[0155] Figures 18 to 26 This is a cross-sectional view showing a method for manufacturing a third optical modulator according to one or more embodiments.

[0156] In the following description, reference numerals similar to those mentioned in the description of the third optical modulator 500 above refer to similar components, and their descriptions are omitted.

[0157] First, such as Figure 18 As shown, the substrate is fabricated by sequentially stacking or forming the first semiconductor layer 22 and the insulating layer 14. An SOI substrate can be used as the substrate. A fourth semiconductor layer 42 is formed on the insulating layer 14. In one example, the fourth semiconductor layer 42 can be formed on a separate temporary substrate and then transferred to the insulating layer 14, but this method is not limited to.

[0158] A first mask M1 may be formed on a fourth semiconductor layer 42 to define a portion of the fourth semiconductor layer 42. The first mask M1 may be an ion implantation mask, but is not limited thereto. In one example, the first mask M1 may be a photoresist mask, but may also be a mask of other materials.

[0159] In the plan view, the first mask M1 can define the portion of the fourth semiconductor layer 42 to be exposed as a circular strip, but it can also define the portion of the fourth semiconductor layer 42 to be exposed as a non-circular (e.g., elliptical) strip. The portion of the fourth semiconductor layer 42 defined by the first mask M1 can correspond to the first portion 62C1 of the seventh region 62C of the third optical modulator 500.

[0160] A first dopant DP1 is implanted into the region defined by the first mask M1 of the fourth semiconductor layer 42. In one example, ion implantation can be used to implant the first dopant DP1, but it is not limited thereto. In one example, the first dopant DP1 may include p-type or n-type conductive impurities. In one example, the first dopant DP1 may include n-type conductive impurities. In the implantation process of the first dopant DP1, a first ion implantation energy can be used to implant the first dopant DP1. Due to the implantation process of the first dopant DP1, a first doped layer 12C' can be formed in the region corresponding to the first portion 62C1 of the seventh region 62C of the fourth semiconductor layer 42. The first doped layer 12C' may be doped with a concentration corresponding to the doping concentration of the seventh region 62C of the third optical modulator 500. The first doped layer 12C' may also be represented as a first doped region. After the first doped layer 12C' is formed, the first mask M1 is removed.

[0161] Next, as Figure 19 As shown, a second mask M2 can be formed on the fourth semiconductor layer 42 to expose a portion of the fourth semiconductor layer 42. The second mask M2 is used to form the eighth region 62D of the third optical modulator 500. Therefore, the second mask M2 can be formed such that the surface of the fourth semiconductor layer 42 corresponding to the eighth region 62D of the third optical modulator 500 is exposed. A second dopant DP2 can be implanted into the exposed region of the fourth semiconductor layer 42. The second dopant can be implanted by ion implantation, but is not limited thereto. In one example, the second dopant DP2 may include p-type or n-type conductive impurities, but may include dopants of the opposite type to the first dopant. In one example, the second dopant DP2 may include p-type conductive impurities. In one example, in the implantation process of the second dopant DP2, a second ion implantation energy can be used to implant the second dopant DP2. The second ion implantation energy may be less than the first ion implantation energy. Due to the implantation process of the second dopant DP2, a second doped layer 12D' can be formed on the first doped layer 12C'. The radial width of the second doped layer 12D' may be narrower than the radial width of the first doped layer 12C'. The second doped layer 12D' can have the same doping concentration as the first doped layer 12C'. The second doped layer 12D' can also be represented as a second doped region. The formation location of the second doped layer 12D' can correspond to the horizontal portion of the eighth region 62D of the fourth semiconductor layer 42 of the third optical modulator 500. Therefore, the second doped layer 12D' can be spaced apart from the upper surface 19S of the fourth semiconductor layer 42. In one example, the second doped layer 12D' can be formed before the first doped layer 12C'.

[0162] When forming the first doped layer 12C' and the second doped layer 12D', a depletion layer can be formed at the junction between the first doped layer 12C' and the second doped layer 12D'. When the thicknesses of the first doped layer 12C' and the second doped layer 12D' are the same, the depletion layer can be formed vertically in the middle between the first doped layer 12C' and the second doped layer 12D'. However, the location of the depletion layer can be controlled by controlling the formation conditions of the first doped layer 12C' and / or the formation conditions of the second doped layer 12D'. That is, the thicknesses of the first doped layer 12C' and the second doped layer 12D' can be different. For example, the thickness of the second doped layer 12D' can be made thinner than the thickness of the first doped layer 12C', so that the depletion layer can be formed closer to the upper surface of the second doped layer 12D' than the lower surface of the first doped layer 12C'.

[0163] The first doped layer 12C' and the second doped layer 12D' do not have physical boundaries that can be seen with the naked eye, but for ease of illustration and explanation, the boundaries are indicated by solid lines. Furthermore, for ease of explanation, the solid lines indicating the boundaries of the first doped layer 12C' and the second doped layer 12D' in the accompanying drawings can be considered as the surfaces of the first doped layer 12C' and the second doped layer 12D'. The solid lines indicating the boundaries of different doped layers in the following text can also be considered in the same way.

[0164] After the second doped layer 12D' is formed, the second mask M2 can be removed.

[0165] Next, as Figure 20 As shown, a third mask M3 can be formed on the upper surface of the fourth semiconductor layer 42. The third mask M3 can be the same as the first mask M1 in terms of purpose and material, but it can be different.

[0166] The third mask M3 may be formed to cover and protect the first doped layer 12C' and the second doped layer 12D', and may define a portion of the fourth semiconductor layer 42. In one example, the third mask M3 may be formed such that the region in the fourth semiconductor layer 42 corresponding to the sixth region 62A of the third optical modulator 500 is exposed, and the remaining regions of the fourth semiconductor layer 42 are covered.

[0167] Due to the presence of a third mask M3, a third dopant DP3 can be implanted into the fourth semiconductor layer 42. The material of the third dopant can be the same as that of the first dopant, but the third dopant and the first dopant can include different conductive impurities from the same type of conductive impurity group. In the process of implanting the third dopant DP3, the third dopant DP3 can be implanted by ion implantation, and a third ion implantation energy can be used for implantation. The third ion implantation energy can be the same as or substantially the same as the first ion implantation energy. Through the process of implanting the third dopant DP3, a third doped layer 62A, namely the sixth region 62A, can be formed in the fourth semiconductor layer 42. The doping concentration of the sixth region 62A can be higher than the doping concentration of the first doped layer 12C' and the second doped layer 12D'. The execution time of the third dopant implantation process (DP3) can be the same as or substantially the same as the execution time of the first dopant implantation process (DP1), but they can be different from each other.

[0168] Next, while maintaining the third mask M3, a fourth dopant DP4 can be implanted into the fourth semiconductor layer 42. The material of the fourth dopant DP4 can be the same as that of the second dopant, but the fourth dopant DP4 and the second dopant DP2 can include different conductive impurities from the same type of conductive impurity group. In the process of implanting the fourth dopant DP4, the fourth dopant DP4 can be implanted by ion implantation, and a fourth ion implantation energy can be used. The fourth ion implantation energy can be the same as or substantially the same as the second ion implantation energy. By implanting the fourth dopant DP4, a fourth doped layer 12B' can be formed on the fourth semiconductor layer 42. The fourth doped layer 12B' can be the region forming the second region 12B of the third optical modulator 500. The doping concentration of the fourth doped layer 12B' can be higher than that of the first doped layer 12C' and the second doped layer 12D', and can be the same as or substantially the same as that of the third doped layer 62A. The execution time of the fourth dopant implantation process (DP4) can be the same as or substantially the same as that of the second dopant implantation process (DP2), but can be different from each other. After the fourth doped layer 12B' is formed, the third mask M3 is removed. In one example, the fourth doped layer 12B' can be formed before the third doped layer 62A.

[0169] When the third doped layer 62A and the fourth doped layer 12B' are formed, a depletion layer can be formed at the junction between the third doped layer 62A and the fourth doped layer 12B'. The depletion layer can act as an insulating layer. Similar to the depletion layer formed at the junction between the first doped layer 12C' and the second doped layer 12D' described above, the position of the depletion layer formed at the junction between the third doped layer 62A and the fourth doped layer 12B' can also be controlled. That is, the thickness of the third doped layer 62A and the fourth doped layer 12B' can be controlled by controlling the formation process of the third doped layer 62A and the fourth doped layer 12B'. In one example, in the vertical direction, the position of the depletion layer formed between the third doped layer 62A and the fourth doped layer 12B' can be the same as the position of the depletion layer formed between the first doped layer 12C' and the second doped layer 12D'. In other words, the height of the depletion layer formed between the third doped layer 62A and the fourth doped layer 12B' can be the same as the height of the depletion layer formed between the first doped layer 12C' and the second doped layer 12D'.

[0170] Next, as Figure 21 As shown, a fourth mask M4 can be formed on the fourth semiconductor layer 42 to define a portion of the fourth semiconductor layer 42. The fourth mask M4 can be a mask made of the same material as the first mask M1, or it can be a mask made of a different material. The fourth mask M4 can be formed to completely cover the third doped layer 62A and the fourth doped layer 12B', and also cover a portion of the second doped layer 12D' adjacent to the fourth doped layer 12B'. The edges of the fourth mask M4 and the fourth semiconductor layer 42 are spaced apart from each other, and the upper surface of the fourth semiconductor layer 42 is exposed between the edges of the fourth mask M4 and the fourth semiconductor layer 42. The fourth mask M4 can be circular in a plan view. The fourth mask M4 can be a mask for forming the second portion 62C2 and the third portion 62C3 of the seventh region 62C of the third optical modulator 500. Therefore, the fourth mask M4 can be formed to expose only the portions of the fourth semiconductor layer 42 corresponding to the second portion 62C2 and the third portion 62C3.

[0171] The fourth mask M4 can be formed to cover the fourth semiconductor layer 42 and Figure 6 The region corresponding to the third radius 12R3 of the third optical modulator 500. Therefore, by adjusting the radius of the fourth mask M4, the third radius 12R3 of the third optical modulator 500 can be adjusted, and the ring width Rw1 can also be adjusted. Therefore, by adjusting the radius of the fourth mask M4, only the basic mode of light in the light transmitted to the third optical modulator 500 can be transmitted to the third optical modulator 500, and multi-mode light can be filtered.

[0172] Next, with the fourth mask M4 present, a fifth dopant DP5 can be implanted into the fourth semiconductor layer 42. The fifth dopant DP5 may include the same conductive impurities as the first dopant DP1. In one example, the fifth dopant DP5 may be the same material as the first dopant DP1. The process for implanting the fifth dopant DP5 can be an ion implantation process. In the process of implanting the fifth dopant DP5, a fifth ion implantation energy can be used to implant the fifth dopant DP5. The fifth ion implantation energy can be less than the second ion implantation energy. Through the fifth dopant implantation process (DP5), a fifth doped layer 12C in which the fifth dopant DP5 is ion implanted can be formed in the exposed region of the fourth semiconductor layer 42 on the second doped layer 12D' (see...). Figure 22 In the fifth dopant implantation process (DP5), the fifth dopant DP5 can be implanted at the same doping concentration as the first doped layer 12C'. Therefore, the concentration of the fifth doped layer 12C" can be the same as or substantially the same as the concentration of the first doped layer 12C'.

[0173] The exposed region of the fourth semiconductor layer 42 surrounding the fourth mask M4 covers the upper surface and the entire side surface of the second doped layer 12D'. Within the exposed region of the fourth semiconductor layer 42, the thickness of the region between the side surface of the second doped layer 12D' and the side surface of the fourth semiconductor layer 42 can be slightly thicker than the region on the upper surface of the second doped layer 12D', but not significantly. Therefore, due to annealing or heat treatment following the ion implantation of the fifth dopant DP5, the ion-implanted fifth dopant can diffuse into the region between the side surface of the second doped layer 12D' and the side surface of the fourth semiconductor layer 42. Therefore, the region between the side surface of the second doped layer 12D' and the side surface of the fourth semiconductor layer 42 can also become the fifth doped layer 12C.

[0174] Therefore, as Figure 22 As shown, through the fifth dopant implantation process (DP5), a fifth doped layer 12C” can be formed in the region of the fourth semiconductor layer 42 corresponding to the second portion 62C2 and the third portion 62C3 of the seventh region 62C of the third optical modulator 500. The fifth doped layer 12C” can be a region doped with the same conductive impurities as those doped into the first doped layer 12C', and can be a region with a doping concentration substantially the same as that of the first doped layer 12C'. Therefore, the first doped layer 12C' and the fifth doped layer 12C” can be a single doped region. Although the first doped layer 12C' and the fifth doped layer 12C” are in Figure 22 The layers are separate from the others in the diagram, but this is only for ease of explanation and understanding of the manufacturing process. In reality, the first doped layer 12C' and the fifth doped layer 12C" can be connected into a single region, for example... Figure 6 The seventh region, 62C.

[0175] In one example Figures 18 to 21 The order of implanting the first dopant DP1 through the fifth dopant DP5 in the manufacturing process shown can be varied. For example, the process of implanting the third dopant DP3 and the fourth dopant DP4 to form the highly doped region can be performed before the process of implanting the first dopant DP1 and the second dopant DP2 to form the low-doped region.

[0176] After forming the fifth doped layer 12C”, the fourth mask M4 is removed.

[0177] After removing the fourth mask M4, a fifth mask M5 can be formed on the fourth semiconductor layer 42, such as... Figure 22 As shown. The fifth mask M5 can be a mask used for etching, and can be a mask comprising the same material as the first mask M1, but can also be a mask comprising a different material. In a plan view, the fifth mask M5 can be formed as a circular strip, but can also be formed as a non-circular (e.g., elliptical). The fifth mask M5 can be formed only on the upper surface of the fifth doped layer 12C”. The area in which the fifth mask M5 is formed on the upper surface of the fifth doped layer 12C” can be adjusted by considering the ring width or the step difference formation position. For example, the position (boundary) of the inner surface of the fifth mask M5 can be adjusted between the inner and outer surfaces of the second doped layer 12D’.

[0178] Therefore, the fifth mask M5 can be a mask that defines the fourth semiconductor layer 42 such that the entire internal region of the fifth doped layer 12C” and a portion of the fifth doped layer 12C” are exposed in the fourth semiconductor layer 42.

[0179] Next, as Figure 23 As shown, while the fifth mask M5 is present, the exposed area of ​​the fourth semiconductor layer 42 can be etched first. The first etching can be performed until the second doped layer 12D' and the fourth doped layer 12B' are exposed. In one example, after exposing the second doped layer 12D' and the fourth doped layer 12B', the first etching can be further performed within a set time period, such that a step difference of a set thickness or depth is formed in the second doped layer 12D'. In one example, the first etching can be performed within the range where the fourth doped layer 12B' is not completely removed.

[0180] In other words, the first etching can be performed within the area where the depletion layer between the third doped layer 62A and the fourth doped layer 12B' is not exposed. By controlling the set etching time in the first etching, the thickness (depth) of the step difference formed in the second doped layer 12D' can also be controlled. Therefore, in the first etching, the thickness of the step difference formed in the second doped layer 12D' can be controlled to be greater than or less than the thickness of the remaining fourth doped layer 12B' after the first etching. As a result of the first etching, the thickness of the fourth doped layer 12B' becomes less than the thickness of the second doped layer 12D' below the fifth mask M5. After the first etching, the fifth mask M5 is removed.

[0181] After removing the fifth mask M5, as follows Figure 24 As shown, a sixth mask M6 can be formed on the fourth semiconductor layer 42. The sixth mask M6 can be an etching mask, and can be a mask comprising the same material as the fifth mask M5, or it can be a mask comprising a different material. In a planar view, the sixth mask M6 can be a circular strip, or it can be non-circular. The sixth mask M6 can be an etching mask used to form the second region 12B of the third optical modulator 500. Therefore, the sixth mask M6 can be formed such that only a portion of the fourth doped layer 12B' is exposed in the planar view, while the rest of the fourth semiconductor layer 42 is covered.

[0182] After the sixth mask M6 is formed, a second etching can be performed on the exposed portion of the fourth semiconductor layer 42 while the sixth mask M6 is present. The second etching can be performed until the exposed portion of the fourth doped layer 12B' and the depletion layer below it are removed and the third doped layer 62A below the depletion layer is exposed. In one example, at least the exposed portion of the fourth doped layer 12B' can be completely removed in the second etching.

[0183] Figure 25 The result of the second etching is shown. The junction area between the third doped layer 62A and the fourth doped layer 12B' can be reduced by the second etching. Therefore, the capacitance formed by the junction of the third doped layer 62A and the fourth doped layer 12B' in optical modulation operation can be reduced, and thereby the optical modulation speed can be increased.

[0184] The area remaining after the second etching of the fourth doped layer 12B' can be determined by the sixth mask M6. That is, by controlling the radius of the inner surface of the sixth mask M6, which is concentric with the first doped layer 12C', the area remaining after the second etching of the fourth doped layer 12B' can be increased or decreased. The capacitance can also be increased or decreased depending on the increase or decrease of the area remaining after the second etching of the fourth doped layer 12B'. Therefore, by controlling the inner diameter of the sixth mask M6, the capacitance generated by the junction of the third doped layer 62A and the fourth doped layer 12B' can be controlled.

[0185] like Figure 25 As shown, through the second etching, a second region 12B of the third optical modulator 500 can be formed on the third doped layer 62A, and a step difference can be formed between the third doped layer 62A and the second region 12B (i.e., between the sixth region 62A and the second region 12B). The degree of the step difference can vary depending on the etching conditions of the first etching.

[0186] After forming the second region 12B, the sixth mask M6 is removed.

[0187] like Figure 26 As shown, the first electrode layer 16 can be formed on the third doped layer (sixth region) 62A exposed in the second etching, and the second electrode layer 18 can be formed on the second region 12B. The first electrode layer 16 and the second electrode layer 18 can be formed using a separate mask used only for forming the first electrode layer 16 and the second electrode layer 18. In one example, the first electrode layer 16 and the second electrode layer 18 can be formed together with other components in other processes for forming a photonic integrated circuit (PIC) including an optical modulator. For example, in a process for forming a grating coupler, the first electrode layer 16 and the second electrode layer 18 can also be formed together using a mask and etching process for forming the grating coupler. In this way, the number of masks and etching processes can be reduced.

[0188] Figures 27 to 37 A method for manufacturing an optical modulator according to one or more embodiments is illustrated step by step.

[0189] Figures 27 to 37 The manufacturing method shown can be used to manufacture Figures 11 to 13 The method of the fifth optical modulator 1100 is shown. In the following description, reference numerals similar to those used in the description of the fifth optical modulator 1100 indicate similar components, and their descriptions are omitted.

[0190] First, such as Figure 27As shown, a seventh semiconductor layer 122 is formed on insulating layer 14. In one example, the seventh semiconductor layer 122 can be formed by transferring a semiconductor layer grown on a separate temporary substrate onto insulating layer 14, but is not limited thereto. The planar shape of the seventh semiconductor layer 122 can be a disk shape with a diameter of a few micrometers. A seventh mask 22M can be formed on the seventh semiconductor layer 122 to define a portion of the seventh semiconductor layer 122. The seventh mask 22M can be a mask comprising the same material as the first mask M1 described in the method of manufacturing the third optical modulator 500, but can also be a mask comprising a different material. The seventh mask 22M can be a mask used to form the third region 42C and the fourth region 42D of the fifth optical modulator 1100. Therefore, the seventh mask 22M can be formed on the seventh semiconductor layer 122 such that the regions of the seventh semiconductor layer 122 corresponding to the third region 42C and the fourth region 42D are exposed. In the planar view, the seventh mask 22M can be circular, but can also be non-circular (e.g., elliptical). The seventh mask 22M can be concentric with the seventh semiconductor layer 122.

[0191] After the seventh mask 22M is formed, a first dopant 22D can be implanted or doped into the exposed region of the seventh semiconductor layer 122 while the seventh mask 22M is present. The process of implanting the first dopant 22D can be an ion implantation process. The first dopant 22D can include conductive impurities of the same type as the first dopant described in the method for manufacturing the third optical modulator 500. In the process of implanting the first dopant 22D, the first ion implantation energy mentioned in the method for manufacturing the third optical modulator 500 can be used to implant the first dopant 22D. Through the process of implanting the first dopant 22D, a third region 42C doped with the first dopant 22D is formed in the seventh semiconductor layer 122. The third region 42C can also be represented as a doped layer with the first dopant 22D implanted (or doped). In the process of implanting the first dopant 22D, the first dopant 22D can be implanted at a predetermined concentration. The third region 42C can be formed concentrically with the seventh semiconductor layer 122.

[0192] After the formation of the third region 42C, as Figure 28As shown, while maintaining the seventh mask 22M, a second dopant 23D can be implanted into the exposed region of the seventh semiconductor layer 122. The process for implanting the second dopant 23D can be an ion implantation process, but is not limited to it. The second dopant 23D can include conductive impurities of the same type as those described in the method for manufacturing the third optical modulator 500. In the process of implanting the second dopant 23D, a second ion implantation energy can be used to implant the second dopant 23D. The second ion implantation energy can be lower than the first ion implantation energy. The second dopant 23D can be doped at the same or substantially the same concentration as the first dopant. Due to the process of implanting the second dopant 23D, a fourth region 42D doped with the second dopant 23D can be formed in the seventh semiconductor layer 122. The fourth region 42D can be represented as a doped layer with implanted second dopant 23D.

[0193] The types of dopants implanted into the third region 42C and the fourth region 42D are opposite. Therefore, a depletion layer according to the PN junction can be formed between the third region 42C and the fourth region 42D.

[0194] After forming the fourth region 42D, the seventh mask 22M is removed.

[0195] Next, as Figure 29 As shown, an eighth mask 24M can be formed on the seventh semiconductor layer 122 where the fourth region 42D is formed. The eighth mask 24M can be a mask made of the same material as the seventh mask 22M, or it can be a mask made of a different material. The eighth mask 24M can be a mask used to form the first doped region 42A and the second doped region 42B of the fifth optical modulator 1100. The eighth mask 24M can be formed only on the fourth region 42D, and it can be formed to cover the entire upper surface of the fourth region 42D. The eighth mask 24M can be concentric with the third region 42C and the fourth region 42D. Therefore, the interior of the fourth region 42D of the seventh semiconductor layer 122 can be exposed through the eighth mask 24M.

[0196] While the eighth mask 24M is present, a third dopant 24D can be implanted into the exposed portion of the seventh semiconductor layer 122. The third dopant 24D can be the same as the first dopant used to form the third region 42C, but can be from the same group of conductive impurities but different from the first dopant. In the process of implanting the third dopant 24D, the first ion implantation energy can be used to implant the third dopant 24D, but the third dopant 24D can be implanted at a higher concentration than when the first dopant 22D was implanted in the first dopant implantation process. For example... Figure 30 As shown, the first region 42A can be formed in the seventh semiconductor layer 122 by implanting the third dopant 24D.

[0197] After the formation of the first region 42A, as Figure 31 As shown, while maintaining the eighth mask 24M, a fourth dopant 26D can be implanted into the exposed portion of the seventh semiconductor layer 122. In the process of implanting the fourth dopant 26D, it can be implanted by ion implantation, but is not limited to this. The fourth dopant 26D can include the same conductive impurity as the second dopant 23D used to form the fourth region 42D, but can also include conductive impurities different from the second dopant 23D from the same type (e.g., p-type) group of conductive impurities. In the process of implanting the fourth dopant 26D, the fourth dopant 26D can be implanted using the second ion implantation energy. Therefore, in the seventh semiconductor layer 122, the fourth dopant 26D can be implanted at a location higher than the first region 42A. In the process of implanting the fourth dopant 26D, the fourth dopant 26D can be doped at the same or substantially the same concentration as the third dopant 24D. Due to the process of implanting the fourth dopant 26D, such as... Figure 32 As shown, a doped layer 42B' doped with a fourth dopant 26D can be formed on the first region 42A of the seventh semiconductor layer 122. The doped layer 42B' can also be represented as a doped region.

[0198] After forming the doped layer 42B', the eighth mask 24M is removed. Figure 33 The product obtained after removing the eighth mask 24M is shown.

[0199] Next, as Figure 34 As shown, a ninth mask 28M can be formed on the seventh semiconductor layer 122. The ninth mask 28M can be concentric with the doped layer 42B', the fourth region 42D, and the seventh semiconductor layer 122. The ninth mask 28M can be formed in a circular strip shape. The ninth mask 28M can be a mask comprising the same material as the seventh mask 22M, or it can be a mask comprising a different material. The ninth mask 28M can be a mask used for etching the doped layer 42B'. In a plan view, the ninth mask 28M can be formed to cover the entire fourth region 42D, expose the central portion of the doped layer 42B', and cover the remaining portion of the doped layer 42B'. The exposed central portion of the doped layer 42B' can be spaced apart from the fourth region 42D.

[0200] The diameter or radius of the exposed portion of the doped layer 42B' can vary depending on the inner diameter or the radius of the inner surface of the ninth mask 28M. The exposed portion of the doped layer 42B' can be etched in a subsequent process. Therefore, the size or inner radius of the remaining portion after etching the doped layer 42B' can be controlled by controlling the radius of the ninth mask 28M. Thus, the radius of the ninth mask 28M can be determined by considering the inner radius of the remaining doped layer 42B' after etching.

[0201] After the ninth mask 28M is formed, the exposed portion of the doped layer 42B' can be etched while the ninth mask 28M is present. Etching can be performed until the first region 42A is exposed. In this etching, at least the exposed portion of the doped layer 42B' can be completely removed, such as... Figure 35 As shown. This etching creates a step difference between the first region 42A and the remaining portion of the doped layer 42B' (i.e., the second region 42B). The inner diameter of the second region 42B or the radius of its inner surface can be controlled by controlling the inner diameter of the ninth mask 28M, as described above. That is, the junction region between the first region 42A and the second region 42B, which is a highly doped region, can be controlled by controlling the inner diameter of the ninth mask 28M. Therefore, the capacitance generated by the junction of the first region 42A and the second region 42B can also be controlled by controlling the inner diameter of the ninth mask 28M.

[0202] After forming the second region 42B, the ninth mask 28M is removed. Figure 36 The product obtained after removing the ninth mask 28M is shown.

[0203] Next, as Figure 37 As shown, a first electrode layer 16 can be formed on a first region 42A, and a second electrode layer 18 can be formed on a second region 42B. The first electrode layer 16 and the second electrode layer 18 can be formed simultaneously. The first electrode layer 16 and the second electrode layer 18 can be formed using separate masks as described in the manufacturing method of the third optical modulator 500, but they can also be formed together with other components using masking and etching processes used when forming other components.

[0204] Figures 38 to 52 A method for manufacturing an optical modulator according to one or more embodiments is illustrated step by step.

[0205] Figures 38 to 52 The manufacturing method shown can be used to manufacture Figure 16 The method of the eighth optical modulator 1400 shown. In the following description, reference numerals similar to those mentioned in the description of the eighth optical modulator 1400 and the manufacturing method above indicate similar components, and their descriptions are omitted.

[0206] like Figure 38 As shown, the tenth semiconductor layer 162 can be formed on the insulating layer 14. In one example, the tenth semiconductor layer 162 can be formed by transferring a semiconductor layer grown on a separate temporary substrate onto the insulating layer 14.

[0207] A tenth mask 38M, defining a portion of the tenth semiconductor layer 162, can be formed on the tenth semiconductor layer 162. In one example, the material of the tenth mask 38M can be... Figure 18 The first masks M1 are the same, but may be different from each other. The portion of the tenth semiconductor layer 162 defined by the tenth mask 38M may include a portion of the first portion 62C1 of the seventh region 62C to be formed of the eighth optical modulator 1400.

[0208] The first dopant 38D1 can be implanted into the exposed region of the tenth semiconductor layer 162 defined by the tenth mask 38M. In one example, the process of implanting the first dopant 38D1 can be performed in conjunction with a reference layer. Figure 18 The described process of implanting the first dopant DP1 is performed under the same process conditions (e.g., dopant type, implantation energy, doping concentration, etc.), but can also be performed under different process conditions. Due to the process of implanting the first dopant 38D1, a first portion 62C1 of the seventh region 62C can be formed in the tenth semiconductor layer 162. In one example, the first portion 62C1 can be an N-type doped layer (doped region). After forming the first portion 62C1, the tenth mask 38M is removed.

[0209] Next, as Figure 39 As shown, an eleventh mask 39M can be formed on the tenth semiconductor layer 162 to expose a portion of the tenth semiconductor layer 162. The eleventh mask 39M is a mask used to form the sixth region 62A of the eighth optical modulator 1400. Therefore, the eleventh mask 39M can be formed to expose the surface of the tenth semiconductor layer 162 corresponding to the sixth region 62A of the tenth semiconductor layer 162 of the eighth optical modulator 1400. In one example, the material of the eleventh mask 39M can be the same as that of the reference... Figure 20 The third mask M3 described is the same, but can also be different. The second dopant 39D1 can be implanted into the exposed region of the tenth semiconductor layer 162. In one example, the process of implanting the second dopant 39D1 can be performed in a manner similar to the reference... Figure 20 The process of implanting the third dopant DP3 to form the sixth region (doped layer) 62A is performed under the same process conditions, but it can also be performed under different process conditions. In one example, the type of the second dopant 39D1 can be the same as that of the first dopant 38D1, but even if the types of impurities are the same, the materials of the impurities can be different.

[0210] Due to the process of implanting the second dopant 39D1, a sixth region 62A can be formed in the tenth semiconductor layer 162. The first portion 62C1 and the sixth region 62A can be spaced apart from the upper surface of the tenth semiconductor layer 162.

[0211] Next, as Figure 40As shown, a twelfth mask 40M can be formed on the tenth semiconductor layer 162. The twelfth mask 40M can be a mask used to define a region corresponding to the diameter of the eighth region 62D of the tenth semiconductor layer 162 of the eighth optical modulator 1400. Therefore, the twelfth mask 40M can be formed such that the region corresponding to the diameter of the eighth region 62D in the tenth semiconductor layer 162 is exposed. The material of the twelfth mask 40M can be the same as the material of the tenth mask 38M or the eleventh mask 39M, but can be different from each other. With the twelfth mask 40M present, a third dopant 40D1 can be implanted into the exposed region of the tenth semiconductor layer 162. In one example, the process of implanting the third dopant 40D1 can be performed in conjunction with the reference... Figure 19 The process for implanting the second dopant DP2 is performed under the same process conditions, but it can also be performed under different process conditions. In one example, the dopant used in the process for implanting the third dopant 40D1 can be the same as the dopant used in the process for implanting the second dopant DP2, and although the dopant is of the same type (e.g., p-type dopant), dopant of different materials can be used.

[0212] By implanting a third dopant 40D1, a doped layer 62D' covering the first portion 62C1 and the sixth region 62A can be formed in the tenth semiconductor layer 162. The doped layer 62D' can be represented as a doped region. The doped layer 62D' can be in contact with the first portion 62C1 and the sixth region 62A. The doped layer 62D', as well as the first portion 62C1 and the sixth region 62A, contain dopants of opposite types. Therefore, a depletion layer can be formed between the doped layer 62D' and the first portion 62C1 and the sixth region 62A. By controlling the process conditions (e.g., implantation energy) of the dopant implantation process, the doped layer 62D' can be formed to be thinner or thicker than the doped layer shown in the figures. The doped layer 62D' can be spaced apart from the upper surface of the tenth semiconductor layer 162 in a direction perpendicular to the upper surface of the insulating layer 14. The doped layer 62D' can be spaced apart from the side surfaces of the tenth semiconductor layer 162 in a direction parallel to the upper surface of the insulating layer 14 (i.e., the lateral direction). The distance from the doped layer 62D' to the upper and side surfaces of the tenth semiconductor layer 162 can be controlled by controlling the width of the twelfth mask 40M or by controlling the dopant injection energy during the process used to form the doped layer 62D'.

[0213] Next, as Figure 41AAs shown, a thirteenth mask 41M can be formed on the tenth semiconductor layer 162 on which the doped layer 62D' is formed. The material of the thirteenth mask 41M can be the same as, but not limited to, the material of the eleventh mask 39M or the twelfth mask 40M. The thirteenth mask 41M can be a mask for forming the second region 12B of the eighth optical modulator 1400. In one example, the thirteenth mask 41M can be formed such that a region corresponding to the diameter of the second region 12B in the tenth semiconductor layer 162 is exposed. In other words, the thirteenth mask 41M can be formed such that the region defining the tenth semiconductor layer 162 corresponding to the diameter of the second region 12B is defined. After the thirteenth mask 41M is formed, a fourth dopant 41D1 can be implanted into the exposed region of the tenth semiconductor layer 162 while the thirteenth mask 41M is present. The process for implanting the fourth dopant 41D1 can be performed in conjunction with... Figure 20 The process is performed under the same process conditions as, but is not limited to, the process used to implant the fourth dopant DP4 to form the fourth doped layer 12B'. The doped layer 12B' can be formed in the tenth semiconductor layer 162 by implanting the fourth dopant 41D1. The doped layer 12B' can be represented as a doped region. The doped layer 12B' can have the same doping concentration as the sixth region 62A, and can be a layer with a higher doping concentration than the first portion 62C1 of the seventh region 62C and the doped layer 62D'. The diameter and shape of the doped layer 12B' in the plane can be the same as the sixth region 62A of the eighth optical modulator 1400. The doped layer 12B' can be concentric with the sixth region 62A formed below it, and the diameter and shape of the doped layer 12B' in the plane can be the same as the sixth region 62A. The doped layer 12B' can be formed to be vertically spaced from the sixth region 62A. The doped layer 62D' can exist between the doped layer 12B' and the sixth region 62A. The diameter of doped layer 12B” can be smaller than the diameter of doped layer 62D’. Doped layer 12B” and doped layer 62D’ can be concentric. The height of the lower boundary of doped layer 12B” can be lower than the height of the upper boundary of doped layer 62D’. The “lower boundary” and “upper boundary” can be conveniently represented as “bottom surface” and “upper surface”. The upper boundary (upper surface) of doped layer 12B” can coincide with the upper surface of the tenth semiconductor layer 162. That is, the upper surface of doped layer 12B” can be the upper surface of the tenth semiconductor layer 162.

[0214] Therefore, the doped layer 12B” can be shaped to diffuse from the upper surface of the tenth semiconductor layer 162 through the upper boundary of the doped layer 62D’ to a predetermined depth within the doped layer 62D’. Thus, the thickness of the doped layer 62D’ surrounding the doped layer 12B” can be greater than the thickness of the doped layer 62D’ between the doped layer 12B” and the sixth region 62A. That is, when the doped layer 12B” is formed, a step difference can be formed in the doped layer 62D’. The doped layer 12B” can be formed to have a uniform thickness over the entire region. Through a subsequent etching process, a portion of the doped layer 12B” can become the second region 12B of the eighth optical modulator 1400.

[0215] After forming the doped layer 12B, the thirteenth mask 41M is removed.

[0216] In one example, the doped layer 12B” can be formed such that the height of its upper boundary (upper surface) is the same as the height of the upper boundary (upper surface) of the doped layer 62D’, as shown below. Figure 41B As shown. In this case, the doped layer 12B” can be spaced apart from the upper surface of the tenth semiconductor layer 162.

[0217] Next, as Figure 42 As shown, a fourteenth mask 42M can be formed on the doped layer 12B”. The fourteenth mask 42M can be formed to cover the entire upper surface of the doped layer 12B”. The material of the fourteenth mask 42M can be the same as, but not limited to, the material of the tenth mask 38M. The fourteenth mask 42M can be a mask for forming the second portion 62C2 and the third portion 62C3 of the seventh region 62C of the eighth optical modulator 1400. When the fourteenth mask 42M is formed, the tenth semiconductor layer 162 surrounding the fourteenth mask 42M can be exposed.

[0218] When the fourteenth mask 42M is present, the fifth dopant 42D1 can be implanted into the exposed region of the tenth semiconductor layer 162. The process for implanting the fifth dopant 42D1 can be performed in conjunction with... Figure 21The process for implanting the fifth dopant DP5 is performed under the same process conditions, but it can also be performed under different process conditions. By implanting the fifth dopant DP5, a doped layer 62C' can be formed in the region between the upper surface of the tenth semiconductor layer 162 and the doped layer 62D', and in the region between the side surface of the tenth semiconductor layer 162 and the doped layer 62D'. The doped layer 62C' can be formed with the same doping concentration as the first portion 62C1 and the doped layer 62D', and can be formed with a lower concentration than the sixth region 62A and the doped layer 12B'. The doped layer 62C' can correspond to the second portion 62C2 and the third portion 62C3 of the seventh region 62C of the tenth semiconductor layer 162 of the eighth optical modulator 1400. The doped layer 62C' can cover the upper surface of the doped layer 62D' surrounding the doped layer 12B', and can also cover the side surface of the doped layer 62D'.

[0219] After forming the doped layer 62C', the fourteenth mask 42M is removed.

[0220] Next, as Figure 43 As shown, a fifteenth mask 43M can be formed on the doped layer 62C' of the tenth semiconductor layer 162. The fifteenth mask 43M can be a mask used to prevent etching of a predetermined area during an etching process. In one example, the material of the fifteenth mask 43M can be a photosensitive film such as photoresist, but is not limited thereto. The fifteenth mask 43M can be formed to cover the portion of the doped layer 62C' corresponding to the third portion 62C3 of the seventh region 62C of the tenth semiconductor layer 162 of the eighth optical modulator 1400. That is, the fifteenth mask 43M can be formed to define the portion corresponding to the third portion 62C3 in the doped layer 62C' and expose the remaining area of ​​the upper surface of the tenth semiconductor layer 162. While the fifteenth mask 43M is present, the exposed area of ​​the upper surface of the tenth semiconductor layer 162 can be etched. In one example, a dry etching method can be used to perform the etching, but is not limited thereto. The etching can be performed until the doped layer 62D' is exposed, as shown in the image. Figure 44 As shown. In one example, this etching can be performed until the upper boundary (upper surface) of the doped layer 62D' is exposed. During the etching, the doped layer 62C' between the fifteenth mask 43M and the doped layer 12B" can be etched, and the portion of the doped layer 12B" higher than the upper boundary of the doped layer 62D' can also be etched. Figure 44As shown, a recess 44R can be formed in the tenth semiconductor layer 162 by etching, wherein the surfaces (e.g., the upper surface) of the doped layer 62D' and the doped layer 12B'' become the bottom surfaces. The depth of the recess 44R can be the same as the thickness of the doped layer 62C' between the fifteenth mask 43M and the doped layer 62D'. When the recess 44R is formed, a step difference is formed between the upper surface of the doped layer 62C' and the upper surface of the doped layer 62D'.

[0221] Figure 45 The product obtained after removing the fifteenth mask 43M following etching is shown.

[0222] The horizontal portion of the upper surface of the doped layer 62C' covering the doped layer 62D' can be the third portion 62C3 of the seventh region 62C of the tenth semiconductor layer 162 of the eighth optical modulator 1400. The vertical portion of the side surface of the doped layer 62C' covering the doped layer 62D' can be the second portion 62C2 of the seventh region 62C of the tenth semiconductor layer 162 of the eighth optical modulator 1400. Therefore, in Figure 45 In the middle, the first part 62C1 and the doped layer 62C' become the seventh region 62C of the tenth semiconductor layer 162 of the eighth optical modulator 1400.

[0223] Next, as Figure 46 As shown, a sixteenth mask 47M can be formed on doped layers 12B” and 62C’. The sixteenth mask 47M can be an etch mask similar to the fifteenth mask 43M. The sixteenth mask 47M can be formed to cover the entire upper surface of doped layer 12B” and the entire upper surface of doped layer 62C’. When the sixteenth mask 47M is formed, the upper surface of doped layer 62D’ can be exposed. While the sixteenth mask 47M is present, the exposed upper surface of doped layer 62D’ can be etched. This etching can be performed until a depth corresponding to the thickness of doped layer 12B” is formed in doped layer 62D’. Figure 47 As shown, this etching fully exposes the side surface of the doped layer 12B”. This etching increases the step difference between the doped layers 62D’ and 62C’. Additionally, the doped layer 62D’ itself can also have a step difference. That is, since etching forms upper surfaces with different heights in the doped layer 62D’, a step difference is formed between the two upper surfaces. Specifically, as a result of etching, the doped layer 62D’ may include an upper surface 62S1 covered by the doped layer 62C’, and an upper surface 62S2 at the same height as the lower surface of the doped layer 12B” but lower than the upper surface 62S1. After etching, the sixteenth mask 47M is removed.

[0224] Figure 48 The product obtained after removing the sixteenth mask 47M is shown.

[0225] Next, as Figure 49 As shown, a seventeenth mask 49M can be formed to cover doped layers 12B”, 62C’, and 62D’. The seventeenth mask 49M can be formed to cover the entire upper surface of doped layer 62C’ and the entire upper surface 62S2 of doped layer 62D’ between doped layer 62C’ and doped layer 12B”. The seventeenth mask 49M can be formed concentrically with doped layer 12B” and can be formed to cover only the edges of doped layer 12B” while exposing the internal region of doped layer 12B”. The seventeenth mask 49M can be an etching mask similar to the sixteenth mask 47M.

[0226] While the seventeenth mask 49M is present, the exposed area of ​​the doped layer 12B” can be etched. This etching can be performed until the sixth region 62A is exposed after the doped layer 12B” and the underlying doped layer 62D’ are sequentially etched. Figure 50 As shown, this etching exposes the inner region of the sixth region 62A. That is, the upper surface of the inner region of the sixth region 62A can be exposed. Through the above etching, the planar shapes of the doped layer 62D' and the doped layer 12B” become annular. The ring width of the doped layer 62D' and the ring width of the doped layer 12B” can be different from each other. The remaining annular doped layer 62D' after etching can correspond to the eighth region 62D of the tenth semiconductor layer 162 of the eighth optical modulator 1400. The horizontal portion of the doped layer 62D' can correspond to the first portion 62D1 of the eighth region 62D, and the vertical portion of the doped layer 62D' can correspond to the second portion 62D2 of the eighth region 62D. In addition, the remaining doped layer 12B” after etching can correspond to the second region 12B of the tenth semiconductor layer 162 of the eighth optical modulator 1400. After etching, the seventeenth mask 49M is removed.

[0227] Figure 51 The product obtained after removing the seventeenth mask 49M is shown.

[0228] Next, as Figure 52 As shown, a first electrode layer 16 can be formed on the exposed region of the sixth region 62A, and a second electrode layer 18 can be formed on the doped layer 12B.

[0229] In this way, the eighth optical modulator 1400 can be formed.

[0230] Next, the manufacturing process will be described. Figure 15 Example of the process of the seventh optical modulator 1300.

[0231] First, it can be based on Figures 38 to 44 The illustrated process is used to perform this process. In this process, the doped layer 12B can be formed as follows: Figure 41B The shape shown. Additionally, in the formation... Figure 44 During the etching operation of the recess 44R, further etching can be performed to form a step difference on the doped layer 62D' itself, such as... Figure 53 As shown. Taking this into consideration, in the operation of forming the doped layer 12B”, the thickness of the doped layer 12B” can be formed to be greater than the height of the step difference formed in the doped layer 62D’ itself. Therefore, even after the step difference is formed on the doped layer 62D’ itself, a certain thickness of the doped layer 12B” can remain.”

[0232] After forming a step difference on the doped layer 62D' itself, it can be based on... Figures 49 to 52 To perform etching processes for doped layer 12B” and doped layer 62D’, and to form electrodes on the sixth region 62A exposed after etching and on the remaining doped layer 12B” after etching.

[0233] Figures 54 to 64 A method for manufacturing an optical modulator according to one or more embodiments is illustrated step by step.

[0234] Figures 54 to 64 The manufacturing method shown can be used to manufacture Figures 1 to 3 The method of the first optical modulator 20 shown. In the following description, reference numerals similar to those mentioned in the description of the first optical modulator 20 and the manufacturing method above indicate similar components, and their descriptions are omitted.

[0235] First, such as Figure 54 As shown, a second semiconductor layer 12 is formed on the insulating layer 14. An eighteenth mask 54M can be formed on the second semiconductor layer 12 to cover (define) the central portion of the second semiconductor layer 12. The formation location, material, and function of the eighteenth mask 54M can be related to... Figure 27 The seventh mask 22M is the same. While the eighteenth mask 54M is present, the first dopant 54D1 can be implanted into the second semiconductor layer 12. Through the process of implanting the first dopant 54D1, a third region 12C can be formed in the second semiconductor layer 12. The process of implanting the first dopant 54D1 can be the same as the reference. Figure 27 The process for implanting the first dopant 22D is the same as described. The formation location and process of the third region 12C can be the same as... Figure 27 The third region 42C is the same.

[0236] After the formation of the third region 12C, as Figure 55 As shown, while the eighteenth mask 54M is present, a second dopant 55D1 can be implanted into the exposed region of the second semiconductor layer 12. In one example, the process of implanting the second dopant 55D1 can be the same as that in the reference... Figure 28The process of implanting the second dopant 23D is the same as described. A doped layer 12D' can be formed in the second semiconductor layer 12 by implanting the second dopant 55D1. The doped layer 12D' can also be represented as a doped region. The location of the doped layer 12D' can correspond to the fourth region 12D of the first optical modulator 20. In subsequent processes, the shape of the doped layer 12D' can be changed to the shape of the fourth region 12D of the first optical modulator 20. The formation location and process of the doped layer 12D' can be the same as described. Figure 28 The fourth region 42D is the same. In one example, during the formation of the doped layer 12D', the thickness of the doped layer 12D' in the direction perpendicular to the upper surface of the insulating layer 14 can be formed to be different from the thickness of the third region 12C. For example, the thickness of the doped layer 12D' can be formed to be greater than the thickness of the third region 12C. In a subsequent etching process, a portion of the thickness of the doped layer 12D' can be less than the initial thickness of the doped layer 12D', such that the doped layer 12D' becomes the fourth region 12D of the first optical modulator 20.

[0237] The types of dopants implanted in the third region 12C and the doped layer 12D' are opposite. Therefore, a depletion layer due to the PN junction can be formed between the third region 12C and the doped layer 12D'.

[0238] After forming the doped layer 12D', the eighteenth mask 54M is removed.

[0239] Next, as Figure 56 As shown, a nineteenth mask 56M can be formed on the second semiconductor layer 12. The nineteenth mask 56M can be a mask made of the same material as the eighteenth mask 54M, but it can also be a mask made of a different material. The nineteenth mask 56M can be a mask used to form a portion of the first doped region 12A (i.e., a portion of the first doped region 12A with a relatively wide width) of the first optical modulator 20. The nineteenth mask 56M can be formed only on the doped layer 12D', and can be formed to cover the entire upper surface of the doped layer 12D'. The nineteenth mask 56M can be concentric with the third region 12C and the doped layer 12D'. Therefore, the internal portion of the doped layer 12D' of the second semiconductor layer 12 can be exposed through the nineteenth mask 56M.

[0240] While the nineteenth mask 56M is present, the third dopant 56D1 can be implanted into the exposed portion of the second semiconductor layer 12. The process for implanting the third dopant 56D1 can be compared with... Figure 29 The process shown is the same as that for implanting the third dopant 24D, and can be performed under the same process conditions as that for implanting the third dopant 24D, but can also be performed under different process conditions.

[0241] like Figure 57As shown, a doped layer 12A' can be formed on the second semiconductor layer 12 by implanting a third dopant 56D1. The doped layer 12A' can be a portion of the first region 12A of the first optical modulator 20. That is, the formation location and width of the doped layer 12A' can correspond to the formation location and width of a relatively wide portion of the first region 12A of the first optical modulator 20. In one example, the doped layer 12A' can be formed to have the same height as the third region 12C and the same thickness as the third region 12C, but is not limited thereto. After forming the doped layer 12A', the nineteenth mask 56M is removed.

[0242] Next, as Figure 58 As shown, a twentieth mask 58M can be formed on the second semiconductor layer 12. The twentieth mask 58M can be formed to cover the entire upper surface of the doped layer 12D', and even cover the portion of the second semiconductor layer 12 inside the doped layer 12D'. The twentieth mask 58M can be a mask used to form the remaining portion of the first region 12A of the first optical modulator 20. That is, the twentieth mask 58M can be a mask used to form a portion of the first region 12A of the first optical modulator 20 with a relatively narrow width. Therefore, the twentieth mask 58M can be formed such that the upper surface of the second semiconductor layer 12 corresponding to the narrower portion of the first region 12A of the first optical modulator 20 is exposed. The twentieth mask 58M can be formed concentrically with the doped layer 12D'. In one example, the material of the twentieth mask 58M can be the same as the material of the nineteenth mask 56M, but is not limited thereto.

[0243] While the twentieth mask 58M is present, a fourth dopant 58D1 can be implanted into the exposed region of the second semiconductor layer 12. In one example, the process of implanting the fourth dopant 58D1 can be performed concurrently with... Figure 31 The implantation of the fourth dopant 26D was performed under the same process conditions. However, as Figure 58 The type of dopant used in the process of implanting the fourth dopant 58D1 shown can be similar to, for example... Figure 31 The type of dopant used in the process of implanting the fourth dopant 26D is reversed. For example, Figure 58 The dopant used in the process of implanting the fourth dopant 58D1 shown can be an N-type dopant, and Figure 31 The dopant used in the process of implanting the fourth dopant 26D shown can be a P-type dopant.

[0244] therefore, Figure 58 The material and type of dopant used in the process of implanting the fourth dopant 58D1 shown can be related to... Figure 56The dopant material and type used in the process of implanting the third dopant 56D1 shown are the same, but not limited to.

[0245] like Figure 59 As shown, a doped layer 12A” can be formed in the second semiconductor layer 12 by implanting a fourth dopant 58D1. The thickness of the doped layer 12A” can be the same as or substantially the same as the thickness of the doped layer 12D’. The two doped layers 12A and 12A”, which are stacked sequentially, can be concentric. In one example, the thickness of the doped layer 12A” can be thicker than the thickness of the doped layer 12A’ below the doped layer 12A”, but it is not limited thereto. In addition, the width of the doped layer 12A” can be smaller than the width of the doped layer 12A’ below the doped layer 12A”. The doped layers 12A” and 12D’ can be formed to be spaced apart from each other. The doped layer 12A” can correspond to a portion of the first region 12A of the first optical modulator 20 with a relatively narrow width. The dopant material and dopant type implanted in the two doped layers 12A’ and 12A” can be the same. Therefore, the two doped layers 12A' and 12A" can become a single doped layer or doped region. That is, the region in the second semiconductor layer 12 that includes the two doped layers 12A' and 12A" can correspond to the first region 12A of the first optical modulator 20.

[0246] In one example, during the formation of doped layers 12A', 12A” and 12D' or third region 12C, the thickness of each of the doped layers 12A', 12A” and 12D' or third region 12C can be controlled by controlling the dopant implantation energy.

[0247] After forming the doped layer 12A", the twentieth mask 58M is removed.

[0248] Next, as Figure 60 As shown, a twenty-first mask 60M can be formed on the second semiconductor layer 12. The material of the twenty-first mask 60M can be... Figure 27The eighth mask 24M or the twentieth mask 58M is the same, but not limited to, it. The twenty-first mask 60M can be a mask for forming a doped region corresponding to the second region 12B of the first optical modulator 20. Therefore, the twenty-first mask 60M can be formed to define the upper surface of the second semiconductor layer 12 corresponding to the second region 12B of the first optical modulator 20. Therefore, after forming the twenty-first mask 60M, the upper surface of the second semiconductor layer 12 corresponding to the second region 12B of the first optical modulator 20 can be exposed. In one example, the twenty-first mask 60M can be formed only on the upper surface of the doped layer 12A” and the upper surface of the doped layer 12D'. The twenty-first mask 60M can be formed to cover the entire upper surface of the two doped layers 12A” and 12D'. When the twenty-first mask 60M is formed, the region between the two doped layers 12A” and 12D' in the second semiconductor layer 12 can be exposed.

[0249] While the twenty-first mask 60M is present, the fifth dopant 60D1 can be implanted into the second semiconductor layer 12. In one example, the process of implanting the fifth dopant 60D1 can be performed concurrently with... Figure 31 The implantation of the fourth dopant 26D was performed under the same process conditions. Due to the process of implanting the fifth dopant 60D1, such as... Figure 61 As shown, a second region 12B can be formed in a second semiconductor layer 12 between the two doped layers 12D' and 12A'". In one example, the second region 12B can be formed to have the same or substantially the same thickness as the doped layer 12A'. The type of dopant implanted in the second region 12B is opposite to the type of dopant implanted in the doped layers 12A' and 12A'. Therefore, a depletion layer can be formed between the second region 12B and the two doped layers 12A' and 12A'. After forming the second region 12B, the twenty-first mask 60M is removed.

[0250] After removing the 21st mask 60M, as Figure 62As shown, a second twelfth mask 62M can be formed on the doped layer 12D' of the second semiconductor layer 12. The second twelfth mask 62M can be formed concentrically with the doped layer 12D'. The boundaries of the edges of the second twelfth mask 62M can be formed to coincide with the boundaries of the edges of the doped layer 12D'. That is, the outer diameter of the second twelfth mask 62M can be the same as or substantially the same as the outer diameter of the doped layer 12D'. The inner diameter of the second twelfth mask 62M can be larger than the inner diameter of the doped layer 12D'. The second twelfth mask 62M can be spaced apart from the inner boundaries (edges) of the doped layer 12D'. The planar shape of the second twelfth mask 62M can be annular and can have a given annular width. Here, the "annular width" can be the width measured in the radial direction. The second twelfth mask 62M can be an etching mask used for etching to define a second portion 12D2 of the fourth region 12D of the first optical modulator 20. In one example, the second twelfth mask 62M can be a photosensitive film mask, but is not limited thereto.

[0251] The portion of the doped layer 12D' covered by the twenty-second mask 62M can define the upper surface of the second portion 12D2 of the fourth region 12D of the first optical modulator 20, and can also define the ring width of the second portion 12D2. Therefore, the twenty-second mask 62M can be formed on the doped layer 12D' with the above considerations in mind.

[0252] When the 22nd mask 62M is formed, the entire upper surface of the doped layer 12A” of the second semiconductor layer 12 and the entire upper surface of the second region 12B can be exposed, and a portion of the upper surface of the doped layer 12D' adjacent to the second region 12B can also be exposed.

[0253] While the twenty-second mask 62M is present, the exposed areas of the second semiconductor layer 12 can be etched. This etching can be performed to reduce the surface height of the exposed areas of the second semiconductor layer 12. Due to this etching, the thickness of the exposed areas of the second semiconductor layer 12 can be thinner than the thickness of the unexposed areas. That is, due to this etching, such as Figure 63 As shown, the thickness of the second region 12B and the thickness of the exposed portion of the doped layer 12A”, and the thickness of the exposed portion of the doped layer 12D’, can be thinner than the thickness of the portion of the doped layer 12D’ covered by the second twelfth mask 62M. In this way, a recess 63R can be formed in the second semiconductor layer 12, such as Figure 63 As shown. In one example, the depth of the recess 63R, i.e. the thickness of the remaining exposed portion of the second semiconductor layer 12 after etching, can be adjusted by adjusting the etching process conditions (e.g., etching time, etching rate, etc.).

[0254] As a result of etching, such Figure 63 As shown, the following can appear in the doped layer 12D': Figure 2The two upper surfaces 2S1 and 2S2 shown have different heights, therefore, by etching, a structure can be formed in the doped layer 12D' that is similar to... Figure 2 The step difference 15 corresponds to the step difference. After etching, the height of the upper surface of the second region 12B and the doped layer 12A” can be the same as the height of the upper surface 2S1 of the doped layer 12D’.

[0255] The combined region of the etched doped layers 12A' and 12A' can be the same as or substantially the same as the first region 12A of the first optical modulator 20, and the doped layer 12D' can be the same as or substantially the same as the fourth region 12D of the first optical modulator 20. That is, the horizontal and vertical portions of the etched doped layer 12D' can correspond to the first portion 12D1 and the second portion 12D2 of the fourth region 12D of the first optical modulator 20, respectively.

[0256] After etching, the 22nd mask 62M is removed.

[0257] Next, as Figure 64 As shown, a first optical modulator 20 can be formed by forming a first electrode layer 16 on the doped layer 12A” and a second electrode layer 18 on the second region 12B. The first electrode layer 16 and the second electrode layer 18 are spaced apart from each other. The first electrode layer 16 and the second electrode layer 18 can be formed as concentric circles. The first electrode layer 16 and the second electrode layer 18, the doped layer 12A” and the second region 12B can be concentric circles. The height of the upper surface of the first electrode layer 16 and the second electrode layer 18 can be the same as or different from the height of the upper surface 2S2 of the doped layer 12D’.

[0258] For example, in the various manufacturing methods described above, when semiconductor layers 12, 42, 122, and 162 are formed on the SOI substrate, optical waveguides can also be formed on the SOI substrate. For example, one optical waveguide 10 or two optical waveguides 13A and 13B can be formed simultaneously on the SOI substrate along with semiconductor layers 12, 42, 122, and 162.

[0259] The following describes the results of simulations performed to confirm the effects of having and not having step differences in the highly doped region of the optical modulator.

[0260] Figure 65 The diagram shows cross-sectional views of the first model a and the second model b used in the simulation. Only the right-hand side of the center of the cross-section of the optical modulator is shown for the first model a and the second model b.

[0261] First model a represents an optical modulator according to one or more embodiments, wherein there is a step difference between a first doped region HD1 and a second doped region HD2, which are highly doped regions. In first model a, reference numerals LD3 and LD4 represent a third doped region and a fourth doped region, which are low-doped regions, respectively. Additionally, reference numeral 33D in both first model a and second model b represents a depletion layer.

[0262] The second model b represents a conventional optical modulator, in which there is no step difference between the first doped region HD1 and the second doped region HD2.

[0263] In the simulation, a silicon (Si) layer is used as the semiconductor layer on which the first to fourth doped regions HD1, HD2, LD3, and LD4 are formed. The highly doped first doped region HD1 and the lightly doped third doped region LD3 are regions doped with n-type dopant, and phosphorus (P) is used as the n-type dopant. The highly doped second doped region HD2 and the lightly doped fourth doped region LD4 are regions doped with p-type dopant, and boron (B) is used as the p-type dopant. Furthermore, the doping concentrations of the first doped region HD1 and the second doped region HD2 are 1 × 10⁻⁶. 20 / cm 3 Furthermore, the doping concentrations of the third doped region LD3 and the fourth doped region LD4 are 3×10⁻⁶. 18 / cm 3 .

[0264] In the above simulation, the resistance R, capacitance C, and electrical modulation bandwidth EBW were measured when a voltage was applied between the first doped region HD1 and the second doped region HD2.

[0265] Table 1 below summarizes the simulation results.

[0266]

[0267]

[0268] Referring to Table 1, in the case of the first model a, compared to the second model b, the junction between the first doped region HD1 and the second doped region HD2, which are highly doped regions, is smaller, thus the resistance increases slightly. However, the capacitance of the first model a is much smaller than that of the second model b. The capacitance difference between the first model a and the second model b is much larger than the resistance difference between the first model a and the second model b. Therefore, the RC delay of the first model a becomes smaller than that of the second model b, resulting in a significantly larger EBW for the first model a compared to the second model b. These results indicate that the first model a is much more advantageous from the perspective of high-speed optical modulation.

[0269] The optical modulator according to one or more of the above embodiments can be used in various electronic devices that require high-speed optical modulation, such as optical interconnects, optical operations, optical communications, etc.

[0270] Figure 66 This is a block diagram that schematically illustrates an example of an electronic device. Figure 66 The electronic device can be a light transmitter.

[0271] refer to Figure 66 The electronic device 300 may include an electrical integrated circuit (EIC) unit 300A and a photonic integrated circuit (PIC) unit 300B.

[0272] EIC unit 300A may include: a multiplexer (MUX) 310 into which multiple electrical signals ES1 can be input; and a first amplifier 320 to amplify the signal output from MUX 310. The multiple electrical signals ES1 may be different individual electrical signals, but are not limited to this. Depending on the multiplexing method, MUX 310 may use frequency division multiplexing (FDM), time division multiplexing (TDM), or code division multiplexing (CDM) techniques. The amplified and output electrical signal ES2 from the first amplifier 320 is transmitted (inputted) to PIC unit 300B. EIC unit 300A may also include other components.

[0273] The PIC unit 300B may also include a light source 330, an optical modulator 340, and a second amplifier 350. The PIC unit 300B may also include other components. The optical modulator 340 may be... Figures 1 to 17 One of the optical modulators shown, or capable of being from Figures 1 to 17 One of the optical modulators derived from the combination of the illustrated optical modulators. A light source 330 and a second amplifier 350 can be connected to an optical waveguide 360. An optical modulator 340 can be arranged between the light source 330 and the second amplifier 350 along the optical waveguide 360. Light emitted from the light source 330 can be transmitted through the optical waveguide 360 ​​to the second amplifier 350. The light source 330 and the second amplifier 350 can be optically coupled to the optical waveguide 360. Coupling can be performed using an optical coupler, but is not limited to this. The light source 330 may include a light source emitting a laser (e.g., a laser in the infrared band), and the laser may be a continuous laser, but is not limited to this. A portion of the light emitted from the light source 330 and transmitted through the optical waveguide 360 ​​can be transmitted to a microdisk 370 positioned near the optical waveguide 360 ​​as it passes through the optical modulator 340. The light transmitted to the microdisk 370 can be light in a basic mode and can propagate along the boundary (low-density doped region) of the microdisk 370 in an echo corridor mode. In one example, the microdisk 370 may include... Figures 1 to 17The optical modulator shown has one of semiconductor layers 12, 32, 42, 82, 102, 122, 142, 152, and 162. The electrical signal ES2 output from the first amplifier 320 of the EIC unit 300A can be a voltage applied to the microdisk 370. That is, the electrical signal ES2 output from the first amplifier 320 can be applied to the first electrode layer (e.g., on a highly doped region of the microdisk 370). Figure 2 16) and the second electrode layer (e.g., Figure 2 The voltage of 18).

[0274] Therefore, the refractive index of the edge of the microdisk 370 changes according to the electrical signal ES2 applied to the microdisk 370 from the first amplifier 320, thus modulating the light propagating along the edge of the microdisk 370. The light modulated in this way can be transmitted to the optical waveguide 360 ​​and amplified by the second amplifier 350 before being output.

[0275] In one example, the optical modulator 340 of the PIC unit 300B may also include... Figure 17 The optical waveguide corresponding to the second optical waveguide 13B shown.

[0276] Based on the above embodiments, the following various optical modulators, manufacturing methods, and electronic devices can be derived.

[0277] An optical modulator according to one or more embodiments includes:

[0278] First semiconductor layer;

[0279] The second semiconductor layer is disposed on the first semiconductor layer in the form of a micro disk, and includes a highly doped region with a relatively high doping concentration and a low doped region with a relatively low doping concentration.

[0280] A first optical waveguide is arranged adjacent to a second semiconductor layer; and

[0281] The first electrode layer and the second electrode layer are spaced apart from each other on the highly doped region.

[0282] The second semiconductor layer includes at least one recessed portion; and

[0283] The second semiconductor layer has at least one step difference due to the recess, and

[0284] The highly doped region, the low-doped region, and the recess can be concentric.

[0285] In one example, the second semiconductor layer includes a first recess, and the bottom surface of the first recess includes an upper surface of a highly doped region and an upper surface of a low-doped region, the side surface of the first recess includes an inner surface of a low-doped region, and due to the first recess, a first step difference may exist in the low-doped region.

[0286] In one example, the highly doped region includes an N-type doped region doped with an N-type dopant and a P-type doped region doped with a P-type dopant, the low-doped region includes an N-type doped region doped with an N-type dopant and a P-type doped region doped with a P-type dopant, the bottom surface of the first recess includes the upper surfaces of the N-type doped region and the P-type doped region in the highly doped region, and the first upper surface of the P-type doped region in the low-doped region, the side surface of the first recess includes the inner surface of the P-type doped region in the low-doped region, and the first step difference can correspond to the height difference between the first upper surface of the P-type doped region in the low-doped region and the second upper surface, which is higher than the first upper surface.

[0287] In one example, the highly doped region includes an N-type doped region doped with N-type dopant and a P-type doped region doped with P-type dopant, the low-doped region includes an N-type doped region doped with N-type dopant and a P-type doped region doped with P-type dopant, the bottom surface of the first recess includes the upper surface of the N-type doped region and the upper surface of the P-type doped region in the highly doped region, and the first upper surface of the P-type doped region in the low-doped region, the side surface of the first recess includes the inner surface of the P-type doped region in the low-doped region and the inner surface of the N-type doped region in the low-doped region, and the first step difference can correspond to the height difference between the first upper surface of the P-type doped region in the low-doped region and the upper surface of the N-type doped region in the low-doped region.

[0288] In one example, the N-type doped region of the low-doped region is located between the P-type doped region and the first semiconductor layer, and has a shape that completely surrounds the P-type doped region of the low-doped region around the first recess, and the outer surface of the N-type doped region of the low-doped region can be the side surface of the second semiconductor layer.

[0289] In one example, the P-type and N-type doped regions in the highly doped region are concentric. There is a step difference between the center and the edge of the N-type doped region in the highly doped region. The thickness of the edge of the N-type doped region in the highly doped region is less than the thickness of the center. The edges of the P-type doped region and the N-type doped region in the highly doped region overlap. The upper surfaces of the P-type doped region and the N-type doped region in the highly doped region can form the same plane.

[0290] In one example, the second semiconductor layer includes a second recess disposed inside the first recess and concentric with the first recess. The side and bottom surfaces of the second recess include surfaces of highly doped regions. Due to the second recess, there is a second step difference within the first recess. The first step difference and the second step difference are spaced apart from each other in a horizontal direction parallel to the upper surface of the first semiconductor layer, and the first step difference and the second step difference may be at different heights.

[0291] In one example, the highly doped region includes an N-type doped region doped with an N-type dopant and a P-type doped region doped with a P-type dopant. The N-type and P-type doped regions are concentric. The bottom surface of the second recess includes the upper surface of the N-type doped region, the side surface of the second recess includes the side surface of the P-type doped region, and the second step difference can correspond to the height difference between the upper surface of the N-type doped region and the upper surface of the P-type doped region in the highly doped region.

[0292] In one example, the highly doped region includes an N-type doped region doped with an N-type dopant and a P-type doped region doped with a P-type dopant. The N-type and P-type doped regions are concentric and spaced apart from each other in a direction perpendicular to the upper surface of the first semiconductor layer. The bottom surface of the second recess includes the upper surface of the N-type doped region, the side surface of the second recess includes the side surface of the P-type doped region, and the second step difference can correspond to the height difference between the upper surface of the N-type doped region and the upper surface of the P-type doped region in the highly doped region.

[0293] In one example, a portion of the low-doped region exists between N-type and P-type doped regions that are spaced apart from each other, and the side surface of the second recess may be formed by the side surface of a portion of the low-doped region and the side surface of the P-type doped region.

[0294] In one example, the low-doped region includes an N-type doped region doped with an N-type dopant and a P-type doped region doped with a P-type dopant, and the N-type doped region and the P-type doped region of the low-doped region are concentric. The bottom surface of the first recess includes the upper surface of the P-type doped region of the low-doped region, and the inner surface of the first recess may include the side surface of the P-type doped region of the low-doped region.

[0295] In one example, the low-doped P-type doped region may include three regions with different thicknesses and may have a cross-sectional shape that thins towards the center of the second semiconductor layer. In another example, the low-doped P-type doped region may include a step difference in physical thickness and a step difference in thickness of the doped region within a region of constant physical thickness. In yet another example, the low-doped P-type doped region may include regions with different thicknesses of the doped region within a region of constant physical thickness.

[0296] In one example, the side surface of the first recess may include the inner surface of the P-type doped region of the low-doped region and the inner surface of the N-type doped region of the low-doped region.

[0297] In one example, the N-type doped region of the low-doped region is located between the first semiconductor layer and the P-type doped region of the low-doped region, and has a shape that completely surrounds the P-type doped region of the low-doped region around the first recess, and the outer surface of the N-type doped region of the low-doped region can be the side surface of the first semiconductor layer.

[0298] In one example, the second semiconductor layer includes a first recess, the bottom surface of which includes the upper surface of the low-doped region, the side surface of which includes the inner surface of the low-doped region, and a first step difference may exist in the low-doped region due to the first recess.

[0299] In one example, the second semiconductor layer includes a second recess disposed within and concentric with the first recess. The bottom surface of the second recess includes the surface of a highly doped region, and the side surface of the second recess includes the inner surface of a lightly doped region. Due to the second recess, a second step difference exists within the first recess. The first step difference and the second step difference are spaced apart from each other in a horizontal direction parallel to the upper surface of the first semiconductor layer, and the first step difference and the second step difference can be at different heights. In one example, the highly doped region includes an N-type doped region doped with an N-type dopant and a P-type doped region doped with a P-type dopant. The N-type and P-type doped regions are concentric and spaced apart from each other in a direction perpendicular to the upper surface of the first semiconductor layer. The bottom surface of the second recess includes the upper surface of the N-type doped region, and the P-type doped region is on the bottom surface of the first recess. The inner surface of the P-type doped region and the side surface of the second recess form the same side surface, and the second step difference can correspond to the height difference between the upper surface of the N-type doped region in the highly doped region and the bottom surface of the first recess. In one example, the low-doped region includes an N-type doped region doped with N-type dopant and a P-type doped region doped with P-type dopant. The N-type and P-type doped regions of the low-doped region are concentric. The bottom surface of the first recess includes the upper surface of the P-type doped region of the low-doped region, and the inner surface of the first recess may include the side surface of the P-type doped region of the low-doped region. In one example, the side surface of the first recess may include the inner surfaces of the P-type and N-type doped regions of the low-doped region. In one example, the N-type doped region of the low-doped region is formed between the first semiconductor layer and the P-type doped region of the low-doped region, and is formed to completely surround the P-type doped region of the low-doped region around the first recess. The outer surface of the N-type doped region of the low-doped region may be the side surface of the first semiconductor layer. In one example, the N-type doped region, the P-type doped region, and the P-type doped region of the low-doped region may be configured to overlap each other around the second recess.

[0300] In one example, the second semiconductor layer includes a first recess, and the side and bottom surfaces of the first recess include the surfaces of the highly doped region. Due to the first recess, a first step difference may exist in the highly doped region. In one example, the highly doped region includes an N-type doped region doped with an N-type dopant and a P-type doped region doped with a P-type dopant. The bottom surface of the first recess includes the upper surface of the N-type doped region, and the side surfaces of the first recess include the side surfaces of the P-type doped region. The N-type and P-type doped regions may be configured to overlap each other around the first recess. In one example, a low-doped region is configured to completely surround the highly doped region in a plan view. The low-doped region includes an N-type doped region doped with an N-type dopant and a P-type doped region doped with a P-type dopant. The N-type and P-type doped regions of the low-doped region may be sequentially arranged in a direction perpendicular to the upper surface of the first semiconductor layer. In one example, the P-type doped region of the low-doped region is configured to cover the vertical and lateral boundaries of the N-type doped region, and the side surface of the P-type doped region of the low-doped region may be the outer surface of the second semiconductor layer. In one example, the N-type doped region and the P-type doped region of the highly doped region can be configured to overlap each other around the first recess.

[0301] In one example, the second semiconductor layer includes a first recess, the bottom surface of which includes the upper surface of a highly doped first doped region, and the side surfaces of the first recess include the side surfaces of a low-doped region and a highly doped second doped region. The first and second doped regions are spaced apart from each other, and the first, second, and first recesses are concentric. Due to the first recess, a step difference may exist between the upper surfaces of the first and second doped regions. In one example, the first and second doped regions include dopants of opposite types and are spaced apart from each other in a direction perpendicular to the upper surface of the first semiconductor layer. The outer diameter of the first doped region and the inner diameter of the second doped region may be the same. In one example, the second doped region may be configured such that a step difference is formed in the low-doped region. In one example, the low-doped region includes an N-type doped region doped with N-type dopant and a P-type doped region doped with P-type dopant, and the N-type and P-type doped regions may be sequentially arranged in a direction perpendicular to the upper surface of the first semiconductor layer. In one example, the P-type doped region is configured to cover the vertical and lateral boundaries of the N-type doped region, and the side surface of the P-type doped region can be the outer surface of the second semiconductor layer.

[0302] In one example, the optical modulator further includes a second optical waveguide spaced apart from the second semiconductor layer, and the second semiconductor layer may be disposed between the first optical waveguide and the second optical waveguide.

[0303] A method of manufacturing an optical modulator according to one or more embodiments includes:

[0304] The operation of forming a microdisk-shaped second semiconductor layer on the first semiconductor layer;

[0305] The operation of forming a first doped region with a circular shape in a portion of the second semiconductor layer;

[0306] The operation of forming a second doped region in a second semiconductor layer around the first doped region to be concentric with the first doped region and surrounding the first doped region in a plan view;

[0307] The operation of forming a first step difference in one of the first doped region and the second doped region; and

[0308] The operation of forming an electrode layer on a first doped region, wherein the first doped region has a higher doping concentration than the second doped region.

[0309] In one example, a first step difference may be formed in a first doped region. In another example, the manufacturing method may further include forming a second step difference in a second doped region.

[0310] In one example, the operation of forming the second doped region also includes:

[0311] The operation of forming the first doped layer;

[0312] The operation of forming a second doped layer on the first doped layer to include a second step difference; and

[0313] The operation of forming a third doped layer, which covers the outside of the second step difference of the second doped layer and contacts the first doped layer, and

[0314] The first and third doped layers may include the same type of dopant.

[0315] An electronic device according to one or more embodiments includes:

[0316] light source;

[0317] Optical waveguides transmit light emitted from a light source.

[0318] A semiconductor layer, disposed adjacent to the optical waveguide, is provided in the form of a microdisk and includes multiple doped regions; and

[0319] The amplifier is configured to amplify the light transmitted through the optical waveguide.

[0320] The semiconductor layer includes a first doped region and a second doped region at its center.

[0321] The remaining doped regions, excluding the first and second doped regions, are arranged around the first and second doped regions.

[0322] The first doped region and the second doped region are regions doped with dopants of opposite types.

[0323] The doping concentrations of the first and second doped regions are higher than those of the other doped regions, and

[0324] The semiconductor layer includes at least one step difference.

[0325] Although many matters have been described in detail above, they should be interpreted as illustrative of preferred embodiments and not as limiting the scope of the invention. Therefore, the scope of this disclosure should not be limited by the above embodiments, but rather determined by the spirit of the technology described in the claims.

[0326] The disclosed microdisk-type optical modulator includes a semiconductor layer in the form of a microdisk, and at least one step difference is formed in a PN-doped region of the semiconductor layer. The step difference is formed in the inner PN-doped region of the semiconductor layer with a high concentration of doping to reduce the PN junction area. An N-type doped region is formed in the outer PN-doped region of the semiconductor layer with a low concentration of doping to surround the outside of the P-type doped region, and a step difference is formed at a predetermined position in the P-type doped region. The positions of these step differences can be controlled during the manufacturing process. By controlling the position of the step difference formed in the inner PN-doped region with a high concentration of doping, the capacitance of the optical modulator can be reduced, thereby increasing the modulation speed of the optical modulator. In the PN-doped region with a low concentration of doping, the ring width can be controlled by controlling the position of the step difference, thereby enabling optical mode filtering. Furthermore, by forming a U-shaped N-type doped region around the P-type doped region in the low-concentration PN-doped region, the junction area between the N-type and P-type doped regions can be increased, thereby improving the optical modulation efficiency.

[0327] It should be understood that the embodiments described herein should be considered in a descriptive sense and not for limiting purposes only. Descriptions of features or aspects in each embodiment should generally be considered as other similar features or aspects that may be used in other embodiments. Although one or more embodiments have been described with reference to the accompanying drawings, those skilled in the art will understand that various changes in form and detail may be made without departing from the spirit and scope defined by the appended claims.

Claims

1. An optical modulator, comprising: First semiconductor layer; The second semiconductor layer is disposed on the first semiconductor layer in the form of a micro disk, and includes a highly doped region with a relatively high doping concentration and a low doped region with a relatively low doping concentration. The first optical waveguide is disposed adjacent to the second semiconductor layer; as well as The first electrode layer and the second electrode layer are disposed spaced apart from each other on the highly doped region. The second semiconductor layer includes at least one recessed portion. The second semiconductor layer has at least one step difference due to the at least one recess, and The highly doped region, the lightly doped region, and the recess are concentric.

2. The optical modulator according to claim 1, wherein, The second semiconductor layer includes a first recess. The bottom surface of the first recess includes the upper surface of the highly doped region and the upper surface of the low-doped region, and the side surface of the first recess includes the inner surface of the low-doped region. Due to the first recess, a first step difference exists in the low-doped region.

3. The optical modulator according to claim 2, wherein, The highly doped region includes an N-type doped region doped with N-type dopant and a P-type doped region doped with P-type dopant. The low-doped region includes an N-type doped region doped with N-type dopant and a P-type doped region doped with P-type dopant. The bottom surface of the first recess includes the upper surface of the N-type doped region of the highly doped region, the upper surface of the P-type doped region of the highly doped region, and the first upper surface of the P-type doped region of the low-doped region. The side surface of the first recess includes the inner surface of the P-type doped region of the low-doped region, and The first step difference corresponds to the height difference between the first upper surface of the P-type doped region in the low-doped region and the second upper surface, which is located higher than the first upper surface.

4. The optical modulator according to claim 2, wherein, The highly doped region includes an N-type doped region doped with N-type dopant and a P-type doped region doped with P-type dopant. The low-doped region includes an N-type doped region doped with N-type dopant and a P-type doped region doped with P-type dopant. The bottom surface of the first recess includes the upper surface of the N-type doped region and the upper surface of the P-type doped region in the highly doped region, as well as the first upper surface of the P-type doped region in the low-doped region. The side surface of the first recess includes the inner surface of the P-type doped region and the inner surface of the N-type doped region in the low-doped region. The first step difference corresponds to the height difference between the first upper surface of the P-type doped region and the upper surface of the N-type doped region in the low-doped region. The N-type doped region of the low-doped region is located between the P-type doped region of the low-doped region and the first semiconductor layer, and forms a P-type doped region that completely surrounds the low-doped region around the first recess. The outer surface of the N-type doped region in the low-doped region is the side surface of the second semiconductor layer.

5. The optical modulator according to claim 3, wherein, The P-type and N-type doped regions in the highly doped region are concentric, and there is a step difference between the center and the edge of the N-type doped region in the highly doped region. The thickness of the edge of the N-type doped region in the highly doped region is less than the thickness of the center of the N-type doped region in the highly doped region. The edges of the P-type doped region and the N-type doped region in the highly doped region overlap, and the upper surfaces of the P-type doped region and the N-type doped region are the same plane.

6. The optical modulator according to claim 2, wherein, The second semiconductor layer includes a second recess disposed inside the first recess and concentric with the first recess. The side and bottom surfaces of the second recess include the surfaces of the highly doped region. Because of the second recess, there is a second step difference inside the first recess, and The first step difference and the second step difference are spaced apart from each other in a horizontal direction parallel to the upper surface of the first semiconductor layer, and the first step difference and the second step difference have different heights.

7. The optical modulator according to claim 6, wherein, The highly doped region includes an N-type doped region doped with N-type dopant and a P-type doped region doped with P-type dopant. The N-type doped region and the P-type doped region are concentric. The bottom surface of the second recess includes the upper surface of the N-type doped region. The side surface of the second recess includes the side surface of the P-type doped region, and The second step difference corresponds to the height difference between the upper surface of the N-type doped region and the upper surface of the P-type doped region in the highly doped region.

8. The optical modulator according to claim 6, wherein, The highly doped region includes an N-type doped region doped with N-type dopant and a P-type doped region doped with P-type dopant. The N-type doped region and the P-type doped region are concentric. The N-type doped region and the P-type doped region are spaced apart from each other in a direction perpendicular to the upper surface of the first semiconductor layer. The bottom surface of the second recess includes the upper surface of the N-type doped region. The side surface of the second recess includes the side surface of the P-type doped region. The second step difference corresponds to the height difference between the upper surface of the N-type doped region and the upper surface of the P-type doped region in the highly doped region. A portion of the low-doped region exists between the N-type doped region and the P-type doped region, which are spaced apart from each other. The side surface of the second recess includes a portion of the side surface of the lightly doped region and the side surface of the p-type doped region. The low-doped region includes an N-type doped region doped with N-type dopant and a P-type doped region doped with P-type dopant. The N-type doped region and the P-type doped region in the low-doped region are concentric. The bottom surface of the first recess includes the upper surface of the P-type doped region of the low-doped region, and The inner surface of the first recess includes the side surface of the P-type doped region of the low-doped region.

9. The optical modulator according to claim 1, wherein, The second semiconductor layer includes a first recess. The bottom surface of the first recess includes the upper surface of the low-doped region, and the side surface of the first recess includes the inner surface of the low-doped region. Due to the first recess, a first step difference exists in the low-doped region.

10. The optical modulator according to claim 9, wherein, The second semiconductor layer includes a second recess disposed inside the first recess and concentric with the first recess. The bottom surface of the second recess includes the surface of the highly doped region, and the side surface of the second recess includes the inner surface of the low-doped region. Because of the second recess, there is a second step difference inside the first recess, and The first step difference and the second step difference are spaced apart from each other in a horizontal direction parallel to the upper surface of the first semiconductor layer, and the first step difference and the second step difference have different heights.

11. The optical modulator according to claim 10, wherein, The highly doped region includes an N-type doped region doped with N-type dopant and a P-type doped region doped with P-type dopant. The N-type doped region and the P-type doped region are concentric. The N-type doped region and the P-type doped region are spaced apart from each other in a direction perpendicular to the upper surface of the first semiconductor layer. The bottom surface of the second recess includes the upper surface of the N-type doped region. The P-type doped region is located on the bottom surface of the first recess, and the inner surface of the P-type doped region and the side surface of the second recess form the same side surface. The second step difference corresponds to the height difference between the upper surface of the N-type doped region in the highly doped region and the bottom surface of the first recess. The low-doped region includes an N-type doped region doped with N-type dopant and a P-type doped region doped with P-type dopant. The N-type doped region and the P-type doped region in the low-doped region are concentric. The bottom surface of the first recess includes the upper surface of the P-type doped region of the low-doped region, and The inner surface of the first recess includes the side surface of the P-type doped region of the low-doped region.

12. The optical modulator according to claim 1, wherein, The second semiconductor layer includes a first recess. The side and bottom surfaces of the first recess include the surfaces of the highly doped region, and Due to the first recess, a first step difference exists in the highly doped region.

13. The optical modulator according to claim 12, wherein, The highly doped region includes an N-type doped region doped with N-type dopant and a P-type doped region doped with P-type dopant. The bottom surface of the first recess includes the upper surface of the N-type doped region. The side surface of the first recess includes the side surface of the P-type doped region. The N-type doped region and the P-type doped region are configured to overlap each other around the first recess. The low-doped region is configured to completely surround the high-doped region in a planar view. The low-doped region includes an N-type doped region doped with N-type dopant and a P-type doped region doped with P-type dopant, and The N-type doped region and P-type doped region of the low-doped region are arranged sequentially in a direction perpendicular to the upper surface of the first semiconductor layer.

14. The optical modulator according to claim 1, wherein, The second semiconductor layer includes a first recess. The bottom surface of the first recess includes the upper surface of the first doped region of the highly doped region. The side surface of the first recess includes the side surface of the low-doped region and the side surface of the second doped region of the high-doped region. The first doped region, the second doped region, and the first recess are concentric. Due to the first recess, there is a step difference between the upper surface of the first doped region and the upper surface of the second doped region. The first doped region and the second doped region comprise dopants of opposite types and are spaced apart from each other in a direction perpendicular to the upper surface of the first semiconductor layer. The outer diameter of the first doped region and the inner diameter of the second doped region are equal to each other, and The upper surface of the second doped region and the upper surface of the low-doped region form the same surface.

15. The optical modulator according to claim 1, further comprising: The second optical waveguide spaced apart from the second semiconductor layer The second semiconductor layer is disposed between the first optical waveguide and the second optical waveguide.

16. A method of manufacturing an optical modulator, the method comprising: A second semiconductor layer in the form of a microdisk is formed on the first semiconductor layer; A first doped region is formed in the region of the second semiconductor layer; A second doped region is formed in the second semiconductor layer around the first doped region, so as to be concentric with the first doped region and surround the first doped region in a planar view; A first step difference is formed in one of the first doped region and the second doped region; as well as An electrode layer is formed on the first doped region, which has a higher doping concentration than the second doped region.

17. The method according to claim 16, wherein, The first step difference is formed in the first doped region.

18. The method of claim 17, further comprising forming a second step difference in the second doped region.

19. The method according to claim 18, wherein, The formation of the second doped region also includes: Forming the first doped layer; A second doped layer is formed on the first doped layer to include the second step difference; and A third doped layer is formed, which covers the exterior of the second step difference of the second doped layer and contacts the first doped layer. The first doped layer and the third doped layer comprise the same type of dopant.

20. An electronic device comprising: light source; An optical waveguide through which light emitted from the light source is transmitted; A semiconductor layer, disposed adjacent to the optical waveguide, is arranged in the form of a micro disk and includes multiple doped regions; as well as An amplifier is configured to amplify light transmitted through the optical waveguide. The semiconductor layer includes a first doped region and a second doped region located at the center of the semiconductor layer, among the plurality of doped regions. The remaining doped regions, excluding the first and second doped regions, are arranged around the first and second doped regions. The first doped region and the second doped region are regions doped with dopants of opposite types. The doping concentrations of the first and second doped regions are higher than the doping concentrations of the remaining doped regions, and The semiconductor layer includes at least one step difference.

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