Airborne heterogeneous computing general control board card based on DSP (Digital Signal Processor) and FPGA (Field Programmable Gate Array)

Abstract

The invention discloses an airborne heterogeneous computing general control board card based on DSP and FPGA, which comprises a discrete magnitude circuit, an analog quantity circuit, a reset circuit, two external connectors, a DSP processor and an FPGA circuit, the input end of the DSP processor and the input end of the FPGA circuit are connected with a power supply circuit, the DSP processor and the FPGA circuit are in communication connection through Xintf, and the FPGA circuit is in communication connection with the DSP processor. An ADC interface of the DSP processor is connected with an ADC converter with a voltage stabilizer; the DSP is matched with the FPGA programmable logic array control architecture, 16-bit ADC conversion, Flash and RAM circuits are externally expanded, the functions of collection, data processing, storage, communication and data recording are integrated, the expansibility and universality are high, the FPGA is high in flexibility and has the parallel processing capacity, different application scenes and requirements can be adapted through reprogramming, and the application range is wide. And the comprehensive requirements of an airborne environment on high-intensity numerical calculation, strong real-time response and high-universality interface control are met.

Description

Technical Field

[0001] This invention relates to the field of embedded computer hardware and airborne electronic equipment technology, and in particular to a general-purpose airborne heterogeneous computing control board for use in airborne systems and equipment, specifically a general-purpose airborne heterogeneous computing control board based on DSP and FPGA. Background Technology

[0002] As airborne electronic systems develop towards intelligence, integration, and high performance, the computational and control logic tasks that airborne equipment needs to handle are becoming increasingly complex, encompassing high-speed data acquisition, real-time signal processing, complex algorithm solving, and control of multiple heterogeneous interfaces. As the core carrier of these functions, the computing power architecture of the airborne control board directly determines the performance ceiling of the entire system.

[0003] Currently, the mainstream airborne control board processor architectures mainly include ARM-based general-purpose processor architecture and DSP-based dedicated processor architecture. ARM general-purpose processor architecture has strong capabilities in handling high-level applications and system scheduling, but it is difficult to handle low-level high-speed, intensive mathematical calculations and flexible hardware interface expansion. DSP dedicated processor architecture has outstanding advantages in digital filtering, spectrum analysis, and intensive computation, but its parallel processing capabilities and interface flexibility are insufficient. Therefore, ARM and DSP are essentially homogeneous computing models and cannot fundamentally solve the problem of heterogeneous contradiction between intensive computing tasks and intensive control tasks.

[0004] In summary, existing control boards with a single DSP architecture have weak parallel processing capabilities and interface flexibility, which cannot fully meet the comprehensive requirements of high performance, strong real-time performance, and high versatility of airborne equipment. Therefore, a general-purpose airborne heterogeneous computing control board based on DSP and FPGA is proposed. Summary of the Invention

[0005] The purpose of this invention is to provide a general-purpose airborne heterogeneous computing control board based on DSP and FPGA, in order to solve the problems mentioned in the background art, such as the weak parallel processing and interface flexibility of control boards with single DSP architecture, which cannot fully meet the comprehensive requirements of high performance, strong real-time performance and high versatility of airborne equipment.

[0006] To achieve the above objectives, the present invention provides the following technical solution: a general-purpose airborne heterogeneous computing control board based on DSP and FPGA, comprising discrete quantity circuits, analog quantity circuits, a reset circuit, two external connectors, a DSP processor and an FPGA circuit. The input terminals of the DSP processor and the FPGA circuit are connected to a power supply circuit. The DSP processor and the FPGA circuit are connected via Xintf communication. The pin terminals of the DSP processor have configurable interfaces such as GPIO, ADC, SPI, SCI, eCAN or ePWM. The ADC interface of the DSP processor is connected to an ADC converter with a built-in voltage regulator. The ADC converter is used to achieve high-precision data acquisition. The FPGA circuit has two RS422 / RS485 communication circuits and an ARINC429 controller module. The FPGA circuit's Xintf interface is interconnected with a Flash memory and a RAM memory, and one pin of the FPGA circuit is connected to a PROM configuration chip.

[0007] Furthermore, one input pin of the DSP processor is connected to a DSP_JTAG interface, and one input pin of the FPGA circuit is connected to an FPGA_JTAG interface.

[0008] Furthermore, the DSP processor is a DSPF28335 processor, which has a high-speed processing capability of 150MHz and a 32-bit floating-point processing unit.

[0009] The beneficial effects of this invention are: it features small size, light weight, high integration, high scalability, and strong versatility. It adopts a DSP digital signal processor combined with an FPGA programmable logic array control architecture, and expands to include a 16-bit ADC converter, Flash and RAM circuits. It integrates data acquisition, data processing, storage, communication, and data recording functions, and has high scalability and strong versatility. It can realize multi-channel communication parallel applications, and the FPGA has high flexibility and parallel processing capabilities. It can be reprogrammed to adapt to different application scenarios and needs, and can process multiple tasks simultaneously to meet the comprehensive requirements of airborne environments for high-intensity numerical calculations, strong real-time response, and highly versatile interface control. Attached Figure Description

[0010] Fig. 1 This is a schematic diagram of the airborne heterogeneous computing universal control board of the present invention; Fig. 2 This is a front structural diagram of the airborne heterogeneous computing universal control board of the present invention; Fig. 3 This is a schematic diagram of the back structure of the airborne heterogeneous computing universal control board of the present invention.

[0011] In the diagram: 1. DSP_JTAG interface; 2. FPGA_JTAG interface; 3. Power supply circuit; 4. Reset circuit; 5. DSP processor; 6. FPGA circuit; 7. Discrete quantity circuit; 8. Communication circuit; 9. Flash memory; 10. RAM memory; 11. Analog quantity circuit; 12. External connector. Detailed Implementation

[0012] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0013] Please see Figs. 1-3 This invention provides a technical solution: an airborne heterogeneous computing general-purpose control board based on DSP and FPGA, comprising a discrete quantity circuit 7, an analog quantity circuit 11, a reset circuit 8, two external connectors 12, a DSP processor 5, and an FPGA circuit 6. The input terminals of the DSP processor 5 and the FPGA circuit 6 are connected to a power supply circuit 3, which converts the externally supplied 5V to the 3.3V, 1.9V, 1.2V, or 2.5V power required by the airborne heterogeneous computing general-purpose control board. The DSP processor 5 and the FPGA circuit 6 are connected via Xintf communication, and the DSP processor 5 has GPIO, AD, and other pin configurations. The DSP processor 5 features configurable interfaces including C, SPI, SCI, eCAN, or ePWM. It also includes a 3×16 configurable GPIO interface, enabling 3.3V to 5V signal output or 5V to 3.3V signal input acquisition. The DSP processor 5's ADC interface connects to an ADC converter with a built-in voltage regulator. This ADC converter is used for high-precision data acquisition and may be, but is not limited to, a six-channel, sixteen-bit ADC converter. The ADC converter can also function as part of the analog circuit 11. The eight-channel DSP processor 5 incorporates a built-in ADC for acquisition, six operational amplifiers for processing, and a sixteen-bit external ADC converter, achieving high-precision analog data acquisition.

[0014] Both external connectors 12 are 84-pin connectors. The configuration of the external connectors 12 enables the airborne heterogeneous computing general control board to make electrical connections with external devices.

[0015] The reset circuit 4 mentioned above has a combination of monitoring chip and logic gate circuit, which can realize power-on reset, timeout reset, power-down reset and watchdog shielding functions of DSP processor 5; the FPGA circuit 6 mentioned above has two RS422 / RS485 communication circuits 8 and ARINC429 controller module, which has two RS422 / RS485 communication, transmission enable control, and can realize multi-channel communication parallel application; the Xintf interface of FPGA circuit 6 is interconnected with Flash memory 9 and RAM memory 10, and one pin of FPGA circuit 6 is connected to PROM configuration chip.

[0016] It should be noted that the Flash memory 9 mentioned is, but is not limited to, a 1Gbits-NOR-Flash memory. The Flash memory 9 is used for recording large amounts of data. The RAM memory 10 is used for caching large amounts of data. The RAM memory 10 is a 256K×16bits-SRAM memory. The two RS422 / RS485 communication circuits 8 have isolation functions.

[0017] In this embodiment, one input pin of the DSP processor 5 is connected to the DSP_JTAG interface 1, which is used for software programming of the DSP processor 5; one input pin of the FPGA circuit 6 is connected to the FPGA_JTAG interface 2, which is used for software programming of the FPGA programmable logic array; the DSP processor 5 is, but is not limited to, the DSPF28335 processor, which has a high-speed processing capability of 150MHz and a 32-bit floating-point processing unit, and can quickly perform numerical calculations, processing, filtering, transformation and other operations of signals. It also has rich peripherals such as GPIO, ADC, SPI, SCI, ECAN, ePWM, etc., with rich functions and numerous interfaces.

[0018] This airborne heterogeneous computing general-purpose control board, based on DSP and FPGA, has the following operating scenarios: Normal operating scenario: Based on DSP and FPGA, this airborne heterogeneous computing general-purpose control board normally operates at 4.75V-5.25V and 14.5V-5.5V. DSP software is programmed to the DSP processor 5 via DSP_JTAG interface 1, and to the FPGA circuit 6 via FPGA_JTAG interface 2. After power-on, the reset circuit 4 resets the DSP processor 5. After the reset, the FPGA circuit 6 loads the running program from the RAM memory 10 or Flash memory 9 configured by the PROM configuration chip. The software in the DSP processor 5 begins executing initialization, bit-checking, and other tasks, acquiring or outputting relevant discrete and analog signals, and controlling RS422 / RS485 communication for external data transmission. During operation, the RAM memory 10 or Flash memory 9 stores operating data for precise monitoring. Fault operation scenarios: During the power-on or operation of the general control board, when the reset circuit 4 detects an abnormal 3.3V power supply, it triggers the power-down reset function and controls the DSP processor 5 to restart; during the operation of the general control board, when it detects that the DSP processor 5 has not output a watchdog signal normally for more than 1.6 seconds, it triggers the timeout reset function and controls the DSP processor 5 to restart; during the normal operation of the general control board, the DSP processor 5 and the FPGA circuit 6 perform mutual checks on the operating status. When the DSP detects an abnormal FPGA operating status, it controls the FPGA to reset and load. When the FPGA detects an abnormal DSP operating status, it issues a fault alarm indication. Maintenance scenario: Input the download signal through external connector 12 to disable the timeout reset function in reset circuit 4 and achieve online software upgrade.

[0019] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0020] The above embodiments only illustrate preferred embodiments of the present invention, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the invention patent. It should be understood that, for those skilled in the art, several modifications and improvements can be made without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. In the present invention, unless otherwise explicitly specified and limited, the terms "installation," "connection," "joining," "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components; for example, a bolted connection, etc.

[0021] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A general-purpose airborne heterogeneous computing control board based on DSP and FPGA, characterized in that: It includes discrete quantity circuits, analog quantity circuits, a reset circuit, two external connectors, a DSP processor, and an FPGA circuit. The input terminals of the DSP processor and the FPGA circuit are connected to a power supply circuit. The DSP processor and the FPGA circuit are connected via Xintf communication. The pin terminals of the DSP processor have configurable interfaces such as GPIO, ADC, SPI, SCI, eCAN, or ePWM. The ADC interface of the DSP processor is connected to an ADC converter with a built-in voltage regulator. The ADC converter is used to achieve high-precision data acquisition. The FPGA circuit has two RS422 / RS485 communication circuits and an ARINC429 controller module. The FPGA circuit's Xintf interface is interconnected with a Flash memory and a RAM memory, and one pin of the FPGA circuit is connected to a PROM configuration chip.

2. The airborne heterogeneous computing universal control board based on DSP and FPGA according to claim 1, characterized in that: One input pin of the DSP processor is connected to the DSP_JTAG interface, and one input pin of the FPGA circuit is connected to the FPGA_JTAG interface.

3. The airborne heterogeneous computing universal control board based on DSP and FPGA according to claim 1, characterized in that: The DSP processor is a DSPF28335 processor, which has a high-speed processing capability of 150MHz and a 32-bit floating-point processing unit.

Images