Manufacturing method of ultra-thin GaN HEMT device using SiC thermal self-stripping process and GaN HEMT device manufactured thereby

Abstract

One aspect of the present invention relates to a method for manufacturing a GaN HEMT device, comprising: (a) irradiating an invisible laser (internal modified layer forming laser) inside a SiC growth substrate on which a GaN HEMT epitaxial laminate grows to form a separation layer; (b) first bonding the side of the GaN HEMT epitaxial laminate to a temporary substrate; (c) applying a heat treatment process including heating and cooling to the SiC growth substrate, and separating the SiC growth substrate with the separation layer as a boundary by using a physical separation force caused by a difference between thermal expansion and thermal contraction generated inside the SiC growth substrate, thereby forming a GaN HEMT structure having an ultra-thin SiC substrate on the temporary substrate; and (d) forming a source electrode, a drain electrode and a gate electrode on the separated GaN HEMT structure body to complete the GaN HEMT device.

Description

Technical Field

[0001] This invention relates to a gallium nitride (GaN) high electron mobility transistor (HEMT) power semiconductor device. More specifically, it relates to a GaN HEMT device and its manufacturing method that revolutionizes manufacturing costs by slicing and recycling expensive silicon carbide (SiC) growth substrates using a "hot self-split" process, while simultaneously possessing an ultra-thin SiC substrate to maximize heat dissipation. Background Technology

[0002] Power semiconductors are non-storage semiconductors that process electrical energy (voltage and current) in all areas of life and industry. Recently, with the increasing demand for normal operation and stability under high voltage, high current, and high temperature environments, silicon carbide (SiC) and gallium nitride (GaN) semiconductor materials, which have superior physical properties compared to silicon (Si), have attracted much attention as active regions.

[0003] In particular, GaN materials are highly sought after as power amplification high-frequency devices suitable for RF (radio frequency) mobile communication products, as well as power conversion switching devices for home appliances and electronic devices. These GaN HEMT devices are typically fabricated by growing GaN epitaxial thin films on a growth substrate, and the choice of growth substrate becomes a core factor determining the device's performance and price.

[0004] Currently, the main growth substrates used are Si and SiC. Si substrates are inexpensive and easy to scale up to 12 inches, but due to the significant difference in lattice constant and coefficient of thermal expansion between Si and GaN, high-density crystal defects (low 10 cm⁻²) and microcracks frequently occur. Furthermore, because Si itself has relatively low thermal conductivity (150 W / mK), it is difficult to effectively dissipate the heat generated by high-power devices. Therefore, GaN devices based on Si substrates are mainly limited to low-power output products.

[0005] Conversely, SiC substrates exhibit relatively smaller differences in lattice constants and coefficients of thermal expansion compared to GaN, and most importantly, SiC boasts an exceptionally high thermal conductivity of 450 W / mK, enabling rapid dissipation of heat generated during device operation. Therefore, SiC substrates are the preferred material for high-heat dissipation solutions in medium-to-high power high-frequency GaN or high-power switching GaN applications.

[0006] However, the extremely high manufacturing cost of SiC growth substrates is a fatal flaw, which is the biggest obstacle to the commercialization of GaN-on-SiC devices. Furthermore, existing GaN HEMT device manufacturing processes further exacerbate this cost problem.

[0007] In existing processes, GaN HEMT epitaxial structures are first grown on SiC substrates with a thickness of 500µm (4 / 6 inch) or 750µm (8 inch). Then, a fab process is performed to form the source, drain, and gate electrodes. Finally, to ensure the device's heat dissipation characteristics, the back side of the substrate is back-grinding, thinning the SiC substrate to a thickness of 100µm or 50µm.

[0008] The thinning stage of this existing process results in significant inefficiencies. A massive amount of expensive SiC material—approximately 400µm for 4 / 6-inch wafers and 650µm for 8-inch wafers—is consumed and removed during the grinding process (loss). This unproductive and inefficient thinning process further exacerbates the already high cost burden of SiC substrates.

[0009] Therefore, there is an urgent need to develop a new GaN HEMT device manufacturing technology that can fundamentally prevent the loss of expensive SiC growth substrate materials and achieve cost innovation through substrate recycling. Summary of the Invention

[0010] Technical problems to be solved The present invention aims to solve the problems of the prior art as described above. The first objective of the present invention is to fundamentally prevent the huge SiC material loss during the back-side grinding (thinning process) of expensive SiC growth substrates and to enable the SiC growth substrates to be recycled, thereby epoch-makingly reducing the manufacturing cost of GaN HEMT devices.

[0011] Furthermore, a second objective of this invention is to provide an ultrathin SiC substrate with a thickness of 40µm to 60µm, thereby maximizing the heat dissipation characteristics of the device and realizing a high-performance, high-quality GaN HEMT power semiconductor device.

[0012] Furthermore, a third objective of this invention is to provide a highly efficient GaN HEMT device manufacturing process that allows for flexible combination of the order of Fab process and slicing process, and simplifies via-hole and interconnect wiring processes. Technical solution

[0013] To address the aforementioned issues, the present invention provides a method for manufacturing a GaN HEMT device, comprising: (a) irradiating a stealth laser (stealth laser, internal modification layer formation laser) inside a SiC growth substrate on which a GaN HEMT epitaxial stack has been grown to form a separation layer; (b) first bonding the GaN HEMT epitaxial stack to a temporary substrate; (c) applying a heat treatment process including heating and cooling to the SiC growth substrate to perform a hot self-split of the SiC growth substrate with the separation layer as the boundary, thereby forming a GaN HEMT structure having an ultrathin SiC substrate on the temporary substrate; and (d) forming source, drain, and gate electrodes on the separated GaN HEMT structure to complete the GaN HEMT device.

[0014] Here, the SiC growth substrate in step (a) above is characterized by having a thickness of 1,000 µm or more. Furthermore, the process may include a step of recycling the remaining SiC growth substrate (mother substrate) after separation in step (c) above to grow a new GaN HEMT epitaxial stack, and this substrate can be recycled 2 to 4 times.

[0015] In one embodiment of the present invention (post-Fab process), the electrode formation step in step (d) above can be performed after the separation in step (c) above.

[0016] In another embodiment of the present invention (Fab process first), the electrode formation step in step (d) above can be performed before the laser irradiation in step (a) above. In this case, step (d) above may include an ohmic contact annealing process at 850~900°C.

[0017] In the above-mentioned Fab process embodiment, step (b) is characterized in that, after forming a protective separation layer (e.g., BCB) and a SiO2 bonding layer on the GaNHEMT epitaxial stack on which the above-mentioned electrodes are formed, the SiO2 bonding layer is used as a medium to bond with the above-mentioned temporary substrate (e.g., sapphire) at room temperature.

[0018] Furthermore, the above-mentioned first-Fab process embodiment may also include: after step (c) above, performing CMP (chemical mechanical polishing) on ​​the exposed surface of the ultrathin SiC substrate and forming a via-hole that penetrates the ultrathin SiC substrate and is connected to the source electrode, etc., and forming a lower electrode on the exposed surface of the ultrathin SiC substrate containing the via-hole; separating the temporary substrate by LLO (laser lift-off) process; and removing the protective separation layer by plasma etching.

[0019] To address the aforementioned issues, another aspect of the present invention provides a GaN HEMT device manufactured by the above method, characterized in that it comprises: an ultrathin SiC substrate having a thickness of 40µm to 60µm; a GaN HEMT epitaxial stack formed on the ultrathin SiC substrate; and a via-hole penetrating the ultrathin SiC substrate and connected to an electrode (e.g., a source electrode) of the epitaxial stack.

[0020] Invention Effects According to the present invention, the following effects can be expected. First, instead of consuming the expensive SiC growth substrate through back-side grinding, a slicing process is used to separate only the film of the required thickness (100µm or 50µm) for use, and the parent substrate (SiC growth substrate) can be recycled 2 to 4 times. By minimizing the loss of SiC material in this way, the manufacturing cost of GaN HEMT devices can be reduced.

[0021] Secondly, because the final device has an ultra-thin SiC substrate with a thickness of 40µm to 60µm, the thermal resistance of the SiC substrate is reduced compared to existing technologies, significantly improving the heat dissipation capability of the GaN HEMT device. This makes it possible to achieve high performance and ensure high quality (reliability) of the device.

[0022] Third, it can efficiently integrate and simplify the via-hole and interconnect wiring processes on the back side of the SiC substrate during the device fabrication stage within the Fab process flow. Attached Figure Description

[0023] Figure 1 This is a schematic diagram illustrating a GaN HEMT device fabrication process (first-Fab process) using a SiC thermal self-peeling process according to an embodiment of the present invention.

[0024] Figure 2 This is a schematic diagram illustrating a GaN HEMT device fabrication process (post-Fab process) using a SiC thermal self-peeling process according to another embodiment of the present invention.

[0025] Figure 3 This is a schematic diagram illustrating the fabrication process (Fab process) of a GaN HEMT device with ultrathin SiC according to another embodiment of the present invention. Detailed Implementation

[0026] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The present invention replaces the existing inefficient and high-cost SiC substrate back-grinding process with a "SiC hot self-split" process.

[0027] The core mechanism of the "thermal self-peeling" process is as follows: (1) First, a stealth laser (30, laser for forming the internal modified layer) is irradiated inside the SiC growth substrate (10) to form a fine separation layer (40). This separation layer (40) is a modified layer in which the SiC lattice structure changes. (2) Then, the heating and cooling cycles that inevitably accompany the temporary substrate bonding process are utilized. During this process, the SiC growth substrate (10) undergoes thermal expansion and thermal contraction. (3) At this time, with the separation layer (40) as the boundary, due to the difference in thermal expansion and thermal contraction behavior between the modified layer and the surrounding bulk material, this difference generates a huge physical separation force at the separation layer (40). (4) With the help of this separation force, the SiC growth substrate (10) is automatically and physically separated along the separation layer (40) without the need to apply additional external mechanical force.

[0028] To ensure the effective generation of the aforementioned separation force, the irradiation by the stealth laser (30) is preferably performed using multiple scans at different focal depths, and the pitch of the resulting modified spots is set to 3µm to 10µm. This helps to form a continuous and uniform stress distribution in the separation layer.

[0029] In addition, in order to precisely control thermal stress and prevent wafer warpage during the heating and cooling process, the temporary substrate (50) is preferably made of a material whose coefficient of thermal expansion (CTE) differs from that of the SiC growth substrate by less than 20% (e.g., ceramic substrates such as mullite or aluminum nitride (AlN), or glass substrates with a specific CTE).

[0030] Stealth lasers (30, lasers with SiC transmission wavelengths) use infrared (IR) wavelengths that can pass through the SiC growth substrate.

[0031] This invention eliminates the existing method of grinding and losing expensive SiC substrates. As a result, material loss from the SiC substrate can be prevented, thereby reducing manufacturing costs. To enhance this effect, a thick SiC growth substrate (10) of 1,000 µm or more is preferably used in this invention.

[0032] Even after the ultrathin substrate is separated by the "thermal self-peeling" process, the thick residual SiC growth substrate (10) can be recycled 2 to 4 times and reused for new GaN HEMT epitaxial growth. This is a cost-saving method to save on SiC substrate material costs.

[0033] Meanwhile, the GaN HEMT device ultimately obtained through this process will have an ultra-thin SiC substrate (70) with a thickness of less than 100µm, preferably 40µm to 60µm. If the SiC substrate thickness becomes so thin, the thermal resistance of the substrate will be significantly reduced, thus allowing the enormous heat generated during device operation to be rapidly dissipated to the outside. This provides maximum heat dissipation capability, ensuring high performance, high quality, and high reliability.

[0034] Although the peeled surface of the separated ultrathin SiC substrate (70) is relatively flat, a CMP (chemical mechanical polishing) process is preferably performed to ensure the contact resistance characteristics and bonding strength of subsequent processes (such as secondary bonding or electrode formation). The CMP process is performed until the surface roughness (Ra) of the exposed surface of the ultrathin SiC substrate (70) reaches below 1 nm (preferably 0.3 nm to 0.5 nm).

[0035] This invention, when combining this "thermal self-peeling" process with the GaN HEMT Fab process, includes a "Fab-first" approach where the Fab process (source, drain, and gate electrode formation) is performed before the separation process. Figure 1 , Figure 3 ) and the "post-Fab (Fab-last)" method executed afterward ( Figure 2 This provides flexibility in process design.

[0036] Example 1: First Fab process (refer to) Figure 1 ) This embodiment follows a "Fab-first" process flow. This embodiment involves completing the Fab process before the SiC thermal self-peeling process. First, after growing a GaN HEMT epitaxial stack (20) on the SiC growth substrate (10), the Fab process for forming the source electrode (21), drain electrode (22), and gate electrode (23) is completed. This stage includes a high-temperature ohmic contact annealing process at temperatures as high as 850~900°C.

[0037] Subsequently, a stealth laser (30, an internal modification layer forming laser) is irradiated inside the SiC growth substrate (10) to form a fine separation layer (40). Here, in order not to damage the device already completed by the Fab process, the irradiation of the stealth laser (30) is preferably performed through the back side (C-polar surface) of the SiC growth substrate (10). This fundamentally prevents the laser (30) from penetrating the completed front-side device structure (electrodes, passivation layers, etc.) and causing damage.

[0038] Subsequently, using the first bonding layer (60) as a medium, the temporary substrate (50, Sapphire, Si) is first wafer-bonded to the front side of the device or the protective layer formed on the device. At this point, the heating and cooling cycles that inevitably accompany the temporary substrate bonding process can be utilized as the heat treatment process required for "thermal self-peeling". This has the advantage of omitting the separate heat treatment step for separation, thereby simplifying the overall process and improving efficiency.

[0039] After heat treatment, the SiC growth substrate (10) is separated, leaving the ultrathin SiC substrate (70). Using the second bonding layer as a medium, the dummy substrate (80; Sapphire, Si, SiC) is second-time wafer-bonded to the ultrathin SiC substrate (70). Subsequently, the temporary substrate (50) and the dummy substrate (80) are separated sequentially to complete the process.

[0040] The specific process sequence in this embodiment is as follows: 1) GaN HEMT epitaxial stacks are grown on SiC growth substrates with a thickness of 1,000 µm or more.

[0041] 2) Perform the Fab process to form the source (S), drain (D), and gate (G) electrodes. This stage includes a high-temperature ohmic contact annealing process at 850~900℃.

[0042] 3) A separation layer is formed by irradiating the back side (C-polar surface) of the SiC growth substrate with a stealth laser.

[0043] 4) Using the first bonding layer as a medium, the temporary substrate (Sapphire, Si) is bonded to the epitaxial side of the completed device. (First wafer bonding) 5) The ultrathin SiC substrate is separated from the SiC growth substrate by the thermal / mechanical stress induced by the heating and cooling during the above-mentioned temporary substrate bonding (first wafer bonding) process (thermal self-peeling).

[0044] 6) As an option, the exposed surfaces of the separated ultrathin SiC substrates are subjected to CMP (chemical mechanical polishing).

[0045] 7) By second wafer bonding, the temporary substrate is separated with a dummy substrate (Sapphire, Si, SiC) attached to the exposed surface of the separated ultrathin SiC substrate, and finally the dummy substrate (e.g., Sapphire LLO, SiCLO) is separated.

[0046] 8) Selectively, Via-hole and source wiring processes can be performed before the second wafer bonding.

[0047] Example 2: Post-Fab Process (Ref.) Figure 2 ) This embodiment follows a "post-Fab" process flow. This embodiment describes a method of performing a Fab process on the separated thin film after a SiC thermal self-peeling process. With only an epitaxial stack (20) grown on the SiC growth substrate (10), a stealth laser (30) is directly irradiated to form a fine separation layer (40) inside the SiC growth substrate (10), and a temporary substrate (50) is bonded to perform a "thermal self-peeling" separation process. Similar to Embodiment 1, this case also utilizes the heating / cooling cycle during temporary substrate bonding to induce separation.

[0048] In this embodiment, the Fab process (source electrode (21), drain electrode (22), and gate electrode (23)) is performed on the exposed GaN HEMT epitaxial surface (20) after the separation of the SiC growth substrate (10) and the removal of the temporary substrate (50), and the attachment of the dummy substrate (80). The technical significance of this approach is that it eliminates the high-temperature ohmic contact annealing process (up to 850-900°C) in the temporary substrate bonding and separation process. As a result, the temporary substrate bonding / separation process has no thermal burden, which can improve stability and yield.

[0049] The specific process sequence in this embodiment is as follows: 1) GaN HEMT epitaxial stacks are grown on SiC growth substrates with a thickness of 1,000 µm or more.

[0050] 2) Irradiation with a stealth laser to form a separation layer. While irradiation with a stealth laser is preferably performed through the top surface (Si-polar Surface), it can also be performed through the back surface (C-polar Surface).

[0051] 3) Using the first bonding layer as a medium, the temporary substrate (Sapphire, Si) is bonded to the epitaxial stack side. (First wafer bonding) 4) The ultrathin SiC substrate is separated from the SiC growth substrate by the thermal / mechanical stress induced by the heating and cooling process of the above temporary substrate bonding (first wafer bonding) process (thermal self-peeling).

[0052] 5) As an option, CMP is performed on the exposed surfaces of the separated ultrathin SiC substrates.

[0053] 6) The temporary substrate is separated by a second wafer bonding process, with a dummy substrate (Sapphire, Si, SiC) attached to the exposed surface of the separated ultrathin SiC substrate.

[0054] 7) A fab process for forming source, drain, and gate electrodes is performed on the exposed GaN HEMT epitaxial surface. In this case, since high-temperature ohmic annealing is not performed after the bonding process, the process stability is high. Ohmic contacts can be formed using Si / Ti deposition and heat treatment or Si ion implantation, etc.

[0055] 8) Finally, separate the pseudo-substrate (e.g., Sapphire LLO, Si CLO).

[0056] Example 3: Pre-Fab process and back-side Via-hole formation (refer to) Figure 3 ) This embodiment combines a "Fab-first" process with a back-side wiring process. This embodiment provides a process for stable removal of temporary substrates without the need for dummy substrate bonding. First, the Fab process is completed as in Embodiment 1 to form the source electrode (21), drain electrode (22), gate electrode (23), and passivation layer (24).

[0057] Subsequently, as a temporary substrate (50; e.g., sapphire), a wafer bonding pretreatment is performed. A protective release layer (61; e.g., Spin-on-Glass, BCB) is coated on the completed device, and a planarization (CMP) SiO2 bonding layer (62) is deposited and planarized (CMP) thereon. Furthermore, a CMP SiO2 bonding layer (62) is also deposited and planarized (CMP) on the surface of the temporary substrate (50; e.g., sapphire). Room-temperature bonding is then performed using the SiO2 bonding layer (62) as a medium.

[0058] The protective separation layer (61) serves to protect the front side of the device during subsequent temporary substrate separation (LLO) or plasma etching processes. Room temperature bonding completely prevents additional thermal damage to sensitive devices that have already undergone the Fab process. Alternatively, the temporary substrate (50) can be bonded using only the protective separation layer (61) without the need for a SiO2 bonding layer (62).

[0059] Subsequently, a stealth laser is irradiated onto the back side (C-polar surface) of the SiC growth substrate to form a separation layer. After laser (30) irradiation, unlike in Examples 1 and 2, a separate high-temperature heating and cooling process is used to perform "thermal self-peeling" to separate the SiC growth substrate (10). At this time, the ultrathin SiC substrate (70) separated from the SiC growth substrate (10) is preferably formed with a thickness of 40µm to 60µm.

[0060] After CMP (Ra less than 1 nm) is performed on the exposed surface of the ultrathin SiC substrate (70), a Via-hole (90) is formed through the ultrathin SiC substrate (70), and a lower electrode (back metal) (100) is formed that connects to the lower source electrode (21) through the Via-hole (90). This process directly utilizes the exposed surface of the ultrathin SiC substrate (70) as a heat sink and electrical contact, epochally simplifying the Via-hole and Interconnect wiring process, while improving the electrical characteristics (reduced resistance) and heat dissipation performance of the device.

[0061] At this point, in order to achieve a low-resistance ohmic contact between the lower electrode (100) on the back side and the SiC substrate without damaging the completed GaN HEMT device (especially the gate structure) on the front side, a laser thermal annealing (LSA) process is preferably used. This laser annealing process only locally and instantaneously heats the back electrode interface, thereby confining the heat-affected zone to the back side while forming an ohmic alloy, preventing heat transfer to the front device area.

[0062] Subsequently, the temporary substrate (50) is separated by LLO (Laser Lift-Off) process, and the protective separation layer (61) is removed by plasma etching (O2 Plasma) to finally expose the front side of the device, thus completing the process.

[0063] The ultrathin GaN HEMT device according to Example 3 is characterized by comprising: (1) an ultrathin SiC substrate (70) of 40µm to 60µm, (2) a via-hole (90) penetrating the ultrathin SiC substrate (70), and (3) a lower electrode (100) directly connected to the source electrode (21) of the epitaxial stack (20) through the via-hole (90). Thus, maximum heat dissipation is achieved through the ultrathin SiC substrate (70), and process simplification and improved electrical / thermal performance are achieved through the back-side via-hole (90) structure.

Claims

1. A method for manufacturing a GaN HEMT device, characterized in that, include: (a) Irradiate the inside of a SiC growth substrate on which GaN HEMT epitaxial stacks are grown with a stealth laser (stealth laser, laser for forming internal modified layers) to form a separation layer; (b) The GaN HEMT epitaxial stack is first bonded to a temporary substrate; (c) Applying a heat treatment process including heating and cooling to the SiC growth substrate to induce thermal expansion and contraction, and utilizing the internal separation force resulting from the difference in thermal expansion and contraction at the separation layer boundary to hot self-split the SiC growth substrate; and (d) Form source, drain and gate electrodes on the above-mentioned separated GaN HEMT structure to complete the GaN HEMT device.

2. A method for manufacturing a GaN HEMT device, characterized in that, include: (a) Forming source, drain and gate electrodes on a GaN HEMT epitaxial stack grown on a SiC growth substrate; (b) Irradiate the SiC growth substrate on which the above electrodes have been formed with a stealth laser (a laser that forms an internal modified layer) to form a separation layer; (c) Bonding the GaN HEMT epitaxial stack to a temporary substrate; and (d) Apply a heat treatment process including heating and cooling to the SiC growth substrate to generate thermal expansion and thermal contraction in the SiC growth substrate, and use the internal separation force caused by the difference in thermal expansion and thermal contraction generated by the separation layer to separate the SiC growth substrate, thereby forming a GaN HEMT structure with an ultrathin SiC substrate on the temporary substrate.

3. The method for manufacturing a GaN HEMT device according to claim 1 or 2, characterized in that, The heat treatment process in the above-mentioned SiC growth substrate separation step is performed in conjunction with the above-mentioned first bonding process.

4. The method for manufacturing a GaN HEMT device according to claim 1 or 2, characterized in that, It also includes a step of recycling the remaining SiC growth substrate after separation in the above-mentioned SiC growth substrate separation step to grow a new GaN HEMT epitaxial stack.

5. The method for manufacturing a GaN HEMT device according to claim 1 or 2, characterized in that, The aforementioned SiC growth substrate has a thickness of 1,000 µm or more, and the aforementioned ultrathin SiC substrate has a thickness of 40 µm to 60 µm.

6. The method for manufacturing a GaN HEMT device according to claim 2, characterized in that, The first bonding step includes: after forming a protective separation layer and a SiO2 bonding layer on the GaN HEMT epitaxial stack on which the electrodes are formed, bonding with the temporary substrate at room temperature using the SiO2 bonding layer as a medium; the protective separation layer is a material capable of laser lift-off (LLO).

7. The method for manufacturing a GaN HEMT device according to claim 6, characterized in that, The heat treatment process in the above-mentioned SiC substrate separation step is performed separately after the above-mentioned room temperature bonding. After the above-mentioned SiC substrate separation step, the process further includes: (e) performing CMP (chemical mechanical polishing) on ​​the exposed surface of the above-mentioned ultrathin SiC substrate and forming a via-hole that penetrates the above-mentioned ultrathin SiC substrate and is connected to the above-mentioned source electrode; and (f) forming a lower electrode on the exposed surface of the above-mentioned ultrathin SiC substrate containing the above-mentioned via-hole.

8. The method for manufacturing a GaN HEMT device according to claim 1 or 2, characterized in that, The aforementioned stealth laser irradiation involves multiple scans at different focal depths, and the pitch of the particles is set to 3µm ~ 10µm; the difference between the coefficient of thermal expansion (CTE) of the temporary substrate and the coefficient of thermal expansion of the SiC grown substrate is within 20%.

9. The method for manufacturing a GaN HEMT device according to claim 7, characterized in that, The CMP process is performed until the surface roughness (Ra) of the exposed surface of the ultrathin SiC substrate reaches below 1 nm; after the lower electrode is formed, the contact interface between the lower electrode and the ultrathin SiC substrate is laser annealed to form an ohmic contact, and the laser annealing is performed under local heating conditions without damaging the front-side components.

10. A GaN HEMT device manufactured by the method of claim 7, characterized in that, include: Ultrathin SiC substrates with a thickness of 40µm to 60µm; GaN HEMT epitaxial stack formed on the aforementioned ultrathin SiC substrate; A via-hole penetrating the ultrathin SiC substrate and connected to the source electrode of the epitaxial stack; and The lower electrode is connected to the source electrode through the aforementioned through-hole.

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