Battery pack addressing method, energy storage system, control unit, equipment and chip

Abstract

The invention provides a battery pack addressing method, an energy storage system, a control unit, equipment and a chip, and the method comprises the steps: after a first battery pack receives an addressing control signal from an addressing device, the address of the first battery pack is named as a first address, the addressing control signal is output, and the first address is sent to the addressing device; and after receiving the addressing control signal from the (i-1) th battery pack and the first address to the (i-1) th address from the addressing device, the ith battery pack names the own address as the ith address, outputs the addressing control signal and sends the ith address to the addressing device, and the ith address is different from any one of the first address to the (i-1) th address. According to the invention, automatic addressing is realized by means of an existing hardware circuit and software internal logic, no extra hardware circuit needs to be added, and automatic addressing of the battery pack can be completed only by adding logic judgment to the software.

Description

Technical Field

[0001] This application relates to the field of battery management technology, and in particular to battery pack addressing methods, energy storage systems, control units, devices, and chips. Background Technology

[0002] In energy storage systems, containers can contain multiple battery clusters, and each cluster can contain multiple battery packs. The battery packs interact with and are controlled by an addressing device. As energy storage systems become larger and their application scenarios become more diverse, the management requirements for battery packs are very high. In particular, when a battery pack malfunctions or becomes abnormal, it is necessary to accurately and quickly locate the problematic battery pack, which necessitates pre-addressing the battery packs. Summary of the Invention

[0003] The purpose of this application is to provide a battery pack addressing method, energy storage system, control unit, device and chip for automated addressing of battery packs in a battery cluster.

[0004] The objective of this application is achieved through the following technical solution:

[0005] In a first aspect, this application provides a battery pack addressing method. An addressing device is used to address battery packs in a battery cluster, the battery cluster comprising N battery packs. The method includes: a first battery pack, upon receiving an addressing control signal from the addressing device, naming its own address as a first address and outputting the addressing control signal to send the first address to the addressing device; an i-th battery pack, upon receiving an addressing control signal from an (i-1)-th battery pack and addresses from the addressing device ranging from the first address to the (i-1)-th address, naming its own address as the i-th address and outputting the addressing control signal to send the i-th address to the addressing device, wherein the i-th address is different from any one of the addresses from the first address to the (i-1)-th address; where N is an integer greater than 1, and i is an integer greater than 1 and not greater than N.

[0006] In some embodiments, the method further includes: the first battery pack or the i-th battery pack sending a flag bit to the addressing device after addressing is completed; the flag bit is used to indicate that the current battery pack has completed addressing.

[0007] In some embodiments, the method further includes: when the target battery pack has no address, the battery packs other than the target battery pack send their own addresses to the addressing device; the addressing device is configured to, after obtaining the address set of battery packs other than the target battery pack in the battery cluster, determine a target address for naming the target battery pack based on the address set, and send the target address to the target battery pack; the target battery pack receives the target address and names its own address as the target address.

[0008] In some embodiments, the addressing device is configured to be connected to each battery pack via a communication bus, and the addressing device is also configured to be connected to the first battery pack via an addressing control signal transmission line; the (i-1)th battery pack is also configured to be connected to the i-th battery pack via an addressing control signal transmission line.

[0009] Secondly, this application provides a battery pack addressing method. An addressing device is used to address battery packs in a battery cluster, the battery cluster comprising N battery packs. The method includes: the addressing device sending an addressing control signal to a first battery pack; the first battery pack, upon receiving the addressing control signal from the addressing device, naming its own address as a first address, and outputting the addressing control signal to send the first address to the addressing device; the i-th battery pack, upon receiving the addressing control signal from the (i-1)-th battery pack and the first address to the (i-1)-th address from the addressing device, naming its own address as an i-th address, and outputting the addressing control signal to send the i-th address to the addressing device, the i-th address being different from any one of the first address to the (i-1)-th address; the addressing device, upon receiving the (i-1)-th address from the (i-1)-th battery pack, sending the first address to the (i-1)-th address to the i-th battery pack; wherein N is an integer greater than 1, and i is an integer greater than 1 and not greater than N.

[0010] In some embodiments, the method further includes: the addressing device receiving a flag bit from any one of the battery packs; the flag bit being used to indicate that the battery pack has completed addressing.

[0011] In some embodiments, the method further includes: the addressing device re-addressing the N battery packs in the event of an addressing anomaly in the battery cluster; the process by which the addressing device determines whether the battery cluster is addressing anomaly includes: determining that the battery cluster is addressing anomaly when the received addresses are duplicated; or, determining that the battery cluster is addressing anomaly when the number of received addresses does not match the total number of battery packs.

[0012] In some embodiments, the method further includes: when the addressing device has no address for the target battery pack in the battery cluster, receiving an address sent by a battery pack in the battery cluster to obtain an address set of battery packs in the battery cluster other than the target battery pack; based on the address set, determining a target address for naming the target battery pack, and sending the target address to the target battery pack so that the target battery pack names its own address as the target address.

[0013] In some embodiments, the addressing device is configured to be connected to each battery pack via a communication bus, and the addressing device is also configured to be connected to the first battery pack via an addressing control signal transmission line; the (i-1)th battery pack is also configured to be connected to the i-th battery pack via an addressing control signal transmission line.

[0014] Thirdly, this application provides a battery pack addressing method, wherein an addressing device is used to address battery packs in M ​​battery clusters, each battery cluster including N battery packs, and the j-th battery cluster is used to execute the method according to any one of claims 1 to 3, the method comprising: the addressing device sending an addressing control signal to the first battery pack in the j-th battery cluster when addressing of the (j-1)-th battery cluster begins or after addressing of the (j-1)-th battery cluster is completed, to address the j-th battery cluster; wherein M is an integer greater than 1, and j is an integer greater than 1 and not greater than M.

[0015] Fourthly, this application provides an energy storage system including an addressing device and M battery clusters, each battery cluster including N battery packs; the addressing device is used to perform any of the methods in the third aspect.

[0016] In some embodiments, the addressing device includes a first host computer; the control signal output port of the first host computer corresponding to each battery cluster is used to connect to the control signal input port of the first battery pack in the corresponding battery cluster to transmit the addressing control signal; the first host computer is used to connect to each battery pack in the corresponding battery cluster through a first communication bus corresponding to each battery cluster; or, the first host computer is used to connect to each battery pack in M ​​battery clusters through a second communication bus.

[0017] In some embodiments, the addressing device includes a second host computer and M first host computers, with each of the M first host computers corresponding to one of the M battery clusters; the control signal output port of each first host computer is used to connect to the control signal input port of the first battery pack in the corresponding battery cluster to transmit the addressing control signal; the second host computer is used to connect to the M first host computers respectively through a third communication bus, and each first host computer is used to connect to each battery pack in the corresponding battery cluster through the fourth communication bus.

[0018] In some embodiments, the control signal output port of the (i-1)th battery pack in the j-th battery cluster is used to connect to the control signal input port of the i-th battery pack in the j-th battery cluster.

[0019] Fifthly, this application provides a battery pack control unit, the battery pack including the battery pack control unit, the battery pack control unit being used to perform any of the methods in the first aspect.

[0020] In a sixth aspect, this application provides an addressing control unit, the addressing apparatus including the addressing control unit, the addressing control unit being used to perform any one of the methods in the second or third aspect.

[0021] In a seventh aspect, this application provides a computer device, the computer device including a memory and a processor, the memory storing a computer program, and the processor executing the computer program to implement any one of the methods of the first aspect, the second aspect, or the third aspect.

[0022] Eighthly, this application provides a chip for performing any one of the methods of the first, second, or third aspect.

[0023] This application provides a battery pack addressing method, energy storage system, control unit, device, and chip. After receiving an addressing control signal, the battery pack names its own address as the i-th address and outputs the addressing control signal to the next battery pack, thus transmitting the addressing control signal layer by layer. Furthermore, the battery pack that has completed addressing also sends its own address to the addressing device. The addressing device sends the received address to the battery pack that needs to be addressed, making the address of this battery pack different from addresses already used by other battery packs during addressing. This application uses existing hardware circuits and internal software logic for automatic addressing, eliminating the need for additional hardware circuits, reducing equipment costs and system complexity. Specifically, only software logic needs to be added to complete the automatic addressing of battery packs, facilitating subsequent accurate positioning and management, reducing human intervention, and improving addressing efficiency. This pure software addressing scheme is suitable for large-scale addressing, saving time and effort. Attached Figure Description

[0024] This application will be further described below with reference to the accompanying drawings and specific embodiments.

[0025] Figure 1 This is a schematic diagram showing the location of the PACK inside an energy storage container, as provided in an embodiment of this application.

[0026] Figure 2 This is a schematic diagram of PACK communication and external wiring (three-level communication architecture) provided in an embodiment of this application.

[0027] Figure 3 This is a schematic diagram of PACK communication and external wiring provided in an embodiment of this application (two-level communication architecture, not sharing a communication bus).

[0028] Figure 4 This is a schematic diagram of PACK communication and external wiring provided in an embodiment of this application (two-level communication architecture, sharing a communication bus).

[0029] Figure 5This is a structural block diagram of a computer device provided in an embodiment of this application. Detailed Implementation

[0030] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0031] In the description of the embodiments of this application, it should be understood that the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, features defined with "first" and "second" may explicitly or implicitly include one or more of the stated features. In the description of the embodiments of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0032] See Figure 1 , Figure 1 This is a schematic diagram showing the location of the PACK inside an energy storage container according to an embodiment of this application. Figure 1 In this context, TB stands for Transfer Box, and R1-1, R1-2...R12-4 are all PACKs. The numerical designations are merely PACK numbers and have no actual meaning.

[0033] The energy storage container contains multiple PACKs (i.e., battery packs), and multiple PACK communication buses (e.g., CAN communication buses) are connected together to communicate with a host computer. When a battery-side fault or anomaly occurs, it is difficult to pinpoint the exact location of multiple identical PACKs. The relevant addressing methods rely on hardware differences or external DIP switches, or pre-writing fixed addresses to the corresponding switch boxes, but these methods have limitations. As an example, the PACK distribution inside the energy storage container is as follows: Figure 1 As shown, the internal structure involves multiple PACKs. In actual operation, if a communication failure occurs, it is necessary to locate the specific PACK. If it has not been pre-addressed, it is difficult to locate the physical location of the PACK.

[0034] See Figure 2 , Figure 2 This is a schematic diagram of PACK communication and external wiring (three-level communication architecture) provided in an embodiment of this application. Figure 2 In this context, n is a positive integer.

[0035] This application provides a battery pack addressing method. The addressing device is used to address battery packs in a battery cluster, the battery cluster including N battery packs. The method includes: after receiving an addressing control signal from the addressing device, a first battery pack names its own address as a first address and outputs the addressing control signal to send the first address to the addressing device; after receiving an addressing control signal from an (i-1)th battery pack and addresses from the addressing device ranging from the first address to the (i-1)th address, the i-th battery pack names its own address as the i-th address and outputs the addressing control signal to send the i-th address to the addressing device, the i-th address being different from any one of the addresses from the first address to the (i-1)th address; where N is an integer greater than 1, and i is an integer greater than 1 and not greater than N.

[0036] In some embodiments, the addressing device can also be used to send an automatic addressing command to the first battery pack, and the first battery pack performs addressing after receiving the automatic addressing command and the addressing control signal.

[0037] In some embodiments, the addressing device can be used to connect to each battery pack respectively via a communication bus, and the addressing device is also used to connect to the first battery pack via an addressing control signal transmission line; the (i-1)th battery pack can also be used to connect to the i-th battery pack via an addressing control signal transmission line.

[0038] In the above embodiments, the energy storage system may contain one or more battery clusters, and each battery cluster may contain multiple battery packs. The above embodiments do not limit the number of battery clusters (i.e., M) and the number of battery packs (i.e., N). In practical applications, these can be set according to system requirements. As an example, a battery cluster includes multiple battery packs connected in series.

[0039] To enable addressing of battery packs, an addressing device can be installed within the energy storage system. The addressing device may include one or more host computers. The relationship between the host computer and the battery pack can be one-to-one or one-to-many, and can be selected according to actual needs.

[0040] like Figure 2As shown, assuming the energy storage system adopts a three-level communication architecture, the addressing device includes one second host computer (e.g., host computer 2) and M first host computers (e.g., host computers 1_1 to 1_M), with each first host computer corresponding to a battery cluster. To achieve communication connections between battery packs, as an example, within the same battery cluster, the DO (digital output port) of each PACK is connected to the DI (digital input port) of the next PACK, while the DO of the last PACK can be left unconnected. To achieve communication connections between the addressing device and the battery packs, each first host computer (i.e., each of host computers 1_1 to 1_M) can be connected to each battery pack in the corresponding battery cluster via a communication bus (e.g., a CAN communication bus) (e.g., for transmitting control commands, address data, flag bits, etc.). The DO of each first host computer can be connected to the DI of the first PACK in the corresponding battery cluster (e.g., for issuing addressing control signals). Furthermore, host computer 2 can be connected to each first host computer via a communication bus (e.g., a CAN communication bus). The DO of host computer 2 can be connected to the DI of host computer 1_1, the DO of host computer 1_1 can be connected to the DI of host computer 1_2, the DO of host computer 1_2 can be connected to the DI of host computer 1_3, and so on. The DO of host computer 1_M-1 can be connected to the DI of host computer 1_M, and the DO of host computer 1_M can be left unconnected. For any given DO, the connection between the DO and the connected DI can be, for example, via an addressing control signal transmission line; the above embodiment does not limit this connection.

[0041] In the above embodiments, the output signal of the DO can be a variable waveform. As an example, the output signal of the DO (e.g., an addressing control signal) can be a fixed square wave. The square wave can have high and low levels; for example, it can remain high (or low) when addressing is not required, low (or high) when addressing is required, and return to high (or low) after addressing is completed. As another example, the output signal of the DO can also be a square wave of different frequencies, with a fixed frequency during addressing and another fixed frequency after addressing is completed. The above embodiments do not limit the waveform form of the DO output signal, and it can be flexibly selected according to requirements. In some cases, it can be a sine wave, a triangle wave, or other waveforms.

[0042] For example, after receiving the addressing information (i.e., the first address) of the first battery pack in the first battery cluster, the host computer 1_1 transmits information to other PACKs via the communication bus, informing them that the first address is already occupied and that other PACKs cannot use the first address when addressing; they can only use addresses other than the first address. After receiving the addressing information (i.e., the second address) of the second battery pack in the first battery cluster, the host computer 1_1 transmits information to other PACKs via the communication bus, informing them that the second address is already occupied and that other PACKs cannot use the second address when addressing; they can only use addresses other than the first and second addresses. Similarly, after receiving the addressing information (i.e., the N-1 address) of the (N-1)th battery pack in the first battery cluster, the host computer 1_1 transmits information to other PACKs via the communication bus, informing them that the N-1th address is already occupied and that other PACKs cannot use the N-1th address when addressing; they can only use addresses other than the first to the (N-1)th addresses.

[0043] like Figure 2 As shown in the example, in the first battery cluster, after the first PACK (i.e., R1-BMU1) is addressed, the output level of the DO port of the first PACK (R1-BMU1) changes (i.e., outputs the addressing control signal). After the DI of the second PACK (i.e., R1-BMU2) receives the DO output signal (i.e., the addressing control signal) from the first PACK (R1-BMU1), it also begins addressing. Since the information obtained from the CAN communication bus indicates that the first address (e.g., address 1) has been occupied, addressing can only start from the second address (e.g., address 2). Therefore, the PACK (R1-BMU2) can be automatically named the second address. Furthermore, the second PACK (i.e., R1-BMU2) sends the flag bit and the second address through the CAN communication bus, indicating that the PACK (R1-BMU2) has been successfully addressed to address 2, and address 2 is written into the storage unit of the second PACK and uploaded to the host computer 1_1.

[0044] The second PACK (i.e., R1-BMU2) uploads address information to host computer 1_1 as address 2. Therefore, host computer 1_1 can inform other PACKs that addresses 1 and 2 are already assigned by a PACK and cannot be used. The next PACK addressing can only use addresses other than these two, such as address 3. This process is repeated until the last PACK in the first battery cluster (e.g., Rn-BMU3) has completed its last address assignment (i.e., the 3nth address, for example, address 3n). After that, no more addressing control signals are output, and only address 3n and the flag bit are uploaded via the CAN communication bus. Alternatively, the last PACK (Rn-BMU3) can also output an addressing control signal, but since its DO is not connected to the next device via a connection line, this command (i.e., the output addressing control signal) has no effect.

[0045] The above embodiments utilize relevant hardware circuits and internal software logic for automatic addressing, eliminating the need for additional hardware circuitry. In other words, automatic addressing can be completed simply by adding logical judgments to the software. Furthermore, the hardware version circuitry and PACK are completely identical, requiring no prior differentiation during production and installation, and eliminating the need for manual operation. Specifically, within a battery cluster, after receiving the addressing control signal, the first battery pack names its own address as a first address (e.g., address 1) and outputs an addressing control signal to send the first address to the addressing device. The second battery pack in the same cluster, upon receiving the addressing control signal, names its own address as a second address (e.g., address 2) and outputs an addressing control signal to send the second address to the addressing device. The third battery pack in the same cluster, upon receiving the addressing control signal, names its own address as a third address (e.g., address 3) and outputs an addressing control signal to send the third address to the addressing device. Similarly, after receiving the addressing control signal, the (N-1)th battery pack in the same battery cluster names its own address as the (N-1)th address and outputs an addressing control signal to send the (N-1)th address to the addressing device. The Nth battery pack in the same battery cluster, after receiving the addressing control signal, names its own address as the Nth address and sends the Nth address to the addressing device. Since manual addressing is unnecessary, this reduces human intervention and improves addressing efficiency. The above-described pure software addressing scheme is suitable for large-scale addressing, saving time and effort.

[0046] As can be seen in the above embodiments, the first battery pack receives an addressing control signal from the addressing device, and the i-th battery pack receives an addressing control signal from the (i-1)-th battery pack in the current battery cluster.

[0047] Taking the j-th battery cluster as an example, the addressing control signal received by the first battery pack in the j-th battery cluster can come from a host computer (e.g., host computer 1_j). For the other battery packs in the j-th battery cluster, the addressing control signal received can come from the previous battery pack in the j-th battery cluster. For example, the addressing control signal received by the second battery pack in the first battery cluster can come from the first battery pack in the first battery cluster, and the addressing control signal received by the third battery pack in the third battery cluster can come from the second battery pack in the third battery cluster.

[0048] In some embodiments, the method may further include: the first battery pack or the i-th battery pack sending a flag bit to the addressing device after addressing is completed; the flag bit is used to indicate that the current battery pack has completed addressing.

[0049] The flag bit, for example, is a flag signal and can be implemented in any possible way; the above embodiments do not limit this. For example, when the host computer 1_1 issues an automatic addressing command, the DI of the first PACK (e.g., R1-BMU1) in the first battery cluster, after receiving the addressing control signal from the host computer 1_1, automatically names the address of the first PACK (R1-BMU1) as the first address, for example, address 1. Furthermore, the first PACK in the first battery cluster can also send the flag bit and the first address (i.e., address 1) to the host computer 1_1 via a communication bus (e.g., a CAN communication bus), indicating that the PACK (i.e., R1-BMU1) has been successfully addressed to address 1, and the address has been written into the storage unit of the first PACK. The other battery packs in the first battery cluster are similar, and will not be described in detail here. The flag bit and battery pack address can be sent synchronously or sequentially; the above embodiments do not limit this.

[0050] The i-th battery pack in the j-th battery cluster sends a flag bit via a communication bus (e.g., a CAN communication bus). The flag bit indicates, for example, that the PACK has been successfully addressed and outputs an addressing control signal to the next PACK (i.e., the (i+1)-th battery pack). During the addressing of the first battery pack in the j-th battery cluster, the DO output signal of the host computer 1_j can remain in addressing mode (e.g., the host computer 1_j continuously outputs the addressing control signal). After the addressing of the first battery pack in the j-th battery cluster is completed, the DO output signal of the host computer 1_j can remain in addressing mode or stop addressing mode (e.g., the host computer 1_j stops outputting the addressing control signal). The above embodiment does not limit this. As an example, even if the first battery pack in the j-th battery cluster detects a change in the DO output signal of the host computer 1_j, it will not perform secondary addressing and will retain the first addressing address. Secondary addressing will only begin when an automatic addressing command is received again on the communication bus and the DO output signal of the host computer 1_j is in addressing mode. This reduces unnecessary automatic addressing and minimizes waste of computing and communication resources.

[0051] In some embodiments, the method may further include: when the target battery pack has no address, battery packs other than the target battery pack send their own addresses to the addressing device; the addressing device, after obtaining a set of addresses of battery packs other than the target battery pack in the battery cluster, determines a target address for naming the target battery pack based on the address set, and sends the target address to the target battery pack; the target battery pack receives the target address and names its own address as the target address. The target battery pack can be any battery pack in the battery cluster.

[0052] This application embodiment also provides a battery pack addressing method. An addressing device is used to address battery packs in a battery cluster, the battery cluster comprising N battery packs. The method includes: the addressing device sending an addressing control signal to a first battery pack; the first battery pack, upon receiving the addressing control signal from the addressing device, naming its own address as a first address, and outputting the addressing control signal to send the first address to the addressing device; the i-th battery pack, upon receiving the addressing control signal from the (i-1)-th battery pack and the first address to the (i-1)-th address from the addressing device, naming its own address as an i-th address, and outputting the addressing control signal to send the i-th address to the addressing device, the i-th address being different from any one of the first address to the (i-1)-th address; the addressing device, upon receiving the (i-1)-th address from the (i-1)-th battery pack, sending the first address to the (i-1)-th address to the i-th battery pack; wherein N is an integer greater than 1, and i is an integer greater than 1 and not greater than N.

[0053] In some embodiments, the addressing device can be used to connect to each battery pack respectively via a communication bus, and the addressing device is also used to connect to the first battery pack via an addressing control signal transmission line; the (i-1)th battery pack can also be used to connect to the i-th battery pack via an addressing control signal transmission line.

[0054] In some embodiments, the method may further include: the addressing device receiving a flag bit from any one of the battery packs; the flag bit being used to indicate that the battery pack has completed addressing.

[0055] In some embodiments, the method may further include: the addressing device re-addressing the N battery packs in the event of an addressing anomaly in the battery cluster; the process by which the addressing device determines whether the battery cluster is addressing anomaly includes: determining that the battery cluster is addressing anomaly when the received addresses are duplicated; or, determining that the battery cluster is addressing anomaly when the number of received addresses does not match the total number of battery packs.

[0056] The above embodiments do not limit the method for judging addressing anomalies and can be set according to the needs of actual applications. For example, when the energy storage system is fixed, the total number of PACKs in each battery cluster is fixed. The addressing device compares the number of addresses to be addressed with the total number of PACKs in each battery cluster in the actual system. When the number of addresses equals the total number of PACKs in the battery cluster, addressing stops. The addressing device can also perform a secondary verification of the addresses uploaded by the PACKs. Taking the j-th battery cluster as an example, if there is a duplicate address uploaded by the PACKs in the j-th battery cluster and / or the number of addresses does not match the total number of PACKs in the j-th battery cluster, the addressing of the j-th battery cluster can be identified as abnormal. In addition, the addressing device can also generate addressing anomaly information for the j-th battery cluster for subsequent troubleshooting.

[0057] As can be seen, when one or more battery clusters are abnormally addressed, the addressing device can perform secondary addressing on the corresponding battery clusters and repeat the corresponding automatic addressing operation steps mentioned above.

[0058] In some embodiments, the method may further include: when the addressing device has no address for the target battery pack in the battery cluster, receiving an address sent by a battery pack in the battery cluster to obtain an address set of battery packs in the battery cluster other than the target battery pack; based on the address set, determining a target address for naming the target battery pack, and sending the target address to the target battery pack so that the target battery pack names its own address as the target address.

[0059] In practical applications, if one of the PACKs malfunctions after the j-th battery cluster is addressed, the PACK can be addressed individually, or the entire cluster can be re-addressed. The above embodiments do not limit the specific implementation method. The following describes the process of addressing only the PACK. Taking the first battery cluster as an example, after replacing one PACK in the first battery cluster, since all other PACKs have been addressed, only the replaced PACK has no address. The addressing device issues a query command to obtain the address information of other addressed PACKs, thereby determining the corresponding address (i.e., the target address) of the PACK without an address (as an example of a target battery pack). For example, the missing address can be determined as the target address based on a pre-set address set. The missing address (i.e., the target address) is sent to the PACK without an address through the communication bus. After receiving the target address, the PACK automatically names its own address as the target address.

[0060] For example, suppose the j-th battery cluster corresponds to 3n addresses (e.g., addresses 1 to 3n). PACK A is replaced due to a fault, and PACK A becomes the target battery pack. Assume that initially, each PACK is successfully addressed and its address is written to its corresponding internal memory. At this point, the addressing device sends a query command to retrieve the address of the PACK. Successfully addressed PACKs upload their addresses via the communication bus. Suppose the addressing device receives 3n-1 addresses, but address A is missing. In this case, the addressing device can send a forced addressing command to PACK A, forcibly renaming the missing address to address A. Upon receiving the forced addressing command, PACK A renames its own address to address A and writes address A into its memory.

[0061] In some embodiments, if multiple PACKs (two or more PACKs) are abnormally addressed after the j-th battery cluster is addressed, and multiple PACKs need to be replaced, all abnormal PACKs can be replaced, and the DI and DO connection lines can be referenced. Figure 2 The connection is made using the connection method described above. After the external wiring is completed, the addressing device can issue an automatic addressing command again, repeating the corresponding operation steps in the above embodiments to complete the secondary addressing operation. The above embodiments do not limit the number of addressing operations; the addressing device can issue automatic addressing commands according to addressing requirements. In practical applications, the addressing device can be manually controlled to issue automatic addressing commands, or the addressing device can intelligently issue automatic addressing commands after recognizing addressing anomalies.

[0062] In some embodiments, the addressing device can be used to connect to each battery pack respectively via a communication bus, and the addressing device is also used to connect to the first battery pack via an addressing control signal transmission line; the (i-1)th battery pack can also be used to connect to the i-th battery pack via an addressing control signal transmission line.

[0063] This application embodiment also provides a battery pack addressing method. The addressing device is used to address battery packs in M ​​battery clusters, each battery cluster including N battery packs. The j-th battery cluster is used to execute any of the above methods. The method includes: when the addressing of the (j-1)-th battery cluster begins or after the addressing of the (j-1)-th battery cluster is completed, the addressing device sends an addressing control signal to the first battery pack in the j-th battery cluster to address the j-th battery cluster; wherein, M is an integer greater than 1, and j is an integer greater than 1 and not greater than M.

[0064] In other words, the addressing device can send an addressing control signal to the next battery cluster only after the current battery cluster has been addressed, allowing multiple battery clusters to be addressed sequentially without overlapping addressing time periods. Alternatively, the addressing device can simultaneously send addressing control signals to multiple battery clusters, enabling them to be addressed concurrently. In this case, the addressing time periods of different battery clusters overlap; that is, the addressing of the next battery cluster can begin while the current battery cluster is being addressed. In practical applications, multiple battery clusters can be addressed sequentially or simultaneously. The above embodiments are not limited in this regard, and a suitable addressing method can be flexibly selected according to actual needs.

[0065] In some embodiments, the method may further include: when one battery cluster is addressed, the addressing device controls the remaining battery clusters not to be addressed.

[0066] For example, assuming the communication bus uses a CAN bus, CAN communication bus 1 (corresponding to battery cluster 1) to CAN communication bus M (corresponding to battery cluster M) are all connected to the same addressing device. The addressing control unit within the addressing device (e.g., DSP, ARM, CPLD, FPGA, etc.) can obtain the status of different battery clusters. As an example, when battery cluster 1 is being addressed, battery clusters 2 and N are not being addressed. Only when the current battery cluster has completed addressing and the corresponding addressing control signal is disconnected does the next unaddressed battery cluster begin addressing.

[0067] When the energy storage system comprises multiple battery clusters, the above method can be used to address any M battery clusters with communication connections among the multiple battery clusters. The M addressed battery clusters may include the first battery cluster, the last battery cluster (i.e., the Mth battery cluster) in terms of physical address, and may also include intermediate battery clusters; that is, the physical addresses of these M battery clusters are not limited. As an example, the DI of the first PACK (e.g., R1-BMU1) in the first battery cluster (e.g., battery cluster 1) is connected to the DO of the corresponding first host computer (e.g., host computer 1_1), such as... Figure 2 As shown.

[0068] This application also provides an energy storage system, including an addressing device and M battery clusters, each battery cluster including N battery packs. The addressing device is used to perform any of the methods described above.

[0069] See Figure 3 and Figure 4 , Figure 3 This is a schematic diagram of PACK communication and external wiring provided in an embodiment of this application (two-level communication architecture, not sharing a communication bus). Figure 4 This is a schematic diagram of PACK communication and external wiring provided in an embodiment of this application (two-level communication architecture, sharing a communication bus).

[0070] In some embodiments, the addressing device may include a first host computer. The control signal output port of the first host computer corresponding to each battery cluster is used to connect to the control signal input port of the first battery pack in the corresponding battery cluster to transmit the addressing control signal. The first host computer is used to connect to each battery pack in the corresponding battery cluster via a first communication bus corresponding to each battery cluster; or, the first host computer is used to connect to each battery pack in M ​​battery clusters via a second communication bus.

[0071] For example, such as Figure 3 and Figure 4 As shown, the energy storage system adopts a two-level communication architecture, and the addressing device includes a first host computer (e.g., host computer 1_1). The control signal output port of host computer 1_1 corresponding to the j-th battery cluster (e.g., battery cluster j) is used to connect to the control signal input port of the first battery pack in battery cluster j.

[0072] The communication bus does not need to be shared, such as Figure 3 As shown. The host computer 1_1 is used to connect to each battery pack in battery cluster j via a first communication bus (e.g., a CAN communication bus) corresponding to battery cluster j. The number of communication buses can be M.

[0073] Alternatively, the communication bus can be shared, such as Figure 4As shown. For example, the host computer 1_1 is used to connect to each battery pack in M ​​battery clusters (e.g., battery cluster 1 to battery cluster M) via a second communication bus (e.g., CAN communication bus), where the number of communication buses can be 1.

[0074] In some embodiments, the addressing device may include a second host computer and M first host computers, with each of the M first host computers corresponding to one of the M battery clusters. The control signal output port of each first host computer is used to connect to the control signal input port of the first battery pack in the corresponding battery cluster to transmit the addressing control signal. The second host computer is used to connect to the M first host computers via a third communication bus, and each first host computer is used to connect to each battery pack in the corresponding battery cluster via the fourth communication bus.

[0075] In some embodiments, the control signal output port of the (i-1)th battery pack in the j-th battery cluster can be connected to the control signal input port of the i-th battery pack in the j-th battery cluster. In some embodiments, the control signal output port of the (i+1)th battery pack in the j-th battery cluster can be left unconnected.

[0076] The embodiments of this application do not limit the type of communication bus, which may be, for example, a CAN communication bus.

[0077] For example, such as Figure 2 As shown, the energy storage system adopts a two-level communication architecture. The addressing device includes a second host computer (e.g., host computer 2) and M first host computers (e.g., host computers 1_1 to host computers 1_M). The M first host computers correspond one-to-one with the M battery clusters (e.g., battery clusters 1 to M), that is, host computer 1_j corresponds to the j-th battery cluster (e.g., battery cluster j).

[0078] The control signal output port of host computer 2 is used to connect to the control signal input port of host computer 1_1. The inter-cluster control signal output port of host computer 1_1 is used to connect to the control signal input port of host computer 1_2. The inter-cluster control signal output port of host computer 1_2 is used to connect to the control signal input port of host computer 1_3, and so on. The inter-cluster control signal output port of host computer 1_M-1 is used to connect to the control signal input port of host computer 1_M. The inter-cluster control signal output port of host computer 1_M can be left unconnected. Host computer 2 is used to connect to host computers 1_1 to 1_M respectively via a third communication bus (e.g., CAN communication bus). Host computer 1_j is used to connect to each battery pack in battery cluster j via a fourth communication bus.

[0079] The control signal output port of the host computer 1_j (distinct from the inter-cluster control signal output port) can be used to connect to the control signal input port of the first battery pack in the j-th battery cluster. The control signal output port of the first battery pack in the j-th battery cluster can be used to connect to the control signal input port of the second battery pack in the j-th battery cluster, the control signal output port of the second battery pack in the j-th battery cluster can be used to connect to the control signal input port of the third battery pack in the j-th battery cluster, the control signal output port of the third battery pack in the j-th battery cluster can be used to connect to the control signal input port of the fourth battery pack in the j-th battery cluster, and so on.

[0080] As can be seen, in the above embodiments, the energy storage system can adopt a three-level communication architecture or a two-level communication architecture, both of which can realize automatic addressing function. That is to say, the above embodiments do not limit the communication level in the energy storage system. As long as the resources meet the system requirements, a three-level communication architecture or a two-level communication architecture can be adopted.

[0081] like Figure 3 As shown, battery cluster 1 and battery cluster M do not share the communication bus, and the DO signals of each battery cluster may not be completely consistent. The specific addressing steps can be found above and will not be repeated here. Figure 2 Compared to the example shown, Figure 3 The energy storage system in this paper reduces one system host computer level (e.g., host computer 2), resulting in a two-level communication architecture. In practical applications, when the system power is relatively low, a single host computer 1_1 can meet the resource requirements of all battery clusters. In this case, the two-level communication architecture can realize all system communication functions.

[0082] Two-level communication architecture can also be like Figure 4 As shown, battery cluster 1 and battery cluster M share the communication bus, but the DI of the first PACK of each battery cluster is connected to different DOs of the host computer 1_1. Therefore, although they share the communication bus, the addressing method can still refer to the addressing steps described above. In some embodiments, the battery clusters can be divided first, and then one or more battery clusters can be addressed.

[0083] For example, when addressing is required, the DO level of the host computer 1_1 connected to the first PACK in battery cluster 1 changes. At this time, the DI of the first PACK in battery cluster 1 receives the level change information from the host computer 1_1 and starts automatic addressing. The addressing method is similar to that described above and will not be repeated here. After battery cluster 1 is addressed, battery cluster 2 addressing begins. The DO level of the host computer 1_1 connected to the first PACK in battery cluster 2 changes, and the addressing method is similar to that of battery cluster 1, and so on, addressing continues sequentially.

[0084] In some embodiments, when only battery cluster k (k is a positive integer less than M) needs to be addressed, the host computer 1_1 can issue an automatic addressing command to the first battery pack in battery cluster k, and the level transition of DO of the host computer 1_1 connected to the first battery pack in battery cluster k indicates that the entire battery cluster k is being addressed.

[0085] As can be seen, the above embodiments adopt a combination of hardware and software, which not only achieves fast addressing, but also performs multiple checks on the addressing results, making the error rate close to 0 and achieving high addressing accuracy.

[0086] As described above, in some embodiments, each battery pack may be provided with a storage unit for storing its own address.

[0087] This application also provides a battery pack control unit, the battery pack including the battery pack control unit, the battery pack control unit being used to perform any of the above methods.

[0088] This application embodiment also provides an addressing control unit, the addressing device including the addressing control unit, the addressing control unit being used to execute any of the above methods.

[0089] This application also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements any of the above methods.

[0090] This application also provides a computer program product, which includes a computer program that, when executed by a processor, implements any of the methods described above.

[0091] The computer program product may be in the form of a portable compact disc read-only memory (CD-ROM) and include program code, and may run on a terminal device, such as a personal computer. However, the computer program product of this application is not limited thereto, and the computer program product may be in any combination of one or more computer-readable media.

[0092] This application also provides a chip for performing any of the above methods.

[0093] See Figure 5 , Figure 5 This is a structural block diagram of a computer device provided in an embodiment of this application.

[0094] This application also provides a computer device, which includes a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement any of the methods described above.

[0095] The embodiments of this application do not limit the computer device, which may be, for example, a local computer device, a cloud computer device, a distributed computer device, etc.

[0096] The computer device may include: a memory 110, a processor 120, and a communication interface 130. The memory 110, the processor 120, and the communication interface 130 are connected through internal connection paths.

[0097] The memory 110 is used to store computer programs, which in some implementations may include code for implementing the methods of the embodiments of this application.

[0098] The processor 120 executes the computer program stored in the memory 110 to control the communication interface 130 to receive input data and information, and output operation results and other data. In some implementations, when the solutions of the embodiments of this application are implemented by software or firmware, the computer program used to implement the solutions of the embodiments of this application can be stored in the processor 120 and executed by the processor 120.

[0099] The memory 110 may be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. The non-volatile memory may be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. The volatile memory may be random access memory (RAM). It should be noted that the memory 110 described herein is intended to include, but is not limited to, any memory of these and other suitable types. As an example, the memory 110 includes random access memory (RAM), cache memory, and read-only memory (ROM). The memory 110 stores a computer program that can be executed by processor 120, causing processor 120 to implement the steps of any of the methods described above.

[0100] The processor 120 can be a central processing unit (CPU), or it can be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor, or the processor 120 can be any conventional processor.

[0101] In implementation, each step of the above method can be completed by the integrated logic circuitry of the hardware in the processor 120 or by instructions in software form. The method disclosed in the embodiments of this application can be directly implemented by the hardware processor, or by a combination of hardware and software modules in the processor 120. The software modules can be located in mature storage media in the art, such as random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, or registers. This storage medium is located in the memory 110, and the processor 120 reads the information in the memory 110 and, in conjunction with its hardware, completes the steps of the above method. To avoid repetition, detailed descriptions are not provided here.

[0102] In some implementations, in addition to the hardware units described above, computer devices may also include software modules, such as operating systems, basic input / output systems (BIOS), and application software.

[0103] An operating system is used to manage the hardware and / or software resources of a computer device; it is the kernel and foundation of the computer. The operating system handles fundamental tasks such as managing and configuring memory, determining the priority of system resource allocation, controlling input and output devices, operating the network, and managing the file system. To facilitate user operation, most operating systems provide a user interface for interaction with the system.

[0104] The BIOS is used to perform hardware initialization during the power-on boot phase and to provide runtime services for the operating system and applications. In some implementations, the BIOS can also monitor and display processor temperature and execute temperature protection strategies.

[0105] Application software, also known as an application program, can be understood as software written for a specific user application purpose, and is one of the main categories of computer software. For example, application software can be a program used to achieve purposes such as power control and temperature management.

[0106] It is understood that the specific examples in this application are only intended to help those skilled in the art better understand the implementation of this application, and are not intended to limit the scope of protection of this application.

[0107] It is understood that in the various embodiments of this application, the sequence number of each process does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of this application.

[0108] It is understood that the various implementation methods described in this application can be implemented individually or in combination, and this application does not limit them.

[0109] Unless otherwise stated, all technical and scientific terms used in this application have the same meaning as commonly understood by one of ordinary skill in the art. The terminology used in this application is for the purpose of describing particular embodiments only and is not intended to limit the scope of this application. The term "and / or" as used in this application includes any and all combinations of one or more of the associated listed items. The singular forms "a," "the," and "the" as used in this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0110] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0111] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the embodiments described above can be referred to the corresponding processes in other embodiments, and will not be repeated here.

[0112] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0113] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of the technical solution in this application, depending on actual needs.

[0114] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0115] If a function is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, essentially, or the part that contributes to the prior art, or part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0116] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A battery pack addressing method, characterized in that, The addressing device is used to address the battery packs in a battery cluster, the battery cluster comprising N battery packs, and the method includes: After receiving the addressing control signal from the addressing device, the first battery pack names its own address as the first address and outputs the addressing control signal to send the first address to the addressing device. After receiving the addressing control signal from the (i-1)th battery pack and the first address to the (i-1)th address from the addressing device, the i-th battery pack names its own address as the i-th address and outputs the addressing control signal to send the i-th address to the addressing device. The i-th address is different from any of the first address to the (i-1)th address. Where N is an integer greater than 1, and i is an integer greater than 1 and not greater than N.

2. The battery pack addressing method according to claim 1, characterized in that, The method further includes: After the first battery pack or the i-th battery pack completes the addressing, it sends a flag bit to the addressing device; the flag bit is used to indicate that the current battery pack has completed the addressing.

3. The battery pack addressing method according to claim 1, characterized in that, The method further includes: In the absence of an address for the target battery pack, the battery packs other than the target battery pack send their own addresses to the addressing device; the addressing device is used to determine a target address for naming the target battery pack based on the address set after obtaining the address set of the battery packs other than the target battery pack in the battery cluster, and send the target address to the target battery pack; The target battery pack receives the target address and names its own address as the target address.

4. The battery pack addressing method according to claim 1, characterized in that, The addressing device is used to connect to each battery pack respectively via a communication bus, and the addressing device is also used to connect to the first battery pack via an addressing control signal transmission line; The (i-1)th battery pack is also used to connect to the i-th battery pack via an addressing control signal transmission line.

5. A battery pack addressing method, characterized in that, The addressing device is used to address the battery packs in a battery cluster, the battery cluster comprising N battery packs, and the method includes: The addressing device sends an addressing control signal to the first battery pack; the first battery pack, upon receiving the addressing control signal from the addressing device, names its own address as the first address and outputs the addressing control signal to send the first address to the addressing device; the i-th battery pack, upon receiving the addressing control signal from the (i-1)-th battery pack and the first address to the (i-1)-th address from the addressing device, names its own address as the i-th address and outputs the addressing control signal to send the i-th address to the addressing device, wherein the i-th address is different from any one of the first address to the (i-1)-th address; After receiving the (i-1)th address from the (i-1)th battery pack, the addressing device sends the first address to the (i-1)th address to the i-th battery pack; Where N is an integer greater than 1, and i is an integer greater than 1 and not greater than N.

6. The battery pack addressing method according to claim 5, characterized in that, The method further includes: The addressing device receives a flag bit from any battery pack; the flag bit is used to indicate that the battery pack has completed addressing.

7. The battery pack addressing method according to claim 5, characterized in that, The method further includes: In the event of an abnormal addressing of the battery cluster, the addressing device re-addresses the N battery packs; The process by which the addressing device determines whether the battery cluster has an addressing error includes: If the received address is duplicated, the battery cluster addressing is considered abnormal; or, If the number of received addresses does not match the total number of battery packs, the battery cluster addressing is deemed abnormal.

8. The battery pack addressing method according to claim 5, characterized in that, The method further includes: When the target battery pack in the battery cluster has no address, the addressing device receives the address sent by the battery pack in the battery cluster to obtain the address set of battery packs in the battery cluster other than the target battery pack; based on the address set, it determines the target address for naming the target battery pack; and sends the target address to the target battery pack so that the target battery pack names its own address as the target address.

9. The battery pack addressing method according to claim 5, characterized in that, The addressing device is used to connect to each battery pack respectively via a communication bus, and the addressing device is also used to connect to the first battery pack via an addressing control signal transmission line; The (i-1)th battery pack is also used to connect to the i-th battery pack via an addressing control signal transmission line.

10. A battery pack addressing method, characterized in that, The addressing device is used to address the battery packs in M ​​battery clusters, each battery cluster including N battery packs, and the j-th battery cluster is used to perform the method of any one of claims 1 to 4, the method comprising: The addressing device sends an addressing control signal to the first battery pack in the j-th battery cluster when the addressing of the j-1th battery cluster begins or after the addressing of the j-1th battery cluster is completed, and addresses the j-th battery cluster. Where M is an integer greater than 1, and j is an integer greater than 1 and not greater than M.

11. An energy storage system, characterized in that, It includes an addressing device and M battery clusters, each battery cluster comprising N battery packs; The addressing device is used to perform the method of claim 10.

12. The energy storage system according to claim 11, characterized in that, The addressing device includes a first host computer; The control signal output port of the first host computer corresponding to each battery cluster is used to connect to the control signal input port of the first battery pack in the corresponding battery cluster to transmit the addressing control signal. The first host computer is used to connect to each battery pack in the corresponding battery cluster via a first communication bus corresponding to each battery cluster. Alternatively, the first host computer is used to connect to each battery pack in the M battery clusters via a second communication bus.

13. The energy storage system according to claim 11, characterized in that, The addressing device includes a second host computer and M first host computers, with each of the M first host computers corresponding to one of the M battery clusters. Each of the first host computer's control signal output ports is used to connect to the control signal input port of the first battery pack in the corresponding battery cluster to transmit the addressing control signal; The second host computer is used to connect to M first host computers via a third communication bus, and each first host computer is used to connect to each battery pack in the corresponding battery cluster via a fourth communication bus.

14. A battery pack control unit, characterized in that, The battery pack includes a battery pack control unit, which is used to perform the method of any one of claims 1 to 4.

15. An addressing control unit, characterized in that, The addressing device includes the addressing control unit, which is used to perform the method of any one of claims 5 to 10.

16. A computer device, characterized in that, The computer device includes a memory and a processor, the memory storing a computer program, and the processor executing the computer program to implement the method of any one of claims 1 to 4 or the method of any one of claims 5 to 10.

17. A chip, characterized in that, The chip is used to perform the method of any one of claims 1 to 4 or the method of any one of claims 5 to 10.

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