QFN Packaging Structure and Fabrication Method

Abstract

This invention provides a QFN package structure and its fabrication method. The package structure includes a frame unit comprising a base island and multiple metal pins surrounding the base island. A chip is mounted on the surface of the base island. The metal pins include functional pins and ground pins, which are electrically connected to the chip. A stepped structure is provided at the end of the ground pin near the base island. The chip is electrically connected to the bottom of the stepped structure of the ground pin. A molding compound covers the chip, metal pins, and electrical connections. An electromagnetic shielding layer is located on the front and sides of the package structure, and is conductive with the ground pin, achieving electromagnetic shielding of the package. The electromagnetic shielding layer is isolated from the functional pins by the molding compound and is not conductive. This invention effectively avoids the problem of chip short circuits, improving the reliability and stability of the package structure. This invention simplifies the manufacturing process, reduces costs and time, and improves production efficiency.

Description

Technical Field

[0001] This invention relates to the field of semiconductor packaging technology, and more specifically to a QFN packaging structure and its fabrication method. Background Technology

[0002] As the processing speed and transmission frequency of electronic components continue to increase, integrated circuits are prone to electromagnetic interference with other internal or external electronic components, such as crosstalk, transmission loss, and signal reflection. These interference phenomena can reduce the operating performance of integrated circuits.

[0003] To protect the chip in the semiconductor package from electromagnetic interference and reduce the impact of electromagnetic radiation on adjacent semiconductor components, a common method is to shield the semiconductor package.

[0004] In existing technologies, an electromagnetic shielding layer is typically placed on the back of the molding compound and grounded to the outside to achieve shielding. However, existing electromagnetic shielding methods have some problems.

[0005] Existing QFN (Quad Flat No-leads) package structures employ a metal shielding cover to achieve electromagnetic shielding between the chip and components, or between chips. This involves placing a cover with an electromagnetic shielding layer on the surface of the package frame, covering the chip and the leads of the QFN package structure. The electromagnetic shielding layer contacts of the cover are electrically connected to the ground pin, thus achieving an electromagnetically shielded QFN package structure. While this package structure achieves shielding, it occupies a large space and relies primarily on substrate packaging in its manufacturing process. However, substrate processing is costly, has low reliability, and poor thermal conductivity.

[0006] The ideal solution is a conformal shielding structure with an electromagnetic shielding layer. However, in existing packaging processes for shielded packages, substrate packaging is the most common method to achieve this function. Substrate packaging is costly, has low reliability, and poor thermal conductivity. Furthermore, while conformal shielding with a metal layer can reduce electromagnetic interference, it has limitations. It requires no exposed metal leads on the sides of the chip package, with only ground terminals remaining to facilitate communication with the electromagnetic shielding layer. In QFN packages, because the lead sidewalls are flush with and exposed to the molded layer sidewalls, short circuits can easily occur between the metal shielding layer and the exposed leads, leading to package failure.

[0007] Another approach involves adding an insulating layer to the outside of the QFN package pins to prevent short circuits between the pins and the electromagnetic shielding layer. However, this increases the complexity of the insulating layer fabrication process. After fabrication, the insulating layer must be exposed to the grounding pin, allowing the electromagnetic shielding layer to be grounded via the grounding pin, thus achieving electromagnetic shielding for the QFN package. This packaging structure is more complex and increases manufacturing costs. Furthermore, the additional insulating layer can negatively impact the thermal conductivity of the package.

[0008] Therefore, a new technical solution is urgently needed to address the aforementioned problems. In particular, in QFN products, how to achieve effective electromagnetic shielding while preventing short circuits caused by the electromagnetic shielding metal layer being connected to the functional pins is a key issue that requires current research.

[0009] This necessitates a new structural design and manufacturing process to achieve grounding of the metal layer while ensuring the proper functioning of the functional pins. Summary of the Invention

[0010] To address the aforementioned issues, this invention provides a QFN package structure and its fabrication method, effectively avoiding short circuits caused by conduction between the electromagnetic shielding layer and functional pins, thus improving the reliability and stability of the package structure. Furthermore, this invention simplifies the manufacturing process, reduces costs and time, and improves production efficiency.

[0011] On one hand, this invention discloses a method for fabricating a QFN package structure, which includes the following steps: S1. Prepare a metal frame with an array of frame units on the front. The frame unit includes a base island and a plurality of metal pins arranged around the base island. The base island is used to mount chips, and the metal pins include functional pins and ground pins. The metal pins are used to electrically connect to the chips. In this process, the front of the metal pins is etched, the functional pins are etched as a whole, and the ground pins are etched only at the end near the base island to form a stepped structure. S2. Attach the chip to the surface of the base island and electrically connect the chip to the metal pins; The chip is electrically connected to the bottom of the stepped structure of the ground pin; A molding compound is used to mold the front side of a metal frame to form a molding portion, which covers the chip, metal leads, and electrical connections to form a package. S3. On the front of the self-encapsulated body, make a half cut at the location of the cutting channel to form a first groove above the functional pin, and retain the molding compound between the first groove and the functional pin; form a second groove on the ground pin, and cut the second groove into the middle part of the top of the ground pin; S4. An electromagnetic shielding layer is provided on the front and side of the package body. An electromagnetic shielding layer is also provided in the first and second grooves. The electromagnetic shielding layer is connected to the grounding pin to achieve electromagnetic shielding of the package body. The electromagnetic shielding layer is isolated from the functional pin and is not connected. S5. Perform a second cut on the package to form a single QFN package structure.

[0012] In some implementations, in step S1, the ground pin and the functional pin are of the same thickness before etching.

[0013] In some implementations, in step S2, the height of the step structure is 70μm-150μm.

[0014] In some implementations, in step S3, the molding compound thickness remaining between the first groove and the functional pin is 50 μm - 100 μm.

[0015] In some embodiments, the electromagnetic shielding layer comprises a first layer, a second layer, and a third layer from bottom to top. The first layer is a seed layer, the second layer is an electromagnetic shielding metal material layer, and the third layer is a stainless steel protective layer. The first layer increases the bonding force between the electromagnetic shielding metal material and the encapsulation part. The second layer realizes the electromagnetic shielding function of the encapsulation structure, and the third layer prevents the oxidation of the electromagnetic shielding metal material, while also giving the encapsulation structure a good appearance and better printing quality.

[0016] In some implementations, the first layer is a stainless steel layer, and the second layer is a copper layer with a thickness of 3-9 μm.

[0017] In some implementations, the electromagnetic shielding layer is prepared by magnetron sputtering.

[0018] In some implementations, the chip is electrically connected to the metal pins via metal bonding wires, which are also encapsulated in a plastic package.

[0019] In some embodiments, in step S5, cutting is performed along the first and second grooves of the package.

[0020] On the other hand, the present invention also discloses a QFN packaging structure, which is made by the above-mentioned preparation method. The packaging structure includes a frame unit, a chip, a molding compound and an electromagnetic shielding layer. The frame unit includes a base island and a plurality of metal pins arranged around the base island. A chip is mounted on the surface of the base island. The metal pins include functional pins and ground pins. The metal pins are electrically connected to the chip. The grounding pin has a stepped structure at its end near the base island; The chip is electrically connected to the bottom of the stepped structure of the ground pin; The encapsulation portion covers the chip, metal leads, and electrical connections; The electromagnetic shielding layer is located on the front and sides of the package structure. The electromagnetic shielding layer is connected to the ground pin to achieve electromagnetic shielding of the package. The electromagnetic shielding layer is isolated from the functional pin by the plastic encapsulation and is not connected.

[0021] Compared with the prior art, the beneficial effects of the present invention are: The QFN package structure disclosed in this invention has a simple overall structure, effectively avoiding the problem of chip short circuit caused by conduction between the electromagnetic shielding layer and functional pins, and improving the reliability and stability of the package structure.

[0022] This invention simplifies the manufacturing process, reduces costs and time, improves production efficiency, and facilitates large-scale production.

[0023] In the preparation method disclosed in this invention, functional pins and ground pins of different thicknesses are obtained through innovative etching and cutting processes. Subsequently, an electromagnetic shielding layer is formed under the condition that the functional pins are covered by molding compound, thereby realizing the electromagnetic shielding of QFN products. The electromagnetic shielding layer is conductive with the ground pins but not with the functional pins, which not only achieves the electromagnetic shielding of the package but also effectively avoids the problem of short circuit of the chip caused by the conduction between the electromagnetic shielding layer and the functional pins.

[0024] In the preparation method disclosed in this invention, the product is sputtered in strip shape by sputtering after half-cutting, which has a significant output advantage compared with single sputtering, further improving production efficiency and facilitating large-scale production. Attached Figure Description

[0025] Figure 1 This is a schematic diagram of the QFN package structure in this invention; Figure 2 for Figure 1 Schematic diagram of the structure of surface AA; Figure 3 for Figure 1 Schematic diagram of the structure of the middle BB surface; Figure 4 for Figure 1 Schematic diagram of the structure of the C-plane; Figure 5 This is a structural diagram of the front of the metal frame; Figure 6 for Figure 5 A schematic diagram of the cross-sectional structure of AA after etching in the structure shown; Figure 7 for Figure 5 A schematic diagram of the cross-sectional structure of BB after etching in the structure shown; Figure 8 for Figure 6 The diagram shows the structure after the chip has been connected. Figure 9 for Figure 7 The diagram shows the structure after the chip has been connected. Figure 10 for Figure 8 The diagram shown illustrates the structure in which the plastic seal is formed. Figure 11 for Figure 9 The diagram shown illustrates the structure in which the plastic seal is formed. Figure 12 for Figure 10 A schematic diagram of the structure after half-cutting shown; Figure 13 for Figure 11 A schematic diagram of the structure after half-cutting shown; Figure 14 for Figure 12 A schematic diagram of a structure in which an electromagnetic shielding layer has been sputtered is shown. Figure 15 for Figure 13 A schematic diagram of a structure in which an electromagnetic shielding layer has been sputtered is shown. Figure 16 for Figure 14 A schematic diagram of the structure after it has been cut as shown; Figure 17 for Figure 14 A schematic diagram of the structure after it has been cut.

[0026] Label Explanation: Metal frame F; frame unit f; base island 1; metal pin 2; functional pin 201; ground pin 202; stepped structure 203; bottom of stepped structure 2031; top of stepped structure 2032; chip 3; metal bonding wire 4; encapsulation part 5; first groove 601; second groove 602; electromagnetic shielding layer 7. Detailed Implementation

[0027] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments.

[0028] This invention discloses a method such as Figure 1 The QFN package structure shown is as follows. Figure 1 This is the back side of the packaging structure. Figure 2 , Figure 3 and Figure 4 They are respectively Figure 1 A schematic diagram of the structure of planes AA, BB, and CC.

[0029] The QFN package structure includes a frame unit f, a chip 3, a molding compound 5, and an electromagnetic shielding layer 7.

[0030] The frame unit f includes a base island 1 and a plurality of metal pins 2 arranged around the base island 1. A chip 3 is mounted on the surface of the base island 1. The metal pins 2 include functional pins 201 and ground pins 202. The metal pins 2 are electrically connected to the chip 3.

[0031] The grounding pin 202 has a stepped structure 203 at the end near the base island 1.

[0032] The chip 3 is electrically connected to the bottom 2031 of the stepped structure of the ground pin 202.

[0033] The encapsulation portion 5 covers the chip 3, the metal pins 2, and the electrical connection portion.

[0034] The electromagnetic shielding layer 7 is disposed on the front and side of the package structure. The electromagnetic shielding layer 7 is connected to the ground pin 202 to achieve electromagnetic shielding of the package. The electromagnetic shielding layer 7 is isolated from the functional pin 201 by the plastic encapsulation part 5 and is not connected.

[0035] Specifically, chip 3 and metal pin 2 are electrically connected through metal bonding wire 4, which is also covered by plastic encapsulation 5.

[0036] The QFN package structure disclosed in this invention has a simple overall structure and effectively avoids the problem of short circuit of chip 3 caused by conduction between electromagnetic shielding layer 7 and functional pin 201, thereby improving the reliability and stability of the package structure.

[0037] The fabrication method of the above-mentioned QFN package structure will be further described below.

[0038] The fabrication method of the QFN package structure includes the following steps: S1. Preparation as follows Figure 5 The metal frame F shown has an array of frame units f on its front side. To clearly illustrate the structure of the frame units f, Figure 5 Only two frame units f are listed in the document. In actual production operations, multiple frame units f can be arrayed along the X and Y directions.

[0039] The frame unit f includes a base island 1 and a plurality of metal pins 2 arranged around the base island 1. The base island 1 is used to mount the chip 3. The metal pins 2 include functional pins 201 and ground pins 202. The metal pins 2 are used for electrical connection with the chip 3.

[0040] Before etching, the ground pin 202 and the functional pin 201 have the same thickness, just like in the prior art.

[0041] Specifically, the front side of functional pin 201 is etched as a whole, and the structural diagram after etching is shown below. Figure 6 As shown.

[0042] The ground pin 202 is etched only at the end near the base island 1, forming a stepped structure 203. The schematic diagram of the etched structure is shown below. Figure 7 As shown, the height of the stepped structure 203 is 70μm-150μm.

[0043] S2. Chip 3 is mounted on the surface of base island 1. Chip 3 is electrically connected to metal pins 2 via metal bonding wires 4. The metal bonding wires 4 are subsequently encapsulated by the molding compound 5 to form... Figure 8 and Figure 9 The structure shown.

[0044] Among them, chip 3 is electrically connected to the bottom 2031 of the stepped structure of ground pin 202.

[0045] A molding compound is used to mold the front side of the metal frame F to form a molding portion 5. The molding portion 5 covers the chip 3, the metal leads 2, and the electrical connection parts, forming a shape as shown below. Figure 10 and Figure 11 The package shown.

[0046] S3. On the front of the self-encapsulated body, make a half-cut at the location of the cutting channel to form a first groove 601 above the functional pin 201, retaining the molding compound between the first groove 601 and the functional pin 201; form a second groove 602 on the ground pin 202, the second groove 602 cutting into the middle part of the top 2032 of the stepped structure of the ground pin 202, as shown in the specific structure. Figure 12 and Figure 13 As shown.

[0047] The front of the package refers to the front orientation of the frame unit f. The spaces between adjacent frame units f are cut channels (not shown in the figure, refer to the location of cut channels in the prior art).

[0048] The thickness of the molding compound retained between the first groove 601 and the functional pin 201 is 50μm-100μm.

[0049] S4. An electromagnetic shielding layer 7 is provided on the front and side of the package body. An electromagnetic shielding layer 7 is also provided in the first groove 601 and the second groove 602. The electromagnetic shielding layer 7 is conductive to the grounding pin 202, achieving electromagnetic shielding of the package body. The electromagnetic shielding layer 7 is isolated from the functional pin 201 and is not conductive. The specific structure is as follows: Figure 14 and Figure 15 As shown.

[0050] When preparing the electromagnetic shielding layer 7, in addition to preparing the electromagnetic shielding layer 7 on the front and sides of the package, the electromagnetic shielding layer 7 is also prepared in the first groove 601 and the second groove 602, so that the electromagnetic shielding layer 7 is connected to the grounding pin 202 to achieve electromagnetic shielding of the package; the electromagnetic shielding layer 7 is isolated from the functional pin 201 and is not connected.

[0051] The electromagnetic shielding layer 7 can be structured according to existing technologies. For example, the electromagnetic shielding layer 7 includes a first layer, a second layer, and a third layer from bottom to top. The first layer is a seed layer, the second layer is an electromagnetic shielding metal material layer, and the third layer is a stainless steel protective layer. The first layer increases the bonding force between the electromagnetic shielding metal material and the encapsulation part 5. The second layer realizes the electromagnetic shielding function of the encapsulation structure, and the third layer prevents the oxidation of the electromagnetic shielding metal material, while also giving the encapsulation structure a good appearance and good printing quality.

[0052] In practice, the first layer is a stainless steel layer, and the second layer is a copper layer with a thickness of 3-9 μm.

[0053] The electromagnetic shielding layer 7 is prepared by magnetron sputtering. Magnetron sputtering is an existing technology and will not be described in detail here.

[0054] S5. Perform a second cut on the package to form a single QFN package structure.

[0055] During cutting, the cut is made along the first groove 601 and the second groove 602 of the package body; that is, the width of the second cut is slightly narrower than the width of the first half-cut. Generally, the longitudinal electromagnetic shielding layer 7 within the first groove 601 and the second groove 602 is not cut. The specific structure is as follows... Figure 16 and Figure 17 As shown.

[0056] A schematic diagram of a single QFN package structure is shown below. Figures 1 to 4 As shown.

[0057] This invention simplifies the manufacturing process, reduces costs and time, improves production efficiency, and facilitates large-scale production.

[0058] In the preparation method disclosed in this invention, functional pins 201 and ground pins 202 of different thicknesses are obtained through innovative etching and cutting processes. Subsequently, an electromagnetic shielding layer 7 is formed when the functional pins 201 are covered by molding compound, thereby achieving electromagnetic shielding of the QFN product. The electromagnetic shielding layer 7 is conductive with the ground pin 202 but not conductive with the functional pins 201, which not only achieves electromagnetic shielding of the package but also effectively avoids the problem of short circuit of chip 3 caused by the conductive connection between the electromagnetic shielding layer 7 and the functional pins 201.

[0059] The preparation method disclosed in this invention achieves strip-shaped sputtering of the product through sputtering after semi-cutting, which has a significant output advantage compared to single-piece sputtering, further improving production efficiency and facilitating large-scale manufacturing. Strip-shaped sputtering is achieved because the product after semi-cutting in this invention remains a single strip; it can be sputtered simply by fixing the entire strip onto the sputtering platform. In contrast, existing technologies typically sputter single products, requiring the product to be cut into individual pieces and then fixed one by one onto the sputtering platform. The strip-shaped sputtering in this invention is significantly more efficient.

[0060] The above descriptions are merely some embodiments of the present invention. It should be noted that those skilled in the art can make other modifications and improvements without departing from the inventive concept of the present invention, and these all fall within the protection scope of the present invention.

Claims

1. A method for fabricating a QFN package structure, characterized in that, The preparation method includes the following steps: S1. Prepare a metal frame with an array of frame units on the front. The frame unit includes a base island and a plurality of metal pins arranged around the base island. The base island is used to mount chips, and the metal pins include functional pins and ground pins. The metal pins are used to electrically connect to the chips. In this process, the front of the metal pins is etched, the functional pins are etched as a whole, and the ground pins are etched only at the end near the base island to form a stepped structure. S2. Attach the chip to the surface of the base island and electrically connect the chip to the metal pins; The chip is electrically connected to the bottom of the stepped structure of the ground pin; A molding compound is used to mold the front side of a metal frame to form a molding portion, which covers the chip, metal leads, and electrical connections to form a package. S3. On the front of the self-encapsulated body, make a half cut at the location of the cutting channel to form a first groove above the functional pin, and retain the molding compound between the first groove and the functional pin; form a second groove on the ground pin, and cut the second groove into the middle part of the top of the ground pin; S4. An electromagnetic shielding layer is provided on the front and side of the package body. An electromagnetic shielding layer is also provided in the first and second grooves. The electromagnetic shielding layer is connected to the grounding pin to achieve electromagnetic shielding of the package body. The electromagnetic shielding layer is isolated from the functional pin and is not connected. S5. Perform a second cut on the package to form a single QFN package structure.

2. The preparation method according to claim 1, characterized in that, In step S1, the thickness of the ground pin and the functional pin is the same before etching.

3. The preparation method according to claim 1, characterized in that, In step S2, the height of the step structure is 70μm-150μm.

4. The preparation method according to claim 3, characterized in that, In step S3, the thickness of the molding compound retained between the first groove and the functional pin is 50μm-100μm.

5. The preparation method according to claim 4, characterized in that, The electromagnetic shielding layer comprises a first layer, a second layer, and a third layer from bottom to top. The first layer is a seed layer, the second layer is an electromagnetic shielding metal material layer, and the third layer is a stainless steel protective layer. The first layer increases the bonding force between the electromagnetic shielding metal material and the encapsulation part; the second layer realizes the electromagnetic shielding function of the encapsulation structure; and the third layer prevents the oxidation of the electromagnetic shielding metal material, while also giving the encapsulation structure a good appearance and good printing quality.

6. The preparation method according to claim 5, characterized in that, The first layer is a stainless steel layer, and the second layer is a copper layer with a thickness of 3-9 μm.

7. The preparation method according to claim 6, characterized in that, The electromagnetic shielding layer is prepared by magnetron sputtering.

8. The preparation method according to claim 7, characterized in that, The chip is electrically connected to the metal pins via metal bonding wires, which are also encapsulated in a plastic package.

9. The preparation method according to claim 1, characterized in that, In step S5, the first and second grooves of the package are cut.

10. A QFN package structure, manufactured using the preparation method according to any one of claims 1-9, characterized in that, The packaging structure includes a frame unit, a chip, a molding compound, and an electromagnetic shielding layer; The frame unit includes a base island and a plurality of metal pins arranged around the base island. A chip is mounted on the surface of the base island. The metal pins include functional pins and ground pins. The metal pins are electrically connected to the chip. The grounding pin has a stepped structure at its end near the base island; The chip is electrically connected to the bottom of the stepped structure of the ground pin; The encapsulation portion covers the chip, metal leads, and electrical connections; The electromagnetic shielding layer is located on the front and sides of the package structure. The electromagnetic shielding layer is connected to the ground pin to achieve electromagnetic shielding of the package. The electromagnetic shielding layer is isolated from the functional pin by the plastic encapsulation and is not connected.

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