An optimization method for memory high-speed read and write

Abstract

This invention relates to an optimization method for high-speed memory read and write operations. The method involves dividing the memory address space into multiple address units according to a preset address granularity; receiving write and read requests for each address unit; when an address unit receives a write request, if no corresponding write record to be committed exists in the local commit area, the write record to be committed is created and the write data is recorded; if the address unit has the write record to be committed and is not interrupted by the read request, the latest write data in the write record to be committed is updated for subsequent write requests, so that multiple writes to the address unit are merged into a final write result before physical commit; when the read request hits the write record to be committed, the write record to be committed outputs the read result; when the commit condition is met, the final write result corresponding to the write record to be committed is written to physical memory, and the write record to be committed is released.

Description

Technical Field

[0001] This invention relates to the field of computer storage technology, specifically an optimization method for high-speed memory read and write. Background Technology

[0002] With the continuous development of multi-core processors, high-concurrency software stacks, and tiered storage systems, read-write conflicts, commit latency, and consistency maintenance overhead in memory access paths have gradually become significant factors limiting system throughput and latency. Existing technologies typically improve local performance through cache pipeline scheduling, request retry control, or buffer hierarchy partitioning. For example, patent application CN117573573A addresses the L2 cache request processing by employing a pipelined queue to prioritize target requests and reallocating a missing status register when the pipeline fails to execute successfully, thereby reducing the resource consumption and latency of the missing status register. This type of solution focuses on request scheduling and register allocation timing control, which can alleviate resource consumption issues in some cache access paths. However, its processing object remains the cache request-level execution flow, without addressing the merging of consecutive write requests within the same address range before physical commit, nor establishing a local pending-commit record structure granular to the address level. Therefore, in scenarios where the same address unit is frequently written repeatedly, related writes may still enter subsequent commit or execution stages multiple times along the existing path, making it difficult to reduce the number of repeated physical writes from the source. Meanwhile, when read requests overlap with write results that have not yet been committed, this type of solution does not directly provide a fine-grained mechanism for responding to reads from the uncommitted write results. Therefore, under high-concurrency mixed loads, problems such as insufficient separation of read and write paths, insufficient utilization of temporary states, and excessively long consistency control links are still likely to occur.

[0003] For example, patent application CN117407148A addresses the data writing and reading process of a circular storage queue. It reduces mutual waiting, bus preemption, and throughput degradation caused by sequential commits and shared global metadata among multiple threads through global write pointers, partitioned write pointers, and FAA allocation operations. While this technology is beneficial for concurrent write control in queue-based data structures, its core lies in shared queue space allocation and pointer advancement, rather than establishing a temporary merging model for physical memory address units oriented towards the final write result. In other words, although existing solutions improve contention during multi-threaded writes to the queue, they lack a local aggregation mechanism that retains only the final write result before committing when the same address unit is overwritten multiple times. Furthermore, they fail to address how to stably return the read view without interrupting subsequent write processes when a read hits an uncommitted result. On the other hand, patent application CN119149448A addresses multi-layered buffer management in a split memory architecture, employing pointer conversion, page state synchronization, page allocation, and reclamation to improve cross-node page location and inter-layer migration efficiency. This type of technology focuses more on state management and migration optimization between page level or buffer level. Its management granularity is relatively large, and the state transition goal is mainly cross-layer resource utilization and page life cycle control. It is difficult to directly adapt to read and write cross-scenarios of a single address unit in a micro time scale. In particular, it is difficult to cover the requirements of immediate reading of uncommitted write results, new write diversion during reading, and continuous connection of versions before and after commit.

[0004] In summary, while existing technologies have made improvements in areas such as cache request scheduling, concurrent writes to circular queues, and multi-layered buffer management, they generally suffer from the following shortcomings. First, existing solutions mostly organize data flow at the queue, pipeline, or page level, lacking the technical means to divide the memory address space with a preset address granularity and maintain local write records to be committed around individual address units. This results in continuous overwriting of hot addresses often failing to be fully merged before physical commit. Second, existing solutions typically treat reading and writing as different control paths, lacking a mechanism to directly return the read result from the write record to be committed when a read request hits an uncommitted write result. Therefore, it is difficult to ensure that the latest address view is read while reducing the number of physical accesses. Third, existing solutions for maintaining temporary consistency under concurrent read and write operations mostly involve request retries, queue commits, or page state transitions. They have not yet formed a chain-like evolution structure that combines stable mirror records, subsequent write records to be committed, records in the process of commit, and generational switching. Therefore, there are still problems such as long implementation links, high state coupling, and large switching overhead in maintaining a stable view during the read process, accepting new writes during the commit process, and performing atomic state switching after the commit is completed. Summary of the Invention

[0005] The purpose of this invention is to provide an optimized method for high-speed memory read and write, thereby solving some of the drawbacks and shortcomings pointed out in the background art.

[0006] The technical solution adopted by the present invention to solve the above-mentioned technical problems is as follows: an optimization method for high-speed memory read and write, comprising: dividing the memory address space according to a preset address granularity to form multiple address units; The system receives write and read requests for the address unit. When the address unit receives a write request, if there is no corresponding write record to be committed in the local commit area, the write record to be committed is created and the write data is recorded. If the address unit has the write record to be committed and is not interrupted by the read request, the latest write data in the write record to be committed is updated for subsequent write requests, so that multiple writes of the address unit are merged into the final write result before physical commit. When the read request hits the write record to be committed, the write record to be committed outputs the read result; when the commit condition is met, the final write result corresponding to the write record to be committed is written to physical memory, and the write record to be committed is released.

[0007] Furthermore, the address unit corresponds to a write merging cycle; within the write merging cycle, read requests that cannot be responded to by the write record to be submitted are determined to be interrupted read requests; for read requests that can be responded to by the write record to be submitted, the write merging cycle is maintained, and subsequent write requests are merged into the same write record to be submitted.

[0008] Furthermore, the final write result corresponding to the write record to be submitted at the read time is solidified into a stable mirror record, and the read result is output by the stable mirror record; during the output of the stable mirror record, a subsequent write record to be submitted is established for the write request that arrives at the address unit later.

[0009] Furthermore, the record to be committed is converted into a record in commit before physical writing; when the address unit receives a new write request before the record in commit completes physical writing, it establishes a subsequent record to be committed associated with the record in commit; after the record in commit completes physical writing, the record in commit is released, and the subsequent record to be committed is switched to the current record to be committed.

[0010] Furthermore, the stable image record corresponds to a first version identifier, and the subsequent write record to be submitted corresponds to a second version identifier; during the output of the stable image record, the read request arriving at the address unit is bound to the first version identifier, and the write request arriving at the address unit is bound to the second version identifier.

[0011] Furthermore, after the stable mirror record is output, it is determined whether there is a subsequent write record to be committed; if there is, the stable mirror record is released and the subsequent write record to be committed is switched to the current write record to be committed; if there is no such record, the stable mirror record is released.

[0012] Furthermore, the subsequent write record to be committed establishes an inheritance association with the record in the commit; the subsequent write record to be committed records the range of changed data corresponding to the new write request, and the data range that is not covered maintains the inheritance association with the record in the commit.

[0013] Furthermore, when the new write request forms a full coverage, the subsequent write record to be committed is marked as a full coverage replacement record; after the physical write of the record in the commit is completed, the full coverage replacement record is switched to the current write record to be committed, and its inheritance association with the record in the commit is removed.

[0014] Furthermore, after the physical writing of the submitted record is completed, an atomic state switch is performed on the submitted record and the subsequent pending write record; before the atomic state switch is completed, subsequent write requests are only written to the subsequent pending write record.

[0015] Furthermore, the atomic state switching includes setting a switching generation identifier and marking the subsequent write record to be committed as the current generation record; before the atomic state switching is completed, subsequent write requests only write to the current generation record and do not write back to the commit record.

[0016] The beneficial effects of this invention are as follows: This invention divides the memory address space according to a preset address granularity and sets a local pending area in each address unit, so that multiple write requests for the same address unit can be merged into the final write result before physical commit, thereby reducing the number of repeated physical writes, reducing memory bus occupancy and write amplification, and improving write throughput in hot address scenarios.

[0017] This invention further utilizes a mechanism of read-on-demand write record hit, stable mirror record, subsequent write-on-demand record, commit record, and atomic state switching to enable read requests to prioritize obtaining a consistent latest address view, while ensuring that new writes during the commit period do not block subsequent evolution. This balances read consistency, write continuity, and state switching reliability, making it suitable for high-concurrency, low-latency memory read and write scenarios. Attached Figure Description

[0018] Figure 1 This is a functional relationship diagram of the memory high-speed read / write optimization method of the present invention.

[0019] Figure 2This is a timing diagram of the dot-line read / write coordination of address unit A17 in the edge AI vision terminal in Embodiment 1 of the present invention.

[0020] Figure 3 This is a schematic diagram of the trend of comprehensive income during the merging period and the engineering value in Embodiment 1 of the present invention.

[0021] Figure 4 This is a comparison chart of the average access latency for different read paths in Embodiment 1 of the present invention.

[0022] Figure 5 This is a state ladder diagram showing the state evolution recorded by address unit B09 in Embodiment 2 of the present invention.

[0023] Figure 6 This is a bar chart comparing the replication overhead under different schemes in Embodiment 2 of the present invention.

[0024] Figure 7 This is a radar image showing the recording and processing features under different states in Embodiment 2 of the present invention. Detailed Implementation

[0025] The specific embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0026] Combined with appendix Figure 1 This invention discloses an optimization method for high-speed memory read and write operations, applied to the memory access control process of a computer system. First, the memory address space in the system is preprocessed. Based on a preset address granularity, consecutive memory addresses are divided into multiple independent address units. Each address unit corresponds to a fixed range of memory addresses used to manage subsequent read and write operations. The address granularity is set according to system performance requirements, and can be determined based on the cache line size or a predetermined data block size, thereby reducing management overhead while ensuring management accuracy.

[0027] After address unit partitioning is completed, the system establishes a mapping relationship between address units and physical memory addresses, ensuring that each address unit uniquely corresponds to the memory region it manages. This transforms the originally contiguous and uniformly managed memory space into multiple independently schedulable and controllable logical units, providing a foundation for subsequent read / write optimization. Each address unit, as the smallest management unit, can receive read / write requests for addresses within its range and supports independent control over access behavior.

[0028] Furthermore, by discretizing the memory address space, multiple read and write requests can be processed in parallel across different address units, avoiding performance bottlenecks caused by global locks or overall control. Simultaneously, this partitioning method provides the infrastructure support for subsequent write merging, read hit detection, and data consistency control within a single address unit, thereby improving overall memory access efficiency and reducing the probability of conflicts.

[0029] After completing the address unit partitioning and mapping relationship establishment, the system enters the read / write request processing stage. Each address unit receives write and read requests for its corresponding address range and performs classification, processing, and scheduling control on the requests. For write requests, the system sets up a local pending area within each address unit to temporarily store data that has not yet been written to physical memory, and manages related write operations uniformly through pending write records.

[0030] When a write request is received by an address unit, the system first checks in the corresponding local pending area whether a pending write record associated with that address unit already exists. If no such record exists, a new pending write record is created, and the data in the current write request is written into that record. This temporarily stores the write operation in the local pending area without immediately performing a physical write operation.

[0031] When a write record awaiting commit already exists at the given address, the system further determines whether the record has been interrupted by a read request within the current period. If not, subsequent write requests are directly applied to the write record awaiting commit, updating the data by overwriting or merging the existing data with the latest written data. This method prevents multiple write requests to the same address within a certain time frame from being written sequentially to physical memory. Instead, they are merged within a local commit area, retaining only the final write result. This reduces the number of physical writes and memory access overhead, while simultaneously improving overall write efficiency.

[0032] After merging write requests, each address unit continues to control the response to read requests. When an address unit receives a read request, the system first searches the corresponding local commit area for a pending write record and determines whether the address range accessed by the read request is covered by that pending write record. If the read request matches a pending write record, the data is preferentially provided by that pending write record without accessing physical memory, thus ensuring that the read result is consistent with the latest write state and avoiding data inconsistency caused by uncommitted data.

[0033] Furthermore, during system operation, commit conditions are set for each address unit to trigger the write operation of the record to be committed to physical memory. The commit conditions can be determined based on time thresholds, write count thresholds, or system load status. When the commit conditions are met, the system writes the merged final write result from the record to be committed to the corresponding physical memory address area in one go, replacing the original data content.

[0034] After completing the physical write operation, the system releases the storage resources occupied by the record to be committed and updates the status of the address unit, enabling it to enter a new write cycle. This combines read-first-hit-the-latest-uncommitted-data with centralized write-commit, thereby reducing physical memory access frequency and improving overall read / write performance while ensuring data consistency.

[0035] Each address unit is further configured with a write merging period to limit the effective merging time range of the write records to be committed. The write merging period is set by the system based on access frequency, latency requirements, or load status. Within this period, write requests are prioritized for merging processing, while physical writes are delayed. At the start of the merging period, the address unit creates or inherits the current write record to be committed and continuously receives write and read requests throughout the period.

[0036] During a write merging cycle, when an address unit receives a read request, the system determines whether the read request can be directly provided by the currently pending write record. If the data range accessed by the read request is not covered by the pending write record, or if the read result cannot be determined by that record, the read request is considered an interrupted read request, and the system triggers adjustments to the current merging state to prevent continued accumulation of writes from causing inconsistent read results.

[0037] Conversely, if a read request can hit the record to be committed and directly output the read result, it is considered that the read request has not interfered with the merging process. The system maintains the current write merging cycle and continues to receive subsequent write requests. For subsequent write requests, they are all merged into the same record to be committed, and the data content in the record is updated to form a unified final write result, thereby continuously compressing the number of writes and maintaining data consistency within the merging cycle.

[0038] During a write merging cycle, when an address unit receives a read request and hits the currently pending write record, to ensure data consistency and stability during the read process, the system solidifies the final write result corresponding to the pending write record at the current read moment, generating a stable mirror record. The stable mirror record is a complete copy of the data state at that moment, used to provide consistent read results to read requests during the read process, thereby avoiding data changes caused by subsequent write updates during the read process.

[0039] After a stable mirror record is established, all read requests hitting that address unit will have their data output by the stable mirror record until the read process is complete. During this period, the original write record to be committed will no longer directly provide read results, but will maintain its internal state to support subsequent write processing.

[0040] Furthermore, during the output of stable mirror records, when an address unit receives a new write request, the system no longer merges the write request into the original write record to be committed. Instead, it creates a successor write record to be committed for that address unit to carry the new write data. The successor write record to be committed and the stable mirror record are separated in time, allowing read operations to be based on stable data, while write operations continue to accumulate independently, thereby achieving read-write isolation and improving the system's concurrent processing capabilities.

[0041] Based on the formation of stable mirror records and subsequent write records to be committed, the system introduces a version identification mechanism for data states at different stages to distinguish between read paths and write paths. Stable mirror records correspond to the first version identifier, indicating that the record carries the data state fixed at the time of reading, while subsequent write records to be committed correspond to the second version identifier, indicating the updated state formed by new write requests arriving during the read process.

[0042] During the output of the stable mirror record, the address unit performs version binding on arriving read requests, uniformly binding each read request to the first version identifier, and the stable mirror record provides the read results, thus ensuring that read requests in the same batch obtain a consistent data view. Simultaneously, arriving write requests are independently bound, uniformly binding each write request to the second version identifier, and written to the subsequent pending write record to avoid affecting the current read process. Through this version isolation mechanism, read and write operations can be executed in parallel within the same address unit without interference.

[0043] After the stable mirror record is output, the system checks the record status of the address unit to determine if there is a subsequent write record to be committed. If so, the resources occupied by the stable mirror record are released, and the subsequent write record to be committed is switched to the current write record to be committed, allowing it to continue participating in the subsequent write merging and read response process. If there is no subsequent write record to be committed, the stable mirror record is released directly, and the address unit enters a new merging cycle or an idle state, thus completing a full read-write isolation and state switching process.

[0044] After the write merging is completed and the commit conditions are met, the address unit converts the currently pending write record into a committing record, which is used to perform write operations to physical memory. The committing record carries the final write result that has been merged and enters a state that can no longer be updated after the conversion to ensure data consistency during the physical write process. The system initiates a physical write process for the committing record and keeps its state stable until the write is complete.

[0045] During the physical write operation of a commit record, the address unit can still receive new write requests. To avoid interfering with the data being committed, the system no longer merges new write requests into the commit record. Instead, it creates a subsequent write record to be committed in that address unit, associated with the commit record, to carry the new write data. This association characterizes how the subsequent write record to be committed logically continues the data state corresponding to the commit record, thus maintaining the continuity of data evolution.

[0046] After a record in a commit has completed its physical write operation, the system releases the resources occupied by that record and terminates its lifecycle. Simultaneously, subsequent records awaiting commit are switched to the current record, making it the new merge subject to continue receiving subsequent write requests and participating in read response processing.

[0047] During the physical write operation of the commit record, to ensure data continuity and write efficiency, an inheritance relationship is established between subsequent write records to be committed and the commit record. Subsequent write records to be committed only record the range of changed data corresponding to the newly arrived write request. For data ranges not covered by the new write, the association reference to the corresponding data in the commit record is maintained, thus forming an incremental record structure based on the differing data. In this way, subsequent write records to be committed do not need to repeatedly store the complete data content to represent the current data state, reducing storage overhead and improving processing efficiency.

[0048] As subsequent write requests arrive, the system continuously updates the range of changed data in the subsequent write records to be committed, and dynamically maintains the association between them and the records in the commit phase based on the coverage. When a new write request fully covers the data range corresponding to the address unit, the system marks the subsequent write record to be committed as a full-coverage replacement record. At this point, the record independently contains the complete data state and no longer depends on the data content in the records in the commit phase.

[0049] After a record in the commit process has been physically written, the system performs a status update on the relevant record. If a subsequent record to be committed is marked as a full overwrite replacement record, it is directly switched to the current record to be committed, and its inheritance relationship with the record in the commit process is removed, allowing it to participate in subsequent processing as a new independent data subject.

[0050] Furthermore, after the physical write operation of the commit record is completed, the system performs an atomic state transition operation on the commit record and the subsequent write records to be committed, in order to ensure the consistency of the state transition process. Before the atomic state transition is completed, the system performs constraint processing on subsequent write requests, so that they only write to the subsequent write records to be committed, thereby avoiding interference with records that have been committed or are about to be committed, and ensuring the singleness and stability of the data update path.

[0051] During the atomic state transition process, the system introduces a generation identification mechanism to achieve precise management of record states. Specifically, after a record is physically written during the commit process, the system sets a new switching generation identifier for the current address unit to indicate that data processing has entered a new stage. Simultaneously, subsequent records to be committed are marked as records of the current generation, making them the sole write merging subject for that address unit in the new generation.

[0052] During atomic state transitions, the system strictly constrains write paths. Before the atomic state transition is complete, all subsequent write requests are uniformly directed to the current generation record, i.e., the subsequent pending write record, and write requests are prohibited from writing back to committed records that have already been physically written. This ensures that the write path remains single and explicit during state transitions, thereby avoiding inconsistencies caused by data splitting or duplicate writes.

[0053] Once the atomic state transition is complete, the current generation record fully takes over the responsibility of updating data in the address unit, and the original commit record exits the data processing flow while maintaining its committed state. By introducing generation identifiers and limiting the write path, atomicity and consistency are achieved during the state transition process, further improving the data reliability and processing efficiency of the system in high-concurrency read / write scenarios.

[0054] Example 1: This embodiment applies to the optimization of high-speed memory read / write in industrial vision terminals, suitable for continuous image acquisition scenarios using industrial cameras in PCB appearance inspection production lines. The industrial camera sends a high-frequency image stream to the NPU for feature extraction. The NPU continuously writes intermediate feature values ​​to the on-chip feature cache. The CPU periodically reads feature values ​​from the target address unit to perform defect post-processing judgment. Since the same target area is updated multiple times during a single frame inference process, if each write immediately falls into physical memory, it will generate high write-back pressure and lengthen the path for the CPU to read the latest feature value.

[0055] In this embodiment, the visual terminal is deployed at the AOI inspection station for solder joints on the mobile phone motherboard. As the board passes through the camera's field of view, it continuously generates local solder pad image blocks. The NPU outputs brightness features, edge intensity features, texture compensation features, and fusion judgment features sequentially for the same solder pad area. The system divides the feature cache area into multiple address units with an address granularity of G=64 bytes, selecting address unit A17 as the subject of this description. A17 corresponds to a fusion feature storage slot for a solder joint candidate area. The local pending-commit area maintains the current pending-commit write record, the stable mirror record, and the subsequent pending-commit write record for this address unit. The current pending-commit write record stores the latest write result that has not yet been physically committed. The stable mirror record outputs a stable value within the reading window. The subsequent pending-commit write record is used to receive new writes arriving during the mirror output period.

[0056] The A17 receives four consecutive writes within a write merge cycle, with the requested data being as follows: , , , The numerical value can be understood as the normalized defect risk characteristic score, with a range of values ​​ranging from [value missing]. A higher score indicates a higher likelihood of a cold solder joint or bridging. The system sets a write merging cycle for A17. During this cycle, if the CPU read hits the currently pending write record and that record already contains the latest value of the requested byte range, the read returns directly from the pending write record without interrupting the merge cycle; if the read requires a stable output window, the currently pending write record is fixed as a stable mirror record and assigned a first version identifier. At the same time, subsequent writes will be bound to the second version identifier. The subsequent pending write records will continue to receive updates.

[0057] In one image processing batch of this embodiment, A17 first receives the first write operation. The NPU writes the brightness feature value 128 to the local write-to-commit area and establishes the current write-to-commit record. Subsequently, the second write operation arrives, updating the edge intensity feature to 132. The system detects that this address unit is still within the merging cycle and has not been interrupted by an unresponsive read. Therefore, it only updates the latest value in the current write-to-commit record and does not perform a physical write-back. Next, the CPU initiates the first read operation, which hits the current write-to-commit record. The system directly outputs the value 132 from this record, and the CPU uses this to perform a fast threshold pre-screening. Because this read operation can be fully responded to by the current write-to-commit record, the merging cycle remains unchanged.

[0058] In the subsequent processing stage, the NPU continues to write a third update to the same solder joint. After texture compensation, the feature value changes to 135, and the system still merges this value into the current write record to be submitted. Subsequently, the CPU initiates a second read. At this time, the CPU no longer only performs pre-screening, but also sends the data of this address unit as a stable input for this round of judgment to the post-processing module. To prevent it from being rewritten by subsequent writes during the read, this embodiment, when the read is triggered, solidifies the final write result 135 corresponding to the current write record to be submitted as a stable image record, and identifies this stable image record as the version. The CPU binds to the version within this round of read window. The value 135 is read from the stable mirror record to ensure that the data read in this judgment process is consistent.

[0059] During the stable image record output, the NPU completes another fusion update, and the fourth write increases the latest feature value of A17 to 140. Since the stable image record is still being output to the CPU, this embodiment does not... Instead of continuing to rewrite, a new subsequent write record to be committed is created, and this write is bound to the version. In this way, read requests continuously access stable mirror records, while write requests continue to flow into subsequent pending write records, isolating read and write paths at the version level. Once the CPU completes its current stable output, the system detects the existence of a new version. The corresponding subsequent write record to be committed is then released as a stable image record, and the subsequent write record to be committed is switched to the current write record to be committed. Then, when the commit conditions are met, the final value 140 carried by it is written to the physical memory in one go, completing this round of physical commit for this address unit. Figure 2 The dotted-line read-write co-sequence diagram illustrates the correspondence between NPU write events, A17 internal state changes, and CPU read events. The first read directly hits the pending write record and returns 132, while the second read triggers a stable image and binds the version. The fourth write will enter the bound version. The subsequent pending write records, after which a one-time physical write-back of 140 is performed after the switch. Figure 2 As can be seen, there were 4 logical writes and only 1 physical write-back in this round, indicating that the address unit has achieved a significant write merging effect in a single round of feature fusion.

[0060] To quantify the write merging effect in this embodiment, the write merging benefit function is defined as follows: ; in, This indicates the written merged yield. This represents the total number of write requests that arrive within the merge cycle. This indicates the final number of physical writes that actually occurred. In this embodiment, there are four writes within one merging cycle, namely: ; Ultimately, a physical write-back is performed only once after the merge is complete; ; Substituting, we get: ; This indicates that, on the A17 real business address unit, the number of physical write-backs is reduced by 75% compared to the sequential write-through scheme. If the comparison scheme performs immediate physical write-backs for all four writes, then four physical memory accesses will occur within the same batch; while this embodiment only retains the final physical write-back, which can significantly reduce cache bus occupancy and storage array flip-throughs.

[0061] To analyze the selection of projects during the merging cycle, the comprehensive benefit function is defined as follows: ; in, Indicates overall income. Indicates the write merge cycle. This indicates the weight to be written into the merged profit. Indicates the read wait cost weight. This represents the write arrival rate per unit time. This represents the read arrival rate per unit time. Its first derivative is: ; Take the parameters of this embodiment ; make ; Then there is ; Organized ; Further obtain ; Taking the natural logarithm of both sides yields the result; ; therefore ; It can be seen that the theoretical approximate optimal merging period is... Approximately This embodiment actually uses The reason for this is that industrial vision terminals have the need for batch processing burst writes, bus arbitration jitter, and stable read values ​​for the CPU post-processing window. Appropriately lengthening the merging cycle helps improve the probability of merging multiple writes and provides more scheduling margin for the establishment of stable image records. Therefore, this value is an engineering trade-off for real business loads. This relationship is in Figure 3 This is more intuitively reflected in the text. Figure 3 The overall benefit trend and engineering value are illustrated in the diagram, showing that theoretical calculations show that approximately A better balance was achieved in the vicinity, and the final implementation was selected. The reason is not to deviate from the optimization goal, but to adapt to the business characteristics of NPU burst write and CPU stability judgment window coexisting in AOI scenario, so that the merging probability and read stability can be taken into account at the same time.

[0062] Taking a feature fusion process for the same solder joint candidate region as an example, in the comparison scheme, all four writes immediately enter physical memory, resulting in four physical write-backs, and the CPU needs to traverse the physical memory path to obtain the results for both reads. In this embodiment, the first read directly hits the currently pending write record, and the second read hits the stable image record, so the four writes ultimately only result in one physical write-back. If the average latency of the on-chip pending area read path is... The average latency of the stable mirror output path is The average latency for physical memory access is The first reading of the comparable comparison scheme shortens the time. The second reading can shorten the comparison scheme. At the same time, because Specialized service reading It is specifically designed to handle subsequent writes. During the stable output phase, the CPU will not read the unfinished value being updated, and the NPU will not pause writing while waiting for the read to finish. This makes version isolation clearer and data consistency under concurrent read and write operations easier to guarantee.

[0063] Furthermore, from the perspective of address unit throughput, the comparative scheme experiences a total of six access pressures on the physical memory when four writes and two reads are interleaved, including four writes and two reads. In this embodiment, the physical memory only experiences one final write-back, and both reads are handled in the local pending commit area or stable mirror layer. This not only reduces the physical layer access density but also significantly improves the effective processing capability of the A17 in the same service batch. Without sacrificing read correctness, this embodiment, through merging multiple writes, stable mirror output, and read / write version splitting, makes the same address unit more suitable for carrying high-frequency visual feature update tasks, especially suitable for intermediate feature caching scenarios in industrial vision terminals that are sensitive to both timeliness and consistency. Figure 4Furthermore, the average access latency comparison results for different read paths are given, where the average physical memory access latency is... The average latency when the first read hits the record to be committed for writing is [missing information]. Shorter than the physical memory path The average latency when the second read hit a stable mirror record was [missing information]. Shorter than the physical memory path This demonstrates that the CPU can achieve lower latency and more stable data input without increasing the physical layer access pressure.

[0064] Example 2: This embodiment applies to page fragment writing in a high-concurrency database log buffer. When processing payment transactions, inventory deductions, and order status updates, multiple transaction threads continuously write incremental logs to the address unit corresponding to the same log page in an online transaction system. Meanwhile, the background disk flushing thread commits the log image formed in the previous round to physical memory or persistent storage. To avoid blocking subsequent transaction writes during the commit process and to reduce bandwidth waste caused by repeatedly copying entire pages of data, this embodiment introduces a committing record, a subsequent pending commit write record, inheritance association, and an atomic generation switching mechanism at the address unit level.

[0065] In this embodiment, the log buffer is divided into address units according to an address granularity of G=128 bytes, and address unit B09 is selected as the subject of this description. B09 corresponds to a log page fragment of a certain hot account, and the record coverage range in the commit is... Byte. At the start of this processing round, B09 already contains a currently pending write record. After the background flushing thread starts, this currently pending write record is converted into a committing record so that its contents can be written to physical memory. The duration of this commit process is... During this period, the original record no longer accepts new transaction writes, but still serves as the source of inheritance for subsequent records.

[0066] After the commit record is established, new transaction updates continue to B09. The first new write only modifies the range in the log page. The write length is 32 bytes. The system detects that the corresponding address is in a committed state, so instead of writing back the committed record, it creates a subsequent write record to be committed, associated with the committed record. This subsequent write record only saves the changed content within the new range, maintaining the inherited association with the committed record for the remaining byte range that has not been overwritten. At this point, the subsequent write record to be committed is actually represented as a combination of a set of local change fragments and a set of inheritance mappings. Therefore, the transaction thread does not need to copy the complete 128-byte page fragment to form a new logically visible version.

[0067] Subsequently, the second new write reached B09, affecting the interval. The update is performed using bytes, with a write length of 32 bytes. The system then continues to write this range into the existing subsequent records awaiting commit, ensuring that each subsequent record holds two independent change intervals. and Byte. For Byte and For the portions of the Bytes not covered by new transactions, subsequent pending write records retain their inheritance relationship with records in the commit. Through this mechanism, the log buffer can continuously absorb new transaction writes even before the commit is complete, without waiting for old records to be physically written to disk before reallocating entire pages of buffer, thus ensuring the continuity of the high-concurrency write chain.

[0068] Subsequently, the third new write to the coverage area The system determines that the subsequent record to be committed forms a full-range overwrite of address unit B09. Since the full-range replacement record already contains all the bytes of B09, it no longer needs to inherit any uncovered portions from the committed record. Therefore, the system removes the inheritance association between it and the committed record. The direct effect of this is that the subsequent record transforms from a partial patch plus inheritance mapping structure into a complete new page mirror, reducing the additional access overhead caused by subsequent resolution of the inheritance chain and avoiding the maintenance of meaningless associations when all the new data is already available.

[0069] Once the physical write of a record in the commit phase is complete, the system performs an atomic state switch between the record in the commit phase and the subsequent record to be committed. This switch is accomplished by setting a generation identifier, with the generation identifier before the switch being [value missing]. The new generation identifier is At the start of the switchover, the system first marks subsequent write records to be committed as records of the current generation, and then points the new write routing rules to them. The corresponding record set. Within the entire atomic state transition window, subsequent writes are only allowed to write to the current generation record, and are not allowed to write back to records in commits that have been completed or are about to be released. Because the transition window duration is only... Therefore, this process can complete the record ownership update within a very short interval and ensure that any newly arrived write belongs to only a single generation, fundamentally avoiding the ambiguity of some writes falling into old records and others falling into new records. Figure 5 The hierarchical relationship of records within B09 is illustrated using a state ladder diagram, from the current record to the record under commit, the record to the subsequent record to be written, the record to be overwritten, and finally back to the current generation record. Figure 5It is evident that this scheme does not interrupt the entry of new writes during the submission of old records, but achieves a continuous transition of record ownership through unidirectional state evolution and generational switching.

[0070] To measure the data copying overhead under the inheritance association mechanism, the equivalent copying overhead function is defined as follows: ; in, This represents the equivalent copying overhead when using the inheritance association mechanism, where S represents the total number of bytes in the address unit. This indicates the percentage of address units covered by newly written data, and 'm' represents the equivalent overhead of metadata maintenance while maintaining inherited associations, calculated in bytes. The full copy overhead of the comparison scheme is... When only the interval is covered When the byte is 128, then S=128. m=8. Substituting this, we get: ; ; Byte; In the comparison scheme Byte; therefore, in partial coverage scenarios, the equivalent copy overhead after using inheritance association is reduced from 128 bytes to 38 bytes, a reduction of . 100% = 70.3125%; This indicates that only recording the scope of changes and inheriting the uncovered parts can significantly reduce the amount of page fragment copying. Figure 6 The differences in replication overhead under different schemes are shown in a bar chart, with the lowest replication overhead being 38 bytes and the highest being 128 bytes, representing a maximum reduction of 70.3125%. Combined with the changes in bar height, it can be seen that before achieving full page coverage, the inheritance association scheme is significantly superior to the full replication scheme.

[0071] When the third new write to the coverage area When using bytes, the coverage ratio is Let's still take S=128 and m=8. Substituting into the above formula, we get: ; Byte; At this time there is Byte; It is evident that under full coverage, inheritance associations no longer bring copy savings, and continuing to maintain the inheritance relationship only increases the cost of record interpretation and state maintenance. Therefore, when a subsequent pending write record forms a full coverage, marking it as a full coverage replacement record and removing the inheritance association is consistent with both the cost calculation results and the need to reduce structural complexity in engineering implementation. Figure 6The results from the last two sets of columns indicate that when the record has reached the condition for complete replacement, the costs of the two types of schemes tend to be consistent, and continuing to maintain the inheritance relationship no longer has any additional benefits.

[0072] To assess the risk of new write collisions occurring within the atomic state transition window, an approximation function is defined: ; in, Indicates switching windows The probability of reaching at least one new write operation within a given timeframe. This represents the write arrival rate per unit time. This represents the atomic state switching window. In this embodiment, we take... , Substituting the values, we can obtain the result; ; ; Depend on ,get; ; The probability of at least one new write occurring within the switching window is approximately 16.47%. While this probability is not zero, because this embodiment stipulates that subsequent writes before the switch is complete only write to the current generation record and do not write back to records in the commit phase, even if a new write happens to arrive at the switching window, it will only be uniquely attributed to that generation. The corresponding records will not fall into the old generation. The submission records effectively eliminate ambiguity regarding record ownership. Figure 7 The three states are comprehensively compared using radar charts across five dimensions: coverage ratio, replication overhead ratio, inheritance dependency strength, switching necessity, and record attribution clarity. Figure 7 It is evident that the former type of state has strong inheritance dependencies but low copying overhead, making it more suitable to continue using the successor pending commit write record plus inheritance association; while the latter type of state, although the copying overhead returns to the level of full copying, has significantly reduced inheritance dependencies and significantly increased the necessity of switching, making it more suitable to directly switch to full overwrite replacement record and perform atomic generational switching.

[0073] Compared to schemes that lack successor records and inheritance relationships, and where each new write copies a complete page fragment and waits for the old record to be committed, this embodiment allows the direct creation of successor write records to be committed during the commit process, eliminating the need for new transactions to block. For partial overwrite writes, only the changed range is recorded and the uncovered portion is inherited, reducing the equivalent copy overhead from 128 bytes to 38 bytes. For full overwrite writes, a full overwrite replacement record can be directly formed, and invalid inheritance relationships are removed. After atomic state switching is performed in conjunction with the generation identifier, new writes within the switching window still have a clear attribution, thereby improving the write continuity, state clarity, and single-address unit processing throughput of the log buffer under high-concurrency transaction flows.

Claims

1. An optimization method for high-speed memory read / write, characterized in that, include: The memory address space is divided according to a preset address granularity to form multiple address units; Receive write and read requests for the address unit; When the address unit receives a write request, if there is no corresponding write record to be submitted in the local write area, then the write record to be submitted is created and the write data is recorded. If the address unit has a write record to be committed and is not interrupted by the read request, then the latest write data in the write record to be committed is updated for subsequent write requests, so that multiple writes of the address unit are merged into the final write result before physical commit. When the read request hits the write record to be committed, the write record to be committed outputs the read result; When the submission conditions are met, the final write result corresponding to the write record to be submitted is written to physical memory, and the write record to be submitted is released.

2. The optimization method for high-speed memory read / write according to claim 1, characterized in that, The address unit corresponds to the write merging cycle; within the write merging cycle, the read request that cannot be responded to by the write record to be submitted is determined to be an interrupted read request; For read requests that can be responded to by the write record to be committed, maintain the write merging period and merge subsequent write requests into the same write record to be committed.

3. The optimization method for high-speed memory read / write according to claim 1, characterized in that, The final write result corresponding to the write record to be submitted at the read time is solidified into a stable mirror record, and the read result is output by the stable mirror record; During the stable mirror record output, a subsequent write record to be submitted is established for write requests that subsequently arrive at the address unit.

4. The optimization method for high-speed memory read / write according to claim 1, characterized in that, The record to be committed is converted into a record to be committed before physical writing; when the address unit receives a new write request before the record to be committed is physically written, it establishes a subsequent record to be committed associated with the record to be committed; after the record to be committed is physically written, the record to be committed is released and the subsequent record to be committed is switched to the current record to be committed.

5. The optimization method for high-speed memory read / write according to claim 3, characterized in that, The stable image record corresponds to a first version identifier, and the subsequent write record to be submitted corresponds to a second version identifier; during the output of the stable image record, the read request arriving at the address unit is bound to the first version identifier, and the write request arriving at the address unit is bound to the second version identifier.

6. The method for optimizing high-speed memory read / write according to claim 3, characterized in that, After the stable mirror record is output, it is determined whether there is a subsequent write record to be committed; if there is, the stable mirror record is released and the subsequent write record to be committed is switched to the current write record to be committed. If it does not exist, release the stable image record.

7. The method for optimizing high-speed memory read / write according to claim 4, characterized in that, The subsequent write record to be committed establishes an inheritance association with the record in the commit; the subsequent write record to be committed records the range of changed data corresponding to the new write request, and the data range that is not covered maintains the inheritance association with the record in the commit.

8. The method for optimizing high-speed memory read / write according to claim 7, characterized in that, When the new write request forms a full coverage, the subsequent write record to be committed is marked as a full coverage replacement record; after the physical write of the record in the commit is completed, the full coverage replacement record is switched to the current write record to be committed, and its inheritance association with the record in the commit is removed.

9. The optimization method for high-speed memory read / write according to claim 4, characterized in that, After the physical write of the submitted record is completed, an atomic state switch is performed on the submitted record and the subsequent pending write record; before the atomic state switch is completed, subsequent write requests are only written to the subsequent pending write record.

10. The method for optimizing high-speed memory read / write according to claim 9, characterized in that, The atomic state switching includes setting a switching generation identifier and marking the subsequent write record to be committed as the current generation record; before the atomic state switching is completed, subsequent write requests only write to the current generation record and do not write back to the commit record.

Images