Current-driven charge pump circuit and charge pump phase-locked loop

Abstract

This application relates to the field of electronic circuit technology, providing a current-steering charge pump circuit and a charge pump phase-locked loop. The current-steering charge pump circuit includes: a reference current mirror connected to the analog circuit's positive power supply, current source, first switch, and the non-inverting input of the first rail-to-rail operational amplifier; a discharge current mirror connected to the first switch, the output of the first rail-to-rail operational amplifier, a second switch, a fifth switch, a seventh switch, and analog ground; a charging current mirror connected to the analog circuit's positive power supply, a third switch, a fourth switch, a sixth switch, and the output of the second rail-to-rail operational amplifier; a third switch connected to the second switch and the non-inverting input of the second rail-to-rail operational amplifier; and a fourth switch connected to the fifth switch and the output of the third rail-to-rail operational amplifier. This circuit can increase the output voltage swing while ensuring that the charging and discharging currents are equal.

Description

Technical Field

[0001] This application relates to the field of electronic circuit technology, and in particular to current-driven charge pump circuits and charge pump phase-locked loops. Background Technology

[0002] The Current-Steering Charge Pump (CSCP) is the core module of the charge pump phase-locked loop (CPPLL). The core function of the CSCP is to convert the digital phase or frequency error pulses output by the phase-frequency detector (PFD) into precise and controllable current pulses. By charging and discharging the loop filter (LPF), a stable analog control voltage is generated, which realizes closed-loop frequency regulation of the voltage-controlled oscillator (VCO), ultimately achieving phase locking and suppressing spurious and phase noise.

[0003] The key to current-rudder charge pumps lies in "current rudder" control: through differential switches and current source arrays, precise matching and rapid switching of charging and discharging currents are achieved, reducing switch on-resistance and charge injection noise. As process technology levels decrease further, power supply voltages will also decrease. The design bottlenecks of current-rudder charge pumps will then focus on insufficient voltage margin and deteriorated current matching. This is because the core requirement of charge pump design is to maximize the output voltage swing (output voltage at the current-rudder charge pump output terminal) while ensuring that the charging and discharging currents are equal. The voltage swing limitation at the current-rudder charge pump output terminal directly restricts the locking accuracy, dynamic response, and overall phase noise of the PLL loop.

[0004] Therefore, while ensuring that the charging current and discharging current are equal, how to increase the output voltage swing has become an urgent problem to be solved. Summary of the Invention

[0005] This application provides a current-driven charge pump circuit and a charge pump phase-locked loop, which can increase the output voltage swing while ensuring that the charging current and discharging current are equal.

[0006] To achieve the above objectives, this application adopts the following technical solution: In a first aspect, a current-rudder charge pump circuit is provided, comprising: a current source, an analog circuit positive power supply, an analog ground, a reference current mirror, a discharge current mirror, a charging current mirror, a first switch, a second switch, a third switch, a fourth switch, a fifth switch, a sixth switch, a seventh switch, a first rail-to-rail operational amplifier, a second rail-to-rail operational amplifier, a third rail-to-rail operational amplifier, a charging control signal input terminal, a charging complementary control signal input terminal, a discharging control signal input terminal, a discharging complementary control signal input terminal, and a current-rudder charge pump output terminal; the fourth, fifth, sixth, and seventh switches are complementary switches; the first terminal of the reference current mirror is connected to the analog circuit positive power supply. The second end of the reference current mirror is connected to one end of the current source, and the other end of the current source is connected to analog ground. The third end of the reference current mirror is connected to the first end of the first switch and the non-inverting input of the first rail-to-rail operational amplifier. The first end of the discharge current mirror is connected to the second end of the first switch, and the second end of the discharge current mirror is connected to the output of the first rail-to-rail operational amplifier. The third end of the discharge current mirror is connected to the second end of the second switch. The fourth end of the discharge current mirror is connected to the second ends of the fifth switch and the seventh switch, respectively. The fifth end of the discharge current mirror is connected to analog ground. The first end of the charging current mirror is connected to the analog ground. The circuit is connected to the positive power supply. The second terminal of the charging current mirror is connected to the first terminal of the third switch. The third terminal of the charging current mirror is connected to the first terminals of the fourth and sixth switches. The fourth terminal of the charging current mirror is connected to the output terminal of the second rail-to-rail operational amplifier. The second terminal of the third switch is connected to the first terminal of the second switch and the non-inverting input terminal of the second rail-to-rail operational amplifier. The second terminal of the fourth switch is connected to the first terminal of the fifth switch and the output terminal of the third rail-to-rail operational amplifier. The third terminal of the fourth switch is connected to the charging control signal input terminal. The fourth terminal of the fourth switch is connected to the charging complementary control signal input terminal. The fifth switch is connected to the discharge control signal input terminal, and the fifth switch is connected to the discharge complementary control signal input terminal. The second terminal of the sixth switch is connected to the first terminal of the seventh switch, the non-inverting input terminal of the third rail-to-rail operational amplifier, and the output terminal of the current-rudder charge pump. The third terminal of the sixth switch is connected to the charging control signal input terminal, and the fourth terminal of the sixth switch is connected to the charging complementary control signal input terminal. The third terminal of the seventh switch is connected to the discharge control signal input terminal, and the fourth terminal of the seventh switch is connected to the discharge complementary control signal input terminal. The inverting input terminal of the third rail-to-rail operational amplifier is connected to the output terminal of the third rail-to-rail operational amplifier.

[0007] In conjunction with the first aspect, in some embodiments of the first aspect, the reference current mirror includes: a first field-effect transistor (FET) and a second field-effect transistor (FET); the source of the first FET and the source of the second FET are first terminals of the reference current mirror; the drain of the first FET is a second terminal of the reference current mirror; the drain of the second FET is a third terminal of the reference current mirror; the drain of the first FET is connected to the gate of the first FET; and the gate of the second FET is connected to the gate of the first FET.

[0008] In conjunction with the first aspect, in some embodiments of the first aspect, the charging current mirror includes: a third field-effect transistor and a fourth field-effect transistor; the source of the third field-effect transistor and the source of the fourth field-effect transistor are the first terminals of the charging current mirror; the drain of the third field-effect transistor is the second terminal of the charging current mirror; the drain of the fourth field-effect transistor is the third terminal of the charging current mirror; and the gate of the fourth field-effect transistor and the gate of the third field-effect transistor are the third terminals of the charging current mirror.

[0009] In conjunction with the first aspect, in some embodiments of the first aspect, the discharge current mirror includes: a fifth field-effect transistor, a sixth field-effect transistor, and a seventh field-effect transistor; the drain of the fifth field-effect transistor is the first terminal of the discharge current mirror; the gates of the fifth and sixth field-effect transistors are the second terminal of the discharge current mirror; the drain of the sixth field-effect transistor is the third terminal of the discharge current mirror; the drain of the seventh field-effect transistor is the fourth terminal of the discharge current mirror; and the sources of the fifth, sixth, and seventh field-effect transistors are the fifth terminal of the reference current mirror.

[0010] In conjunction with the first aspect, in some embodiments of the first aspect, the target switch is any one of the first switch, the second switch, and the third switch, and the current-rudder charge pump circuit further includes an enable terminal. The target switch includes a negative terminal of the first switch; the gate of the negative terminal of the first switch is connected to the enable terminal; the drain of the negative terminal of the first switch is a first terminal of the target switch; and the source of the negative terminal of the first switch is a second terminal of the target switch.

[0011] In conjunction with the first aspect, in some embodiments of the first aspect, the target switch is any one of the first switch, the second switch, and the third switch, and the current-rudder charge pump circuit further includes an enable reverse terminal. The target switch includes a positive terminal of the first switch; the gate of the positive terminal of the first switch is connected to the enable reverse terminal; the source of the positive terminal of the first switch is a first terminal of the target switch; and the drain of the positive terminal of the first switch is a second terminal of the target switch.

[0012] In conjunction with the first aspect, in some embodiments of the first aspect, the target switch is any one of the first switch, the second switch, and the third switch. The current-rudder charge pump circuit further includes an enable terminal and an enable reverse terminal. The target switch includes a positive terminal of the second switch and a negative terminal of the second switch. The gate of the negative terminal of the second switch is connected to the enable terminal. The gate of the positive terminal of the second switch is connected to the enable reverse terminal. The drain of the negative terminal of the second switch and the source of the positive terminal of the second switch are the first terminal of the target switch. The source of the negative terminal of the second switch and the drain of the positive terminal of the second switch are the second terminal of the target switch.

[0013] In conjunction with the first aspect, in some embodiments of the first aspect, the fourth switch or the fifth switch includes a positive terminal and a negative terminal of the third switch; the drain of the negative terminal of the third switch and the source of the positive terminal of the third switch are the first terminals of the fourth switch or the fifth switch; the source of the negative terminal of the third switch and the drain of the positive terminal of the third switch are the second terminals of the fourth switch or the fifth switch; the gate of the positive terminal of the third switch is the third terminal of the fourth switch or the fifth switch; and the gate of the negative terminal of the third switch is the fourth terminal of the fourth switch or the fifth switch.

[0014] In conjunction with the first aspect, in some embodiments of the first aspect, the sixth switch or the seventh switch includes a positive terminal and a negative terminal of the fourth switch; the drain of the negative terminal of the fourth switch and the source of the positive terminal of the fourth switch are the first terminals of the sixth switch or the seventh switch; the source of the negative terminal of the fourth switch and the drain of the positive terminal of the fourth switch are the second terminals of the sixth switch or the seventh switch; the gate of the negative terminal of the fourth switch is the third terminal of the sixth switch or the seventh switch; and the gate of the positive terminal of the fourth switch is the fourth terminal of the sixth switch or the seventh switch.

[0015] In a second aspect, a charge pump phase-locked loop is provided, the charge pump phase-locked loop including the current-rudder charge pump circuit provided in the first aspect and any possible implementation thereof. Attached Figure Description

[0016] Figure 1 A circuit diagram of a current-driven charge pump circuit provided in this application.

[0017] Figure label: Current-driven charge pump circuit - 10, Current source - 101, Analog circuit positive power supply - 102, Analog ground - 103, Reference current current mirror - 104, Discharge current current mirror - 105, Charging current current mirror - 106, First switch - 107, Second switch - 108, Third switch - 109, Fourth switch - 110, Fifth switch - 111, Sixth switch - 112, Seventh switch - 113, First rail-to-rail operational amplifier - 114, Second rail-to-rail operational amplifier - 115, Third rail-to-rail operational amplifier - 116, Charging control signal input - 117, Charging complementary control signal input - 118, Discharge control signal input - 119. Discharge complementary control signal input terminal -120 and current rudder charge pump output terminal -121, first field-effect transistor -1041, second field-effect transistor -1042, third field-effect transistor -1061, fourth field-effect transistor -1062, fifth field-effect transistor -1051, sixth field-effect transistor -1052, seventh field-effect transistor -1053, enable terminal -122, enable reverse terminal -123, first switch negative terminal -124, first switch positive terminal -125, second switch positive terminal -126, second switch negative terminal -127, third switch positive terminal -128, third switch negative terminal -129, fourth switch positive terminal -130, fourth switch negative terminal -131. Detailed Implementation

[0018] In the description of this application, unless otherwise stated, "multiple" means two or more. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of a single item or a plurality of items. For example, at least one of a, b, or c can mean: a, b, c, ab, ac, bc, or abc, where a, b, and c can be single or multiple.

[0019] Furthermore, to facilitate a clear description of the technical solutions in the embodiments of this application, the terms "first" and "second" are used in the embodiments of this application to distinguish identical or similar items with substantially the same function and effect. Those skilled in the art will understand that the terms "first" and "second" do not limit the quantity or execution order, and the terms "first" and "second" are not necessarily different.

[0020] In this application, the terms "exemplary" or "for example" are used to indicate that something is an example, illustration, or description. Any embodiment or design described as "exemplary" or "for example" in this application should not be construed as being better or more advantageous than other embodiments or designs. Specifically, the use of terms such as "exemplary" or "for example" is intended to present the relevant concepts in a specific manner to facilitate understanding.

[0021] It is understood that the term "embodiment" used throughout the specification means that a specific feature, structure, or characteristic related to an embodiment is included in at least one embodiment of this application. Therefore, various embodiments throughout the specification do not necessarily refer to the same embodiment. Furthermore, these specific features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. It is understood that in the various embodiments of this application, the sequence number of each process does not imply the order of execution; the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0022] It is understood that in this application, "when," "if," and "if" all refer to the corresponding processing that will be carried out under certain objective circumstances, and are not limited to a specific time, nor do they require that there must be a judgment action when implemented, nor do they imply any other limitations.

[0023] It is understood that some optional features in the embodiments of this application can be implemented independently in certain scenarios without relying on other features, such as the current solution on which they are based, to solve the corresponding technical problems and achieve the corresponding effects. Alternatively, they can be combined with other features as needed in certain scenarios. Correspondingly, the apparatus given in the embodiments of this application can also implement these features or functions, which will not be elaborated here.

[0024] In this application, unless otherwise specified, the same or similar parts between the various embodiments can be referred to each other. In the various embodiments and implementation methods of the various embodiments in this application, unless otherwise specified or logically conflicting, the terminology and / or descriptions between different embodiments and between the implementation methods of the various embodiments are consistent and can be mutually referenced. The technical features in different embodiments and between the implementation methods of the various embodiments can be combined according to their inherent logical relationships to form new embodiments, implementation methods, implementation methods, or implementation approaches. The following embodiments of this application do not constitute a limitation on the scope of protection of this application.

[0025] The Current-Steering Charge Pump (CSCP) is the core module of the charge pump phase-locked loop (CPPLL). The core function of the CSCP is to convert the digital phase or frequency error pulses output by the phase-frequency detector (PFD) into precise and controllable current pulses. By charging and discharging the loop filter (LPF), a stable analog control voltage is generated, which realizes closed-loop frequency regulation of the voltage-controlled oscillator (VCO), ultimately achieving phase locking and suppressing spurious and phase noise.

[0026] The key to current-rudder charge pumps lies in "current rudder" control: through differential switches and current source arrays, precise matching and rapid switching of charging and discharging currents are achieved, reducing switch on-resistance and charge injection noise. As process technology levels decrease further, power supply voltages will also decrease. The design bottlenecks of current-rudder charge pumps will then focus on insufficient voltage margin and deteriorated current matching. This is because the core requirement of charge pump design is to maximize the output voltage swing (output voltage at the current-rudder charge pump output terminal) while ensuring that the charging and discharging currents are equal. The voltage swing limitation at the current-rudder charge pump output terminal directly restricts the locking accuracy, dynamic response, and overall phase noise of the PLL loop.

[0027] Therefore, while ensuring that the charging current and discharging current are equal, how to increase the output voltage swing has become an urgent problem to be solved.

[0028] To address the aforementioned problems, this application provides a current-driven charge pump circuit, such as... Figure 1 As shown, the current-rudder charge pump circuit 10 includes: a current source 101, an analog circuit positive power supply 102, an analog ground 103, a reference current mirror 104, a discharge current mirror 105, a charging current mirror 106, a first switch 107, a second switch 108, a third switch 109, a fourth switch 110, a fifth switch 111, a sixth switch 112, a seventh switch 113, a first rail-to-rail operational amplifier 114, a second rail-to-rail operational amplifier 115, a third rail-to-rail operational amplifier 116, a charging control signal input terminal 117, a charging complementary control signal input terminal 118, a discharging control signal input terminal 119, a discharging complementary control signal input terminal 120, and a current-rudder charge pump output terminal 121.

[0029] Among them, the fourth switch 110, the fifth switch 111, the sixth switch 112 and the seventh switch 113 are complementary switches.

[0030] The first end of the reference current mirror 104 is connected to the positive power supply 102 of the analog circuit. The second end of the reference current mirror 104 is connected to one end of the current source 101. The other end of the current source 101 is connected to the analog ground 103. The third end of the reference current mirror 104 is connected to the first end of the first switch 107 and the non-inverting input of the first rail-to-rail operational amplifier 114, respectively.

[0031] The first end of the discharge current mirror 105 is connected to the second end of the first switch 107, the second end of the discharge current mirror 105 is connected to the output end of the first rail-to-rail operational amplifier 114, the third end of the discharge current mirror 105 is connected to the second end of the second switch 108, the fourth end of the discharge current mirror 105 is connected to the second ends of the fifth switch 111 and the seventh switch 113 respectively, and the fifth end of the discharge current mirror 105 is connected to the analog ground 103.

[0032] The first end of the charging current mirror 106 is connected to the positive power supply 102 of the analog circuit. The second end of the charging current mirror 106 is connected to the first end of the third switch 109. The third end of the charging current mirror 106 is connected to the first end of the fourth switch 110 and the first end of the sixth switch 112 respectively. The fourth end of the charging current mirror 106 is connected to the output end of the second rail-to-rail operational amplifier 115.

[0033] The second terminal of the third switch 109 is connected to the first terminal of the second switch 108 and the non-inverting input terminal of the second rail-to-rail operational amplifier 115.

[0034] The second terminal of the fourth switch 110 is connected to the first terminal of the fifth switch 111 and the output terminal of the third rail-to-rail operational amplifier 116, respectively. The third terminal of the fourth switch 110 is connected to the charging control signal input terminal 117, and the fourth terminal of the fourth switch 110 is connected to the charging complementary control signal input terminal 118.

[0035] The third terminal of the fifth switch 111 is connected to the discharge control signal input terminal 119, and the fourth terminal of the fifth switch 111 is connected to the discharge complementary control signal input terminal 120.

[0036] The second terminal of the sixth switch 112 is connected to the first terminal of the seventh switch 113, the non-inverting input terminal of the third rail-to-rail operational amplifier 116, and the output terminal 121 of the current-rudder charge pump, respectively. The third terminal of the sixth switch 112 is connected to the charging control signal input terminal 117, and the fourth terminal of the sixth switch 112 is connected to the charging complementary control signal input terminal 118.

[0037] The third terminal of the seventh switch 113 is connected to the discharge control signal input terminal 119, and the fourth terminal of the seventh switch 113 is connected to the discharge complementary control signal input terminal 120.

[0038] The inverting input of the third rail-to-rail operational amplifier 116 is connected to the output of the third rail-to-rail operational amplifier 116.

[0039] Based on this, a symmetrical bidirectional current mirror with active voltage clamping and dynamic impedance matching is constructed by coordinating the current output terminals of the charging current mirror 106 and the discharging current mirror 105 with three sets of rail-to-rail operational amplifiers and a complementary switching network. The key lies in using the rail-to-rail operational amplifiers to sense and force a balance between the voltages of the charging branch (third switch 109) and the discharging branch (fifth switch 111, seventh switch 113) in real time. This ensures that the current mirror output transistors flowing through the fourth switch 110, sixth switch 112, fifth switch 111, and seventh switch 113 maintain a constant drain-source voltage under any output voltage, thus completely eliminating the influence of channel length modulation effect on the current mirror accuracy. Electrically, this design is equivalent to providing an infinitely large dynamic output impedance to the current mirror output terminals, ensuring strict matching of charging and discharging currents over a wide output voltage range. This allows the charge pump output terminals to fully utilize the power rail range to achieve maximum voltage swing without being limited by current mismatch, significantly improving the capture range and dynamic performance of the phase-locked loop.

[0040] Optional, such as Figure 1 As shown, the reference current mirror 104 includes: a first field-effect transistor 1041 and a second field-effect transistor 1042; the source of the first field-effect transistor 1041 and the source of the second field-effect transistor 1042 are the first terminals of the reference current mirror 104; the drain of the first field-effect transistor 1041 is the second terminal of the reference current mirror 104; the drain of the second field-effect transistor 1042 is the third terminal of the reference current mirror 104; the drain of the first field-effect transistor 1041 is connected to the gate of the first field-effect transistor 1041; and the gate of the second field-effect transistor 1042 is connected to the gate of the first field-effect transistor 1041.

[0041] Based on this, by employing a specific topology in the reference current mirror 104, the first field-effect transistor 1041 is configured as a diode connection and interconnected with the gate of the second field-effect transistor 1042 to form a basic mirror unit, achieving excellent process robustness and temperature stability. This structure utilizes the intrinsic characteristics of similar matching devices under the same bias to ensure strict consistency of the gate-source voltages of the two branches, thereby generating a high-precision, low-sensitivity replica current over a wide power supply voltage range. This not only effectively suppresses the effects of channel length modulation and threshold voltage mismatch on mirror accuracy but also simplifies the complexity of the bias circuit and provides a stable static operating point for subsequent load circuits.

[0042] Optional, such as Figure 1As shown, the charging current mirror 106 includes: a third field-effect transistor 1061 and a fourth field-effect transistor 1062; the source of the third field-effect transistor 1061 and the source of the fourth field-effect transistor 1062 are the first terminals of the charging current mirror 106; the drain of the third field-effect transistor 1061 is the second terminal of the charging current mirror 106; the drain of the fourth field-effect transistor 1062 is the third terminal of the charging current mirror 106; the gate of the fourth field-effect transistor 1062 and the gate of the third field-effect transistor 1061 are the third terminals of the charging current mirror 106.

[0043] Based on this, by skipping the connection of the gate of the fourth field-effect transistor 1062 in the charging current mirror 106 to the third terminal of the current mirror, a negative feedback mechanism can be cleverly utilized to significantly improve the output impedance and voltage following capability of the current source 101. This connection method allows the fourth field-effect transistor 1062 to operate in the deep saturation region, and fluctuations in its drain voltage can be instantly sensed and reversed through the gate node, thereby minimizing the sensitivity of the drain voltage to channel modulation effects and ensuring a constant and accurate charging current over a wide output swing range. This effectively overcomes the current mismatch problem that occurs with conventional current mirrors when the voltage changes, and significantly improves the linearity and integral gain consistency of the charge pump during rapid charging and discharging processes.

[0044] Optional, such as Figure 1 As shown, the discharge current mirror 105 includes: a fifth field-effect transistor 1051, a sixth field-effect transistor 1052, and a seventh field-effect transistor 1053; the drain of the fifth field-effect transistor 1051 is the first terminal of the discharge current mirror 105; the gates of the fifth field-effect transistor 1051 and the sixth field-effect transistor 1052 are the second terminals of the discharge current mirror 105; the drain of the sixth field-effect transistor 1052 is the third terminal of the discharge current mirror 105; the drain of the seventh field-effect transistor 1053 is the fourth terminal of the discharge current mirror 105; and the source of the fifth field-effect transistor 1051, the source of the sixth field-effect transistor 1052, and the source of the seventh field-effect transistor 1053 are the fifth terminals of the reference current mirror 104.

[0045] Based on this, a discharge current mirror 105 is constructed by using a three-transistor cascaded structure comprising a fifth field-effect transistor 1051, a sixth field-effect transistor 1052, and a seventh field-effect transistor 1053. This achieves accurate mirroring of multiple current paths while significantly expanding the output voltage margin of the current mirror. This structure utilizes the fifth and sixth field-effect transistors 1051 and 1052 to form a common-source, common-gate unit, effectively shielding the output voltage fluctuations from affecting the primary mirror transistor (seventh field-effect transistor 1053) and minimizing channel length modulation effects. This provides extremely high output impedance and current matching accuracy over a wide output voltage range. Furthermore, by connecting the sources of all field-effect transistors to the fifth terminal of the reference current source 101, it ensures that each branch has a completely consistent source potential, eliminating mismatch caused by inconsistent source degradation resistance. Ultimately, this results in excellent stability and repeatability of the discharge current during charge-discharge cycles.

[0046] Optional, such as Figure 1 As shown, the target switch is any one of the first switch 107, the second switch 108, and the third switch 109. The current-rudder charge pump circuit 10 also includes an enable terminal 122. The target switch includes a first switch negative terminal 124. The gate of the first switch negative terminal 124 is connected to the enable terminal 122. The drain of the first switch negative terminal 124 is the first terminal of the target switch. The source of the first switch negative terminal 124 is the second terminal of the target switch.

[0047] Based on this, using the negative terminal of the first switch 107 as the switch control point in the current-rudder charge pump circuit 10 can significantly optimize the switching timing control and reduce charge injection errors. Specifically, this configuration utilizes the source-drain voltage dependence of the switching transistor itself to naturally form a voltage following effect during the turn-off process, thereby suppressing the channel charge asymmetry distribution problem caused by control signal jumps, while reducing voltage overshoot and undershoot at the switching node. This structure effectively improves output accuracy and stability while maintaining the charge pump voltage conversion efficiency.

[0048] Optional, such as Figure 1 As shown, the target switch is any one of the first switch 107, the second switch 108, and the third switch 109. The current-rudder charge pump circuit 10 also includes an enable reverse terminal 123. The target switch includes a first switch positive terminal 125. The gate of the first switch positive terminal 125 is connected to the enable reverse terminal 123. The source of the first switch positive terminal 125 is the first terminal of the target switch. The drain of the first switch positive terminal 125 is the second terminal of the target switch.

[0049] Based on this, in the current-rudder charge pump circuit 10, the control terminal of the first switch 107 is configured as a switch control point, enabling precise master control and synchronous optimization of the charge transfer path. This design, by actively controlling the gate of the switch transistor, directly and rapidly turns the current rudder on or off during the core charging and discharging phase of the charge pump, thereby ensuring a high degree of temporal consistency in the quantitative transfer of the charge packet. This method effectively suppresses current mismatch and ripple increase caused by switch delay mismatch, significantly improving the transient response speed and phase-locking accuracy of the charge pump.

[0050] Optional, such as Figure 1 As shown, the target switch is any one of the first switch 107, the second switch 108, and the third switch 109. The current-rudder charge pump circuit 10 also includes an enable terminal 122 and an enable reverse terminal 123. The target switch includes a second switch positive terminal 126 and a second switch negative terminal 127. The gate of the second switch negative terminal 127 is connected to the enable terminal 122. The gate of the second switch positive terminal 126 is connected to the enable reverse terminal 123. The drain of the second switch negative terminal 127 and the source of the second switch positive terminal 126 are the first terminals of the target switch. The source of the second switch negative terminal 127 and the drain of the second switch positive terminal 126 are the second terminals of the target switch.

[0051] Based on this, by configuring the positive terminal 126 and the negative terminal 127 of the second switch together as the switch control node in the current-rudder charge pump circuit 10, bidirectional dynamic cancellation of channel charge injection and clock feedthrough effects of the switching transistor is achieved. During the switching transient process, this structure utilizes the complementary timing and voltage swing of the positive and negative control signals to guide the channel charge to dissipate along opposite paths during the turn-on and turn-off phases, respectively, thereby generating mutually canceling error charge packets at the circuit node. This method not only fundamentally suppresses the nonlinear charge error inherent in traditional single-ended control but also significantly reduces output ripple, without sacrificing switching speed or increasing static power consumption.

[0052] Optional, such as Figure 1 As shown, the fourth switch 110 or the fifth switch 111 includes a positive terminal 128 and a negative terminal 129 of the third switch; the drain of the negative terminal 129 and the source of the positive terminal 128 are the first terminals of the fourth switch 110 or the fifth switch 111; the source of the negative terminal 129 and the drain of the positive terminal 128 are the second terminals of the fourth switch 110 or the fifth switch 111; the gate of the positive terminal 128 is the third terminal of the fourth switch 110 or the fifth switch 111; and the gate of the negative terminal 129 is the fourth terminal of the fourth switch 110 or the fifth switch 111.

[0053] Based on this, by constructing the fourth switch 110 or the fifth switch 111 as a complementary series transmission gate structure consisting of the positive terminal 128 and the negative terminal 129 of the third switch, extremely low on-resistance and near-zero static leakage current are achieved over a wide voltage swing range. Utilizing independent control of the gates of the two switches, the conduction path can be intelligently selected and optimized based on the instantaneous voltage polarity across the switches: when a high potential difference exists across the switches, the two gates can be driven separately to ensure that one switch is always in a deeply conducting state, thus significantly reducing the problem of drastically increased on-resistance caused by the drop in gate-source voltage in traditional single-transistor switches. This structure not only effectively eliminates the voltage dependence of the switch conduction state and greatly improves the linearity and speed of the charge pump's charging and discharging under high voltage differentials, but its back-to-back connection also naturally blocks charge sharing and reverse leakage paths.

[0054] Optional, such as Figure 1 As shown, the sixth switch 112 or the seventh switch 113 includes a positive terminal 130 and a negative terminal 131 of the fourth switch; the drain of the negative terminal 131 and the source of the positive terminal 130 are the first terminals of the sixth switch 112 or the seventh switch 113; the source of the negative terminal 131 and the drain of the positive terminal 130 are the second terminals of the sixth switch 112 or the seventh switch 113; the gate of the negative terminal 131 is the third terminal of the sixth switch 112 or the seventh switch 113; and the gate of the positive terminal 130 is the fourth terminal of the sixth switch 112 or the seventh switch 113.

[0055] Based on this, by constructing the sixth switch 112 or the seventh switch 113 as a complementary transmission gate structure consisting of the positive terminal 130 and the negative terminal 131 of the fourth switch, and combining it with an innovative gate cross-control method, precise cancellation of charge injection and clock feedthrough errors at the switching node is achieved. Specifically, this design dynamically couples the gate control signals of the two switches with the voltage state of the other switch. At the instant of switching, the error current introduced by the channel charge change of the positive and negative terminals is opposite in polarity and cancels out in amplitude at the common node, thereby significantly reducing voltage glitches at both the source and drain terminals. This not only maintains the low on-resistance advantage of traditional transmission gates over a wide voltage range, but also fundamentally suppresses the periodic ripple and reference spurious introduced by switching nonlinearity through intelligent gate drive correlation, significantly improving the dynamic accuracy and signal-to-noise ratio of switched capacitor circuits in precision sampling, holding, and charge transfer applications.

[0056] The frequency and phase detector is the previous stage of the current-rudder charge pump circuit 10. Conventional frequency and phase detectors output four signals: UP, UPB, DN, and DNB. The current-rudder charge pump circuit 10 of this application also responds to these four signals. Then, under the premise that the charging current and discharging current are equal, the output voltage swing supports a full swing from 0 to the power supply voltage.

[0057] The implementation process is described in detail below under three scenarios: when the output voltage of the current-rudder charge pump output terminal 121 is close to 0; when the output voltage of the current-rudder charge pump output terminal 121 is 0.5 times the voltage of the analog circuit positive power supply 102; and when the output voltage of the current-rudder charge pump output terminal 121 is the voltage of the analog circuit positive power supply 102. Case 1: When the output voltage of the current-rudder charge pump output terminal 121 operates close to 0, due to the action of the track-rail operational amplifier, the voltages of nodes D, G, and H will be clamped to the same voltage value close to 0, following the output voltage of the current-rudder charge pump output terminal 121. Since there are corresponding complementary switches between nodes D and A, G and B, and the current-rudder charge pump output terminal 121 and C, the voltage differences between nodes D and A, G and B, and C are all equal. Therefore, the voltage values ​​of nodes A, B, and C are also the same. Furthermore, since the gates of the fifth MOSFET 1051, sixth MOSFET 1052, and seventh MOSFET 1053 are all at node VN, this ensures that the current flowing through the fifth MOSFET 1051, sixth MOSFET 1052, and seventh MOSFET 1053 is precisely matched. Similarly, complementary switches exist between nodes G and E, and between the current-rudder charge pump output terminal 121 and node F. Therefore, the voltage difference between nodes G and E, and between the current-rudder charge pump output terminal 121 and node F, are equal. Consequently, the voltage values ​​at nodes E and F are also the same. Furthermore, since the gates of the third MOSFET 1061 and the fourth MOSFET 1062 are both at node VP, the currents flowing through them are precisely matched. Because the sixth MOSFET 1052 and the third MOSFET 1061 are on the same path from power supply to ground, the currents flowing through them are the same. Therefore, the current flowing through the fourth MOSFET 1062 is equal to the current flowing through the seventh MOSFET 1053. In other words, the charging current of this charge pump circuit is equal to the discharging current. However, since the output voltage of the current-driven charge pump output terminal 121 is close to 0 at this time, the current flowing through the fourth field-effect transistor 1062 and the current flowing through the seventh field-effect transistor 1053 will both be less than the input reference current.

[0058] Case 2: When the output voltage of the current rudder charge pump output terminal 121 is 0.5 times the voltage of the analog circuit positive power supply 102, the voltages of nodes D, G and H will be clamped to the output voltage of the current rudder charge pump output terminal 121 due to the action of the track operational amplifier. Since there are corresponding complementary switches between nodes D and A, nodes G and B, the output voltage of the current-steering charge pump output terminal 121, and node C, the voltage differences between nodes D and A, nodes G and B, and the voltage differences between the current-steering charge pump output terminal 121 and node C are all equal. Therefore, the voltage values ​​of nodes A, B, and C are also the same. At the same time, since the gates of the fifth field-effect transistor 1051, the sixth field-effect transistor 1052, and the seventh field-effect transistor 1053 are all at node VN, this ensures that the current flowing through the fifth field-effect transistor 1051, the sixth field-effect transistor 1052, and the seventh field-effect transistor 1053 is precisely matched. Similarly, complementary switches exist between nodes G and E, and between the current-rudder charge pump output terminal 121 and node F. Therefore, the voltage difference between nodes G and E, and between the current-rudder charge pump output terminal 121 and node F, are equal. Consequently, the voltage values ​​at nodes E and F are also the same. Furthermore, since the gates of the third MOSFET 1061 and the fourth MOSFET 1062 are both at node VP, the currents flowing through them are precisely matched. Because the sixth MOSFET 1052 and the third MOSFET 1061 are on the same path from power supply to ground, the currents flowing through them are the same. Therefore, the current flowing through the fourth MOSFET 1062 is equal to the current flowing through the seventh MOSFET 1053. In other words, the charging current of this charge pump circuit is equal to the discharging current. By properly setting the charging current mirror 106 and the discharging current mirror 105, it can be ensured that both the charging current mirror 106 and the discharging current mirror 105 operate in the saturation region. In this way, the current flowing through the fourth field-effect transistor 1062 and the current flowing through the seventh field-effect transistor 1053 will be equal to the input reference current.

[0059] Case 3: When the output voltage of the current rudder charge pump output terminal 121 is the voltage of the analog circuit positive power supply 102, the voltages of nodes D, G and H will be clamped to the output voltage of the current rudder charge pump output terminal 121 due to the action of the track operational amplifier. Since there are corresponding complementary switches between nodes D and A, nodes G and B, and the current-rudder charge pump output terminal 121 and node C, the voltage differences between nodes D and A, nodes G and B, and the current-rudder charge pump output terminal 121 and node C are all equal. Therefore, the voltage values ​​of nodes A, B, and C are also the same. At the same time, since the gates of the fifth field-effect transistor 1051, the sixth field-effect transistor 1052, and the seventh field-effect transistor 1053 are all at node VN, this ensures that the current flowing through the fifth field-effect transistor 1051, the sixth field-effect transistor 1052, and the seventh field-effect transistor 1053 is precisely matched. Similarly, complementary switches exist between nodes G and E, and between the current-rudder charge pump output terminal 121 and node F. Therefore, the voltage difference between nodes G and E, and between the current-rudder charge pump output terminal 121 and node F, are equal. Consequently, the voltage values ​​at nodes E and F are also the same. Furthermore, since the gates of the third MOSFET 1061 and the fourth MOSFET 1062 are both at node VP, the currents flowing through them are precisely matched. Because the sixth MOSFET 1052 and the third MOSFET 1061 are on the same path from power supply to ground, the currents flowing through them are the same. Therefore, the current flowing through the fourth MOSFET 1062 is equal to the current flowing through the seventh MOSFET 1053. In other words, the charging current of this charge pump circuit is equal to the discharging current. At this time, since the output voltage of the current-driven charge pump output terminal 121 is close to the power supply voltage, and the node D is also close to the power supply voltage, the Vds of the second field-effect transistor 1042 in the reference current mirror 104 will be too low. The current flowing through the second field-effect transistor 1042 will be less than the input reference current. Therefore, the current flowing through the fifth field-effect transistor 1051, the sixth field-effect transistor 1052, the seventh field-effect transistor 1053, the third field-effect transistor 1061, and the fourth field-effect transistor 1062 will all be less than the input reference current.

[0060] Although this application has been described herein in conjunction with various embodiments, those skilled in the art will understand and implement other variations of the disclosed embodiments by reviewing the accompanying drawings and the disclosure in carrying out the claimed application.

[0061] Although this application has been described in conjunction with specific features and embodiments, it is obvious that various modifications and combinations can be made thereto without departing from the spirit and scope of this application. Accordingly, this specification and drawings are merely illustrative examples of this application and are considered to cover any and all modifications, variations, combinations, or equivalents within the scope of this application. Clearly, those skilled in the art can make various alterations and modifications to this application without departing from the spirit and scope of this application. Thus, if such modifications and modifications of this application fall within the scope of equivalent technology of this application, this application also intends to include such modifications and modifications.

Claims

1. A current-driven charge pump circuit, characterized in that, The current-rudder charge pump circuit includes: a current source, an analog circuit positive power supply, an analog ground, a reference current mirror, a discharge current mirror, a charging current mirror, a first switch, a second switch, a third switch, a fourth switch, a fifth switch, a sixth switch, a seventh switch, a first rail-to-rail operational amplifier, a second rail-to-rail operational amplifier, a third rail-to-rail operational amplifier, a charging control signal input terminal, a charging complementary control signal input terminal, a discharging control signal input terminal, a discharging complementary control signal input terminal, and a current-rudder charge pump output terminal. The fourth switch, the fifth switch, the sixth switch, and the seventh switch are complementary switches. The first end of the reference current mirror is connected to the positive power supply of the analog circuit, the second end of the reference current mirror is connected to one end of the current source, the other end of the current source is connected to the analog ground, and the third end of the reference current mirror is connected to the first end of the first switch and the non-inverting input of the first rail-to-rail operational amplifier, respectively. The first end of the discharge current mirror is connected to the second end of the first switch, the second end of the discharge current mirror is connected to the output end of the first rail-to-rail operational amplifier, the third end of the discharge current mirror is connected to the second end of the second switch, the fourth end of the discharge current mirror is connected to the second ends of the fifth switch and the seventh switch respectively, and the fifth end of the discharge current mirror is connected to analog ground. The first end of the charging current mirror is connected to the positive power supply of the analog circuit, the second end of the charging current mirror is connected to the first end of the third switch, the third end of the charging current mirror is connected to the first end of the fourth switch and the first end of the sixth switch, and the fourth end of the charging current mirror is connected to the output end of the second rail-to-rail operational amplifier. The second terminal of the third switch is connected to the first terminal of the second switch and the non-inverting input terminal of the second rail-to-rail operational amplifier, respectively. The second terminal of the fourth switch is connected to the first terminal of the fifth switch and the output terminal of the third rail-to-rail operational amplifier, the third terminal of the fourth switch is connected to the charging control signal input terminal, and the fourth terminal of the fourth switch is connected to the charging complementary control signal input terminal. The third terminal of the fifth switch is connected to the discharge control signal input terminal, and the fourth terminal of the fifth switch is connected to the discharge complementary control signal input terminal. The second terminal of the sixth switch is connected to the first terminal of the seventh switch, the non-inverting input terminal of the third rail-to-rail operational amplifier, and the output terminal of the current-rudder charge pump, respectively. The third terminal of the sixth switch is connected to the charging control signal input terminal, and the fourth terminal of the sixth switch is connected to the charging complementary control signal input terminal. The third terminal of the seventh switch is connected to the discharge control signal input terminal, and the fourth terminal of the seventh switch is connected to the discharge complementary control signal input terminal. The inverting input of the third rail-to-rail operational amplifier is connected to the output of the third rail-to-rail operational amplifier.

2. The current-driven charge pump circuit according to claim 1, characterized in that, The reference current mirror includes: a first field-effect transistor and a second field-effect transistor; The source of the first field-effect transistor and the source of the second field-effect transistor are the first terminals of the reference current mirror; The drain of the first field-effect transistor is the second terminal of the reference current mirror; The drain of the second field-effect transistor is the third terminal of the reference current mirror; The drain of the first field-effect transistor is connected to the gate of the first field-effect transistor; The gate of the second field-effect transistor is connected to the gate of the first field-effect transistor.

3. The current-driven charge pump circuit according to claim 1, characterized in that, The charging current mirror includes: a third field-effect transistor and a fourth field-effect transistor; The source of the third field-effect transistor and the source of the fourth field-effect transistor are the first terminals of the charging current mirror. The drain of the third field-effect transistor is the second terminal of the charging current mirror; The drain of the fourth field-effect transistor is the third terminal of the charging current mirror. The gate of the fourth field-effect transistor and the gate of the third field-effect transistor are the third terminals of the charging current mirror.

4. The current-driven charge pump circuit according to claim 1, characterized in that, The discharge current mirror includes: a fifth field-effect transistor, a sixth field-effect transistor, and a seventh field-effect transistor; The drain of the fifth field-effect transistor is the first terminal of the discharge current mirror; The gate of the fifth field-effect transistor and the gate of the sixth field-effect transistor are the second ends of the discharge current mirror; The drain of the sixth field-effect transistor is the third terminal of the discharge current mirror. The drain of the seventh field-effect transistor is the fourth terminal of the discharge current mirror. The source of the fifth field-effect transistor, the source of the sixth field-effect transistor, and the source of the seventh field-effect transistor are the fifth terminals of the reference current mirror.

5. The current-driven charge pump circuit according to any one of claims 1-4, characterized in that, The target switch is any one of the first switch, the second switch, and the third switch. The current-rudder charge pump circuit also includes an enable terminal. The target switch includes the negative terminal of the first switch. The gate of the negative terminal of the first switch is connected to the enable terminal; The drain of the negative terminal of the first switch is the first terminal of the target switch; The source terminal of the negative terminal of the first switch is the second terminal of the target switch.

6. The current-driven charge pump circuit according to any one of claims 1-4, characterized in that, The target switch is any one of the first switch, the second switch, and the third switch. The current-rudder charge pump circuit also includes an enable reverse terminal. The target switch includes the positive terminal of the first switch. The gate of the positive terminal of the first switch is connected to the enable reverse terminal; The source terminal of the first switch is the first terminal of the target switch; The drain of the positive terminal of the first switch is the second terminal of the target switch.

7. The current-driven charge pump circuit according to any one of claims 1-4, characterized in that, The target switch is any one of the first switch, the second switch, and the third switch. The current-rudder charge pump circuit also includes an enable terminal and an enable reverse terminal. The target switch includes the positive terminal of the second switch and the negative terminal of the second switch. The gate of the negative terminal of the second switch is connected to the enable terminal; The gate of the positive terminal of the second switch is connected to the reverse enable terminal; The drain of the negative terminal of the second switch and the source of the positive terminal of the second switch are the first terminals of the target switch; The source terminal of the negative terminal of the second switch and the drain terminal of the positive terminal of the second switch are the second terminals of the target switch.

8. The current-driven charge pump circuit according to any one of claims 1-4, characterized in that, The fourth switch or the fifth switch includes the positive terminal of the third switch and the negative terminal of the third switch; The drain of the negative terminal of the third switch and the source of the positive terminal of the third switch are the first terminals of the fourth switch or the fifth switch; The source terminal of the negative terminal of the third switch and the drain terminal of the positive terminal of the third switch are the second terminals of the fourth switch or the fifth switch; The gate of the positive terminal of the third switch is the third terminal of the fourth switch or the fifth switch; The gate of the negative terminal of the third switch is the fourth terminal of the fourth switch or the fifth switch.

9. The current-driven charge pump circuit according to any one of claims 1-4, characterized in that, The sixth switch or the seventh switch includes the positive terminal of the fourth switch and the negative terminal of the fourth switch; The drain of the negative terminal of the fourth switch and the source of the positive terminal of the fourth switch are the first terminals of the sixth switch or the seventh switch. The source of the negative terminal of the fourth switch and the drain of the positive terminal of the fourth switch are the second terminals of the sixth switch or the seventh switch; The gate of the negative terminal of the fourth switch is the third terminal of the sixth switch or the seventh switch; The gate of the positive terminal of the fourth switch is the fourth terminal of the sixth switch or the seventh switch.

10. A charge pump phase-locked loop, characterized in that, The charge pump phase-locked loop includes the current-rudder charge pump circuit of any one of claims 1-9.

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