Multi-position synchronous accuracy testing device and method for through-type current transformers

Abstract

This invention discloses a multi-station synchronous accuracy testing device and method for through-type current transformers, relating to the field of current transformer testing technology. The scheme configures the channel mapping relationship and sampling order of the ADC sampling unit to satisfy symmetry conditions, enabling each tested through-type current transformer to obtain two symmetrical sampled values ​​or one sampled value at the same preset virtual intermediate time in a round of polling sampling. The calibrator arithmetically averages the symmetrical sampled values ​​of each tested transformer to obtain an equivalent sampled value aligned to the virtual intermediate time. Then, it calculates the ratio difference and angle difference based on the fixed delay compensation set by the system calibration. This invention eliminates the sampling time differences between channels caused by polling sampling during the sampling stage, unifying the equivalent sampling times of all channels. The compensation object converges from multiple different delays to a single system-level fixed delay, improving the accuracy of multi-station batch testing and the versatility and adaptability of the calibrator.

Description

Technical Field

[0001] This invention relates to the field of current transformer testing technology, specifically to a multi-station synchronous accuracy testing device and method for through-type current transformers. Background Technology

[0002] Current transformers with through-hole design are widely used in power system metering, protection, and monitoring due to their compact structure and convenient installation. Their accuracy directly affects the accuracy of power metering and the reliability of relay protection devices. Before leaving the factory and during operation and maintenance, current transformers with through-hole design must undergo rigorous accuracy testing.

[0003] Currently, the accuracy testing of current transformers mainly relies on dedicated calibrators. A conventional single-phase calibrator can only test one transformer at a time, and even with a three-phase calibrator, a maximum of three can be tested simultaneously. When faced with batch testing tasks, multiple calibrators must be added to operate in parallel. This approach brings two prominent problems: first, the purchase cost of the calibrators increases linearly with the scale of testing, resulting in a heavy equipment investment burden; second, each calibrator requires independent wiring, which is cumbersome, time-consuming, and prone to errors, and the parallel routing of multiple analog signal lines can easily cause crosstalk, affecting the reliability of the test data.

[0004] Furthermore, the current-carrying capacity of existing testing fixtures is generally limited. With the continuous growth of power load, the rated primary current of current transformers is constantly increasing, and products with rated currents of up to 3000A have appeared in the tender materials. When faced with high-current testing, traditional fixtures can only barely cope by using thicker connecting cables and bolt fastening, which is not only difficult to operate and has low clamping efficiency, but also makes it difficult to guarantee contact resistance, affecting the stability and safety of the test.

[0005] To address the issue of primary circuit construction during batch testing of through-hole current transformers, Chinese invention patent application CN104090255A discloses a primary clamping device and its usage method for testing through-hole current transformers. This device employs a long cantilever electrode (copper rod) that passes through the through-holes of multiple transformers under test. A pneumatic cylinder drives the movable electrode rod to automatically close and open the primary circuit, allowing simultaneous energization testing of multiple through-hole transformers with a current carrying capacity of up to 3780A. This solution achieves a "one rod through multiple cores" batch testing architecture at the mechanical clamping level, effectively improving testing efficiency and operational safety.

[0006] However, in the scenario of synchronous accuracy testing of multi-station through-type current transformers, in addition to the mechanical issue of batch clamping, there is also the challenge of synchronization at the signal acquisition level. The testing system needs to simultaneously acquire dozens of analog secondary output signals from the tested transformers and convert them into digital quantities for the calibrator to calculate the ratio and angle difference. Successive approximation (SAR) ADCs are commonly used in this field for analog-to-digital conversion. Their physical architecture dictates that multiple analog inputs must be sampled and converted sequentially through internal analog multiplexers in a time-division manner, naturally forming an equally spaced polling sampling sequence. While configuring a separate synchronous sampling ADC for each channel can eliminate the polling time difference, the hardware cost will increase exponentially. Furthermore, device consistency deviations, reference source deviations, and clock deviations exist between multiple independent ADCs, introducing additional system errors. In test environments with strong electromagnetic interference, parallel wiring of multiple ADCs will also face severe crosstalk isolation challenges. Therefore, using a single SAR ADC for equally spaced polling sampling of multiple channels is a reasonable choice after balancing cost, accuracy, and reliability.

[0007] However, polling sampling implies a time difference between the sampling times of each channel. When the calibrator calculates the ratio difference and angle difference, if it treats the sampled values ​​from different times as data from the same time and compares them directly, this time difference will be directly mixed into the angle difference calculation result, leading to a distortion in the accuracy judgment of the tested transformer. Especially when there are many workstations and a large number of channels, the cumulative time difference between the first and last channels can reach tens of microseconds, which is not negligible for precision metrology of 0.02 grade and above. Summary of the Invention

[0008] This invention proposes a multi-station synchronous accuracy detection device and method for through-type current transformers. Its purpose is to overcome the defects in the prior art, such as inconsistent sampling times of each channel caused by successive approximation ADC polling sampling, and the calibrator misjudging the sampling time difference as the angle difference of the transformer under test.

[0009] The technical solution of this invention is as follows:

[0010] A multi-position synchronous accuracy testing device for through-type current transformers includes:

[0011] The test bench has multiple workstations on its top surface;

[0012] A conductive copper rod passes through all the through holes of the current transformer to be tested.

[0013] Clamps are used to clamp and fix conductive copper rods.

[0014] A current booster is used to provide a primary current for testing to a conductive copper rod.

[0015] The acquisition terminals correspond one-to-one with the workstation and are used to acquire the secondary output analog signals of each tested through-core current transformer.

[0016] The signal processing and transmission component, which is directly or indirectly electrically connected to all acquisition terminals, includes an ADC sampling unit and a serial encoding module; the ADC sampling unit is used to perform equally spaced polling sampling on multi-channel analog signals; the serial encoding module is used to encode and transmit the sampled digital signals.

[0017] The calibrator is connected to the signal processing and transmission components via optical fiber.

[0018] The output signal from the secondary side of the current booster is used as a standard signal and sent to the calibrator through a signal path independent of the signal processing and transmission components.

[0019] The channel mapping relationship and sampling order of the ADC sampling unit are configured to satisfy the following symmetry conditions: in a complete round of polling sampling, each tested through-hole current transformer obtains two symmetrical sampling values ​​about the same preset virtual intermediate time, or obtains a sampling value when the sampling time of the channel corresponding to the transformer is equal to the preset virtual intermediate time.

[0020] As a further improvement to the multi-station synchronous accuracy detection device applied to the through-type current transformer, the signal processing and transmission component or calibrator is configured to: perform an arithmetic average on the sampled values ​​obtained by each tested transformer satisfying the symmetry condition to obtain an equivalent sampled value aligned to the preset virtual intermediate time.

[0021] The calibrator is configured to: compensate the aligned test signal based on the fixed delay obtained by system calibration, and calculate the ratio difference and angle difference of each tested through-core current transformer based on eliminating the time difference between the sampling time of the standard signal and the sampling time corresponding to the equivalent sample value.

[0022] As a further improvement to the multi-station synchronous accuracy detection device applied to through-hole current transformers, the symmetry condition is achieved in the following way: the secondary output signal of each through-hole current transformer under test is simultaneously connected to two different channels of the ADC sampling unit, and the two channels are symmetrical about a preset virtual intermediate time; when the number of transformers under test is odd, the transformer located at the center position is only connected to the center channel corresponding to the preset virtual intermediate time.

[0023] As a further improvement to the multi-station synchronous accuracy detection device applied to through-type current transformers, the symmetry condition is achieved in the following way: the secondary output signal of each through-type current transformer under test is only connected to one channel of the ADC sampling unit; in one round of sampling, the ADC sampling unit samples sequentially to the end channel in ascending order of channels, and then samples sequentially back to the starting channel in descending order of channels, so that each transformer obtains two samples in one round of sampling, and the two samples are symmetrical about the preset virtual intermediate time.

[0024] As a further improvement to the multi-station synchronous accuracy detection device applied to the through-hole current transformer: the serial encoding module organizes the data obtained from each round of complete sampling into a data frame, and each data frame is sent at equal intervals with a time interval between frame headers. A fixed value; the time interval between the intraframe header and the sampling time of the first channel. A fixed value, representing the time interval between sampling times of adjacent channels within a frame. It is a fixed value; the verifier determines the time based on the received frame header and the preset time. , The actual sampling time corresponding to each sampled data within the frame is calculated.

[0025] As a further improvement to the multi-station synchronous accuracy detection device applied to the through-hole current transformer: the signal processing and transmission component also includes a synchronization pulse module, which provides a unified clock reference for the ADC sampling unit and the serial encoding module.

[0026] This invention also discloses a multi-position synchronization accuracy detection method for through-type current transformers, comprising:

[0027] Place the current transformers to be tested on the test bench at their respective workstations.

[0028] Pass a conductive copper rod through all the through holes of the current transformer to be tested.

[0029] Start the current booster to provide the primary current for testing to the conductive copper rod;

[0030] The secondary output analog signals of each tested through-core current transformer are acquired through the acquisition terminals; the multi-channel analog signals are subjected to equal-interval polling sampling through the ADC sampling unit in the signal processing and transmission component; wherein, the channel mapping relationship and sampling order of the polling sampling ensure that in a complete round of sampling, each tested through-core current transformer obtains two symmetrical sampling values ​​about the same preset virtual intermediate time, or obtains one sampling value when the sampling time of the channel corresponding to the transformer is equal to the preset virtual intermediate time;

[0031] The serial encoding module in the signal processing and transmission component encodes the sampled digital signal or the result of arithmetic averaging based on the digital signal and sends it to the calibration instrument.

[0032] The output signal from the secondary side of the current booster is used as a standard signal and sent to the calibrator through a signal path independent of the signal processing and transmission components.

[0033] The calibrator performs an arithmetic mean on the symmetrical sampled values ​​of each tested transformer to obtain an equivalent sampled value aligned to the preset virtual intermediate time, or directly obtains the equivalent sampled value aligned to the preset virtual intermediate time based on the result calculated by the arithmetic mean.

[0034] The calibrator compensates for the aligned test signal based on the fixed delay obtained from system calibration. It calculates the ratio difference and angle difference of each tested through-core current transformer after eliminating the time difference between the sampling time of the standard signal and the sampling time corresponding to the equivalent sample value.

[0035] As a further improvement to the multi-station synchronous accuracy detection method applied to through-hole current transformers, the symmetrical sampling value is obtained in the following way: the secondary output signal of each through-hole current transformer under test is simultaneously connected to two different channels of the ADC sampling unit that are symmetrical about the preset virtual intermediate time; when the number of transformers under test is odd, the transformer located at the center position is only connected to the center channel corresponding to the preset virtual intermediate time.

[0036] As a further improvement to the multi-station synchronous accuracy detection method applied to through-type current transformers, the symmetrical sampling value is obtained in the following way: the secondary output signal of each through-type current transformer under test is only connected to one channel of the ADC sampling unit. The ADC sampling unit samples sequentially to the end channel in ascending order of channels, and then samples sequentially back to the starting channel in descending order of channels.

[0037] As a further improvement to the multi-station synchronization accuracy detection method applied to the through-type current transformer, the compensation adopts the frequency domain phase compensation method or the time domain interpolation resampling method.

[0038] The frequency domain phase compensation method includes: performing discrete Fourier transform on the standard signal sequence and the measured signal sequence respectively, extracting the fundamental complex component, and calculating the ratio difference and angle difference after rotating the fundamental phase of the measured signal according to the fixed delay.

[0039] The time-domain interpolation resampling method includes: using an interpolation algorithm to calculate the instantaneous value of the measured signal sequence that is ahead of the fixed delay time relative to the original equivalent sampling time, constructing an aligned sequence, and then performing a discrete Fourier transform and calculating the ratio difference and angle difference.

[0040] Compared with the prior art, the present invention has the following beneficial effects:

[0041] 1. This invention configures the channel mapping relationship and sampling order of the ADC sampling unit to satisfy symmetry conditions, enabling each tested through-hole current transformer to obtain two symmetrical sampled values ​​(or a sampled value exactly located at that moment) about the same virtual intermediate time in the same round of polling sampling. After arithmetic averaging, the equivalent sampling times of all tested channels are uniformly aligned to this virtual intermediate time. Its core effect is that the inherent sampling time differences between channels caused by polling sampling are eliminated during the sampling stage. The compensation object faced by the calibrator converges from "multiple different delay amounts depending on the position of each channel in the polling sequence" to "a system-level delay parameter shared by all channels." The calibrator can complete the compensation without being aware of the internal details of the ADC channel number, polling order, and sampling interval. The sampling front-end and the computation back-end are decoupled architecturally, allowing direct adaptation to any calibrator supporting a standard digital interface, resulting in strong versatility. Meanwhile, the arithmetic mean of two symmetrical points is mathematically equivalent to a first-order linear interpolation at the center time. Compared with the zero-order hold or single-point extrapolation strategies commonly used in existing schemes, the waveform restoration accuracy is higher, especially meeting the precision measurement requirements of 0.02 level and above.

[0042] 2. This invention provides two implementation methods: physical dual-channel symmetrical sampling and round-trip symmetrical sampling. The former connects each tested current transformer to two ADC channels symmetrical about a virtual intermediate time, completing all sampling in a single round of polling, resulting in fast detection speed. The latter requires only one ADC channel connection per current transformer, simplifying wiring and making it suitable for applications with limited physical channel resources. Both methods share the same symmetrical average alignment mechanism, allowing for flexible selection based on the actual detection scenario.

[0043] 3. In this invention, each data frame is sent at equal intervals, and the sampling times of each channel within the frame are arranged at strictly equal intervals. Thus, the actual sampling time corresponding to each sampled data within the frame can be accurately determined based on the frame header time, providing a definite time basis for symmetrical averaging and delay compensation.

[0044] 4. This invention sends the standard signal directly to the calibrator through an independent path, without participating in polling sampling and encoding, thus avoiding the introduction of additional time uncertainty into the standard signal during polling. Attached Figure Description

[0045] Figure 1 This is a schematic diagram of a multi-station synchronous accuracy testing device applied to a through-type current transformer.

[0046] Figure 2 This is a flowchart of the signal transmission process.

[0047] Figure 3This is a schematic diagram of the multi-channel, equally spaced polling sampling timing. The diagram shows the fixed time relationship between the frame header and the sampling time of each channel: after the frame header is sent, it undergoes... The sampling begins at the start of the first channel (Ch0), and then every subsequent channel... The subsequent channels (Ch1, Ch2, etc.) are sampled sequentially, and after one round of sampling, they are packaged into a frame and sent.

[0048] The reference numerals in the figures include:

[0049] 1. Test bench; 2. Workstation; 3. Through hole; 4. Conductive copper rod; 5. Pneumatic clamp; 6. Acquisition terminal; 7. Aggregation unit; 8. Signal processing and transmission component; 9. Calibrator; 10. Current booster; 11. Conductive connector; 12. Shielded wire; 13. Fiber optic cable; 14. Anti-slip feet; 15. Grounding terminal. Detailed Implementation

[0050] The technical solution of the present invention will now be described in detail with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments.

[0051] like Figure 1 A multi-station synchronous accuracy testing device for through-type current transformers includes a test bench 1, a conductive copper rod 4, a pneumatic clamp 5, a data acquisition terminal 6, a data collection unit 7, a signal processing and transmission component 8, a calibrator 9, and a current booster 10.

[0052] The test bench 1 is a rectangular support structure with multiple workstations 2 evenly arranged on its top surface. Each workstation 2 is used to place the current transformer to be tested, and each current transformer has a corresponding through-hole 3. The dimensions of the workstation 2 are adapted to the shape of the current transformer under test, ensuring that the transformer is placed stably and all through-holes 3 are concentric during testing. The bottom of the test bench 1 is equipped with anti-slip feet 14 and a grounding terminal 15. The anti-slip feet 14 ensure the stability of the test bench 1, and the grounding terminal 15 grounds the entire device, preventing static electricity accumulation and leakage risks.

[0053] The conductive copper rod 4 passes through all the through holes 3, providing a unified through-hole current path for all through-hole current transformers under test. The conductive copper rod 4 is made of high-conductivity oxygen-free copper, with a current carrying capacity of up to 3000A, meeting the testing requirements under high-current conditions. Conductive connectors 11 are provided at both ends of the conductive copper rod 4. The surface of the conductive connectors 11 is silver-plated to reduce contact resistance and ensure the stability of current transmission.

[0054] The current booster 10 is used to provide a large primary current for testing to the conductive copper rod 4.

[0055] Two pneumatic clamps 5 are respectively installed at both ends of the test bench 1. Each pneumatic clamp 5 includes a fixed base mounted on the test bench 1 and a liftable clamping end mounted above the fixed base via a sliding fit. The fixed base also has a cylinder for driving the clamping end to move up and down. The clamping end is adapted to the conductive connectors 11 at both ends of the conductive copper rod 4, enabling rapid clamping and releasing of the conductive copper rod 4. Simultaneously, the pneumatic clamp 5 contains a conductive element for conductive connection between the end of the conductive copper rod 4 and the output end of the current booster 10. Specifically, the current booster 10 has two output ends, each connected to one end of a conductive element on one of the two pneumatic clamps 5. The other end of the conductive element is positioned at the mating point with the conductive copper rod 4, ensuring tight contact with the corresponding end of the conductive copper rod 4 after clamping, guaranteeing the reliability of the conductive circuit, and avoiding problems such as uneven force and cumbersome operation caused by manual clamping.

[0056] The acquisition terminal 6 corresponds one-to-one with station 2 and is used to electrically connect to the output terminal of the secondary winding of the current transformer under test to acquire the analog signal of the secondary output of the transformer.

[0057] The aggregation unit 7 is fixedly mounted on the test bench 1. All acquisition terminals 6 are electrically connected to the aggregation unit 7 via shielded cables 12, realizing the centralized aggregation of analog signals from multiple workstations 2. The shielded cables 12 can effectively suppress external electromagnetic interference, ensuring the integrity and accuracy of the acquired signals. The aggregation unit 7 has a built-in signal conditioning module, which can perform anti-aliasing filtering and amplitude conditioning on the acquired analog signals.

[0058] The signal processing and transmission component 8 is electrically connected to the aggregation unit 7 and is used to perform analog-to-digital conversion, encoding, and transmission of the multi-channel analog signals collected by the aggregation unit 7. The signal processing and transmission component 8 is connected to the calibrator 9 via optical fiber 13 and sends the encoded digital signal to the calibrator 9.

[0059] The standard signal output from the secondary side of the booster 10 is also sent directly to the calibrator 9 through a channel independent of the signal processing and transmission component 8, without participating in the aggregation of the aggregation unit 7 or the polling sampling and encoding process of the signal processing and transmission component 8.

[0060] like Figure 2 The signal processing and transmission component 8 further includes an ADC sampling unit, a synchronization pulse module, and a serial encoding module.

[0061] The ADC sampling unit employs a successive approximation (SAR) ADC. It uses an internal analog multiplexer to poll and sample the multi-channel analog signals output from the aggregation unit 7 at equal intervals, sequentially converting the analog signals of each channel into digital signals. Let the sampling time interval between two adjacent channels be... Then for the common Each channel has a total polling sampling time of [number] rounds. .

[0062] The synchronization pulse module is used to generate optical second pulses and optical B-code synchronization signals, providing a unified clock reference for the ADC sampling unit and serial encoding module. This ensures that the time relationship between the sampling time of each channel and the subsequent encoded frames remains definite and stable, avoiding uncertain additional delays introduced by encoding timing drift.

[0063] The serial encoding module is used to encode the digital signals of each channel output by the ADC sampling unit. After the ADC sampling unit completes a full round of multi-channel polling sampling, it sequentially sends the digital signals of all channels in this round into the serial encoding module, encodes them into a data frame (FT3 Manchester encoded signal) according to the IEC60870-5-1 standard, and transmits it to the calibrator 9 via fiber optic cable 13. This data frame includes a frame header, which marks the start of this round of sampling. Using FT3 Manchester encoded digital signal transmission has advantages such as strong anti-interference capability, high transmission rate, and high data reliability. It effectively avoids attenuation and interference problems during analog signal transmission, and eliminates the need for separate transmission lines for each station 2, significantly simplifying wiring complexity.

[0064] Furthermore, such as Figure 3 Each data frame is sent at equal intervals, and the time interval between the headers of two adjacent data frames is... It is a fixed value.

[0065] Within each frame, the time interval between the frame header and the sampling time of the first sampled channel. It is a fixed value. Determined by inherent delay, this can be obtained through factory calibration. The time interval between sampling times of adjacent channels within a frame is... That is, the sampling times of the sampling data of each channel are arranged at strictly equal intervals.

[0066] The above , , All values ​​are fixed and known. After receiving the data frame, the calibrator 9 can combine the frame header time with the data frame values. , The actual sampling time corresponding to each sampled data in the frame can be accurately calculated.

[0067] Specifically, after the frame header is sent, a fixed time interval is elapsed. Start sampling the first channel (Ch0), and then sample every... The sampling process sequentially samples subsequent channels (Ch1, Ch2, etc.) until all channels in the current round are sampled. After one round of sampling is completed, all sampled data is packaged into a frame and sent. The time relationship between the sampling time of each channel and the frame header time is as follows: Sampling time for each channel = frame header time + .

[0068] To further improve measurement accuracy to the 0.02 level, the ADC sampling unit can employ multi-range automatic switching technology. The quantization error of a successive approximation ADC is a fixed absolute error. With small signal inputs, the proportion of quantization error to the signal increases significantly, causing the relative measurement error to exceed the 0.02 level allowable range. By dynamically switching the range based on the input signal amplitude, the signal always operates close to the ADC's full-scale range, ensuring that the relative proportion of quantization noise meets the 0.02 level accuracy requirement across the entire measurement range.

[0069] Specifically, the signal conditioning module or ADC sampling unit in collection unit 7 can be configured with multiple gain control levels, automatically selecting the most suitable range based on the amplitude range of the current measured signal. The number of ranges and the corresponding signal amplitude range for each range can be designed based on the quantization bit depth of the actual ADC device and the error budget requiring 0.02-level accuracy.

[0070] The testing process is as follows.

[0071] Step 1: Place the current transformers to be tested on the corresponding workstations 2 of the test bench 1, so that all the through holes 3 are coaxial.

[0072] Step 2: Pass the conductive copper rod 4 through the through hole 3 of all the current transformers to be tested at all stations 2 in sequence, start the pneumatic clamp 5, and clamp and fix the conductive joints 11 at both ends of the conductive copper rod 4 to realize the closed conductive circuit of the current booster 10 and the conductive copper rod 4, and provide a unified current path for all current transformers to be tested.

[0073] Step 3: Start the current booster 10 to provide the primary current for testing to the conductive copper rod 4. The acquisition terminals 6 on each station 2 transmit the secondary output analog signal of each tested current transformer to the collection unit 7 through the shielded wire 12. The collection unit 7 centrally summarizes and conditions the multi-channel analog signals.

[0074] Step 4: The ADC sampling unit in the signal processing and transmission component 8 performs equally spaced polling sampling on the multi-channel analog signals output by the aggregation unit 7, converting the analog signals into digital signals. The channel mapping relationship and sampling order of the polling sampling are configured to satisfy the following symmetry conditions: in a complete sampling round, each tested through-hole current transformer obtains two symmetrical sampled values ​​about the same preset virtual intermediate time, or when the sampling time of a channel corresponding to a transformer is exactly equal to the preset virtual intermediate time, only one sampled value is obtained, thus eliminating the influence of polling time difference during the sampling stage. The synchronization pulse module provides a unified clock reference for sampling and encoding. The serial encoding module encodes the digital signals of each channel obtained in a complete sampling round into a data frame (FT3 Manchester encoded signal), which is then transmitted to the calibrator 9 via optical fiber 13.

[0075] The following sections describe two specific implementation methods for equal-interval polling sampling:

[0076] Implementation Method 1: Physical Dual-Channel Symmetrical Sampling

[0077] In this embodiment, if the number of current transformers is odd, the current transformer located at the center is only connected to the central channel corresponding to the preset virtual intermediate time, and the remaining current transformers are simultaneously connected to two ADC channels symmetrical about the preset virtual intermediate time; if the number of current transformers is even, each current transformer is simultaneously connected to two ADC channels symmetrical about the preset virtual intermediate time.

[0078] Taking 7 current transformers under test (numbered H0 to H6) and an ADC sampling unit with a total of 13 sampling channels (numbered Ch0 to Ch12) as an example, the physical connection relationship of the channels is as follows: the output of H0 is connected to both Ch0 and Ch12; the output of H1 is connected to both Ch1 and Ch11; the output of H2 is connected to both Ch2 and Ch10; the output of H3 is connected to both Ch3 and Ch9; the output of H4 is connected to both Ch4 and Ch8; the output of H5 is connected to both Ch5 and Ch7; and the output of H6 is connected only to Ch6.

[0079] The ADC sampling units sample sequentially in the order Ch0→Ch1→Ch2→…→Ch11→Ch12, with a sampling interval between adjacent channels of [missing information]. Let the sampling time of Ch0 be... The sampling times for each channel are as follows: Ch0 corresponds to... Ch1 corresponds to Ch2 corresponds And so on, Ch12 corresponds to .

[0080] Examine the symmetry of the sampling times for each current transformer: For H0, the sampling time of Ch0 is... The sampling time for Ch12 is The sampling times of both with respect to Ch6 Strictly symmetric. The subsequent sampling values ​​of Ch0 and Ch12 are taken as an arithmetic mean, which is clearly equivalent to the result of linear interpolation at... The value obtained by sampling H0 at time step 1. Similarly, the symmetric averaging result of H1 is aligned to... The symmetrical averaging results of H5 are also aligned to... H6 has only one sampled value, and its sampling time is... There is no need for averaging.

[0081] Using the above method, the equivalent sample values ​​of all seven tested current transformers are aligned to the same moment. This moment is the virtual intermediate moment of this round of sampling. After receiving the complete data frame, the calibrator 9 performs the above arithmetic average operation in the symmetrical averaging module inside the calibrator 9 to obtain the equivalent sampled values ​​of each tested transformer after alignment.

[0082] It should be noted that the above-mentioned 7 current transformers and 13 channels are merely examples. When the number of current transformers under test is even, there is no channel exactly located at the center position; in this case, a virtual intermediate time is used. The sampling times of the two intermediate channels fall exactly in the middle. Each pair of symmetrical sampled values ​​is symmetrical about this virtual intermediate time, and the arithmetic mean is also aligned to this virtual intermediate time. For example, for 6 current transformers under test corresponding to 12 channels (Ch0 to Ch11), the symmetrical average results of each pair of channels (Ch0 and Ch11, Ch1 and Ch10, Ch2 and Ch9, Ch3 and Ch8, Ch4 and Ch7, Ch5 and Ch6) are all aligned to the midpoint of the sampling times of Ch5 and Ch6. Therefore, the symmetrical average alignment method is applicable regardless of whether the number of current transformers under test is odd or even, and the alignment target is the virtual intermediate time rather than the sampling time of a certain actual channel.

[0083] Implementation Method 2: Round Trip Symmetric Sampling

[0084] In this embodiment, the secondary output signal of each current transformer under test is connected to only one channel of the ADC sampling unit. By controlling the ADC sampling unit to sample once in each round of sampling, each current transformer obtains two samples in the same sampling round, and these two samples are symmetrical about the virtual intermediate time.

[0085] Taking seven current transformers under test as an example, a total of seven ADC channels are used (numbered Ch0 to Ch6). Each transformer corresponds to one channel, i.e., H0 corresponds to Ch0, H1 corresponds to Ch1, ..., H6 corresponds to Ch6. The ADC sampling order is as follows:

[0086] Ch0→Ch1→Ch2→Ch3→Ch4→Ch5→Ch6→Ch5→Ch4→Ch3→Ch2→Ch1→Ch0;

[0087] That is, first sample each channel in the forward direction, and after reaching the last channel Ch6, sample in the reverse direction to return to the starting channel Ch0, maintaining the sampling interval throughout. constant.

[0088] To facilitate subsequent symmetrical averaging, the sampled values ​​from the return trip can be virtually mapped to symmetrical channel numbers: the sampled value of Ch5 in the return trip is assigned to virtual channel Ch7, the sampled value of Ch4 to virtual channel Ch8, the sampled value of Ch3 to virtual channel Ch9, the sampled value of Ch2 to virtual channel Ch10, the sampled value of Ch1 to virtual channel Ch11, and the sampled value of Ch0 to virtual channel Ch12. Thus, the round-trip sampled data is logically equivalent to the physical dual-channel sampling sequence in Implementation Method 1, i.e., 13 sampled values ​​from Ch0 to Ch12, where Ch0 and Ch12 are symmetrical about Ch6, Ch1 and Ch11 are symmetrical about Ch6, and so on. The subsequent symmetrical averaging calculation method is exactly the same as in Implementation Method 1.

[0089] The advantage of the second implementation method is that it eliminates the need for dual-channel physical wiring for each current transformer under test; only one ADC channel needs to be connected to each transformer, resulting in simpler wiring. This method is suitable for situations where channel resources are limited or the secondary output ports of the current transformers are not convenient for tapping. Both implementation methods can be flexibly selected according to the actual application scenario, but both embody the same symmetrical sampling architecture.

[0090] Meanwhile, the standard signal from the secondary side of the current booster 10 is directly sent to the calibrator 9 through an independent channel, and the calibrator 9 samples it independently. The sampling time is recorded as follows: Since the calibrator 9 has been calibrated at the factory to account for the inherent delay difference between the standard signal sampling path and the digital signal receiving path, the calibrator 9 can directly determine the effective sampling time of the standard signal. .

[0091] Step 5: After receiving the complete data frame, the calibrator 9 performs an arithmetic mean operation on the symmetrical sampled values ​​of each tested transformer in its internal symmetrical averaging module, based on the sampling time information of each channel within the frame, to obtain the result aligned to the same virtual intermediate time. The equivalent sampled value is used as the measured signal corresponding to the current transformer under test. Then, in its internal delay compensation module, the calibrator 9 calculates the fixed delay obtained from the system calibration. The system compensates for the aligned measured signal, eliminating the time difference between the standard signal sampling time and the equivalent sampling time of the measured signal. This allows for the calculation, display, recording, and storage of the ratio and angle differences for each tested current transformer. The test results can be saved as electronic documents for easy retrieval and traceability.

[0092] It should be noted that the above-mentioned arithmetic averaging of the symmetrical sampled values ​​can also be performed in the signal processing and transmission component 8. That is, the signal processing and transmission component 8 averages the two symmetrical sampled values ​​of each transformer, and then encodes and sends the averaged equivalent sampled value to the calibrator 9. In this case, the calibrator 9 does not need to perform arithmetic averaging again and can directly retrieve the aligned sampled data. Both implementation methods are within the protection scope of this invention. This embodiment uses the arithmetic averaging calculation performed in the calibrator 9 as an example for explanation.

[0093] The method for fixed delay compensation is as follows:

[0094] After symmetrical averaging and alignment, the equivalent sampling time of each tested transformer is unified as a virtual intermediate time. Sampling time of standard signal (Based on the frame header time) and There is a fixed delay between them. .Should The value is obtained through calibration before the system leaves the factory and is a known constant. The calibrator 9 utilizes this in its internal delay compensation module. Compensation is performed on the measured signal to eliminate the time difference between the sampling time of the standard signal and the equivalent sampling time of the measured signal. Specifically, one of the following two methods can be used.

[0095] Method 1: Frequency Domain Phase Compensation Method. For both the standard signal sequence and each tested signal sequence, extract continuous and equally timed intervals (intervals of...). The integer-cycle sampling sequence of the measured signal is subjected to Discrete Fourier Transform (DFT) to obtain the complex representation of each fundamental component, including amplitude and phase. For the fundamental complex component of the measured signal, a fixed delay is used... Perform phase rotation compensation, that is, subtract its phase angle. ,in The fundamental frequency is used to ensure that the equivalent sampling time of the measured signal after compensation is aligned with the standard signal. The ratio and angle difference between the compensated complex value of the measured fundamental frequency and the fundamental complex value of the standard signal are calculated directly. This method performs compensation directly in the frequency domain, with low computational load, making it suitable for scenarios with high real-time requirements.

[0096] Method 2: Time-domain interpolation resampling method. For each measured signal, an equal time interval (interval of...) is applied. Given a discrete sampling sequence, an interpolation algorithm, such as linear interpolation or spline interpolation, is used to calculate its advance relative to the original equivalent sampling time. The instantaneous values ​​at time points are used to construct a new sampling sequence that is time-aligned with the standard signal. Then, Discrete Fourier Transforms are performed on both the standard signal sequence and the interpolated and aligned sampled signal sequence, and the ratio difference and angle difference are calculated based on the transform results. This method completes the alignment in the time domain and allows for flexible selection of interpolation algorithms according to accuracy requirements, making it suitable for scenarios with high requirements for waveform detail.

[0097] The delay compensation module inside the calibrator 9 can further include a frequency domain phase compensation submodule and a time domain interpolation resampling submodule. The compensation can be performed using either method one or method two, depending on the actual accuracy requirements and computing resources.

[0098] The calibrator 9 described in this invention includes a dedicated calibrator, as well as a device with equivalent calibrating function implemented based on a host computer or other computer equipment.

[0099] Step 6: After the test is completed, turn off the current booster 10, release the pneumatic clamp 5, remove the conductive copper rod 4 and the tested current transformer, clean station 2, and wait for the next batch of tests.

[0100] It should be noted that, as will be apparent to those skilled in the art, the present invention is not limited to the details of the exemplary embodiments described above, and that the present invention can be implemented in other specific forms without departing from the spirit or essential characteristics thereof. The scope of the present invention is defined by the claims rather than the foregoing description.

Claims

1. A multi-position synchronous accuracy testing device for a through-type current transformer, comprising: The test bench (1) has multiple workstations (2) on its top surface. A conductive copper rod (4) passes through the through-hole (3) of all the current transformers to be tested. Clamps are used to clamp and fix the conductive copper rod (4); A current booster (10) is used to provide a test primary current to the conductive copper rod (4); Its characteristic is that it further includes: The acquisition terminal (6) corresponds one-to-one with the workstation (2) and is used to acquire the secondary output analog signal of each through-core current transformer under test; The signal processing and transmission component (8) is directly or indirectly electrically connected to all acquisition terminals (6), and includes an ADC sampling unit and a serial encoding module; the ADC sampling unit is used to perform equally spaced polling sampling on multi-channel analog signals; the serial encoding module is used to encode and transmit the sampled digital signals. The calibrator (9) is connected to the signal processing and transmission component (8) via optical fiber (13); The output signal of the secondary side of the current booster (10) is used as a standard signal and sent to the calibrator (9) through a signal path independent of the signal processing and transmission component (8). The channel mapping relationship and sampling order of the ADC sampling unit are configured to satisfy the following symmetry conditions: in a complete round of polling sampling, each tested through-hole current transformer obtains two symmetrical sampling values ​​about the same preset virtual intermediate time, or obtains a sampling value when the sampling time of the channel corresponding to the transformer is equal to the preset virtual intermediate time.

2. The multi-station synchronous accuracy detection device for a through-type current transformer as described in claim 1, characterized in that, The signal processing and transmission component (8) or the calibrator (9) is configured to: perform an arithmetic average on the sampled values ​​obtained by each tested transformer satisfying the symmetry condition to obtain an equivalent sampled value aligned to the preset virtual intermediate time. The calibrator (9) is configured to: compensate the aligned test signal according to the fixed delay obtained by the system calibration, and calculate the ratio difference and angle difference of each test current transformer based on eliminating the time difference between the sampling time of the standard signal and the sampling time corresponding to the equivalent sampling value.

3. The multi-station synchronous accuracy detection device for a through-type current transformer as described in claim 1, characterized in that, The symmetry condition is achieved in the following way: the secondary output signal of each tested through-hole current transformer is simultaneously connected to two different channels of the ADC sampling unit, and the two channels are symmetrical about a preset virtual intermediate time; when the number of tested transformers is odd, the transformer located at the center position is only connected to the center channel corresponding to the preset virtual intermediate time.

4. The multi-station synchronous accuracy detection device for a through-type current transformer as described in claim 1, characterized in that, The symmetry condition is achieved in the following way: the secondary output signal of each tested through-hole current transformer is connected to only one channel of the ADC sampling unit; in one round of sampling, the ADC sampling unit samples sequentially to the end channel in ascending order of channels, and then samples sequentially back to the starting channel in descending order of channels, so that each transformer obtains two samples in one round of sampling, and the two samples are symmetrical about the preset virtual intermediate time.

5. The multi-station synchronous accuracy detection device for a through-type current transformer as described in claim 1, characterized in that: The serial encoding module organizes the data obtained from each round of complete sampling into a data frame, and each data frame is sent at equal intervals with a time interval between frame headers. A fixed value; the time interval between the intraframe header and the sampling time of the first channel. A fixed value, representing the time interval between sampling times of adjacent channels within a frame. It is a fixed value; The verifier (9) verifies the received frame header time and preset time. , The actual sampling time corresponding to each sampled data within the frame is calculated.

6. The multi-station synchronous accuracy detection device for a through-type current transformer as described in claim 1, characterized in that: The signal processing transmission component (8) also includes a synchronization pulse module, which provides a unified clock reference for the ADC sampling unit and the serial encoding module.

7. A method for detecting the synchronization accuracy of a multi-position current transformer, comprising: The current transformers to be tested are placed on the workstation (2) of the test bench (1); The conductive copper rod (4) is passed through all the through holes (3) of the current transformer to be tested. Start the current booster (10) to provide the test primary current to the conductive copper rod (4); Its characteristic is that it further includes: The secondary output analog signals of each tested through-core current transformer are acquired through the acquisition terminal (6); the multi-channel analog signals are subjected to equal-interval polling sampling through the ADC sampling unit in the signal processing and transmission component (8); wherein, the channel mapping relationship and sampling order of the polling sampling make each tested through-core current transformer obtain two symmetrical sampling values ​​about the same preset virtual intermediate time in a complete round of sampling, or obtain a sampling value when the sampling time of the channel corresponding to the transformer is equal to the preset virtual intermediate time; The sampled digital signal or the result of arithmetic average calculation based on the digital signal is encoded by the serial encoding module in the signal processing and transmission component (8) and sent to the calibrator (9). The output signal of the secondary side of the booster (10) is used as a standard signal and sent to the calibrator (9) through a signal path independent of the signal processing and transmission component (8). The calibrator (9) performs an arithmetic mean on the symmetrical sampled values ​​of each tested transformer to obtain an equivalent sampled value aligned to the preset virtual intermediate time, or directly obtains the equivalent sampled value aligned to the preset virtual intermediate time based on the result calculated by the arithmetic mean. The calibrator (9) compensates for the aligned test signal based on the fixed delay obtained by the system calibration. It calculates the ratio difference and angle difference of each test current transformer based on eliminating the time difference between the sampling time of the standard signal and the sampling time corresponding to the equivalent sampling value.

8. The multi-station synchronization accuracy detection method for a through-type current transformer as described in claim 7, characterized in that, The symmetrical sampling values ​​are obtained in the following way: the secondary output signal of each tested through-hole current transformer is simultaneously connected to two different channels of the ADC sampling unit that are symmetrical about the preset virtual intermediate time; when the number of tested transformers is odd, the transformer located at the center position is only connected to the center channel corresponding to the preset virtual intermediate time.

9. The multi-station synchronization accuracy detection method for a through-type current transformer as described in claim 7, characterized in that, The symmetrical sampling values ​​are obtained in the following way: the secondary output signal of each tested through-hole current transformer is connected to only one channel of the ADC sampling unit. The ADC sampling unit samples sequentially to the end channel in ascending order of channels, and then samples sequentially back to the starting channel in descending order of channels.

10. The multi-station synchronization accuracy detection method for a through-type current transformer as described in claim 7, characterized in that, The compensation is performed using either frequency domain phase compensation or time domain interpolation resampling. The frequency domain phase compensation method includes: performing discrete Fourier transform on the standard signal sequence and the measured signal sequence respectively, extracting the fundamental complex component, and calculating the ratio difference and angle difference after rotating the fundamental phase of the measured signal according to the fixed delay. The time-domain interpolation resampling method includes: using an interpolation algorithm to calculate the instantaneous value of the measured signal sequence that is ahead of the fixed delay time relative to the original equivalent sampling time, constructing an aligned sequence, and then performing a discrete Fourier transform and calculating the ratio difference and angle difference.

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