Drive control circuit for interleaved resonant converter and energy storage power supply

Abstract

The application relates to a driving control circuit of an interleaved resonant converter and an energy storage power supply. The driving control circuit comprises a controller, a waveform conversion module and a driving module. The waveform conversion module is used for receiving a triangular wave signal and converting the triangular wave signal into a rising sawtooth wave signal and a falling sawtooth wave signal. The driving module is used for outputting a first driving signal of a first resonant converter when the received rising sawtooth wave signal is in a first preset interval, outputting a second driving signal of the first resonant converter when the received falling sawtooth wave signal is in a second preset interval, outputting a first driving signal of a second resonant converter when the received triangular wave signal is greater than or equal to a first preset voltage, and outputting a second driving signal of the second resonant converter when the triangular wave signal is less than a second preset voltage. The application can reduce the number of controllers in the energy storage product.

Description

Technical Field

[0001] This application relates to the field of power electronics technology, and in particular to a drive control circuit for an interleaved resonant converter and an energy storage power supply. Background Technology

[0002] Energy storage products typically contain resonant converters (LLCs). The switching on or off of the transistors in these resonant converters is controlled by the drive signal output from the pulse-width modulation (PWM) function pin of the controller.

[0003] In related technologies, a controller with multiple PWM function pins is often used to control the on and off of the switching transistors in the resonant converter. For example, each PWM function pin in the controller controls the on and off of the corresponding switching transistor in the resonant converter.

[0004] However, taking the example of a controller driving two resonant converters to operate with phase difference interleaving, the number of switching transistors that the controller needs to control is very large. Due to the limited number of PWM function pins in the controller, the number of PWM function pins of a single controller is often insufficient to control the switching transistors in the two resonant converters. Therefore, it is necessary to increase the number of controllers, which leads to the problem of increasing the number of controllers in energy storage products. Summary of the Invention

[0005] Based on this, this application provides a drive control circuit for an interleaved resonant converter and an energy storage power supply, which can reduce the number of controllers in energy storage products.

[0006] In a first aspect, this application provides a drive control circuit for an interleaved resonant converter. The drive control circuit includes a controller, a waveform conversion module, and a drive module. The triangular wave pin of the controller is connected to the input terminal of the waveform conversion module and the triangular wave input terminal of the drive module, respectively. The rising sawtooth wave output terminal of the waveform conversion module is connected to the rising sawtooth wave input terminal of the drive module, and the falling sawtooth wave output terminal of the waveform conversion module is connected to the falling sawtooth wave input terminal of the drive module.

[0007] The waveform conversion module is used to receive triangular wave signals and convert them into rising sawtooth wave signals and falling sawtooth wave signals.

[0008] The driving module is used to output a first driving signal of the first resonant converter when the received rising sawtooth wave signal is in a first preset range; to output a second driving signal of the first resonant converter when the received falling sawtooth wave signal is in a second preset range; to output a first driving signal of the second resonant converter when the received triangular wave signal is greater than or equal to a first preset voltage; and to output a second driving signal of the second resonant converter when the triangular wave signal is less than a second preset voltage.

[0009] Among them, the lower limit of any one of the first preset intervals and the second preset interval, the second preset voltage, the first preset voltage, and the upper limit of any one preset interval increase sequentially.

[0010] In some embodiments, the drive control circuit further includes an interleaving control module, the input terminal of which is connected to the falling sawtooth wave output terminal of the waveform conversion module, and the enable terminal of the interleaving control module is connected to the output terminal of the drive module.

[0011] The interleaving control module is used to bypass the second drive signal of the second resonant converter when the first falling sawtooth pulse is not received; and to stop bypassing the second drive signal of the second resonant converter after the first falling sawtooth pulse is received.

[0012] In some embodiments, the interleaving control module includes a charge storage unit and a bypass unit; the charge storage terminal of the charge storage unit is the input terminal of the interleaving control module, the charge storage terminal of the charge storage unit is connected to the input terminal of the bypass unit, and the enable terminal of the bypass unit is the enable terminal of the interleaving control module.

[0013] The charge storage unit is used to be in an unstored charge state and output a first voltage signal when the first falling sawtooth pulse is not received; and to maintain the charge storage state and output a second voltage signal after the first falling sawtooth pulse is received.

[0014] The bypass unit is used to bypass the second drive signal of the second resonant converter when a first voltage signal is received, and to stop bypassing the second drive signal of the second resonant converter when a second voltage signal is received.

[0015] In some embodiments, the driving module includes a first driving unit and a second driving unit; the input terminal of the first driving unit is connected to the rising sawtooth wave output terminal and the falling sawtooth wave output terminal of the waveform conversion module, respectively, and the input terminal of the second driving unit is connected to the triangular wave pin of the controller.

[0016] The first driving unit is configured to output a first driving signal of the first resonant converter when the received rising sawtooth wave signal is in a first preset interval; and to output a second driving signal of the first resonant converter when the received falling sawtooth wave signal is in a second preset interval.

[0017] The second driving unit is used to output the first driving signal of the second resonant converter when the received triangular wave signal is greater than or equal to the first preset voltage, and to output the second driving signal of the second resonant converter when the triangular wave signal is less than the second preset voltage.

[0018] In some embodiments, the first driving unit includes a first threshold generation subunit and a first comparison subunit; the signal at the input terminal of the first threshold generation subunit is a charge / discharge state signal, and the output terminal of the first threshold generation subunit is connected to the threshold input terminal of the first comparison subunit; the sawtooth wave input terminal of the first comparison subunit is respectively connected to the rising sawtooth wave output terminal and the falling sawtooth wave output terminal of the waveform conversion module.

[0019] The first threshold generation subunit is used to output the upper and lower limits of the first target interval and the upper and lower limits of the second target interval when a charge / discharge status signal is received; both the first target interval and the second target interval belong to the first preset interval and both belong to the second preset interval.

[0020] The first comparator subunit is configured to output the first primary-side drive signal of the first resonant converter when the rising sawtooth wave signal is in the first target interval; output the first secondary-side drive signal of the first resonant converter when the rising sawtooth wave signal is in the second target interval; output the second secondary-side drive signal of the first resonant converter when the falling sawtooth wave signal is in the second target interval; and output the second primary-side drive signal of the first resonant converter when the falling sawtooth wave signal is in the first target interval.

[0021] In some embodiments, the lower limit of the first target interval is the difference between the peak potential of the triangular wave signal and the upper limit of the first target interval; the lower limit of the second target interval is the difference between the peak potential of the triangular wave signal and the upper limit of the second target interval.

[0022] When the charging / discharging state signal is a discharging state signal, the lower limit of the first target interval is less than the lower limit of the second target interval, and the upper limit of the second target interval is less than the upper limit of the first target interval.

[0023] When the charging / discharging status signal is a charging status signal, the lower limit of the first target interval is greater than the lower limit of the second target interval, and the upper limit of the second target interval is greater than the upper limit of the first target interval.

[0024] In some embodiments, the second driving unit includes a second threshold generation subunit and a second comparison subunit. The signal at the input terminal of the second threshold generation subunit is a charge / discharge status signal, and the output terminal of the second threshold generation subunit is connected to the threshold input terminal of the second comparison subunit. The triangular wave input terminal of the second comparison subunit is connected to the triangular wave pin of the controller.

[0025] The second threshold generation subunit is used to output the first target voltage and the second target voltage in the first preset voltage, as well as the third target voltage and the fourth target voltage in the second preset voltage, when a charge / discharge status signal is received.

[0026] The second comparator subunit is used to output the first primary-side drive signal of the second resonant converter when the triangular wave signal is greater than or equal to the first target voltage; output the first secondary-side drive signal of the second resonant converter when the triangular wave signal is greater than or equal to the second target voltage; output the second secondary-side drive signal of the second resonant converter when the triangular wave signal is less than the third target voltage; and output the second primary-side drive signal of the second resonant converter when the triangular wave signal is less than the fourth target voltage.

[0027] In some embodiments, the absolute value of the difference between the half-peak potential of the triangular wave signal and the third target voltage is equal to the absolute value of the difference between the half-peak potential of the triangular wave signal and the second target voltage, and the absolute value of the difference between the half-peak potential of the triangular wave signal and the first target voltage is equal to the absolute value of the difference between the half-peak potential of the triangular wave signal and the fourth target voltage.

[0028] When the charge / discharge status signal is the discharge status signal, the third target voltage is less than the fourth target voltage, and the first target voltage is less than the second target voltage.

[0029] When the charge / discharge status signal is the charging status signal, the third target voltage is greater than the fourth target voltage, and the first target voltage is greater than the second target voltage.

[0030] In some embodiments, the driving module further includes a status providing unit, the input of which is connected to the level pin of the controller, and the output of which is connected to the first driving unit and the second driving unit respectively.

[0031] The status providing unit is used to convert the received level signal into a charge / discharge status signal.

[0032] Secondly, this application provides an energy storage power supply, which includes the drive control circuit of any one of the first aspects.

[0033] In the technical solution provided in this application embodiment, a triangular wave signal is output from a triangular wave pin of the controller to the waveform conversion module and the drive module respectively. The waveform conversion module converts the triangular wave signal into a rising sawtooth wave signal and a falling sawtooth wave signal. Then, the drive module uses the rising sawtooth wave signal and the falling sawtooth wave signal to generate the first drive signal and the second drive signal of the first resonant converter respectively. It uses the potential comparison result of the triangular wave signal itself to generate the first drive signal and the second drive signal of the second resonant converter. Thus, a triangular wave pin of the controller, combined with the waveform conversion module and the drive module, can provide complete drive signals for two resonant converters. It is not necessary to configure a controller with multiple PWM function pins for each resonant converter in the interleaved resonant converter, nor is it necessary to increase the number of controllers to meet the drive requirements of the interleaved resonant converter. Therefore, the drive signal of the interleaved resonant converter only requires the controller to have a single triangular wave pin. It is not necessary to increase the number of controllers to achieve the drive of the interleaved resonant converter, thus reducing the number of controllers in the energy storage product. Attached Figure Description

[0034] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the drawings used in the description of the embodiments of this application or related technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0035] Figure 1 A circuit diagram of an interleaved resonant converter provided for some embodiments;

[0036] Figure 2 A schematic diagram of the LLC control signal generation circuit provided in some embodiments;

[0037] Figure 3 A schematic diagram of the drive control circuit for the interleaved resonant converter provided in the first embodiment;

[0038] Figure 4 A schematic diagram of the circuit structure of the drive control circuit for the interleaved resonant converter provided in the second embodiment;

[0039] Figure 5 A schematic diagram of the circuit structure of the drive control circuit for the interleaved resonant converter provided in the third embodiment;

[0040] Figure 6 A schematic diagram of the circuit structure of the drive control circuit for the interleaved resonant converter provided in the fourth embodiment;

[0041] Figure 7A schematic diagram of the circuit structure of the first driving unit provided in the first embodiment;

[0042] Figure 8 A schematic diagram of the circuit structure of the first driving unit provided in the second embodiment;

[0043] Figure 9 A schematic diagram of the circuit structure of the second driving unit provided in the first embodiment;

[0044] Figure 10 A schematic diagram of the circuit structure of the second driving unit provided in the second embodiment;

[0045] Figure 11 A schematic diagram of the circuit structure of the drive control circuit for the interleaved resonant converter provided in the fifth embodiment;

[0046] Figure 12 A circuit structure diagram of a waveform conversion module provided in some embodiments;

[0047] Figure 13 A schematic diagram showing the relationship between the triangular wave signal, rising sawtooth wave signal, falling sawtooth wave signal and the drive signal of the interleaved resonant converter under the discharge state signal provided in some embodiments;

[0048] Figure 14 A schematic diagram showing the relationship between the triangular wave signal, rising sawtooth wave signal, falling sawtooth wave signal and the drive signal of the interleaved resonant converter under the charging state signal provided in some embodiments;

[0049] Figure 15 A schematic diagram of the circuit structure of an energy storage power supply provided for some embodiments. Detailed Implementation

[0050] The embodiments of the technical solution of this application will now be described in detail with reference to the accompanying drawings. These embodiments are only used to more clearly illustrate the technical solution of this application and are therefore merely examples, and should not be used to limit the scope of protection of this application.

[0051] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains; the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the application; the terms “comprising” and “having”, and any variations thereof, in the specification, claims, and foregoing description of the drawings are intended to cover non-exclusive inclusion.

[0052] In the description of the embodiments of this application, technical terms such as "first" and "second" are used only to distinguish different objects and should not be construed as indicating or implying relative importance or implicitly specifying the number, specific order, or primary and secondary relationship of the indicated technical features. In the description of the embodiments of this application, "multiple" means two or more, unless otherwise explicitly defined. In the description of the embodiments of this application, "each" means each of the multiple options, unless otherwise explicitly defined.

[0053] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0054] In the description of the embodiments in this application, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this document generally indicates that the preceding and following related objects have an "or" relationship.

[0055] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "connected" and "linked" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication between them; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication between two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0056] Figure 1 A circuit structure diagram of an interleaved resonant converter is provided for some embodiments, such as... Figure 1 As shown, the interleaved resonant converter includes a bidirectional resonant circuit 1 (LLC1) and a bidirectional resonant circuit 2 (LLC2). The primary and secondary sides of the bidirectional LLC1 are connected through a transformer T1, and the primary and secondary sides of the bidirectional LLC2 are connected through a transformer T2.

[0057] The primary side of the bidirectional LLC1 includes switching transistors M1, M2, M5, and M6; the secondary side includes switching transistors M3, M4, M7, and M8, as well as capacitor C11 and inductor LD11. Their connection relationship is as follows: Figure 1As shown; the primary side of the bidirectional LLC2 includes switching transistors M9, M10, M13, and M14; the secondary side of the bidirectional LLC2 includes switching transistors M11, M12, M15, and M16, as well as capacitor C12 and inductor LD12, and their connection relationship is as follows. Figure 1 As shown. Exemplarily, in Figure 1 In this configuration, for each switching transistor, the control terminal of the transistor is connected to the LLC control signal through a resistor, and the control terminal is also connected to one of the transistor's conducting terminals through another resistor. The corresponding resistor connections can be represented as follows: Figure 1 The resistors Z1 to Z32 are shown in the diagram, and will not be described further here.

[0058] exist Figure 1 In the embodiment shown, the switching transistor receives an LLC control signal.

[0059] Figure 2 A schematic diagram of the LLC control signal generation circuit provided in some embodiments, such as Figure 2 As shown, the LLC control signal generation circuit includes 16 optocouplers, designated OC1-OC16. These optocouplers (OC1-OC16) convert the input PWM control signal into an LLC control signal. The connections between the optocouplers and other devices are as follows: Figure 2 As shown, details will not be repeated here. Each optocoupler includes 6 pins, namely pins 1-6, which are: Anode pin, NC pin, Cathode pin, VCC pin, VO pin, and GND pin, respectively.

[0060] exist Figure 1 and Figure 2 In the embodiment shown, the primary side reference ground is GND, and the secondary side reference ground is GND1, which are optically isolated.

[0061] The bidirectional LLC with two staggered 90° phase switches contains 16 transistors. According to its operating principle, the transistors conduct at an angle: M1 and M6, M2 and M5, M3 and M8, and M4 and M7 conduct simultaneously; M9 and M14, M10 and M13, M11 and M16, and M12 and M15 also conduct simultaneously, with the latter four groups staggered by 90° from the former four groups. Thus, the controller requires eight PWM function pins to output PWM control signals to control the aforementioned 16 transistors. Figure 2PWM1-L1 and PWM1-L2 are the PWM control signals for the drivers of switching transistors M1, M2, M5 and M6; PWM1-H1 and PWM1-H2 are the PWM control signals for the drivers of switching transistors M3, M4, M7 and M8; PWM2-L1 and PWM2-L2 are the PWM control signals for the drivers of switching transistors M9, M10, M13 and M14; and PWM2-H1 and PWM2-H2 are the PWM control signals for the drivers of switching transistors M11, M12, M15 and M16.

[0062] It should be noted that, Figure 1 and Figure 2 The provided example is an interleaved resonant converter structure. In other embodiments, the interleaved resonant converter may have other structures. This application does not limit these structures. Any interleaved resonant converter that uses the drive control circuit of the interleaved resonant converter in this application should be within the protection scope of this application.

[0063] Figure 3 A schematic diagram of the drive control circuit for the interleaved resonant converter provided in the first embodiment is shown below. Figure 3 As shown, the drive control circuit includes a controller, a waveform conversion module, and a drive module. The triangular wave pin of the controller is connected to the input terminal of the waveform conversion module and the triangular wave input terminal of the drive module, respectively. The rising sawtooth wave output terminal of the waveform conversion module is connected to the rising sawtooth wave input terminal of the drive module, and the falling sawtooth wave output terminal of the waveform conversion module is connected to the falling sawtooth wave input terminal of the drive module. The waveform conversion module is used to output the drive signals for the first resonant converter and the second resonant converter.

[0064] The waveform conversion module is used to receive triangular wave signals and convert them into rising sawtooth wave signals and falling sawtooth wave signals.

[0065] The driving module is used to output a first driving signal of the first resonant converter when the received rising sawtooth wave signal is in a first preset range; to output a second driving signal of the first resonant converter when the received falling sawtooth wave signal is in a second preset range; to output a first driving signal of the second resonant converter when the received triangular wave signal is greater than or equal to a first preset voltage; and to output a second driving signal of the second resonant converter when the triangular wave signal is less than a second preset voltage.

[0066] The interleaved resonant converter includes a first resonant converter and a second resonant converter. For example, the first resonant converter can be the bidirectional LLC1 mentioned above, and the second resonant converter can be the bidirectional LLC2 mentioned above.

[0067] Among them, the lower limit of any one of the first preset intervals and the second preset interval, the second preset voltage, the first preset voltage, and the upper limit of any one preset interval increase sequentially.

[0068] A triangular wave signal refers to a waveform signal in which the signal potential rises and falls periodically with time. In the embodiments of this application, the absolute values ​​of the rising slope and the falling slope of the triangular wave signal are equal. In other embodiments, the rising slope and the falling slope of the triangular wave signal are different. In the embodiments of this application, the peak potentials of different triangular wave pulses in the triangular wave signal are the same.

[0069] A rising sawtooth wave signal refers to a waveform signal that includes only the rising segment (i.e., the potential increases linearly from low to high) of a triangular wave signal. The slope of the rising segment is the same as that of the rising segment of the triangular wave signal, and the period is the same as that of the triangular wave signal.

[0070] A falling sawtooth wave signal is a waveform signal that includes only the falling segment (i.e., the potential decreases linearly from high to low) of a triangular wave signal. The slope of the falling segment is the same as that of the falling segment of the triangular wave signal, and the period is the same as that of the triangular wave signal.

[0071] In this embodiment of the application, the upper limit of the first preset interval is the same as the upper limit of the second preset interval, and / or the lower limit of the first preset interval is the same as the lower limit of the second preset interval.

[0072] For example, the midpoint potential of the first preset interval is the half-peak potential of the triangular wave signal. The midpoint potential of the first preset interval is the average value between the upper and lower limits of the first preset interval. For example, the midpoint potential of the second preset interval is the half-peak potential of the triangular wave signal. The midpoint potential of the second preset interval is the average value between the upper and lower limits of the second preset interval. For example, the average potential between the first preset voltage and the second preset voltage is the half-peak potential of the triangular wave signal.

[0073] In this embodiment, the first driving signal of the first resonant converter includes driving signals for a first portion of the switching transistors and driving signals for a second portion of the switching transistors in the first resonant converter. Specifically, in the first resonant converter, the first portion of the switching transistors and the second portion of the switching transistors are alternately driven; for example, during the conduction period of the first portion of the switching transistors, the second portion of the switching transistors is not conducted, and during the conduction period of the second portion of the switching transistors, the first portion of the switching transistors is not conducted. Exemplarily, in the first resonant converter, the first portion of the switching transistors is the one that conducts first, and the second portion of the switching transistors is the one that conducts later.

[0074] In this embodiment, the first driving signal of the second resonant converter includes driving signals for the first portion of the switching transistors and the second portion of the switching transistors in the second resonant converter. In the second resonant converter, the first portion of the switching transistors and the second portion of the switching transistors are alternately driven switching transistors. For example, during the conduction period of the first portion of the switching transistors, the second portion of the switching transistors is not conducted, and during the conduction period of the second portion of the switching transistors, the first portion of the switching transistors is not conducted. Exemplarily, in the second resonant converter, the first portion of the switching transistors is the one that conducts first, and the second portion of the switching transistors is the one that conducts later.

[0075] In the technical solution provided in this application embodiment, a triangular wave signal is output from a triangular wave pin of the controller to the waveform conversion module and the drive module respectively. The waveform conversion module converts the triangular wave signal into a rising sawtooth wave signal and a falling sawtooth wave signal. Then, the drive module uses the rising sawtooth wave signal and the falling sawtooth wave signal to generate the first drive signal and the second drive signal of the first resonant converter respectively. It uses the potential comparison result of the triangular wave signal itself to generate the first drive signal and the second drive signal of the second resonant converter. Thus, a triangular wave pin of the controller, combined with the waveform conversion module and the drive module, can provide complete drive signals for two resonant converters. It is not necessary to configure a controller with multiple PWM function pins for each resonant converter in the interleaved resonant converter, nor is it necessary to increase the number of controllers to meet the drive requirements of the interleaved resonant converter. Therefore, the drive signal of the interleaved resonant converter only requires the controller to have a single triangular wave pin. It is not necessary to increase the number of controllers to achieve the drive of the interleaved resonant converter, thus reducing the number of controllers in the energy storage product.

[0076] In this embodiment, the rising / falling segments of the triangular wave each occupy 1 / 2 of the cycle. After being split into sawtooth waves, the first drive is generated based on the sawtooth wave, and the second drive is generated based on the complete triangular wave, forming a 1 / 4 cycle (90°) phase shift.

[0077] In this embodiment, the second drive signal of the second resonant converter will appear prematurely before the first falling sawtooth pulse, disrupting the 90° phase relationship. Therefore, a scheme to shield the second drive signal of the second resonant converter is proposed. Figure 4 A schematic diagram of the drive control circuit for the interleaved resonant converter provided in the second embodiment is shown below. Figure 4 As shown, Figure 4 Compared to the example Figure 3 The difference in the embodiment is that the drive control circuit also includes an interleaving control module. The input terminal of the interleaving control module is connected to the falling sawtooth wave output terminal of the waveform conversion module, and the enable terminal of the interleaving control module is connected to the output terminal of the drive module.

[0078] The interleaving control module is used to bypass the second drive signal of the second resonant converter when the first falling sawtooth pulse is not received; and to stop bypassing the second drive signal of the second resonant converter after the first falling sawtooth pulse is received.

[0079] In this embodiment, if the second drive signal of the second resonant converter is output when the triangular wave signal is less than the second preset voltage, the drive module will output the second drive signal of the second resonant converter before receiving the first falling sawtooth pulse (the first falling sawtooth pulse is the first pulse in the falling sawtooth wave signal). However, when the falling sawtooth wave signal is in the second preset range, the second drive signal of the first resonant converter is output, which causes the second drive signal of the second resonant converter to be output before the second drive signal of the first resonant converter, thus failing to meet the drive requirement that the second resonant converter lags behind the first resonant converter by 90 degrees.

[0080] In the technical solution provided in this application embodiment, the interleaving control module bypasses the second drive signal when it does not receive the first falling sawtooth pulse, and stops bypassing the second drive signal after receiving the first falling sawtooth pulse. This enables the second drive signal of the second resonant converter to lag behind the output of the second drive signal of the first resonant converter, satisfying the drive requirement of the second resonant converter lagging behind the first resonant converter by 90 degrees. Furthermore, before the first falling sawtooth pulse appears, the duration of the triangular wave signal being less than the second preset voltage is short. During this duration, if the second drive signal of the second resonant converter is output, the conduction time of the second part of the switching transistors in the second resonant converter will be less than the complete switching cycle of the switching transistors, causing the second part of the switching transistors to be in an unsteady conduction state, resulting in distortion of the current waveform in the resonant cavity. This application embodiment, by introducing a detection mechanism for the first falling sawtooth pulse in the interleaving control module, delays the second drive signal in time until after the first drive signal, eliminating current fluctuations caused by brief conduction, improving the overall consistency of the converter during startup, and enhancing the operational stability of the interleaved resonant converter.

[0081] Figure 5 A schematic diagram of the drive control circuit for the interleaved resonant converter provided in the third embodiment is shown below. Figure 5 As shown, Figure 5 Compared to the example Figure 4 The difference in the embodiments is that the interleaving control module includes a charge storage unit and a bypass unit; the charge storage terminal of the charge storage unit is the input terminal of the interleaving control module, the charge storage terminal of the charge storage unit is connected to the input terminal of the bypass unit, and the enable terminal of the bypass unit is the enable terminal of the interleaving control module.

[0082] The charge storage unit is used to maintain a charge-unstored state and output a first voltage signal when the first falling sawtooth pulse is not received; and to maintain the charge storage state and output a second voltage signal after the first falling sawtooth pulse is received. The bypass unit is used to bypass the second drive signal of the second resonant converter when the first voltage signal is received; and to stop bypassing the second drive signal of the second resonant converter when the second voltage signal is received.

[0083] For example, the charge storage unit includes a resistor R1 and a capacitor C1. The first terminal of the capacitor C1 is the charge storage terminal of the charge storage unit, and the second terminal of the capacitor C1 is grounded. The first terminal of the resistor R1 is connected to the first terminal of the capacitor C1, and the second terminal of the resistor R1 is grounded. For example, the charge storage terminal of the charge storage unit is also connected to the cathode of the diode D1. The anode of the diode D1 is connected to the first terminal of the resistor R2, and the second terminal of the resistor R2 is connected to the falling sawtooth wave output terminal of the waveform conversion module.

[0084] For example, the bypass unit includes a switch Q1, a resistor R3, a transistor Q2, and a transistor Q3. The control terminal of the switch Q1 is the input terminal of the bypass unit. The first conducting terminal of the switch Q1 is connected to a preset voltage source through the resistor R3. The preset voltage source provides a voltage VCC. The first conducting terminal of the switch Q1 is also connected to the bases of transistors Q2 and Q3, respectively. The second conducting terminal of the switch Q1 is grounded. The collector of transistor Q2 is connected to the output terminal of the drive module, and the collector of transistor Q3 is also connected to the output terminal of the drive module. The emitters of transistors Q2 and Q3 are both grounded.

[0085] In some embodiments, the output terminals of the drive module include four output terminals, which respectively output the first drive signal of the first resonant converter, the second drive signal of the first resonant converter, the first drive signal of the second resonant converter, and the second drive signal of the second resonant converter. Each of the four output terminals includes two sub-output terminals, which respectively output the drive signal of the primary-side switch and the drive signal of the secondary-side switch. The signals output by the drive module are PWM1-L1, PWM1-H1, PWM1-L2, PWM1-H2, PWM2-L1, PWM2-H1, PWM2-L2, and PWM2-H2 signals.

[0086] In this embodiment, the PWM1-L1 signal is the drive signal for the primary-side switch in the first drive signal of the first resonant converter, the PWM1-H1 signal is the drive signal for the secondary-side switch in the first drive signal of the first resonant converter, the PWM1-L2 signal is the drive signal for the primary-side switch in the second drive signal of the first resonant converter, and the PWM1-H2 signal is the drive signal for the secondary-side switch in the second drive signal of the first resonant converter. Similarly, the PWM2-L1 signal is the drive signal for the primary-side switch in the first drive signal of the second resonant converter, the PWM2-H1 signal is the drive signal for the secondary-side switch in the first drive signal of the second resonant converter, the PWM2-L2 signal is the drive signal for the primary-side switch in the second drive signal of the second resonant converter, and the PWM2-H2 signal is the drive signal for the secondary-side switch in the second drive signal of the second resonant converter.

[0087] For example, the collector of transistor Q2 is connected to the first sub-output terminal of the fourth output terminal, which is used to output the drive signal of the primary-side switch in the second drive signal of the second resonant converter. The collector of transistor Q3 is connected to the second sub-output terminal of the fourth output terminal, which is used to output the drive signal of the secondary-side switch in the second drive signal of the second resonant converter.

[0088] The following is for reference Figure 5 Explain the working principle of the interleaved control module:

[0089] When capacitor C1 does not receive the first falling sawtooth pulse in the falling sawtooth wave signal, capacitor C1 does not charge, and the level at the first terminal of capacitor C1 is low. Switch Q1 is cut off, and voltage VCC is connected to the base of transistors Q2 and Q3 through resistor R3, so that the base of transistors Q2 and Q3 is high. Transistors Q2 and Q3 are turned on, so that the PWM2-L2 signal (i.e., the drive signal of the primary-side switch in the second drive signal of the second resonant converter) and the PWM2-H2 signal (i.e., the drive signal of the secondary-side switch in the second drive signal of the second resonant converter) are pulled low. Thus, when the first falling sawtooth pulse in the falling sawtooth wave signal is not received, the PWM2-L2 signal and the PWM2-H2 signal are bypassed. After receiving the falling sawtooth wave signal, capacitor C1 charges. When the voltage at the first terminal of capacitor C1 reaches the conduction threshold of switch Q1, switch Q1 turns on, pulling the bases of transistors Q2 and Q3 low, and transistors Q2 and Q3 turn off. Due to the presence of diode D1, capacitor C1 discharges through resistor R1. Each falling sawtooth pulse of the falling sawtooth wave signal charges capacitor C1, keeping switch Q1 on and transistors Q2 and Q3 off. Thus, for the period after receiving the first falling sawtooth pulse in the falling sawtooth wave signal, the drive control circuit can output PWM2-L2 and PWM2-H2 signals normally. Only when the controller stops outputting the triangular wave signal (the bidirectional LLC circuit stops working) does the drive control circuit not generate a falling sawtooth wave signal. Capacitor C1 discharges through resistor R1. When the voltage of capacitor C1 drops below the conduction threshold of switch Q1, switch Q1 is turned off. This enables the drive control circuit to stop working. When the interleaved resonant converter starts up again, the drive signals output by the drive control circuit will drive the interleaved resonant converter to work in an interleaved 90° manner.

[0090] In the technical solution provided in this application embodiment, a first voltage signal is output when the first falling sawtooth pulse is not received, causing the bypass unit to bypass the second drive signal. After receiving the first falling sawtooth pulse, the charge storage unit switches to the charge storage state and outputs the second voltage signal. The bypass unit correspondingly stops bypassing, and the second drive signal can be transmitted normally to the second resonant converter. The second resonant converter then enters the working state and begins to output power. Through this timing control method of charge storage state switching and bypass release, the interleaving control module can automatically identify the stage transition of the startup process by means of the voltage signal change of the charge storage unit, so that the startup time of the second resonant converter is automatically aligned with the occurrence time of the first falling sawtooth pulse. This method is beneficial to achieve natural interleaving and superposition of the output currents of the two resonant converters, reduce output current ripple, and at the same time reduce the switching stress of the power switch during the startup process, thereby improving the electrical stability of the entire power supply system during the startup transition phase.

[0091] Figure 6 A schematic diagram of the drive control circuit for the interleaved resonant converter provided in the fourth embodiment is shown below. Figure 6 As shown, Figure 6 Compared to the example Figure 3 The difference in the embodiments is that the driving module includes a first driving unit and a second driving unit; the input terminal of the first driving unit is connected to the rising sawtooth wave output terminal and the falling sawtooth wave output terminal of the waveform conversion module, respectively, and the input terminal of the second driving unit is connected to the triangular wave pin of the controller.

[0092] The first driving unit is configured to output a first driving signal of the first resonant converter when the received rising sawtooth wave signal is in a first preset interval; and to output a second driving signal of the first resonant converter when the received falling sawtooth wave signal is in a second preset interval.

[0093] The second driving unit is used to output the first driving signal of the second resonant converter when the received triangular wave signal is greater than or equal to the first preset voltage, and to output the second driving signal of the second resonant converter when the triangular wave signal is less than the second preset voltage.

[0094] The first driving unit is used to output the driving signal of the first resonant converter, and the second driving unit is used to output the driving signal of the second resonant converter.

[0095] The following description of the structure of the first and second driving units uses Vref1-8, which are explained below: Vref1 represents the lower limit of the first target interval, Vref2 represents the lower limit of the second target interval, Vref3 represents the third target voltage in the second preset voltage, Vref4 represents the fourth target voltage in the second preset voltage, Vref5 represents the first target voltage in the first preset voltage, Vref6 represents the second target voltage in the first preset voltage, Vref7 represents the upper limit of the second target interval, and Vref8 represents the upper limit of the second target interval. The first target interval belongs to both the first and second preset intervals, and the second target interval belongs to both the first and second preset intervals.

[0096] Figure 7 A schematic diagram of the circuit structure of the first driving unit provided in the first embodiment is shown below. Figure 7 As shown, the first driving unit includes a first threshold generation subunit and a first comparison subunit; the signal at the input terminal of the first threshold generation subunit is a charge / discharge state signal, and the output terminal of the first threshold generation subunit is connected to the threshold input terminal of the first comparison subunit; the sawtooth wave input terminal of the first comparison subunit is respectively connected to the rising sawtooth wave output terminal and the falling sawtooth wave output terminal of the waveform conversion module.

[0097] The first threshold generation subunit is used to output the upper and lower limits of the first target interval and the upper and lower limits of the second target interval when a charge / discharge status signal is received; both the first target interval and the second target interval belong to the first preset interval and both belong to the second preset interval.

[0098] The first comparator subunit is configured to output the first primary-side drive signal of the first resonant converter when the rising sawtooth wave signal is in the first target interval; output the first secondary-side drive signal of the first resonant converter when the rising sawtooth wave signal is in the second target interval; output the second secondary-side drive signal of the first resonant converter when the falling sawtooth wave signal is in the second target interval; and output the second primary-side drive signal of the first resonant converter when the falling sawtooth wave signal is in the first target interval.

[0099] Figure 8 A schematic diagram of the circuit structure of the first driving unit provided in the second embodiment is shown below. Figure 8 As shown, the first threshold generation subunit includes Vref1, Vref2, Vref7 and Vref8 threshold generation subunits respectively.

[0100] The charge / discharge status signals in this embodiment include EN1 and EN2 signals. The rising sawtooth wave signal in this embodiment is represented by SW1, and the falling sawtooth wave signal is represented by SW2.

[0101] The Vref1 threshold generation subunit includes a switch Q4 and resistors R4, R5, and R6. The control signal for switch Q4 is EN2. The first conducting terminal of switch Q4 is connected to the first terminal of resistor R4, and the second conducting terminal of switch Q4 is grounded. The second terminal of resistor R4 is connected to the first terminal of resistor R5, and the second terminal of resistor R5 is connected to a preset voltage source (providing voltage VCC). The second terminal of resistor R4 is also connected to the first terminal of resistor R6, and the second terminal of resistor R6 is grounded. The voltage of Vref1 can dynamically change according to the level of the EN2 signal (high or low). When the EN2 signal is high, switch Q4 is on, and the potential value of Vref1 is the result of the voltage divider formed by resistors R4 and R6 in parallel and resistor R5 across VCC. When the EN2 signal is low, switch Q4 is off, and the potential value of Vref1 is the result of the voltage divider formed by resistors R6 and R5 across VCC.

[0102] The Vref2 threshold generation subunit includes a switch Q5 and resistors R7, R8, and R9. The control signal for switch Q5 is EN1. The first conducting terminal of switch Q5 is connected to the first terminal of resistor R7, and the second conducting terminal of switch Q5 is grounded. The second terminal of resistor R7 is connected to the first terminal of resistor R8, and the second terminal of resistor R8 is connected to a preset voltage source (providing voltage VCC). The second terminal of resistor R7 is also connected to the first terminal of resistor R9, and the second terminal of resistor R9 is grounded. The voltage of Vref2 can dynamically change according to the level of the EN1 signal (high or low). When the EN1 signal is high, switch Q5 is on, and the potential value of Vref2 is the result of the voltage divider formed by resistors R7 and R9 in parallel and resistor R8 across VCC. When the EN1 signal is low, switch Q5 is off, and the potential value of Vref2 is the result of the voltage divider formed by resistors R9 and R8 across VCC.

[0103] The Vref7 threshold generation subunit includes a switch Q6 and resistors R10, R11, and R12. The control signal for switch Q6 is EN2. The first conducting terminal of switch Q6 is connected to the first terminal of resistor R10, and the second conducting terminal of switch Q6 is grounded. The second terminal of resistor R10 is connected to the first terminal of resistor R11, and the second terminal of resistor R11 is connected to a preset voltage source (providing voltage VCC). The second terminal of resistor R10 is also connected to the first terminal of resistor R12, and the second terminal of resistor R12 is grounded. The voltage of Vref7 can dynamically change according to the level of the EN2 signal (high or low). When the EN2 signal is high, switch Q6 is on, and the potential value of Vref7 is the result of the voltage divider formed by resistors R10 and R12 in parallel and resistor R11 across VCC. When the EN2 signal is low, switch Q6 is off, and the potential value of Vref7 is the result of the voltage divider formed by resistors R12 and R11 across VCC.

[0104] The Vref8 threshold generation subunit includes a switch Q7 and resistors R13, R14, and R15. The control signal for switch Q7 is EN1. The first conducting terminal of switch Q7 is connected to the first terminal of resistor R13, and the second conducting terminal of switch Q7 is grounded. The second terminal of resistor R13 is connected to the first terminal of resistor R14, and the second terminal of resistor R14 is connected to a preset voltage source (providing voltage VCC). The second terminal of resistor R13 is also connected to the first terminal of resistor R15, and the second terminal of resistor R15 is grounded. The voltage of Vref8 can dynamically change according to the level of the EN1 signal (high or low). When the EN1 signal is high, switch Q7 is on, and the potential value of Vref8 is the result of the voltage divider formed by the parallel connection of resistors R13 and R15 and resistor R14 across VCC. When the EN1 signal is low, switch Q7 is off, and the potential value of Vref8 is the result of the voltage divider formed by resistors R15 and R14 across VCC.

[0105] The first comparison subunit includes a PWM1-L1 signal generation unit, a PWM1-H1 signal generation unit, a PWM1-L2 signal generation unit, and a PWM1-H2 signal generation unit. Specifically, the PWM1-L1 signal is the drive signal for the primary-side switch in the first drive signal of the first resonant converter; the PWM1-H1 signal is the drive signal for the secondary-side switch in the first drive signal of the first resonant converter; the PWM1-L2 signal is the drive signal for the primary-side switch in the second drive signal of the first resonant converter; and the PWM1-H2 signal is the drive signal for the secondary-side switch in the second drive signal of the first resonant converter.

[0106] The PWM1-L1 signal generation unit includes resistors R16, R17, and R18, comparator U1, comparator U2, diode D2, and diode D3. The signal at the first terminal of resistor R16 is the SW1 signal. The second terminal of resistor R16 is connected to the inverting input of comparator U1, and the signal at the non-inverting input of comparator U1 is Vref8. The signal at the first terminal of resistor R17 is the SW1 signal. The second terminal of resistor R17 is connected to the non-inverting input of comparator U2, and the signal at the inverting input of comparator U2 is Vref1. The output of comparator U1 is connected to the cathode of diode D2, and the signal at the anode of diode D2 is the PWM1-L1 signal. The output of comparator U2 is connected to the cathode of diode D3, and the anode of diode D3 is connected to the anode of diode D2. The anode of transistor D2 is also connected to a preset voltage source (providing voltage VCC) through resistor R18. When the SW1 signal is in the first target interval between Vref1 and Vref8, comparators U1 and U2 both output high-level signals to make the PWM1-L1 signal a high-level signal. When the SW1 signal is outside the first target interval between Vref1 and Vref8, at least one of comparators U1 and U2 outputs a low level to make the PWM1-L1 signal a low-level signal. Thus, the PWM1-L1 signal forms the drive signal of the primary-side switching transistor in the first drive signal of the first resonant converter.

[0107] The PWM1-H1 signal generation unit includes resistors R19, R20, and R21, comparator U3, comparator U4, diode D4, and diode D5. The signal at the first terminal of resistor R19 is the SW1 signal. The second terminal of resistor R19 is connected to the inverting input of comparator U3, and the signal at the non-inverting input of comparator U3 is Vref7. The signal at the first terminal of resistor R20 is the SW1 signal. The second terminal of resistor R20 is connected to the non-inverting input of comparator U4, and the signal at the inverting input of comparator U4 is Vref2. The output of comparator U3 is connected to the cathode of diode D4, and the signal at the anode of diode D4 is the PWM1-H1 signal. The output of comparator U4 is connected to the cathode of diode D5, and the anode of diode D5 is connected to the anode of diode D4. The anode of transistor D4 is also connected to a preset voltage source (providing voltage VCC) through resistor R21. When the SW1 signal is in the first target interval between Vref2 and Vref7, comparators U3 and U4 both output high-level signals to make the PWM1-H1 signal a high-level signal. When the SW1 signal is outside the first target interval between Vref2 and Vref7, at least one of comparators U3 and U4 outputs a low level to make the PWM1-H1 signal a low-level signal. Thus, the PWM1-H1 signal forms the drive signal for the secondary-side switching transistor in the first drive signal of the first resonant converter.

[0108] The PWM1-L2 signal generation unit includes resistors R22, R23, and R24, comparator U5, comparator U6, diode D6, and diode D7. The signal at the first terminal of resistor R22 is the SW2 signal. The second terminal of resistor R22 is connected to the inverting input of comparator U5, and the signal at the non-inverting input of comparator U5 is Vref8. The signal at the first terminal of resistor R23 is the SW2 signal. The second terminal of resistor R23 is connected to the non-inverting input of comparator U6, and the signal at the inverting input of comparator U6 is Vref1. The output of comparator U5 is connected to the cathode of diode D6, and the signal at the anode of diode D6 is the PWM1-L2 signal. The output of comparator U6 is connected to the cathode of diode D7, and the anode of diode D7 is connected to the anode of diode D6. The anode of transistor D6 is also connected to a preset voltage source (providing voltage VCC) through resistor R24. When the SW2 signal is in the first target interval between Vref1 and Vref8, comparators U5 and U6 both output high-level signals to make the PWM1-L2 signal a high-level signal. When the SW2 signal is outside the first target interval between Vref1 and Vref8, at least one of comparators U5 and U6 outputs a low level to make the PWM1-L2 signal a low-level signal. Thus, the PWM1-L2 signal forms the drive signal for the primary-side switching transistor in the second drive signal of the first resonant converter.

[0109] The PWM1-H2 signal generation unit includes resistors R25, R26, and R27, comparator U7, comparator U8, diode D8, and diode D9. The signal at the first terminal of resistor R25 is the SW2 signal. The second terminal of resistor R25 is connected to the inverting input of comparator U7, and the signal at the non-inverting input of comparator U7 is Vref7. The signal at the first terminal of resistor R26 is the SW2 signal. The second terminal of resistor R26 is connected to the non-inverting input of comparator U8, and the signal at the inverting input of comparator U8 is Vref2. The output of comparator U7 is connected to the cathode of diode D8, and the signal at the anode of diode D8 is the PWM1-H2 signal. The output of comparator U8 is connected to the cathode of diode D9, and the anode of diode D9 is connected to the anode of diode D8. The anode of transistor D8 is also connected to a preset voltage source (providing voltage VCC) through resistor R27. When the SW2 signal is in the first target interval between Vref2 and Vref7, comparators U7 and U8 both output high-level signals to make the PWM1-H2 signal a high-level signal. When the SW2 signal is outside the first target interval between Vref2 and Vref7, at least one of the comparators U7 and U8 outputs a low level to make the PWM1-H2 signal a low-level signal. Thus, the PWM1-H2 signal forms the drive signal for the secondary-side switching transistor in the second drive signal of the first resonant converter.

[0110] In some embodiments, the lower limit of the first target interval is the difference between the peak potential of the triangular wave signal and the upper limit of the first target interval; the lower limit of the second target interval is the difference between the peak potential of the triangular wave signal and the upper limit of the second target interval.

[0111] In some embodiments, when the charge / discharge state signal is a discharge state signal, the lower limit of the first target interval is less than the lower limit of the second target interval, and the upper limit of the second target interval is less than the upper limit of the first target interval.

[0112] In some embodiments, when the charge / discharge state signal is a charging state signal, the lower limit of the first target interval is greater than the lower limit of the second target interval, and the upper limit of the second target interval is greater than the upper limit of the first target interval.

[0113] In this embodiment, the EN1 signal in the discharge state signal is a low-level signal, and the EN2 signal is a high-level signal. The EN1 signal in the charging state signal is a high-level signal, and the EN2 signal is a low-level signal.

[0114] Figure 9 A schematic diagram of the circuit structure of the second driving unit provided in the first embodiment is shown below. Figure 9As shown, the second driving unit includes a second threshold generation subunit and a second comparison subunit. The signal at the input terminal of the second threshold generation subunit is a charge / discharge status signal, and the output terminal of the second threshold generation subunit is connected to the threshold input terminal of the second comparison subunit. The triangular wave input terminal of the second comparison subunit is connected to the triangular wave pin of the controller.

[0115] The second threshold generation subunit is used to output the first target voltage and the second target voltage in the first preset voltage, as well as the third target voltage and the fourth target voltage in the second preset voltage, when a charge / discharge status signal is received.

[0116] The second comparator subunit is used to output the first primary-side drive signal of the second resonant converter when the triangular wave signal is greater than or equal to the first target voltage; output the first secondary-side drive signal of the second resonant converter when the triangular wave signal is greater than or equal to the second target voltage; output the second secondary-side drive signal of the second resonant converter when the triangular wave signal is less than the third target voltage; and output the second primary-side drive signal of the second resonant converter when the triangular wave signal is less than the fourth target voltage.

[0117] Figure 10 A schematic diagram of the circuit structure of the second driving unit provided in the second embodiment is shown below. Figure 10 As shown, the second threshold generation subunit includes threshold generation subunits Vref3, Vref4, Vref5, and Vref6, respectively. Vref3, Vref4, Vref5, and Vref6 represent the third target voltage, the fourth target voltage, the first target voltage, and the second target voltage, respectively.

[0118] The Vref3 threshold generation subunit includes a switch Q8, resistors R28, R29, and R30. The control signal of switch Q8 is EN2. The first conducting terminal of switch Q8 is connected to the first terminal of resistor R28, and the second conducting terminal of switch Q8 is grounded. The second terminal of resistor R28 is connected to the first terminal of resistor R29, and the second terminal of resistor R29 is connected to a preset voltage source (providing voltage VCC). The second terminal of resistor R28 is also connected to the first terminal of resistor R30, and the second terminal of resistor R30 is grounded. The voltage of Vref3 can dynamically change according to the level of the EN2 signal (high or low). When the EN2 signal is high, switch Q8 is turned on, and the potential value of Vref3 is the result of the voltage divider between resistors R28 and R30 (connected in parallel) and resistor R29 on VCC. When the EN2 signal is low, switch Q8 is turned off, and the potential value of Vref3 is the result of the voltage divider between resistors R30 and R29 on VCC.

[0119] The Vref4 threshold generation subunit includes a switch Q9, resistors R31, R32, and R33. The control signal of switch Q9 is EN1. The first conducting terminal of switch Q9 is connected to the first terminal of resistor R31, and the second conducting terminal of switch Q9 is grounded. The second terminal of resistor R31 is connected to the first terminal of resistor R32, and the second terminal of resistor R32 is connected to a preset voltage source (providing voltage VCC). The second terminal of resistor R31 is also connected to the first terminal of resistor R33, and the second terminal of resistor R33 is grounded. The voltage of Vref4 can dynamically change according to the level of the EN1 signal (high or low). When the EN1 signal is high, switch Q9 is on, and the potential value of Vref4 is the result of the voltage divider between resistors R31 and R33 (connected in parallel) and resistor R32 on VCC. When the EN1 signal is low, switch Q9 is off, and the potential value of Vref4 is the result of the voltage divider between resistors R33 and R32 on VCC.

[0120] The Vref5 threshold generation subunit includes a switch Q10, resistors R34, R35, and R36. The control signal of switch Q10 is EN2. The first conducting terminal of switch Q10 is connected to the first terminal of resistor R34, and the second conducting terminal of switch Q10 is grounded. The second terminal of resistor R34 is connected to the first terminal of resistor R35, and the second terminal of resistor R35 is connected to a preset voltage source (providing voltage VCC). The second terminal of resistor R34 is also connected to the first terminal of resistor R36, and the second terminal of resistor R36 is grounded. The voltage of Vref5 can dynamically change according to the level of the EN2 signal (high or low). When the EN2 signal is high, switch Q10 is turned on, and the potential value of Vref5 is the result of the voltage divider between resistors R34 and R36 (connected in parallel) and resistor R35 on VCC. When the EN2 signal is low, switch Q10 is turned off, and the potential value of Vref5 is the result of the voltage divider between resistors R36 and R35 on VCC.

[0121] The Vref6 threshold generation subunit includes a switch Q11, resistors R37, R38, and R39. The control signal of switch Q11 is EN1. The first conducting terminal of switch Q11 is connected to the first terminal of resistor R37, and the second conducting terminal of switch Q11 is grounded. The second terminal of resistor R37 is connected to the first terminal of resistor R38, and the second terminal of resistor R38 is connected to a preset voltage source (providing voltage VCC). The second terminal of resistor R37 is also connected to the first terminal of resistor R39, and the second terminal of resistor R39 is grounded. The voltage of Vref6 can dynamically change according to the level of the EN1 signal (high or low). When the EN1 signal is high, switch Q11 is turned on, and the potential value of Vref6 is the result of the voltage divider between resistors R37 and R39 (connected in parallel) and resistor R38 on VCC. When the EN1 signal is low, switch Q11 is turned off, and the potential value of Vref6 is the result of the voltage divider between resistors R39 and R38 on VCC.

[0122] The second comparison subunit includes a PWM2-L1 signal generation unit, a PWM2-H1 signal generation unit, a PWM2-L2 signal generation unit, and a PWM2-H2 signal generation unit. Specifically, the PWM2-L1 signal is the drive signal for the primary-side switch in the first drive signal of the second resonant converter; the PWM2-H1 signal is the drive signal for the secondary-side switch in the first drive signal of the second resonant converter; the PWM2-L2 signal is the drive signal for the primary-side switch in the second drive signal of the second resonant converter; and the PWM2-H2 signal is the drive signal for the secondary-side switch in the second drive signal of the second resonant converter.

[0123] The PWM2-H2 signal generation unit includes resistors R40 and R41 and comparator U9. The signal at the first terminal of resistor R40 is the PWM-TRI signal (i.e., a triangular wave signal). The second terminal of resistor R40 is connected to the inverting input of comparator U9, and the voltage at the non-inverting input of comparator U9 is Vref3. The output of comparator U9 is also connected to a preset voltage source (providing voltage VCC) through resistor R41. The output signal of comparator U9 is PWM2-H2. Thus, when the PWM-TRI signal is less than Vref3, a high-level signal is output; when the PWM-TRI signal is greater than or equal to Vref3, a low-level signal is output. Therefore, the output PWM2-H2 forms the drive signal for the secondary-side switching transistor in the second drive signal of the second resonant converter.

[0124] The PWM2-L2 signal generation unit includes resistors R42 and R43 and comparator U10. The signal at the first terminal of resistor R42 is the PWM-TRI signal (i.e., a triangular wave signal). The second terminal of resistor R42 is connected to the inverting input of comparator U10. The voltage at the non-inverting input of comparator U10 is Vref4. The output of comparator U10 is also connected to a preset voltage source (providing voltage VCC) through resistor R43. The output signal of comparator U10 is the PWM2-L2 signal. Thus, when the PWM-TRI signal is less than Vref4, a high-level signal is output; when the PWM-TRI signal is greater than or equal to Vref4, a low-level signal is output. The output PWM2-L2 signal forms the drive signal for the primary-side switching transistor in the second drive signal of the second resonant converter.

[0125] The PWM2-L1 signal generation unit includes resistors R44 and R45 and comparator U11. The signal at the first terminal of resistor R44 is the PWM-TRI signal (i.e., a triangular wave signal). The second terminal of resistor R44 is connected to the inverting input of comparator U11. The voltage at the non-inverting input of comparator U11 is Vref5. The output of comparator U11 is also connected to a preset voltage source (providing voltage VCC) through resistor R45. The output signal of comparator U11 is PWM2-L1. Thus, when the PWM-TRI signal is less than Vref5, a low-level signal is output; when the PWM-TRI signal is greater than or equal to Vref5, a high-level signal is output. Therefore, the output PWM2-L1 forms the drive signal for the primary-side switching transistor in the first drive signal of the second resonant converter.

[0126] The PWM2-H1 signal generation unit includes resistors R46 and R47 and comparator U12. The signal at the first terminal of resistor R46 is the PWM-TRI signal (i.e., a triangular wave signal). The second terminal of resistor R46 is connected to the inverting input of comparator U12. The voltage at the non-inverting input of comparator U12 is Vref6. The output of comparator U12 is also connected to a preset voltage source (providing voltage VCC) through resistor R47. The output signal of comparator U12 is PWM2-H1. Thus, when the PWM-TRI signal is less than Vref6, a high-level signal is output; when the PWM-TRI signal is greater than or equal to Vref6, a low-level signal is output. Therefore, the output PWM2-H1 forms the drive signal for the secondary-side switching transistor in the first drive signal of the second resonant converter.

[0127] In some embodiments, the absolute value of the difference between the half-peak potential of the triangular wave signal and the third target voltage is equal to the absolute value of the difference between the half-peak potential of the triangular wave signal and the second target voltage, and the absolute value of the difference between the half-peak potential of the triangular wave signal and the first target voltage is equal to the absolute value of the difference between the half-peak potential of the triangular wave signal and the fourth target voltage.

[0128] In some embodiments, when the charge / discharge state signal is a discharge state signal, the third target voltage is less than the fourth target voltage, and the first target voltage is less than the second target voltage.

[0129] In some embodiments, when the charge / discharge state signal is a charging state signal, the third target voltage is greater than the fourth target voltage, and the first target voltage is greater than the second target voltage.

[0130] In this embodiment, during the discharge process, the reference voltage Vref1 is less than Vref2, reference voltage Vref3 is less than Vref4, reference voltage Vref5 is less than Vref6, and reference voltage Vref7 is less than Vref8. Furthermore, the following conditions must be met: |Vmf-Vref3|=|Vmf-Vref6|=Vmax-Vref7=Vref2; |Vmf-Vref4|=|Vmf-Vref5|=Vmax-Vref8=Vref1. Here, Vmax represents the peak potential of the triangular wave signal PWM-TRI; Vmf represents half of the peak potential of the triangular wave signal PWM-TRI (i.e., half-peak potential). The voltage difference between Vref1 and Vref2, the voltage difference between Vref3 and Vref4, the voltage difference between Vref5 and Vref6, and the voltage difference between Vref7 and Vref8 must satisfy the condition that, under discharge conditions, the duty cycle of the PWM control signal of the low-voltage side switch is greater than the duty cycle of the PWM control signal of the high-voltage side switch. In this embodiment, the low-voltage side is the primary side, and the high-voltage side is the secondary side.

[0131] In this embodiment, during the charging process, the reference voltage Vref1 is greater than Vref2, the reference voltage Vref3 is greater than Vref4, the reference voltage Vref5 is greater than Vref6, and the reference voltage Vref7 is greater than Vref8, and the following conditions must be met: |Vmf-Vref3|=|Vmf-Vref6|=Vmax-Vref7=Vref2; |Vmf-Vref4|=|Vmf-Vref5|=Vmax-Vref8=Vref1. Here, Vmax represents the peak potential of the triangular wave signal PWM-TRI; Vmf represents half of the peak potential of the triangular wave signal PWM-TRI (i.e., half-peak potential). The voltage difference between Vref1 and Vref2, the voltage difference between Vref3 and Vref4, the voltage difference between Vref5 and Vref6, and the voltage difference between Vref7 and Vref8 must satisfy the condition that, during charging, the duty cycle of the PWM control signal of the low-voltage side switch is less than the duty cycle of the PWM control signal of the high-voltage side switch.

[0132] Figure 11 A schematic diagram of the drive control circuit for the interleaved resonant converter provided in the fifth embodiment is shown below. Figure 11 As shown, Figure 11 Compared to the example Figure 6 The difference in the embodiments is that the driving module further includes a status providing unit, the input terminal of which is connected to the level pin of the controller, and the output terminal of which is connected to the first driving unit and the second driving unit respectively; the status providing unit is used to convert the received level signal into a charge / discharge status signal.

[0133] The status providing unit includes transistors Q12 and Q13, resistors R48, R49, and R50. The first terminal of resistor R48 is the input terminal of the status providing unit, and the signal at the first terminal of resistor R48 is the EN signal output from the controller's level pin. The second terminal of resistor R48 is connected to the base of transistor Q12. The collector of transistor Q12 is connected to a preset voltage source (providing voltage VCC) through resistor R49. The emitter of transistor Q12 is grounded, and the signal output from the collector of transistor Q12 is the EN2 signal. The collector of transistor Q12 is also connected to the base of transistor Q13. The collector of transistor Q13 is connected to a preset voltage source (providing voltage VCC) through resistor R50. The emitter of transistor Q13 is grounded, and the signal output from the collector of transistor Q13 is the EN1 signal. The output terminals of the status providing unit include the collectors of transistors Q12 and Q13. The collectors of transistors Q12 and Q13 are both connected to the first driving unit, and the collectors of transistors Q12 and Q13 are both connected to the second driving unit.

[0134] When the charging / discharging status signal is in the discharging state, the EN signal is low, transistor Q12 is off, and the VCC voltage flows through resistor R49 to the base of transistor Q13, meaning the EN2 signal is high. Transistor Q13 is on, and the EN1 signal is pulled low, resulting in a low-level output. When the charging / discharging status signal is in the charging state, the EN signal outputs a high level, transistor Q12 is on, and the base of transistor Q13 is pulled low, meaning the EN2 signal is low. Transistor Q13 is off, therefore the EN1 signal is high.

[0135] Figure 12 A circuit structure diagram of a waveform conversion module provided in some embodiments, such as... Figure 12 As shown, the waveform conversion module includes a waveform detection unit and a waveform output unit. The input terminal of the waveform detection unit is the input terminal of the waveform conversion module. The output terminal of the waveform detection unit is connected to the first input terminal of the waveform output unit. The second input terminal of the waveform output unit is also connected to the triangular wave pin of the controller. The rising sawtooth wave output terminal and the falling sawtooth wave output terminal of the waveform output unit are the rising sawtooth wave output terminal and the falling sawtooth wave output terminal of the waveform conversion module, respectively. The waveform detection unit is used to output a high-level signal when the triangular wave signal is a rising signal and to output a low-level signal when the triangular wave signal is a falling signal. The waveform output unit is used to output a rising sawtooth wave signal based on the high-level signal and the triangular wave signal, and to output a falling sawtooth wave signal based on the low-level signal and the triangular wave signal.

[0136] The waveform detection unit includes resistors R51 and R52, capacitor C2, and comparator U13. The first terminal of resistor R51 is the input terminal of the waveform detection unit. The second terminal of resistor R51 is connected to the first terminal of resistor R52, and the second terminal of resistor R52 is connected to the first terminal of capacitor C2. The second terminal of capacitor C2 is grounded. The first and second terminals of resistor R52 are connected to the non-inverting and inverting input terminals of comparator U13, respectively. The output terminal of comparator U13 is the output terminal of the waveform detection unit.

[0137] The waveform output unit includes resistors R53, R54, R55, and R56, transistor Q14, switching transistor Q15, and switching transistor Q16. The control terminal of transistor Q14 is the first input terminal of the waveform output unit. The control terminal of transistor Q14 is also connected to a preset voltage source (providing voltage VCC) through resistor R54. The collector of transistor Q14 is connected to the control terminal of switching transistor Q15, and the collector of transistor Q14 is also connected to the preset voltage source through resistor R53. The emitter of transistor Q14 is grounded. The first conducting terminal of switching transistor Q15 is connected to the first end of resistor R55. The second end of resistor R55 is the second input terminal of the waveform output unit. The first conducting terminal of switching transistor Q15 outputs the SW1 signal, and the second conducting terminal of switching transistor Q15 is grounded. The control terminal of the switching transistor Q16 is connected to the control terminal of the transistor Q14. The first conducting terminal of the switching transistor Q16 is connected to the second terminal of the resistor R55 through the resistor R56. The first conducting terminal of the switching transistor Q16 outputs the SW2 signal, and the second conducting terminal of the switching transistor Q16 is grounded.

[0138] The following explains the working principle of the waveform conversion module outputting signals SW1 and SW2:

[0139] When the triangular wave signal (PWM-TRI signal) rises, it charges capacitor C2 through resistors R51 and R52. At this time, the voltage at the non-inverting input of comparator U13 is greater than the voltage at the inverting input, so comparator U13 outputs a high level, transistor Q14 is turned on, the gate of switching transistor Q15 is pulled low, and switching transistor Q15 is turned off. The PWM-TRI outputs the SW1 signal through resistor R55. At this time, the SW1 signal rises synchronously with the triangular wave PWM-TRI signal. Since comparator U13 outputs a high level, switching transistor Q16 is turned on, and the SW2 signal is a low level signal.

[0140] When the triangular wave signal (PWM-TRI signal) decreases, capacitor C2 discharges through resistors R51 and R52. At this time, the voltage at the non-inverting input of comparator U13 is less than the voltage at the inverting input, and comparator U13 outputs a low level. Transistor Q14 is cut off, and VCC is connected to the gate of switching transistor Q15 through resistor R53. Switching transistor Q15 is turned on, and the SW1 signal is a low level signal. Since comparator U13 outputs a low level, switching transistor Q16 is cut off, and the PWM-TRI signal outputs the SW2 signal through resistor R56. At this time, the SW2 signal decreases synchronously with the triangular wave PWM-TRI signal.

[0141] Figure 13 This diagram illustrates the relationship between the triangular wave signal, rising sawtooth wave signal, falling sawtooth wave signal, and drive signal of the interleaved resonant converter under discharge state signals provided in some embodiments. Figure 14This diagram illustrates the relationship between the triangular wave signal, rising sawtooth wave signal, falling sawtooth wave signal, and drive signal of the interleaved resonant converter under the charging state signal provided in some embodiments.

[0142] exist Figure 13 and Figure 14 In the illustrated embodiment, the drive signals for the interleaved resonant converter include PWM1-L1, PWM1-H1, PWM1-L2, PWM1-H2, PWM2-L1, PWM2-H1, PWM2-L2, and PWM2-H2 signals. The PWM1-L1 and PWM1-H1 signals can be generated based on the comparison relationship between the rising sawtooth wave signal and Vref1, 2, 7, and 8; the PWM1-L2 and PWM1-H2 signals can be generated based on the comparison relationship between the falling sawtooth wave signal and Vref1, 2, 7, and 8; and the PWM2-L1, PWM2-H1, PWM2-L2, and PWM2-H2 signals can be generated based on the comparison relationship between the triangular wave signal and Vref3, 4, 5, and 6. The description of each signal generation method can be found in the description in the embodiments above, and will not be repeated here.

[0143] exist Figure 13 and Figure 14 In the embodiment shown, the horizontal axis represents time T, and the vertical axis represents the potential of each signal.

[0144] During discharge, energy flows from the low-voltage side (e.g., the battery terminal) to the high-voltage side (e.g., the BUS terminal). To prevent energy backflow, the low-voltage side switching transistors must be turned on first and then off, while the high-voltage side switching transistors must be turned on last and then off first. That is, the duty cycle of the PWM control signal of the low-voltage side switching transistors is greater than the duty cycle of the PWM control signal of the high-voltage side switching transistors.

[0145] During charging, energy flows from the high-voltage side to the low-voltage side. To prevent energy backflow, the high-voltage side switch must be turned on first and then off, while the low-voltage side switch must be turned on last and then off first. That is, the duty cycle of the PWM control signal of the high-voltage side switch is greater than the duty cycle of the PWM control signal of the low-voltage side switch.

[0146] Figure 15 A circuit structure diagram of the energy storage power supply provided for some embodiments, such as Figure 15 As shown, the energy storage power supply includes the drive control circuit in any of the above embodiments. The energy storage power supply also includes a first resonant converter and a second resonant converter, with the drive control circuit connected to both the first and second resonant converters respectively.

[0147] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0148] The above embodiments are merely illustrative of several implementation methods of this application, and their descriptions are relatively specific and detailed. However, they should not be construed as limiting the scope of this application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A drive control circuit for an interleaved resonant converter, characterized in that, The drive control circuit includes a controller, a waveform conversion module, and a drive module; the triangular wave pin of the controller is connected to the input terminal of the waveform conversion module and the triangular wave input terminal of the drive module, respectively; the rising sawtooth wave output terminal of the waveform conversion module is connected to the rising sawtooth wave input terminal of the drive module; and the falling sawtooth wave output terminal of the waveform conversion module is connected to the falling sawtooth wave input terminal of the drive module. The waveform conversion module is used to receive the triangular wave signal and convert the triangular wave signal into a rising sawtooth wave signal and a falling sawtooth wave signal. The driving module is configured to output a first driving signal of the first resonant converter when the received rising sawtooth wave signal is in a first preset interval; output a second driving signal of the first resonant converter when the received falling sawtooth wave signal is in a second preset interval; output a first driving signal of the second resonant converter when the received triangular wave signal is greater than or equal to a first preset voltage; and output a second driving signal of the second resonant converter when the triangular wave signal is less than a second preset voltage. The lower limit of any one of the first preset intervals and the second preset interval, the second preset voltage, the first preset voltage, and the upper limit of any one of the preset intervals increase sequentially.

2. The drive control circuit according to claim 1, characterized in that, The drive control circuit also includes an interleaving control module, the input terminal of which is connected to the falling sawtooth wave output terminal of the waveform conversion module, and the enable terminal of which is connected to the output terminal of the drive module. The interleaving control module is used to bypass the second drive signal of the second resonant converter when the first falling sawtooth pulse is not received. Upon receiving the first falling sawtooth pulse, the second drive signal of the second resonant converter is stopped from being bypassed.

3. The drive control circuit according to claim 2, characterized in that, The interleaving control module includes a charge storage unit and a bypass unit; the charge storage terminal of the charge storage unit is the input terminal of the interleaving control module, the charge storage terminal of the charge storage unit is connected to the input terminal of the bypass unit, and the enable terminal of the bypass unit is the enable terminal of the interleaving control module. The charge storage unit is configured to be in an unstored charge state and output a first voltage signal when the first falling sawtooth pulse is not received. After receiving the first falling sawtooth pulse, maintain the charge storage state and output a second voltage signal; The bypass unit is used to bypass the second drive signal of the second resonant converter when the first voltage signal is received; Upon receiving the second voltage signal, the second drive signal of the second resonant converter is stopped from being bypassed.

4. The drive control circuit according to any one of claims 1-3, characterized in that, The driving module includes a first driving unit and a second driving unit; the input terminal of the first driving unit is connected to the rising sawtooth wave output terminal and the falling sawtooth wave output terminal of the waveform conversion module, respectively, and the input terminal of the second driving unit is connected to the triangular wave pin of the controller. The first driving unit is configured to output a first driving signal of the first resonant converter when the received rising sawtooth wave signal is in a first preset interval; and to output a second driving signal of the first resonant converter when the received falling sawtooth wave signal is in a second preset interval. The second driving unit is configured to output a first driving signal of the second resonant converter when the received triangular wave signal is greater than or equal to a first preset voltage, and to output a second driving signal of the second resonant converter when the triangular wave signal is less than a second preset voltage.

5. The drive control circuit according to claim 4, characterized in that, The first driving unit includes a first threshold generation subunit and a first comparison subunit; the input signal of the first threshold generation subunit is a charge / discharge status signal, and the output of the first threshold generation subunit is connected to the threshold input of the first comparison subunit; the sawtooth wave input of the first comparison subunit is connected to the rising sawtooth wave output and the falling sawtooth wave output of the waveform conversion module, respectively. The first threshold generation subunit is used to output the upper and lower limits of the first target interval, and the upper and lower limits of the second target interval, when the charge / discharge status signal is received. Both the first target interval and the second target interval belong to the first preset interval and both belong to the second preset interval; The first comparison subunit is configured to output a first primary-side drive signal of the first resonant converter when the rising sawtooth wave signal is in the first target interval; output a first secondary-side drive signal of the first resonant converter when the rising sawtooth wave signal is in the second target interval; output a second secondary-side drive signal of the first resonant converter when the falling sawtooth wave signal is in the second target interval; and output a second primary-side drive signal of the first resonant converter when the falling sawtooth wave signal is in the first target interval.

6. The drive control circuit according to claim 5, characterized in that, The lower limit of the first target interval is the difference between the peak potential of the triangular wave signal and the upper limit of the first target interval; the lower limit of the second target interval is the difference between the peak potential of the triangular wave signal and the upper limit of the second target interval. When the charge / discharge state signal is a discharge state signal, the lower limit of the first target interval is less than the lower limit of the second target interval, and the upper limit of the second target interval is less than the upper limit of the first target interval. When the charge / discharge status signal is a charging status signal, the lower limit of the first target interval is greater than the lower limit of the second target interval, and the upper limit of the second target interval is greater than the upper limit of the first target interval.

7. The drive control circuit according to claim 4, characterized in that, The second driving unit includes a second threshold generation subunit and a second comparison subunit. The signal at the input terminal of the second threshold generation subunit is a charge / discharge status signal, and the output terminal of the second threshold generation subunit is connected to the threshold input terminal of the second comparison subunit. The triangular wave input terminal of the second comparison subunit is connected to the triangular wave pin of the controller. The second threshold generation subunit is used to output the first target voltage and the second target voltage, as well as the third target voltage and the fourth target voltage, in the first preset voltage when the charge / discharge status signal is received; The second comparator subunit is used to output the first primary-side drive signal of the second resonant converter when the triangular wave signal is greater than or equal to the first target voltage; When the triangular wave signal is greater than or equal to the second target voltage, the first secondary-side drive signal of the second resonant converter is output; when the triangular wave signal is less than the third target voltage, the second secondary-side drive signal of the second resonant converter is output; when the triangular wave signal is less than the fourth target voltage, the second primary-side drive signal of the second resonant converter is output.

8. The drive control circuit according to claim 7, characterized in that, The absolute value of the difference between the half-peak potential of the triangular wave signal and the third target voltage is equal to the absolute value of the difference between the half-peak potential of the triangular wave signal and the second target voltage, and the absolute value of the difference between the half-peak potential of the triangular wave signal and the first target voltage is equal to the absolute value of the difference between the half-peak potential of the triangular wave signal and the fourth target voltage. When the charge / discharge status signal is a discharge status signal, the third target voltage is less than the fourth target voltage, and the first target voltage is less than the second target voltage; When the charge / discharge status signal is a charging status signal, the third target voltage is greater than the fourth target voltage, and the first target voltage is greater than the second target voltage.

9. The drive control circuit according to claim 4, characterized in that, The driving module further includes a status providing unit, the input terminal of which is connected to the level pin of the controller, and the output terminal of which is connected to the first driving unit and the second driving unit respectively. The status providing unit is used to convert the received level signal into a charge / discharge status signal.

10. An energy storage power source, characterized in that, The energy storage power supply includes the drive control circuit as described in any one of claims 1-9.

Images