A method of manufacturing an ibc cell assembly

Abstract

The application provides a preparation method of an IBC battery assembly, and relates to the technical field of photovoltaic assemblies. The preparation method of the IBC battery assembly comprises a printing process of an IBC battery piece, and the printing process comprises the following steps: printing a tin paste part on a pad point of the battery piece; the tin paste part comprises a first tin paste part and a second tin paste part, the first tin paste part and the second tin paste part are arranged at intervals, the width of a tin paste gap formed between the first tin paste part and the second tin paste part is small in the middle and large at both ends, and the tin paste gap is arranged to extend along the arrangement direction of the pad point. The application can increase the contact area of the solder strip pressed on the pad point, improve the tin rate of the tin paste, ensure the welding yield, completely release the performance of the IBC battery piece through the solder strip, and improve the fill factor of the solar photovoltaic assembly.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Chinese Patent Application No. 2025104278599, filed on April 7, 2025, entitled "A Method for Preparing an IBC Battery Module", the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application relates to the field of photovoltaic module technology, and in particular to a method for preparing an IBC cell module. Background Technology

[0004] With the rapid development of interdigitated back contact (IBC) battery technology, the current mainstream IBC cell size is 183.75*182mm. The following problems exist in the production of IBC battery modules:

[0005] Typically, in the printing process of IBC cells, the height of the solder paste at the pad point is reduced by adjusting the height of the solder paste printing squeegee and the printing platform, so that the solder ribbon can be easily pressed into the center area of ​​the pad point. However, this method is prone to insufficient solder paste at the pad point, and the solder ribbon may not be smelted during the soldering process, resulting in a cold solder joint. Summary of the Invention

[0006] In view of this, the purpose of this application is to overcome the shortcomings of the prior art and provide a method for preparing an IBC cell module that can increase the contact area of ​​the solder ribbon pressed on the Pad point and improve the solder paste tinning rate, thus ensuring the welding yield; at the same time, it allows the performance of the IBC cell to be fully released through the solder ribbon, thereby improving the fill factor of the solar photovoltaic module.

[0007] This application provides the following technical solution:

[0008] This application provides a method for manufacturing an IBC battery module, the method comprising a printing step of IBC battery cells, the printing step comprising:

[0009] Solder paste portions are printed on pads of the battery cell; wherein the solder paste portions include a first solder paste portion and a second solder paste portion, and the first solder paste portion and the second solder paste portion are spaced apart, and the width of the solder paste gap formed between the first solder paste portion and the second solder paste portion is narrow in the middle and wide at both ends, and the solder paste gap is defined to extend along the arrangement direction of the pads.

[0010] In some embodiments, the solder paste gap gradually decreases from its end to its middle.

[0011] In some embodiments, solder paste portions are printed on the battery cell using a solder paste printing apparatus. The solder paste printing apparatus has printing holes corresponding to pad points on the battery cell. Each printing hole includes a first printing hole and a second printing hole, which are spaced apart. The gap between the first and second printing holes is the same as the solder paste gap, and the gap extends along the arrangement direction of the pad points. The cross-section of the first printing hole is the same as the cross-section of the first solder paste portion, and the cross-section of the second printing hole is the same as the cross-section of the second solder paste portion, such that the solder paste, after being transferred through the printing holes, can form the solder paste portion on the corresponding pad point.

[0012] In some embodiments, the method for fabricating the IBC solar cell further includes a laser-cut film-forming process for the IBC solar cell:

[0013] The electrodes on the back of the battery cell are arranged in an interdigital pattern, and the pad size is reduced accordingly.

[0014] In some embodiments, the method for preparing the IBC solar cell further includes a back passivation process for the IBC solar cell. In the laser film-forming process, a laser is used to perform laser grooving on the non-metallic electrode area of ​​the solar cell, controlling the etching depth and area. In the back passivation process, the contact interface between the electrode and the polycrystalline silicon is optimized to reduce the metal coverage area while maintaining ohmic contact performance.

[0015] In some embodiments, the type and parameters of the laser emitted by the laser used in the laser film-opening process are as follows:

[0016] The laser used is a femtosecond ultraviolet laser with a wavelength of no more than 355nm, a pulse width of less than 15ps, an accuracy between -10μm and 10μm, and a spot size of 7μm. Precise etching of non-metallic areas is achieved through beam shaping technology, with an energy density controlled at 1J / cm2 and a spot diameter set to 30um.

[0017] In some embodiments, the laser film-forming process involves two scanning grooving operations; wherein the first scanning grooving includes:

[0018] The BSG / PSG layer on the solar cell is removed using a laser with the highest power to perform a thinning operation;

[0019] The second scan slot includes:

[0020] The polycrystalline silicon layer on the solar cell is deeply etched using a laser of second power, with the etching depth between 0 μm and 20 μm, and the overlap rate of adjacent laser spots is adjusted to be between 50% and 80%; wherein, the first power is less than the second power.

[0021] In some embodiments, during the back passivation process, an ultrathin tunneling oxide layer and doped polycrystalline silicon are deposited on the back of the silicon wafer of the solar cell to reduce carrier recombination through passivation.

[0022] Localized micropore conductivity is achieved through polycrystalline silicon oxide technology;

[0023] The thickness of the tunneling oxide layer of the solar cell is controlled between 1 nm and 2 nm by LPCVD deposition, the thickness of the polycrystalline silicon layer of the solar cell is controlled between 80 nm and 100 nm, the doping depth of the PN junction of the solar cell is controlled between 0.2 μm and -0.5 μm, the thickness of the SiNx layer is between 70 nm and 90 nm, and the reflectivity of the SiNx layer is less than 8%.

[0024] By using ion implantation and rapid thermal annealing, the lateral diffusion of doping is limited to no more than 5 μm, thus enabling the high conductivity of the electrode region to be compatible with the narrow width.

[0025] The thinned polycrystalline silicon layer is passivated by combining an AlOx layer and a SiNx stack, ensuring that the surface recombination velocity of the solar cell does not exceed 10 cm / s and reducing the saturation current density to 1.5 fA / cm. 2 .

[0026] In some embodiments, the method for preparing the IBC solar cell further includes a welding process for the IBC solar cell, wherein the welding strips between adjacent pad points are arranged in an arched structure.

[0027] In some embodiments, the IBC battery assembly, after lamination and junction box installation, is placed in a separate temperature-controlled chamber and connected to a power source.

[0028] The IBC battery module was subjected to current and voltage through three channels using a power matrix system. The current was 8A and the voltage was 24V for 30 minutes.

[0029] The temperature of the constant temperature chamber is controlled between 80°C and 90°C, causing the IBC battery module to fail in a high-temperature environment.

[0030] The embodiments of this application have the following advantages:

[0031] This application provides a method for fabricating an IBC (Integrated Circuit) solar cell module. A special gap between the first and second solder paste sections allows for better control of the contact between the solder ribbon and the pad during soldering, enabling more uniform distribution of the solder ribbon on the solder paste and increasing the actual contact area. Furthermore, the solder paste gap facilitates more uniform heating of the solder paste during reflow soldering, promoting its melting and flow, thereby increasing the solder yield and ensuring good soldering results. Moreover, a reasonable solder paste layout can reduce soldering defects, such as avoiding short circuits or open circuits caused by uneven solder paste distribution, thus improving the soldering success rate and overall product yield. In addition, this method allows for more effective collection of current generated by photogenerated carriers, reducing energy loss and improving the overall performance of the IBC cell. Ultimately, it helps to improve the fill factor of the entire solar photovoltaic module, a crucial parameter for measuring the conversion efficiency of photovoltaic modules.

[0032] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0033] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0034] Figure 1 This is a schematic diagram of the structure of a screen printing plate in one embodiment;

[0035] Figure 2 This is a schematic diagram of the structure of a battery cell in one embodiment;

[0036] Figure 3 This is a schematic diagram of the assembly of the pad and the solder strip in one embodiment.

[0037] Explanation of key component symbols:

[0038] 100 - Battery cell; 110 - Pad point; 200 - Welding strip; 210 - Connecting part; 220 - Middle part; 300 - Screen printing plate; 310 - First printing hole; 320 - Second printing hole; 330 - Hole gap. Detailed Implementation

[0039] The embodiments of this application are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.

[0040] It should be noted that when an element is said to be "fixed" to another element, it can be directly on the other element or there may be an intervening element. When an element is said to be "connected" to another element, it can be directly connected to the other element or there may be an intervening element. Conversely, when an element is said to be "directly" on another element, there is no intervening element. The terms "vertical," "horizontal," "left," "right," and similar expressions used in this document are for illustrative purposes only.

[0041] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0042] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0043] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the template description is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0044] In related technologies, with the rapid development of Interdigitated Back Contact (IBC) battery technology, the current mainstream IBC cell size is 183.75*182mm. During the production of IBC battery modules, the following problems exist: Typically, in the IBC cell printing process, the solder paste height at the pad points is reduced by adjusting the height of the solder paste squeegee and the printing platform, making it easier to hold the solder ribbon in the center of the pad point. However, this method easily leads to insufficient solder paste at the pad points, resulting in incomplete soldering and cold solder joints.

[0045] like Figure 1 As shown, in order to solve the above-mentioned technical problems, this application provides a method for preparing an IBC battery module. The method for preparing an IBC battery module includes a printing process for IBC battery cells 100, the printing process including:

[0046] Solder paste portions are printed on pad points 110 of the battery cell 100; wherein the solder paste portions include a first solder paste portion and a second solder paste portion, and the first solder paste portion and the second solder paste portion are spaced apart, and the width of the solder paste gap formed between the first solder paste portion and the second solder paste portion is smaller in the middle and larger at both ends, and the solder paste gap is defined to extend along the arrangement direction of the pad points 110.

[0047] In these embodiments, the printing process in this IBC cell module fabrication method is designed to address existing problems in the prior art through a specifically designed solder paste printing pattern, such as improving soldering quality, increasing the contact area between the solder strip 200 and the pad point, and enhancing the overall performance of the solar photovoltaic module.

[0048] The core of this solution lies in the specially designed solder paste printing for the pads on the IBC solar cell 100, specifically including:

[0049] When printing solder paste on the pads of the battery cell 100, the solder paste is divided into two parts, namely a first solder paste part and a second solder paste part. The first solder paste part and the second solder paste part are respectively set, and a gap of a specific shape is formed between the first solder paste part and the second solder paste part, namely the solder paste gap.

[0050] The solder paste gaps are characterized by a narrow center and wider ends. These gaps extend along the direction of the pad dots, which can also be understood as the direction of the solder ribbon 200. In actual production, multiple pad dots 110 are connected in series using a single solder ribbon 200. It should be noted that the solder paste gaps form a flow channel structure that is narrow in the middle and wide at both ends. During printing, this shape guides the solder paste to spread evenly to both sides, avoiding solder paste accumulation in the central area of ​​the circular / rectangular mesh on the traditional stencil 300, thereby reducing the amount of solder paste on the pad dots after soldering.

[0051] Furthermore, by distributing the solder paste in a dispersed manner, the localized stress at the contact point between the screen 300 and the base of the printing equipment can be reduced, thus minimizing wear on the screen 300. The base is used to support the battery cells 100 to be printed.

[0052] Regarding the extension direction of the solder paste gap, the Pad point of the IBC cell 100 is usually a thin strip. The extension direction of the solder paste is aligned with the direction of the Pad point to achieve a match between the solder paste coverage area and the shape of the Pad point, thereby reducing the risk of cold solder joints.

[0053] Therefore, by using the special gap between the first solder paste section and the second solder paste section, the contact mode between the solder ribbon 200 and the Pad point can be better controlled during the soldering process, so that the solder ribbon 200 can be more evenly distributed on the solder paste, thereby increasing the actual contact area.

[0054] Furthermore, the solder paste gap helps to heat the solder paste more evenly during reflow soldering, promoting its melting and flow, thereby increasing the soldering yield and ensuring good soldering results.

[0055] Furthermore, a proper solder paste layout can reduce soldering defects, such as avoiding short circuits or open circuits caused by uneven solder paste distribution, thereby improving the soldering success rate and overall product yield. In addition, this method allows for more efficient collection of current generated by photogenerated carriers, reducing energy loss and improving the overall performance of the IBC cell 100. Ultimately, it helps to improve the fill factor of the entire solar photovoltaic module, which is one of the important parameters for measuring the conversion efficiency of photovoltaic modules.

[0056] For example, high-precision screen printing or inkjet printing technology is required to achieve the above design, ensuring that the first solder paste section, the second solder paste section, and the solder paste gap between them can be accurately printed according to the predetermined design requirements.

[0057] Additionally, the test results are provided below:

[0058] The curing oven for the solder paste is a multi-temperature zone mesh conveyor type, with seven temperature zones set at 140℃, 155℃, 170℃, 182℃, 170℃, 155℃, and 140℃ respectively, and a conveyor speed of 60mm / s. Under a high-definition microscope, the first and second solder paste sections, after curing, appear in a collapsed, light silver state, with no obvious particulate residue on the surface.

[0059] The process of gradually increasing the temperature from 140°C to 182°C helps avoid thermal stress damage caused by rapid heating. This gradual heating method allows the solvent in the solder paste to evaporate more gently, reducing the risk of bubble formation.

[0060] Similarly, gradually lowering the temperature back to 140°C after reaching the maximum temperature can prevent internal stress in the material caused by rapid cooling, thereby reducing the possibility of cracks or delamination.

[0061] By precisely controlling the temperature of each zone, the solder paste can reach its optimal melting state at different stages, promoting uniform flow and smooth distribution, and ensuring solder joint quality. A proper temperature profile helps enhance the metallurgical bond between the solder and the substrate, forming a strong and reliable electrical connection.

[0062] The state observed under a high-resolution microscope was "collapsed, pale silver," indicating that the solder paste had completely melted and re-solidified, forming a smooth surface without any particle residue. This means that the solvents and other additives had fully evaporated during the curing process, reducing impurities that could lead to poor contact or other electrical faults.

[0063] like Figure 1 As shown, in some embodiments, the solder paste gap gradually decreases from its end to its middle.

[0064] In these embodiments, as the solder paste begins to melt during reflow soldering, the wider ends help absorb and disperse excess solder, while the narrower middle ensures that the solder is concentrated in critical areas requiring good electrical connections. This prevents excessive solder buildup in certain areas, which could lead to short circuits or bridging problems.

[0065] By controlling the solder paste gap design, the flux evaporation path can be better managed during the soldering process, helping to reduce the formation of voids or bubbles due to incomplete flux evaporation. These defects can reduce the quality of the solder joint and affect long-term reliability.

[0066] For solar cell 100, this design helps to concentrate the current path more effectively and reduce resistance loss. The narrower solder paste gap in the middle allows the current to pass more concentratedly through the optimal contact point, improving the overall current collection efficiency.

[0067] This design maximizes the effective contact area between the electrode and the solder ribbon 200 while minimizing unnecessary metal coverage. This not only helps improve the conversion efficiency of a single cell 100 but also has a positive impact on the fill factor of the entire photovoltaic module.

[0068] Different soldering processes may have different requirements for solder flowability and final shape. By adjusting the solder paste gap design, these variations can be better accommodated, providing a larger process window and making the production process more flexible and controllable.

[0069] For example, the solder paste gap is set to a hyperbola shape, and the side of the first solder paste portion and the second solder paste portion that are close to each other is set to an arc surface, and the convex sides of the arc surface are set opposite to each other.

[0070] like Figure 1 As shown, in some embodiments, the solder paste portion is printed on the battery cell 100 using a solder paste printing device; wherein, the solder paste printing device has printing holes, the printing holes corresponding to the pad points 110 on the battery cell 100, the printing holes including a first printing hole 310 and a second printing hole 320, the first printing hole 310 and the second printing hole 320 being spaced apart, and the hole gap 330 formed between the first printing hole 310 and the second printing hole 320 being the same as the solder paste gap, and the hole gap 330 being defined to extend along the arrangement direction of the pad points 110, and the cross-section of the first printing hole 310 being the same as the cross-section of the first solder paste portion, and the cross-section of the second printing hole 320 being the same as the cross-section of the second solder paste portion, so that the solder paste portion can be formed on the corresponding pad point 110 after being transferred through the printing holes.

[0071] In these implementations, the distribution of solder paste on the cell 100 is precisely controlled by designing specific solder paste printing equipment and printing holes, thereby achieving optimized soldering results.

[0072] The solder paste printing equipment has printed holes corresponding to the pads on the battery cell 100. These printed holes include a first printed hole 310 and a second printed hole 320, and the first printed hole 310 and the second printed hole 320 are spaced apart. The gap 330 formed between the first printed hole 310 and the second printed hole 320 (i.e., the portion not covered by the printed hole) is the same as the final solder paste gap. Both have the same shape and size. Furthermore, the gap 330 extends along the arrangement direction of the pads.

[0073] The cross-sectional shape and size of the first printed hole 310 are consistent with those of the first solder paste section, ensuring that the solder paste can be accurately transferred to the corresponding position.

[0074] Similarly, the cross-sectional shape and size of the second printed hole 320 are consistent with those of the second solder paste section, ensuring that the solder paste can be deposited accurately according to the design requirements.

[0075] Solder paste is transferred from the printing equipment to the corresponding Pad point position on the battery cell 100 through the printing holes to form the required solder paste section, including a first solder paste section and a second solder paste section, which contains a specially designed solder paste gap.

[0076] It should be noted that by precisely designing the shape and size of the printed holes, it can be ensured that the solder paste distribution on the battery cell 100 is exactly as expected, avoiding the positional deviation or unevenness problems that may occur in traditional printing methods.

[0077] like Figure 2 As shown, in some embodiments, the method for preparing the IBC cell 100 further includes: arranging the electrodes on the back of the cell 100 in an interdigitated pattern, and reducing the size of the pad point 110.

[0078] In these embodiments, the laser film-opening process is a key step in the fabrication method of the IBC (Interdigitated Back Contact) solar cell 100. Combined with the design of reducing the size of the pad dots, it can significantly improve the performance and efficiency of the solar cell 100.

[0079] The purpose of the laser film-opening process:

[0080] Precision grooving: A high-precision laser is used to locally remove material from the back side of the solar cell 100 to create specific electrode locations (i.e., pad points). This step is crucial to ensuring that the electrodes can effectively contact the semiconductor material.

[0081] Reduced damage: By optimizing laser parameters (such as wavelength, pulse width, energy density, etc.), the passivation layer or other protective layer in a designated area can be removed efficiently while minimizing thermal damage to surrounding materials.

[0082] Interdigitated electrodes:

[0083] In the IBC cell, the electrodes are designed in an interdigitated arrangement, meaning that p-type and n-type electrodes are alternately distributed on the back side of the cell 100. This layout reduces the transport distance of charge carriers from the generation site to the electrodes, thereby improving current collection efficiency.

[0084] Smaller but denser pads can shorten carrier transport paths, reduce resistance losses, and improve current collection efficiency. Reducing pad size means more space can be used for other functional layers or to add more battery structural elements, further improving battery efficiency. Furthermore, reducing the metal coverage area not only lowers costs but also reduces shading effects, increases light absorption, and thus improves the overall battery conversion efficiency.

[0085] Furthermore, smaller pads require more precise solder paste printing and soldering processes, which prompts the use of higher precision technologies and equipment in the manufacturing process, ultimately improving soldering quality and long-term reliability.

[0086] In some embodiments, the method for fabricating the IBC cell 100 further includes a laser etching process and a back passivation process for the IBC cell 100. In the laser etching process, a laser is used to perform laser grooving on the non-metallic electrode area of ​​the cell 100 to control the etching depth and area. In the back passivation process, the contact interface between the electrode and the polysilicon is optimized to reduce the metal coverage area while maintaining ohmic contact performance.

[0087] In the fabrication of the IBC (Interdigitated Back Contact) solar cell 100, the laser film-forming process and the back-side passivation process are two crucial steps. The design and optimization of these two processes can significantly improve the performance and efficiency of the solar cell 100.

[0088] Laser film opening process:

[0089] A high-precision laser is used to locally remove material from the back side of the solar cell 100 to create specific electrode locations (i.e., pad points). This step ensures that the electrodes can effectively contact the semiconductor material.

[0090] Example, laser parameter selection:

[0091] Use femtosecond or picosecond lasers (wavelength ≤355nm, pulse width <15ps) to control the etching depth and area.

[0092] Precisely control the spot size (e.g., 7μm) and energy density (e.g., 1J / cm2) to avoid thermal damage or material clustering.

[0093] Step-by-step scanning strategy: The first low-power scan is used to finely process the passivation layer, and the second high-power scan is used to deeply etch the polysilicon layer.

[0094] Controlling etching depth and area:

[0095] The etching depth usually needs to be precisely controlled to ensure that only the necessary passivation layer or polysilicon layer is removed without damaging the underlying semiconductor substrate.

[0096] Area control is to ensure accurate electrode placement and to maximize the use of the back space.

[0097] Backside passivation process:

[0098] Optimize the contact interface between the electrode and polysilicon: By optimizing the back passivation process, the metal coverage area can be reduced while maintaining good ohmic contact performance, thereby improving current collection efficiency.

[0099] Deposited passivation layer:

[0100] After laser ablation, passivation layers such as alumina and silicon nitride are redeposited to protect the areas not exposed by laser ablation and reduce the surface recombination rate.

[0101] Optimize the user interface:

[0102] By adjusting the thickness and composition of the passivation layer, and optimizing the selection and processing of electrode materials, good ohmic contact performance can be maintained while reducing the metal coverage area.

[0103] This can be achieved by employing advanced metallization techniques (such as screen printing or electroplating) to ensure that the contact resistance between the electrode and the polysilicon is minimized.

[0104] Therefore, reducing the size of the pads and optimizing their layout can shorten the carrier transport path, reduce resistance losses, and thus improve current collection efficiency. By precisely controlling the position and size of the laser-engraved film, more of the back surface area can be used for high-efficiency electrode design, further improving battery efficiency. Reducing the metal coverage area not only lowers costs but also reduces light-blocking effects, increases light absorption, and thus improves the overall conversion efficiency of the battery. Smaller pads require more precise solder paste printing and soldering processes, prompting the use of higher-precision technologies and equipment in the manufacturing process, ultimately improving soldering quality and long-term reliability. Furthermore, by optimizing the contact interface between the electrode and polysilicon, good electrical performance can be maintained while reducing the metal coverage area, ensuring efficient current transmission.

[0105] For example, in one specific embodiment, the laser film-opening process employs the following settings:

[0106] Laser type: Femtosecond ultraviolet laser (wavelength 355nm, pulse width <15ps);

[0107] Spot size: adjustable up to 7μm;

[0108] Energy density: 1 J / cm²;

[0109] Step-by-step scanning strategy: First, remove the BSG / PSG layer with low power (40W), then etch the polysilicon layer deeply with high power (80W), with the etching depth controlled within the range of 0 to 20 μm.

[0110] The following measures were adopted in the back passivation process:

[0111] Passivation layer: aluminum oxide + silicon nitride;

[0112] Optimize the contact interface: By adjusting the thickness and composition of the passivation layer, combined with screen printing or electroplating technology, ensure that a low-resistance ohmic contact is formed between the electrode and the polycrystalline silicon.

[0113] In some embodiments, the type and parameters of the laser emitted by the laser used in the laser film-opening process are as follows:

[0114] The laser used is a femtosecond ultraviolet laser with a wavelength of no more than 355nm, a pulse width of less than 15ps, an accuracy between -10μm and 10μm, and a spot size of 7μm. Precise etching of non-metallic areas is achieved through beam shaping technology, with an energy density controlled at 1J / cm2 and a spot diameter set to 30um.

[0115] In the fabrication of IBC (Interdigitated Back Contact) solar cells 100, the laser-based laser delamination process is a crucial step, determining the contact quality between the electrode and the semiconductor material. The following are the specific technical details of laser delamination using femtosecond ultraviolet lasers and its advantages:

[0116] Laser type and parameters emitted by the laser

[0117] Laser type:

[0118] Femtosecond ultraviolet laser: This type of laser has a very short pulse width, enabling high-precision processing with a low heat-affected zone.

[0119] wavelength:

[0120] No greater than 355nm: Ultraviolet lasers have short wavelengths, which can be absorbed more effectively on most materials, making them suitable for fine processing, especially for precise etching of semiconductor materials.

[0121] Pulse width:

[0122] Less than 15 picoseconds: Ultra-short pulse width means that energy is concentrated and released in a very short time, reducing the chance of heat spreading to surrounding materials and thus reducing the risk of thermal damage.

[0123] Accuracy:

[0124] Located between -10μm and 10μm: High-precision control ensures the accuracy of laser grooving position, which is crucial for forming precise electrode positions (i.e., Pad points).

[0125] Spot size:

[0126] 7μm: The smaller spot size allows for finer etching, which helps to achieve a higher density electrode layout, thereby improving current collection efficiency.

[0127] Beam shaping technology:

[0128] Beam shaping technology can achieve precise etching of non-metallic areas, ensuring that only the predetermined area is removed without affecting the surrounding passivation layer or polysilicon layer.

[0129] Energy density:

[0130] 1J / cm2: A moderate energy density can ensure effective material removal while avoiding material damage or cluster formation caused by overheating.

[0131] Spot diameter:

[0132] 30μm: Although the spot size is 7μm, in practical applications a larger spot diameter (such as 30μm) may be needed to cover a larger area or to perform multiple scans to ensure uniformity.

[0133] In some embodiments, the laser film-forming process involves two scanning grooving operations; wherein the first scanning grooving includes:

[0134] The BSG / PSG layer on the solar cell 100 is removed by a laser of first power to perform a thinning operation;

[0135] The second scan slot includes:

[0136] The polycrystalline silicon layer on the solar cell 100 is deeply etched using a laser of second power, with the etching depth between 0 μm and 20 μm, and the overlap rate of adjacent laser spots is adjusted to between 50% and 80%; wherein the first power is less than the second power.

[0137] In these embodiments, the purpose of the first scan slotting is:

[0138] Removal of BSG / PSG layers: BSG (borosilicate glass) and PSG (phosphosilicate glass) are typically oxide layers formed during the diffusion process, which can affect the contact quality between subsequent electrodes and semiconductor materials.

[0139] Thinning operations: By removing these surface layers, the risk of thermal damage during subsequent high-power etching can be reduced, and a clean, flat base can be provided for subsequent deep etching.

[0140] Parameter settings:

[0141] First power: Use a lower power laser (e.g., 40W) to avoid causing unnecessary thermal damage to the substrate material.

[0142] Spot size and overlap rate: The spot size and overlap rate of adjacent spots are usually adjusted according to actual needs to ensure uniformity and consistency.

[0143] Purpose of the second scanning and grooving:

[0144] Deep etching of polysilicon layer: After the BSG / PSG layer has been removed in the first scan, the second scan uses a higher power laser to precisely etch the polysilicon layer to form the required electrode positions.

[0145] Controlling the etching depth: Precisely controlling the etching depth between 0μm and 20μm ensures that only the necessary polysilicon layer is removed without excessively damaging the underlying semiconductor substrate.

[0146] Parameter settings:

[0147] Second power: Use a higher power laser (e.g., 80W) to achieve effective deep etching.

[0148] Etching depth: controlled between 0μm and 20μm, depending on design requirements and battery structure needs.

[0149] Spot overlap ratio: Adjust the overlap ratio of adjacent spots to between 50% and 80% to ensure uniformity and consistency of etching. A higher overlap ratio can reduce the risk of uneven etching, but may increase processing time.

[0150] Therefore, the step-by-step scanning strategy allows for the use of lasers with different powers at different stages to process different material layers, thereby improving the overall processing accuracy and controllability. The low-power initial scan helps to initially remove the surface layer, reducing the risk of thermal damage during subsequent high-power etching and protecting the integrity of the substrate material. Precise control of etching depth and area ensures accurate electrode placement, which is crucial for high-efficiency current collection. A finer etching process provides a better foundation for subsequent solder paste printing and soldering, ensuring higher soldering quality and long-term reliability. By precisely controlling the position and size of the laser-induced film opening, more of the back surface area can be used for efficient electrode design, further improving battery efficiency.

[0151] For example, in one specific embodiment, the parameters of the femtosecond ultraviolet laser emitted by the laser are as follows: wavelength not greater than 355nm; pulse width less than 15ps; spot size of 7μm (for fine etching); energy density of 1J / cm2; and spot diameter of 30μm (for covering a larger area).

[0152] First scan for slotting:

[0153] Power: 40W

[0154] Objective: To remove the BSG / PSG layer and perform a thinning operation.

[0155] Second scan for slotting:

[0156] Power: 80W

[0157] Objective: To deeply etch a polysilicon layer, with the etching depth controlled between 0 μm and 20 μm.

[0158] Overlap ratio: 50% to 80%, ensuring etching uniformity.

[0159] In some embodiments, during the back passivation process, an ultrathin tunneling oxide layer and doped polycrystalline silicon are deposited on the back side of the silicon wafer of the cell 100 to reduce carrier recombination through passivation.

[0160] Localized micropore conductivity is achieved through polycrystalline silicon oxide technology;

[0161] The thickness of the tunneling oxide layer of the solar cell 100 is controlled between 1 nm and 2 nm by LPCVD deposition, the thickness of the polycrystalline silicon layer of the solar cell 100 is controlled between 80 nm and 100 nm, the doping depth of the PN junction of the solar cell 100 is controlled between 0.2 μm and -0.5 μm, the thickness of the SiNx layer is between 70 nm and 90 nm, and the reflectivity of the SiNx layer is less than 8%.

[0162] By using ion implantation and rapid thermal annealing, the lateral diffusion of doping is limited to no more than 5 μm, thus enabling the high conductivity of the electrode region to be compatible with the narrow width.

[0163] The thinned polycrystalline silicon layer is passivated by combining an AlOx layer and a SiNx stack, ensuring that the surface recombination velocity of the cell 100 is no greater than 10 cm / s and reducing the saturation current density to 1.5 fA / cm. 2 .

[0164] In these embodiments, 1. Tunneling oxide layer and doped polysilicon deposition;

[0165] Tunneling oxide layer:

[0166] Thickness control: Using LPCVD (low-pressure chemical vapor deposition) technology, the thickness of the tunneling oxide layer is controlled between 1 nm and 2 nm. The ultrathin tunneling oxide layer helps to achieve efficient field-effect passivation and reduce surface state density.

[0167] Doped polycrystalline silicon layer:

[0168] Thickness control: Using the same LPCVD process, the thickness of the doped polycrystalline silicon layer is controlled between 80nm and 100nm. A suitable thickness can balance good passivation effect and low series resistance.

[0169] 2. Localized micropores provide conductivity;

[0170] Polycrystalline silicon oxide technology: Through localized oxidation technology, micropores are created at the locations where electrodes need to be formed, allowing the electrodes to directly contact the silicon substrate and ensuring an effective current collection path.

[0171] 3. Control of PN junction doping depth;

[0172] Ion implantation and rapid thermal annealing: By combining ion implantation with rapid thermal annealing (RTA), the doping depth of the PN junction can be controlled between 0.2 μm and 0.5 μm. Precise control of the doping depth helps improve carrier separation efficiency and reduce recombination losses.

[0173] Lateral diffusion restriction: By optimizing ion implantation parameters and annealing conditions, the lateral diffusion of doping is restricted to no more than 5 μm. This allows the electrode region to maintain high conductivity while achieving a narrow width design, thus improving current collection efficiency.

[0174] 4. SiNx layer deposition and reflectivity control;

[0175] SiNx layer thickness: The thickness of the SiNx layer is controlled between 70nm and 90nm using PECVD (plasma-enhanced chemical vapor deposition) technology. An appropriate thickness not only provides good passivation but also acts as an anti-reflective coating, increasing light absorption efficiency.

[0176] Reflectivity control: By adjusting the composition and thickness of the SiNx layer, its reflectivity is reduced to less than 8%, further improving the light energy utilization rate.

[0177] 5. Surface recombination rate and saturation current density;

[0178] Stacked passivation: By adopting a stacked passivation structure combining a thinned polycrystalline silicon layer with an AlOx (alumina) layer and a SiNx layer, the surface recombination velocity of the solar cell 100 can be kept below 10 cm / s, and the saturation current density can be reduced to 1.5 fA / cm2.

[0179] Surface recombination rate: A low surface recombination rate means that fewer charge carriers recombine on the surface, thus improving the overall conversion efficiency of the battery.

[0180] Saturation current density: Reducing the saturation current density helps to reduce dark current, increase open-circuit voltage (Voc), and thus improve battery performance.

[0181] Therefore, the ultrathin tunneling oxide layer and high-quality polycrystalline silicon layer provide excellent field-effect passivation, significantly reducing carrier recombination at the surface and improving the open-circuit voltage and fill factor of the battery. Local micropore conduction technology and precisely controlled doping depth ensure good contact between the electrode and the semiconductor material, reducing contact resistance and enhancing current collection efficiency. Optimizing the thickness and composition of the SiNx layer achieves high reflectivity control, increasing light absorption and further improving the battery's energy conversion efficiency. Rapid thermal annealing technology enables doping activation in a short time, reducing thermal damage to the substrate material and maintaining high material quality.

[0182] like Figure 3 As shown, in some embodiments, the method for preparing the IBC cell 100 further includes a welding process for the IBC cell 100, wherein the welding strips 200 between adjacent pad points 110 are arranged in an arched structure.

[0183] In these embodiments, during the welding process, the welding strip 200 is configured into an arched structure by a specific process or equipment, that is, the welding strip 200 forms a slightly raised arc between adjacent Pad points.

[0184] Before soldering, solder paste needs to be precisely printed on the pads and cured in a multi-zone mesh conveyor oven to ensure uniform solder distribution and good flowability. An optimized soldering temperature profile ensures the solder fully melts and flows to the bottom of the arched solder strip 200 during reflow soldering, resulting in a strong electrical connection. High-precision automated soldering equipment is used to ensure the accuracy of the solder strip 200 position and the consistency of the arched structure, improving production efficiency and soldering quality.

[0185] The arched structure increases the mechanical strength of the solder strip 200, reduces the risk of solder strip 200 breakage due to external stress, and improves the long-term reliability of the component. The arched solder strip 200 can alleviate the stress concentration problem caused by thermal expansion differences to a certain extent, because the arched structure allows the solder strip 200 to have some room for expansion and contraction when the temperature changes, reducing the impact of thermal stress on the welding point.

[0186] Before welding, the welding strip 200 is pre-formed into an arched structure using specialized equipment to ensure that it can be correctly attached to the Pad point during the welding process.

[0187] For example, pre-formed arched solder strips 200 are placed between adjacent pad points and reflow soldered using a multi-temperature zone mesh chain curing oven. The curing oven temperature profile is set to 140℃, 155℃, 170℃, 182℃, 170℃, 155℃, and 140℃, with a chain speed of 60mm / s to ensure that the solder fully melts and forms a strong weld point.

[0188] The arched solder ribbon 200 achieves point-to-point connection (instead of traditional surface contact) with the middle section 220 by setting multiple connecting parts 210 on the solder ribbon 200. The connecting parts 210 are soldered to the solder paste, and the middle section 220 is bent to form an arch. This design allows the solder ribbon 200 to absorb or compensate for the deformation caused by the difference in thermal expansion coefficients through the deformation buffer structure of the middle section 220 when the temperature changes. When the solder ribbon 200 shrinks during the soldering cooling process, the elastic deformation of the middle section 220 can offset the unidirectional tensile force on the battery cell 100, thereby reducing unilateral warping caused by stress concentration and solving the problem existing in the traditional soldering process: the main way to reduce the warping of the IBC battery string is to add a reverse bending tool to apply a downward force to the front of the battery string after the string is soldered, so that the battery string is stretched as a whole, and the excess stretching is used to offset the shrinkage. However, this method will produce a lot of microcracks and fragments, increasing material loss.

[0189] For example, the arch height of the welding strip 200 is set to 0.527 cm or more.

[0190] Of course, if the solder paste gap extends along the width direction of the solder strip 200, the connecting part 210 of the solder strip 200 will be partially embedded in the solder paste gap.

[0191] In some embodiments, the IBC battery assembly, after lamination and junction box installation, is placed in a separate temperature-controlled chamber and connected to a power source.

[0192] The IBC battery module was subjected to current and voltage through three channels using a power matrix system. The current was 8A and the voltage was 24V for 30 minutes.

[0193] The temperature of the constant temperature chamber is controlled between 80°C and 90°C, causing the IBC battery module to fail in a high-temperature environment.

[0194] In these embodiments, the IBC battery assembly, after lamination and junction box installation, is placed in a separate, temperature-controlled chamber. The temperature of the chamber is controlled between 80°C and 90°C to simulate operating conditions in a high-temperature environment.

[0195] The IBC battery module is supplied with current and voltage through three channels using a power matrix system, with the following specific parameters:

[0196] Current: Apply 8A of current to each channel.

[0197] Voltage: 24V is applied to each channel.

[0198] Duration: The current and voltage are applied for 30 minutes.

[0199] High-precision laser mesh coordinate system generation:

[0200] Before the IBC battery module enters the temperature-controlled chamber, a high-precision laser grid coordinate system is generated based on the IBC battery module dimensions. Using pre-stored position data, probes at the corresponding positions are directly triggered to contact key points of the module, achieving rapid alignment without the need for dynamic adjustment of probe positions.

[0201] A robotic arm is used to pick up the male and female connectors of the junction box and plug them into the positive and negative terminals of the DC power supply, ensuring the accuracy and stability of the electrical connection.

[0202] Infrared heating plates are used in conjunction with PID algorithms to precisely control the temperature, maintaining it between 80℃ and 90℃ with an error range of ±2℃, ensuring temperature uniformity and stability.

[0203] Therefore, by using electrical injection technology, a forward bias voltage is applied through an external DC power supply to promote the diffusion of majority carriers and reduce the potential barrier, forcing carriers to pass through the semiconductor interface, changing the carrier concentration distribution inside the material, promoting the diffusion of hydrogen atoms to grain boundaries or interface defects to neutralize dangling bonds, reducing the recombination center density, and thus improving the fill factor (FF).

[0204] It's important to note that in semiconductors, electrons (negative charges) and holes (positive charges) are the carriers of electrical conductivity. Electrical injection provides these charge carriers through an external circuit. When a forward bias voltage is applied to a PN junction, the electric field weakens the built-in potential, lowering the potential barrier height. Electrons are injected from the conduction band of the N-type semiconductor into the P-type region, and holes are injected from the valence band of the P-type semiconductor into the N-type region. The injected electrons and holes diffuse in the device's "active region," and when they meet, recombine, releasing energy (manifested as light or heat).

[0205] In all examples shown and described herein, any specific values ​​should be interpreted as merely exemplary and not as limitations; therefore, other examples of exemplary embodiments may have different values.

[0206] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0207] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these modifications and improvements all fall within the protection scope of this application.

Claims

1. A method for preparing an IBC battery module, the method comprising a printing step of IBC battery cells, characterized in that, The printing process includes: Solder paste portions are printed on pads of the battery cell; wherein the solder paste portions include a first solder paste portion and a second solder paste portion, and the first solder paste portion and the second solder paste portion are spaced apart, and the width of the solder paste gap formed between the first solder paste portion and the second solder paste portion is narrow in the middle and wide at both ends, and the solder paste gap is defined to extend along the arrangement direction of the pads.

2. The method for preparing an IBC battery module according to claim 1, characterized in that, The solder paste gap gradually decreases from its end to its middle.

3. The method for preparing an IBC battery module according to claim 2, characterized in that, Solder paste is printed on the battery cell using a solder paste printing device. The device has printing holes corresponding to pad points on the battery cell. Each printing hole includes a first printing hole and a second printing hole, which are spaced apart. The gap between the first and second printing holes is the same as the solder paste gap, and this gap extends along the arrangement direction of the pad points. The cross-section of the first printing hole is the same as the cross-section of the first solder paste portion, and the cross-section of the second printing hole is the same as the cross-section of the second solder paste portion, so that the solder paste can be transferred through the printing holes to form the solder paste portion on the corresponding pad point.

4. The method for preparing an IBC battery module according to claim 1, characterized in that, The method for preparing the IBC solar cell further includes: The electrodes on the back of the battery cell are arranged in an interdigital pattern, and the pad size is reduced accordingly.

5. The method for preparing an IBC battery module according to claim 4, characterized in that, The method for preparing the IBC solar cell also includes a laser etching process and a back passivation process. In the laser etching process, a laser is used to perform laser grooving on the non-metallic electrode area of ​​the solar cell to control the etching depth and area. In the back passivation process, the contact interface between the electrode and the polycrystalline silicon is optimized to reduce the metal coverage area while maintaining ohmic contact performance.

6. The method for preparing an IBC battery module according to claim 5, characterized in that, In the laser film-opening process, the type and parameters of the laser emitted by the laser used are as follows: The laser used is a femtosecond ultraviolet laser with a wavelength of no more than 355nm, a pulse width of less than 15ps, an accuracy between -10μm and 10μm, and a spot size of 7μm. Precise etching of non-metallic areas is achieved through beam shaping technology, with an energy density controlled at 1J / cm2 and a spot diameter set to 30um.

7. The method for preparing an IBC battery module according to claim 6, characterized in that, In the laser film-forming process, two scanning grooving operations are performed; wherein, the first scanning grooving includes: The BSG / PSG layer on the solar cell is removed using a laser with the highest power to perform a thinning operation; The second scan slot includes: The polycrystalline silicon layer on the solar cell is deeply etched using a laser of second power, with the etching depth between 0 μm and 20 μm, and the overlap rate of adjacent laser spots is adjusted to be between 50% and 80%; wherein, the first power is less than the second power.

8. The method for preparing an IBC battery module according to claim 5, characterized in that, In the back passivation process, an ultrathin tunneling oxide layer and doped polycrystalline silicon are deposited on the back of the silicon wafer of the solar cell to reduce carrier recombination through passivation. Localized micropore conductivity is achieved through polycrystalline silicon oxide technology; The thickness of the tunneling oxide layer of the solar cell is controlled between 1 nm and 2 nm by LPCVD deposition, the thickness of the polycrystalline silicon layer of the solar cell is controlled between 80 nm and 100 nm, the doping depth of the PN junction of the solar cell is controlled between 0.2 μm and -0.5 μm, the thickness of the SiNx layer is between 70 nm and 90 nm, and the reflectivity of the SiNx layer is less than 8%. By using ion implantation and rapid thermal annealing, the lateral diffusion of doping is limited to no more than 5 μm, thus enabling the high conductivity of the electrode region to be compatible with the narrow width. The thinned polycrystalline silicon layer is passivated by combining an AlOx layer and a SiNx stack, ensuring that the surface recombination velocity of the solar cell does not exceed 10 cm / s and reducing the saturation current density to 1.5 fA / cm. 2 .

9. The method for preparing an IBC battery module according to claim 1, characterized in that, The method for preparing the IBC solar cell also includes a welding process for the IBC solar cell, wherein the welding strips between adjacent pad points are arranged in an arched structure.

10. The method for preparing an IBC battery module according to claim 1, characterized in that, After lamination and installation of the junction box, the IBC battery assembly is placed in a separate temperature-controlled chamber and connected to a power source. The IBC battery module was subjected to three channels of current and voltage using a power matrix system. The current was 8A and the voltage was 24V for 30 minutes. The temperature of the constant temperature chamber is controlled between 80°C and 90°C, causing the IBC battery module to fail in a high-temperature environment.

Images