An under-voltage comparison circuit

Abstract

The application provides an under-voltage comparison circuit, and relates to the technical field of voltage comparison.The under-voltage comparison circuit comprises an under-voltage comparison module, an OR gate and a hysteresis module, a plurality of sensing input ends of the under-voltage comparison module are used for acquiring a plurality of sensing voltages, an under-voltage threshold input end of the under-voltage comparison module is used for receiving an under-voltage threshold, so that the under-voltage comparison module compares the plurality of sensing voltages with the under-voltage threshold to generate a plurality of under-voltage comparison signals; a plurality of output ends of the under-voltage comparison module are connected with a plurality of input ends of the OR gate, so that the OR gate generates and outputs an under-voltage adjustment signal according to the plurality of under-voltage comparison signals; an output end of the OR gate is connected with an input end of the hysteresis module, a first output end of the hysteresis module is connected with the under-voltage threshold input end of the under-voltage comparison module, so that the hysteresis module adjusts the under-voltage threshold according to the under-voltage adjustment signal, and a second output end of the hysteresis module outputs a target under-voltage comparison signal. The under-voltage comparison circuit and the OR gate are used to realize detection of the plurality of under-voltage comparison signals.

Description

Technical Field

[0001] This invention relates to the field of voltage comparison technology, and more specifically, to an undervoltage comparison circuit. Background Technology

[0002] Currently, multi-channel voltage monitoring chips use multi-channel analog-to-digital converters for data acquisition. This increases the number of components used, resulting in relatively high power consumption and complex operation. Furthermore, when configuring multi-channel analog-to-digital converters, parameters such as sampling time and conversion mode need to be set, the number of channels cannot be freely adjusted, and the voltage range that can be monitored is relatively fixed and limited, affecting voltage monitoring efficiency. Summary of the Invention

[0003] The purpose of this invention is to address the shortcomings of the prior art by providing an undervoltage comparison circuit that can detect multiple undervoltage comparison signals through a multi-channel undervoltage comparison circuit and a multi-input OR gate. The undervoltage adjustment signal output by the OR gate is also fed back to the input of the hysteresis module to adjust the undervoltage threshold.

[0004] To achieve the above objectives, the technical solutions adopted in the embodiments of this application are as follows: In a first aspect, embodiments of this application provide an undervoltage comparison circuit, which includes: an undervoltage comparison module, an OR gate, and a hysteresis module; The undervoltage comparison module has multiple sensing input terminals for acquiring multiple sensing voltages, and an undervoltage threshold input terminal for receiving an undervoltage threshold, so that the undervoltage comparison module compares the multiple sensing voltages and the undervoltage threshold to generate multiple undervoltage comparison signals; the undervoltage comparison module has multiple output terminals connected to the multiple input terminals of the OR gate, so that the OR gate generates and outputs an undervoltage adjustment signal based on the multiple undervoltage comparison signals; The output of the OR gate is connected to the input of the hysteresis module, and the first output of the hysteresis module is connected to the undervoltage threshold input of the undervoltage comparison module, so that the hysteresis module adjusts the undervoltage threshold according to the undervoltage adjustment signal. The second output of the hysteresis module is used to output the target undervoltage comparison signal.

[0005] In an optional implementation, the undervoltage comparison module includes: a plurality of first switching transistors, a threshold input module, and a first current source; The bases of the plurality of first switching transistors are respectively the plurality of sensing input terminals of the undervoltage comparison module. The input terminal of the threshold input module is the undervoltage threshold input terminal of the undervoltage comparison module. The output terminal of the threshold input module is connected to the input terminal of the first current source. The plurality of output terminals of the first current source are respectively connected to the collectors of the plurality of first switching transistors. The collectors of the plurality of first switching transistors are the plurality of output terminals of the undervoltage comparison module.

[0006] In an optional implementation, the OR gate includes: a current control module, a second current source, a third current source, and a first resistor; The multiple input terminals of the current control module are the multiple input terminals of the OR gate, and the output terminal of the current control module is the output terminal of the OR gate; The input terminal of the second current source is connected to a preset power supply through the first resistor. The input terminal of the second current source is also connected to multiple control terminals of the current control module. The output terminal of the second current source is connected to the input terminal of the third current source. The first output terminal of the third current source is also connected to the output terminal of the current control module.

[0007] In an optional implementation, the current control module includes: a plurality of second switching transistors and a plurality of third switching transistors; The bases of the plurality of second switching transistors are the plurality of input terminals of the current control module, the emitters of the plurality of second switching transistors are grounded, and the collectors of the plurality of second switching transistors are the output terminals of the current control module. The bases of the plurality of second switching transistors are respectively connected to the emitters of the plurality of third switching transistors, the collectors of the plurality of third switching transistors are connected to a preset power supply, and the bases of the plurality of third switching transistors are multiple control terminals of the current control module.

[0008] In an optional implementation, the hysteresis module includes: a fourth current source, a fourth switch, a fifth switch, a diode, a second resistor, and a third resistor; The base of the fourth switch is the input terminal of the hysteresis module. The collector of the fourth switch is connected to the anode of the diode. The collector of the fourth switch is also connected to the second output terminal of the third current source. The emitter of the fourth switch is connected to the base of the fifth switch. The emitter of the fifth switch is grounded. The collector of the fifth switch is the second output terminal of the hysteresis module. The collector of the fifth switch is also connected to the third output terminal of the third current source. One end of the second resistor is connected to the fourth output terminal of the third current source, and another end of the second resistor is also connected to the reference voltage terminal. The other end of the second resistor is connected to the cathode of the diode, and the other end of the second resistor is also connected to one end of the third resistor. The other end of the third resistor is the first output terminal of the hysteresis module. The input terminal of the fourth current source is connected to the fifth output terminal of the third current source, and the output terminal of the fourth current source is connected to the other end of the third resistor.

[0009] In an optional implementation, the hysteresis module further includes a fourth resistor; the collector of the fourth switch is connected to the anode of the diode through the fourth resistor.

[0010] In an optional implementation, the hysteresis module further includes a fifth resistor; one end of the second resistor is connected to the third output terminal of the third current source through the fifth resistor.

[0011] In an optional embodiment, the undervoltage comparison circuit further includes an undervoltage input module; The multiple sensing input terminals of the undervoltage input module are used to connect to multiple sensing points to receive multiple sensing voltages, and the multiple output terminals of the undervoltage input module are connected to the multiple sensing input terminals of the undervoltage comparison module.

[0012] In an optional implementation, the undervoltage input module includes: a plurality of Zener diodes and a plurality of sixth resistors; One end of each of the plurality of sixth resistors is a plurality of sensing input terminals of the undervoltage input module, and the other end of each of the plurality of sixth resistors is a plurality of output terminals of the undervoltage input module. The other end of each of the plurality of sixth resistors is also connected to the cathodes of the plurality of Zener diodes, and the anodes of the plurality of Zener diodes are grounded.

[0013] In an optional implementation, the undervoltage comparison circuit further includes a feedback module; The first input terminal of the feedback module is connected to a preset power supply terminal, the second input terminal of the feedback module is connected to the undervoltage threshold input terminal of the undervoltage comparison module, and the output terminal of the feedback module is connected to the collector of the plurality of second switching transistors.

[0014] The beneficial effects of this application are: This application provides an undervoltage comparison circuit, which includes an undervoltage comparison module, an OR gate, and a hysteresis module. Multiple sensing inputs of the undervoltage comparison module are used to acquire multiple sensing voltages, and an undervoltage threshold input is used to receive an undervoltage threshold, enabling the undervoltage comparison module to compare the multiple sensing voltages and the undervoltage threshold to generate multiple undervoltage comparison signals. Multiple outputs of the undervoltage comparison module are connected to multiple inputs of the OR gate, enabling the OR gate to generate and output an undervoltage adjustment signal based on the multiple undervoltage comparison signals. The output of the OR gate is connected to the input of the hysteresis module, and the first output of the hysteresis module is connected to the undervoltage threshold input of the undervoltage comparison module, enabling the hysteresis module to adjust the undervoltage threshold based on the undervoltage adjustment signal. The second output of the hysteresis module is used to output a target undervoltage comparison signal. This application employs a multi-channel undervoltage comparison circuit and a multi-input OR gate to detect multiple undervoltage comparison signals. The undervoltage adjustment signal output by the OR gate is also fed back to the input of the hysteresis module to adjust the undervoltage threshold, thereby improving the bandwidth of the monitoring chip and enhancing its anti-interference capability and stability. At the same time, the hysteresis module also has a hysteresis function, making it more stable during normal operation and helping to reduce noise and interference. Attached Figure Description

[0015] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0016] Figure 1 One of the schematic diagrams of an undervoltage comparator circuit provided in an embodiment of this application; Figure 2 A second schematic diagram of an undervoltage comparator circuit provided in an embodiment of this application; Figure 3 A third schematic diagram of an undervoltage comparator circuit provided in an embodiment of this application; Figure 4 A fourth schematic diagram of an undervoltage comparator circuit provided in an embodiment of this application; Figure 5 Fifth schematic diagram of an undervoltage comparator circuit provided in an embodiment of this application; Figure 6 A voltage simulation diagram provided for an embodiment of this application; Figure 7 Another voltage simulation diagram provided for an embodiment of this application.

[0017] Key component symbols: 110 - Undervoltage comparator module; 120 - OR gate; 130 - Hysteresis module; 111 - First current source; 121 - Current control module; 122 - Second current source; 123 - Third current source; 131 - Fourth current source; 140 - Undervoltage input module; 150 - Feedback module; RA1 - First resistor; RA2 - Second resistor; RA3 - Third resistor; RA4 - Fourth resistor; RA5 - Fifth resistor; D1 - Diode. Detailed Implementation

[0018] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are some embodiments of the present invention, but not all embodiments.

[0019] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0020] In the description of this application, it should be noted that if the terms "upper", "lower", etc. appear to indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship that the product of this application is usually placed in, it is only for the convenience of describing this application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0021] Furthermore, the terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Additionally, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or modules is not necessarily limited to those explicitly listed, but may include other steps or modules not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0022] It should be noted that, where there is no conflict, the features in the embodiments of this application can be combined with each other.

[0023] The undervoltage comparison circuit provided in this application is illustrated below with reference to the accompanying drawings through several examples.

[0024] Figure 1 This is one of the schematic diagrams of an undervoltage comparator circuit provided in an embodiment of this application; as shown... Figure 1 As shown, the undervoltage comparison circuit includes: an undervoltage comparison module 110, an OR gate 120, and a hysteresis module 130.

[0025] The undervoltage comparison module 110 has multiple sensing input terminals used to acquire multiple sensing voltages, and the undervoltage threshold input terminal V of the undervoltage comparison module 110 is also included. UVTH The undervoltage comparison module 110 is used to receive an undervoltage threshold so that it compares multiple sensed voltages with the undervoltage threshold and generates multiple undervoltage comparison signals. The multiple output terminals of the undervoltage comparison module 110 are connected to the multiple input terminals of the OR gate 120 so that the OR gate 120 generates and outputs an undervoltage adjustment signal based on the multiple undervoltage comparison signals. The output of OR gate 120 is connected to the input of hysteresis module 130, and the first output of hysteresis module 130 is V. UVTH The undervoltage threshold input terminal of the undervoltage comparison module 110 is connected so that the hysteresis module 130 adjusts the undervoltage threshold according to the undervoltage adjustment signal. The second output terminal V of the hysteresis module 130 is connected. OUT Used to output the target undervoltage comparison signal.

[0026] In this embodiment, the undervoltage comparison circuit can be applied in a monitoring chip to monitor the sensed voltage of multiple sensing points. Specifically, the undervoltage comparison module 110 in the undervoltage comparison circuit has multiple sensing input terminals, which are respectively connected to multiple sensing points to receive the sensed voltage of multiple sensing points. The undervoltage comparison module 110 also has an undervoltage threshold input terminal to receive the undervoltage threshold.

[0027] The undervoltage comparison module 110 includes multiple individual 1-bit DACs to convert multiple analog signals (i.e., multiple sensed voltages) into digital signals. It then compares these sensed voltages with an undervoltage threshold, generating undervoltage comparison signals corresponding to multiple sense points. These signals are then input to an OR gate 120, which performs logical processing on the input signals and outputs the target undervoltage comparison signal as a digital signal. The second output of the hysteresis module 130 is also connected to an alarm device, allowing the device to determine whether an alarm should be triggered based on the target undervoltage comparison signal, thus monitoring the sensed voltages at multiple sense points.

[0028] Meanwhile, OR gate 120 generates and outputs an undervoltage adjustment signal to hysteresis module 130 based on multiple undervoltage comparison signals. Hysteresis module 130 adjusts the undervoltage threshold based on the undervoltage adjustment signal to realize the hysteresis function, eliminate oscillation, and enhance the stability of undervoltage comparison module 110.

[0029] In summary, this application provides an undervoltage comparison circuit, which includes an undervoltage comparison module, an OR gate, and a hysteresis module. Multiple sensing inputs of the undervoltage comparison module are used to acquire multiple sensing voltages, and an undervoltage threshold input of the undervoltage comparison module is used to receive an undervoltage threshold, enabling the undervoltage comparison module to compare the multiple sensing voltages and the undervoltage threshold to generate multiple undervoltage comparison signals. Multiple outputs of the undervoltage comparison module are connected to multiple inputs of the OR gate, enabling the OR gate to generate and output an undervoltage adjustment signal based on the multiple undervoltage comparison signals. The output of the OR gate is connected to the input of the hysteresis module, and the first output of the hysteresis module is connected to the undervoltage threshold input of the undervoltage comparison module, enabling the hysteresis module to adjust the undervoltage threshold based on the undervoltage adjustment signal. The second output of the hysteresis module is used to output a target undervoltage comparison signal. This application employs a multi-channel undervoltage comparison circuit and a multi-input OR gate to detect multiple undervoltage comparison signals. The undervoltage adjustment signal output by the OR gate is also fed back to the input of the hysteresis module to adjust the undervoltage threshold, thereby improving the bandwidth of the monitoring chip and enhancing its anti-interference capability and stability. At the same time, the hysteresis module also has a hysteresis function, making it more stable during normal operation and helping to reduce noise and interference.

[0030] Figure 2 This is a second schematic diagram of an undervoltage comparator circuit provided in an embodiment of this application, as shown below. Figure 2 As shown, the undervoltage comparison module 110 includes: multiple first switching transistors, a threshold input module, and a first current source 111.

[0031] The bases of the multiple first switching transistors are the multiple sensing input terminals of the undervoltage comparison module 110. The input terminal of the threshold input module is the undervoltage threshold input terminal of the undervoltage comparison module 110. The output terminal of the threshold input module is connected to the input terminal of the first current source 111. The multiple output terminals of the first current source 111 are respectively connected to the collectors of the multiple first switching transistors. The collectors of the multiple first switching transistors are the multiple output terminals of the undervoltage comparison module 110.

[0032] In this embodiment, all the first switching transistors are PNP type transistors, and the multiple first switching transistors are respectively (Q P1 Q P2 Q Pn-1 Q Pn ), multiple first switching transistors (Q P1 Q P2 Q Pn-1 QPn The bases of the two terminals are multiple sensing input terminals of the undervoltage comparator module 110.

[0033] The threshold input module uses a PNP transistor Q0. The base of the PNP transistor Q0 is the input terminal of the threshold input module, used to receive the undervoltage threshold. The emitter of the PNP transistor Q0 is the power supply terminal of the threshold input module. The emitter of the PNP transistor Q0 is connected to multiple first switching transistors (Q... P1 Q P2 Q Pn-1 Q Pn The emitter of the PNP transistor Q0 is connected to the output terminal of the threshold input module, and the collector of the PNP transistor Q0 is connected to the input terminal of the first current source 111.

[0034] Among them, the first current source 111 is a Wilson current source, including: an NPN transistor (Q N1 Q N2 Q Nn-1 Q Nn (Q6, Q7), the collector of NPN transistor Q7 is the input terminal of the first current source 111, the base and collector of NPN transistor Q7 are connected to the emitter and base of NPN transistor Q6 respectively, the collector of NPN transistor Q6 is connected to a preset power supply, and the base of NPN transistor Q7 is also connected to the emitter and base of NPN transistor (Q6, Q7). N1 Q N2 Q Nn-1 Q Nn The base connection of the NPN transistor (Q) N1 Q N2 Q Nn-1 Q Nn The emitter of the NPN transistor (Q7) is grounded. N1 Q N2 Q Nn-1 Q Nn The collector of the first current source 111 is one of the multiple output terminals, which are respectively connected to multiple first switching transistors (Q). P1 Q P2 Q Pn-1 Q Pn The collector of the NPN transistor (Q) N1 Q N2 Q Nn-1 Q Nn When the characteristics of Q6 and Q7 are completely equal, the current flowing through the NPN transistor (Q N1 Q N2 Q Nn-1 Q Nn The collector currents of Q7 and Q8 are equal, that is... .

[0035] The first current source 111 is then combined with multiple first switching transistors and a threshold input module to form a multi-channel 1-bit analog-to-digital converter. Multiple sensed voltages are respectively drawn from multiple first switching transistors (Q... P1 ~Q Pn The base input of the PNP transistor Q0 is compared with the undervoltage threshold voltage input from the base input. Because the voltage at the emitter of the PNP transistor Q0 is clamped, its expression is:

[0036] in, Indicates multiple first switching transistors (Q) P1 ~Q Pn The minimum base voltage of the PNP transistor Q0. Indicates the undervoltage threshold voltage. This represents the voltage at the emitter of the PNP transistor Q0. Because the voltage at the emitter of the PNP transistor Q0 is clamped, multiple first switching transistors (Q0, Q0, Q0, Q0) are affected. P1 ~Q Pn Among the PNP transistors (Q0 and Q0), only the switching transistor with the smallest base voltage can inject a large number of electrons from the emitter region to the base region, forming a large current. The current expression is:

[0037] in, This indicates that the current flows through multiple first switching transistors (Q). P1 ~Q Pn The current at the collector, Indicates the current amplification factor of the switching transistor. Emitter saturation current is a material- and process-dependent constant. This represents the base-emitter voltage. This refers to thermal voltage, which is temperature-dependent. At room temperature (… Approximately 26 Therefore, we can obtain: Every 60 increases , It increases by about 10 times.

[0038] The size of the switching transistor varies depending on the operating region. Its size in the cutoff, saturation, and amplification regions are respectively represented as follows:

[0039]

[0040]

[0041] in, , , These are the collector-base voltages in the cutoff, saturation, and amplification regions of the switching transistor, respectively. This is the saturation voltage drop, typically 0.2V~0.3V. VDD is the Early Voltage, and VDD is the power supply voltage. These are intrinsic characteristic parameters of the PN junction. Therefore, the voltage range of the undervoltage comparator circuit output is... ~ .

[0042] Figure 3 This is a third schematic diagram of an undervoltage comparator circuit provided in an embodiment of this application, as shown below. Figure 3 As shown, OR gate 120 includes: current control module 121, second current source 122, third current source 123 and first resistor RA1.

[0043] The multiple input terminals of the current control module 121 are the multiple input terminals of the OR gate 120, and the output terminal of the current control module 121 is the output terminal of the OR gate 120.

[0044] The input terminal of the second current source 122 is connected to a preset power supply through the first resistor RA1. The input terminal of the second current source 122 is also connected to multiple control terminals of the current control module 121. The output terminal of the second current source 122 is connected to the input terminal of the third current source 123. The first output terminal of the third current source 123 is also connected to the output terminal of the current control module 121.

[0045] Optionally, the current control module 121 includes: a plurality of second switching transistors and a plurality of third switching transistors.

[0046] The bases of the multiple second switching transistors are multiple input terminals of the current control module 121, the emitters of the multiple second switching transistors are grounded, and the collectors of the multiple second switching transistors are output terminals of the current control module 121.

[0047] The bases of multiple second switching transistors are respectively connected to the emitters of multiple third switching transistors, the collectors of multiple third switching transistors are connected to a preset power supply, and the bases of multiple third switching transistors are multiple control terminals of the current control module 121.

[0048] In this embodiment, all the second switching transistors are NPN type transistors, and the multiple second switching transistors are respectively (Q PN1 Q PN2 Q PNn-1 Q PNn), multiple second switching transistors (Q PN1 Q PN2 Q PNn-1 Q PNn The emitter of the transistor is grounded, and multiple second switching transistors (Q) PN1 Q PN2 Q PNn-1 Q PNn The collector of ) is the output terminal of the current control module 121.

[0049] Multiple second switching transistors (Q) PN1 Q PN2 Q PNn-1 Q PNn The base of the current control module 121 has multiple input terminals, which are used to connect to multiple first switching transistors (Q) respectively. P1 Q P2 Q Pn-1 Q Pn The collector of ) and multiple second switching transistors (Q) PN1 Q PN2 Q PNn-1 Q PNn The base of the transistor is also connected to the emitters of multiple third switching transistors, all of which are NPN transistors. The multiple third switching transistors are respectively (Q... NP1 Q NP2 Q NPn-1 Q NPn ), multiple third switching transistors (Q NP1 Q NP2 Q NPn-1 Q NPn The collector of the transistor is connected to a preset power supply, and multiple third switching transistors (Q) NP1 Q NP2 Q NPn-1 Q NPn The base of the current control module 121 is a plurality of control terminals, which are connected to the input terminal of the second current source 122.

[0050] The second current source 122 includes: NPN transistors Q9 and Q2. 10 and Q 11 NPN transistor Q 10 The collector of the transistor is the input terminal of the second current source 122, and the NPN transistor Q... 10 The collector of the transistor is connected to a preset power supply via a first resistor RA1. This preset power supply can be a current source I1 or an NPN transistor Q. 10 The collector is also connected to multiple third-party switching transistors (Q). NP1 Q NP2 Q NPn-1 QNPn The base of ).

[0051] NPN transistor Q 10 The bases of the transistors are respectively connected to the base of NPN transistor Q9 and the base of NPN transistor Q. 11 The emitter connection of the NPN transistor Q is... 10 The collector is also connected to the NPN transistor Q through the first resistor RA1. 11 The base connection of the NPN transistor Q 10 The emitter of Q9 is grounded, and the NPN transistor Q... 11 The collector of the transistor is connected to a preset power supply. The collector of the NPN transistor Q9 is the output terminal of the second current source 122 and is connected to the input terminal of the third current source 123.

[0052] The third current source 123 includes PNP transistors Q3, Q4, and Q5. The collector of PNP transistor Q4 is the input terminal of the third current source 123. The base of PNP transistor Q4 is connected to the base of PNP transistor Q3 and also to the emitter of PNP transistor Q5. The collector of PNP transistor Q4 is also connected to the base of PNP transistor Q5. The emitters of PNP transistors Q4 and Q3 are connected to a preset power supply, and the collector of PNP transistor Q5 is grounded.

[0053] The collector of the PNP transistor Q3 is the first output terminal of the third current source 123, which is connected to the output terminal of the current control module 121, i.e., connected to multiple second switching transistors (Q3, Q4, Q5, Q6, Q7). PN1 Q PN2 Q PNn-1 Q PNn The collector of ).

[0054] Among them, the PNP transistors Q3~Q5 in the third current source 123 and the NPN transistors Q9~Q5 in the second current source 122 11 With identical characteristics, the second current source 122 makes For high current, among which, The current flowing through the NPN transistor Q9, For the flow through NPN transistor Q 11 The current, The current supplied to current source I1, therefore NPN transistors Q9~Q 11 All are operating in the amplification region, NPN transistor Q 10 The collector voltage is clamped, as expressed below:

[0055] in, It is an NPN transistor Q10 collector voltage, The current flowing through the first resistor RA1, Let RA1 be the resistance value of the first resistor. The logic "1" and logic "0" values ​​of OR gate 120 are respectively:

[0056]

[0057] in, The voltage value corresponding to the logic "1" input to OR gate 120. The voltage value corresponding to the input logic "0" of OR gate 120, since and Therefore, it meets the design requirements for the output voltage of the multi-channel undervoltage comparator circuit.

[0058] Specifically, the undervoltage comparator circuit operates as follows: In one example, when multiple first switching transistors (Q...)... P1 ~Q Pn The base voltage of all of them is higher than the undervoltage threshold of the threshold input module. At that time, the voltage at the emitter of the threshold input module is ( Indicates the undervoltage threshold voltage. (representing the turn-on voltage between the base and emitter), due to multiple first switching transistors (Q) P1 ~Q Pn If the emitter of the first switching transistor (Q) is connected to the emitter of the threshold input module, then multiple first switching transistors (Q) will be connected. P1 ~Q Pn The voltage at the emitter of the ) is clamped to Due to multiple first switching transistors (Q) P1 ~Q Pn The base voltage of all of them is higher than the undervoltage threshold of the threshold input module. This leads to (in For multiple first switching transistors (Q) P1 ~Q Pn (The voltage difference between the base and emitter). Because The threshold voltage is less than the base-emitter turn-on voltage, so multiple first switching transistors (Q) P1 ~Q Pn When ) is in the off state, multiple first switching transistors (Q) will be in the off state. P1 ~Q Pn The collector voltage is pulled up to a low potential, which is then applied to multiple first switching transistors (Q). P1 ~Q Pn The collector of the transistor outputs a low-level signal to multiple second switching transistors (Q). PN1Q PN2 Q PNn-1 Q PNn The base of ). When multiple second switching transistors (Q) PN1 Q PN2 Q PNn-1 Q PNn When the base signals of ) are all low-level signals, it causes (in For multiple second switching transistors (Q) PN1 Q PN2 Q PNn-1 Q PNn The voltage difference between the base and emitter, therefore multiple second switching transistors (Q) PN1 Q PN2 Q PNn-1 Q PNn All are in the off state, and multiple second switching transistors (Q) are in the off state. PN1 Q PN2 Q PNn-1 Q PNn The collector voltage is pulled up to a high level, and finally an undervoltage adjustment signal is output. At this time, the undervoltage adjustment signal It is a high-level signal, that is, output in the form of logic "1".

[0059] In another example, when multiple first switching transistors (Q) P1 ~Q Pn One or more base voltages of the input module are below the undervoltage threshold. At that time, the voltage at the emitter of the threshold input module is (in This represents the minimum voltage among multiple base voltages. (representing the turn-on voltage between the base and emitter), due to multiple first switching transistors (Q) P1 ~Q Pn If the emitter of the first switching transistor (Q) is connected to the emitter of the threshold input module, then multiple first switching transistors (Q) will be connected. P1 ~Q Pn The voltage at the emitter of the ) is clamped to If the first switch Q P1 If the base voltage is the minimum voltage, then (in The first switching transistor Q P1 The voltage difference between the base and emitter of the first switching transistor Q) causes the first switching transistor Q to... P1 In saturation or amplification state, the remaining first switching transistors (Q) P2 ~Q Pn The first switch Q is in the off state. P1The collector voltage is pulled up to a high level, and the remaining first switching transistors (Q) P2 ~Q Pn The collector voltage is pulled down to a low level and then input to multiple second switching transistors (Q). PN1 Q PN2 Q PNn-1 Q PNn The base of ). When input to multiple second switching transistors (Q) PN1 Q PN2 Q PNn-1 Q PNn When one of the base signals is a high-level signal, it causes (in For the second switching transistor Q PN1 The voltage difference between the base and emitter, therefore the second switch Q PN1 In saturation or amplification state, the remaining second switching transistors (Q) PN2 Q PNn-1 Q PNn All of them are in the off state, and the remaining second switching transistors (Q) are in the off state. PN2 Q PNn-1 Q PNn The collector voltage is pulled down to a low level, and finally an undervoltage regulation signal is output. At this time, the undervoltage adjustment signal It is a low-level signal, that is, output in the form of logic "0".

[0060] Figure 4 This is a fourth schematic diagram of an undervoltage comparator circuit provided in an embodiment of this application, as shown below. Figure 4 As shown, the hysteresis module 130 includes: a fourth current source 131, a fourth switch, a fifth switch, a diode D1, a second resistor RA2, and a third resistor RA3.

[0061] The base of the fourth switch is the input terminal of the hysteresis module 130. The collector of the fourth switch is connected to the anode of the diode D1. The collector of the fourth switch is also connected to the second output terminal of the third current source 123. The emitter of the fourth switch is connected to the base of the fifth switch. The emitter of the fifth switch is grounded. The collector of the fifth switch is the second output terminal of the hysteresis module 130. The collector of the fifth switch is also connected to the third output terminal of the third current source 123.

[0062] One end of the second resistor RA2 is connected to the fourth output terminal of the third current source 123. One end of the second resistor RA2 is also connected to the reference voltage terminal. The other end of the second resistor RA2 is connected to the cathode of the diode D1. The other end of the second resistor RA2 is also connected to one end of the third resistor RA3. The other end of the third resistor RA3 is the first output terminal of the hysteresis module 130.

[0063] The input terminal of the fourth current source 131 is connected to the fifth output terminal of the third current source 123, and the output terminal of the fourth current source 131 is connected to the other end of the third resistor RA3.

[0064] In this embodiment, the fourth switch is an NPN type switch Q. 15 NPN type switching transistor Q 15 The base is the input terminal of the hysteresis module 130, which is connected to multiple second switching transistors (Q). PN1 Q PN2 Q PNn-1 Q PNn The collector of the NPN type switch Q 15 The emitter of the transistor is connected to the base of the fifth switching transistor, which is an NPN type switching transistor Q. 19 NPN type switching transistor Q 19 The emitter is grounded, and the NPN switch Q is... 19 The collector of the hysteresis module 130 is the second output terminal, used to output the target undervoltage comparison signal. When the NPN type switch Q... 15 If the undervoltage regulation signal received at the base is a high-level signal, then the NPN type switch Q will... 19 The target undervoltage comparison signal output from the collector is also a high-level signal when the NPN switch Q... 15 If the undervoltage regulation signal received at the base is a low-level signal, then the NPN switch Q will... 19 The target undervoltage comparison signal output from the collector is also a low-level signal.

[0065] The third current source 123 also includes: a PNP transistor Q. 12 Q 13 Q 14 and Q 20 Among them, the base of PNP transistor Q4 is connected to the base of PNP transistor Q4. 12 Q 13 Q 14 and Q 20 The base connection of the PNP transistor Q 12 Q 13 Q 14 and Q 20 The emitter is connected to the preset power supply, and the PNP transistor Q... 12 The collector is the second output terminal of the third current source 123, used to connect the NPN type switching transistor Q. 15 The collector of the PNP transistor Q 20 The collector is the third output terminal of the third current source 123, used to connect the NPN type switch Q. 19 The collector of the PNP transistor Q 13The collector of the transistor is the fourth output terminal of the third current source 123, used to connect one end of the second resistor RA2. The PNP transistor Q... 14 The collector is the fifth output terminal of the third current source 123, which is used to connect to the input terminal of the fourth current source 131.

[0066] The fourth current source 131 includes: an NPN transistor Q. 16 Q 17 and Q 18 NPN transistor Q 18 The collector is the input terminal of the fourth current source 131, and the NPN transistor Q... 18 The base of the NPN transistor Q is connected 16 The base of the NPN transistor Q 18 The base is also connected to the NPN transistor Q. 17 The emitter of the NPN transistor Q 18 The collector is also connected to the NPN transistor Q. 17 The base of the NPN transistor Q 18 The emitter and NPN transistor Q 16 The emitter is grounded, and the NPN transistor Q... 17 The collector of the NPN transistor is connected to the preset power supply. 16 The collector is the output terminal of the fourth current source 131, and is connected to the other end of the third resistor RA3.

[0067] Specifically, when the undervoltage adjustment signal When output in the form of logic "1", the NPN transistor Q 15 When in saturation, the NPN transistor Q 15 When the collector voltage is pulled down to a low potential, the voltage on the left side of diode D1 is less than the voltage on the right side, so diode D1 is in the off state, and the current flowing through diode D1 is almost zero. At this time, the undervoltage threshold voltage is expressed as: .in, Let RA2 be the resistance value of the second resistor. Let RA3 be the resistance value of the third resistor. The bandgap reference voltage provided to the reference voltage terminal.

[0068] When undervoltage adjustment signal When outputting in the form of logic "0", the NPN transistor Q 15 When in the cutoff state, the NPN transistor Q 15 The collector voltage is pulled up to a high potential, and the voltage on the left side of diode D1 is greater than the voltage on the right side. Therefore, diode D1 is in the conducting state, and the current flowing through diode D1 is approximately equal to... At this point, the undervoltage threshold voltage is expressed as: .

[0069] Optionally, the hysteresis module 130 further includes: a fourth resistor RA4; the collector of the fourth switch is connected to the anode of the diode D1 through the fourth resistor RA4.

[0070] Optionally, the hysteresis module 130 further includes: a fifth resistor RA5; one end of the second resistor RA2 is connected to the third output terminal of the third current source 123 through the fifth resistor RA5.

[0071] Figure 5 This is the fifth schematic diagram of an undervoltage comparator circuit provided in an embodiment of this application, as shown below. Figure 5 As shown, the undervoltage comparison circuit also includes an undervoltage input module 140.

[0072] The multiple sensing input terminals of the undervoltage input module 140 are used to connect to multiple sensing points to receive multiple sensing voltages, and the multiple output terminals of the undervoltage input module 140 are connected to the multiple sensing input terminals of the undervoltage comparison module 110.

[0073] Optionally, the undervoltage input module 140 includes multiple Zener diodes and multiple sixth resistors.

[0074] One end of each of the multiple sixth resistors is a multiple sensing input terminal of the undervoltage input module 140, and the other end of each of the multiple sixth resistors is a multiple output terminal of the undervoltage input module 140. The other end of each of the multiple sixth resistors is also connected to the cathode of a multiple Zener diode, and the anode of the multiple Zener diodes is grounded.

[0075] In this embodiment, the undervoltage input module 140 has multiple sensing input terminals for receiving sensing voltages from multiple sensing points. In order to prevent the sensing voltage from being too large and damaging the switching transistor in the undervoltage comparison module 110, multiple sixth resistors (R1, R2, ..., Rn-1, Rn) and multiple Zener diodes (Z1, Z2, ..., Zn-1, Zn) are respectively set between the multiple sensing input terminals and the multiple sensing points.

[0076] Specifically, taking the first switching transistor Q as an example... P1 For example, the first switching transistor Q P1 The base of the circuit is connected to the sensing point SENSE1 through resistor R1. The other end of resistor R1 is also grounded through Zener diode D1. The sensing voltages received by multiple sensing input terminals are clamped by multiple sixth resistors and multiple Zener diodes to prevent extreme voltage inputs from damaging the undervoltage comparator circuit.

[0077] Optionally, the undervoltage comparison circuit also includes a feedback module 150.

[0078] The first input terminal of the feedback module 150 is connected to the preset power supply terminal, the second input terminal of the feedback module 150 is connected to the undervoltage threshold input terminal of the undervoltage comparison module 110, and the output terminal of the feedback module 150 is connected to the collector of multiple second switching transistors.

[0079] Specifically, the feedback module 150 includes a PNP transistor Q1, an NPN transistor Q8, and a seventh resistor RA7. One end of the seventh resistor is the second input terminal of the feedback module 150, and the other end of the seventh resistor RA7 is connected to the emitter of the PNP transistor Q1. The base of the PNP transistor Q1 is the first input terminal of the feedback module 150. The collector of the PNP transistor Q1 is connected to the base of the NPN transistor Q8. The collector of the NPN transistor Q8 is the output terminal of the feedback module 150 and is connected to the collectors of multiple second switching transistors. The emitter of the NPN transistor Q8 is grounded. The voltage output from the collectors of the multiple second switching transistors is fed back to the collector of the PNP transistor Q1, and then the voltage is divided by the seventh resistor RA7, which makes the circuit more stable.

[0080] The third current source 123 also includes: a PNP type switch Q2, the base of the PNP type switch Q2 is connected to the base of the PNP type switch Q4, the emitter of the PNP type switch Q2 is grounded, and the collector of the PNP type switch Q2 can be used as a preset power supply terminal and connected to the base of the PNP type transistor Q1.

[0081] It should be noted that the undervoltage comparator circuit can simultaneously input multiple analog signals, i.e., multiple sensed voltages, for effective monitoring. When only a small number of signals need to be detected, simply connect the input ports to the same input terminal. The undervoltage threshold can be freely adjusted by changing the voltage at the threshold input port. When one or more of the input sensed voltages are below the undervoltage threshold, the output of the undervoltage comparator circuit will output a low level; when all input sensed voltages are above the undervoltage threshold, the output of the undervoltage comparator circuit will output a high level. Because fewer components are required and the required current source voltage is low, the power consumption is low.

[0082] Figure 6 A voltage simulation diagram provided for an embodiment of this application. Figure 7 Another voltage simulation diagram provided for an embodiment of this application, such as Figure 6 As shown, Figure 6 The horizontal axis 'a' represents the input voltage signal (which varies from 1V to 4V). Figure 6The vertical axis V(V) represents the undervoltage adjustment signal. Four input channels are selected, with the voltage of any one channel varying from 1V to 4V, and the voltages of the other three ports set to 2.5V. The threshold voltage input port receives 2.268V. As shown in the figure, when the input voltage is around 2.268V, the voltage transitions from low to high. When all ports vary from 1V to 4V, the resulting circuit simulation diagram is similar to the one above. Figure 1 To.

[0083] The resistor set at this time Current source Since the undervoltage threshold voltage is 2.268V and the bandgap reference voltage is 2.5V, the threshold voltage output by the hysteresis module 130 will jump around 2.268V, and should jump from 2.268V to 2.249V. Figure 7 It can be seen that, Figure 7 The horizontal axis Vin represents the input voltage signal. Figure 7 The vertical axis V(V) represents the threshold voltage signal. The voltage jump situation meets the design standard and realizes the proportional hysteresis function.

[0084] The above are merely specific embodiments of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. An undervoltage comparator circuit, characterized in that, The undervoltage comparison circuit includes: an undervoltage comparison module, an OR gate, and a hysteresis module; The undervoltage comparison module has multiple sensing input terminals for acquiring multiple sensing voltages, and an undervoltage threshold input terminal for receiving an undervoltage threshold, so that the undervoltage comparison module compares the multiple sensing voltages and the undervoltage threshold to generate multiple undervoltage comparison signals; the undervoltage comparison module has multiple output terminals connected to the multiple input terminals of the OR gate, so that the OR gate generates and outputs an undervoltage adjustment signal based on the multiple undervoltage comparison signals; The output of the OR gate is connected to the input of the hysteresis module, the first output of the hysteresis module is connected to the undervoltage threshold input of the undervoltage comparison module, so that the hysteresis module adjusts the undervoltage threshold according to the undervoltage adjustment signal, and the second output of the hysteresis module is used to output the target undervoltage comparison signal. The hysteresis module includes: a fourth current source, a fourth switch, a fifth switch, a diode, a second resistor, and a third resistor; The base of the fourth switch is the input terminal of the hysteresis module. The collector of the fourth switch is connected to the anode of the diode. The collector of the fourth switch is also connected to the second output terminal of the third current source of the OR gate. The emitter of the fourth switch is connected to the base of the fifth switch. The emitter of the fifth switch is grounded. The collector of the fifth switch is the second output terminal of the hysteresis module. The collector of the fifth switch is also connected to the third output terminal of the third current source. One end of the second resistor is connected to the fourth output terminal of the third current source of the OR gate, and another end of the second resistor is also connected to the reference voltage terminal. The other end of the second resistor is connected to the cathode of the diode, and the other end of the second resistor is also connected to one end of the third resistor. The other end of the third resistor is the first output terminal of the hysteresis module. The input terminal of the fourth current source is connected to the fifth output terminal of the third current source of the OR gate, and the output terminal of the fourth current source is connected to the other end of the third resistor.

2. The circuit as described in claim 1, characterized in that, The undervoltage comparison module includes: a plurality of first switching transistors, a threshold input module, and a first current source; The bases of the plurality of first switching transistors are respectively the plurality of sensing input terminals of the undervoltage comparison module. The input terminal of the threshold input module is the undervoltage threshold input terminal of the undervoltage comparison module. The output terminal of the threshold input module is connected to the input terminal of the first current source. The plurality of output terminals of the first current source are respectively connected to the collectors of the plurality of first switching transistors. The collectors of the plurality of first switching transistors are the plurality of output terminals of the undervoltage comparison module.

3. The circuit as described in claim 1, characterized in that, The OR gate includes: a current control module, a second current source, a third current source, and a first resistor; The multiple input terminals of the current control module are the multiple input terminals of the OR gate, and the output terminal of the current control module is the output terminal of the OR gate; The input terminal of the second current source is connected to a preset power supply through the first resistor. The input terminal of the second current source is also connected to multiple control terminals of the current control module. The output terminal of the second current source is connected to the input terminal of the third current source. The first output terminal of the third current source is also connected to the output terminal of the current control module.

4. The circuit as described in claim 3, characterized in that, The current control module includes: multiple second switching transistors and multiple third switching transistors; The bases of the plurality of second switching transistors are the plurality of input terminals of the current control module, the emitters of the plurality of second switching transistors are grounded, and the collectors of the plurality of second switching transistors are the output terminals of the current control module. The bases of the plurality of second switching transistors are respectively connected to the emitters of the plurality of third switching transistors, the collectors of the plurality of third switching transistors are connected to a preset power supply, and the bases of the plurality of third switching transistors are multiple control terminals of the current control module.

5. The circuit as described in claim 1, characterized in that, The hysteresis module further includes a fourth resistor; the collector of the fourth switch is connected to the anode of the diode through the fourth resistor.

6. The circuit as described in claim 1, characterized in that, The hysteresis module further includes a fifth resistor; one end of the second resistor is connected to the third output terminal of the third current source through the fifth resistor.

7. The circuit as described in claim 1, characterized in that, The undervoltage comparison circuit further includes: an undervoltage input module; The multiple sensing input terminals of the undervoltage input module are used to connect to multiple sensing points to receive multiple sensing voltages, and the multiple output terminals of the undervoltage input module are connected to the multiple sensing input terminals of the undervoltage comparison module.

8. The circuit as described in claim 7, characterized in that, The undervoltage input module includes: multiple Zener diodes and multiple sixth resistors; One end of each of the plurality of sixth resistors is a plurality of sensing input terminals of the undervoltage input module, and the other end of each of the plurality of sixth resistors is a plurality of output terminals of the undervoltage input module. The other end of each of the plurality of sixth resistors is also connected to the cathodes of the plurality of Zener diodes, and the anodes of the plurality of Zener diodes are grounded.

9. The circuit as described in claim 4, characterized in that, The undervoltage comparison circuit further includes: a feedback module; The first input terminal of the feedback module is connected to a preset power supply terminal, the second input terminal of the feedback module is connected to the undervoltage threshold input terminal of the undervoltage comparison module, and the output terminal of the feedback module is connected to the collector of the plurality of second switching transistors.

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