Multi-connected system and communication control method

Abstract

The application discloses a multi-connected system and a communication control method, and relates to the technical field of air conditioner multi-connected system communication control. The multi-connected system comprises a host computer, a plurality of slave computers, a plurality of fault feedback circuits, a voltage dividing circuit and a fault detection circuit. The host computer is connected with the plurality of slave computers through a communication bus. Each fault feedback circuit is connected with a corresponding slave computer. The voltage dividing circuit is arranged on a fault alarm line of the communication bus and has a plurality of access ends connected with the output ends of the plurality of fault feedback circuits respectively. The input end of the fault detection circuit is connected with the voltage dividing circuit, and the output end is connected with the host computer. The access positions of the plurality of access ends in the voltage dividing circuit are different, so that the fault detection circuit outputs distinguishable detection voltages when different fault feedback circuits respond to the fault signals of the corresponding slave computers respectively, and the host computer determines the slave computer with the fault according to the detection voltages. The application can improve the timeliness of fault detection of the multi-connected system.

Description

Technical Field

[0001] This invention relates to the field of communication control technology for multi-split air conditioning systems, specifically to a multi-split system and its communication control method. Background Technology

[0002] A multi-split air conditioning system includes a master unit and multiple slave units, which exchange data via a communication bus. In a type of multi-split system using an RS-485 communication bus, the master unit sends a name request to each slave unit in a polling order. The named slave unit responds to the name request and returns the corresponding information to the master unit, thereby enabling the master unit to obtain the operating status of each slave unit.

[0003] Under the aforementioned master-slave polling communication mechanism, when a slave device fails before the master has sent a call-to-name request to it, the slave device must wait to be called before it can upload fault information. For example, if a slave device fails after the current round of communication, it may need to wait for the master to complete polling of other slave devices before it has the opportunity to upload information again. As the number of slave devices increases or the polling interaction time increases, the waiting time before fault information is uploaded may increase accordingly, affecting the master's timely response to faults. Summary of the Invention

[0004] This invention provides a multi-unit system and a communication control method, aiming to solve the problem in existing multi-unit systems that use a master-slave polling communication mechanism, where a faulty slave unit must wait for the master unit to call its name before it can upload fault information, resulting in the master unit being unable to identify the faulty slave unit and obtain its fault information in a timely manner.

[0005] In a first aspect, the present invention provides a multi-unit system, the multi-unit system comprising a host, multiple slave units, multiple fault feedback circuits, a voltage divider circuit, and a fault detection circuit; the host is connected to the multiple slave units via a communication bus; the multiple fault feedback circuits are respectively configured corresponding to the multiple slave units, and the input terminal of each fault feedback circuit is connected to the corresponding slave unit; the voltage divider circuit is disposed on the fault alarm line of the communication bus and has multiple access terminals respectively connected to the output terminals of the multiple fault feedback circuits; the input terminal of the fault detection circuit is connected to the voltage divider circuit, and the output terminal of the fault detection circuit is connected to the host; wherein the multiple access terminals are connected at different positions in the voltage divider circuit, so that when different fault feedback circuits respond to the fault signals of the corresponding slave units, the fault detection circuit outputs a distinguishable detection voltage, and the host is used to determine the slave unit that has malfunctioned based on the detection voltage.

[0006] Furthermore, the fault feedback circuit includes a switching device, a first resistor, and a second resistor; the input side of the switching device is connected to the corresponding slave device via the first resistor, the output side of the switching device is connected to the output terminal of the fault feedback circuit, and the second resistor is connected between the output terminal of the fault feedback circuit and the reference ground.

[0007] Furthermore, the voltage divider circuit includes a plurality of access nodes arranged sequentially along the fault alarm line and a voltage divider resistor connected between adjacent access nodes, wherein the plurality of access terminals are respectively disposed at the plurality of access nodes.

[0008] Furthermore, the fault detection circuit includes a host-side voltage divider circuit, an isolation voltage detection circuit, and a differential-to-single-ended circuit; the input terminal of the host-side voltage divider circuit is connected to the voltage divider circuit, the output terminal of the host-side voltage divider circuit is connected to the input terminal of the isolation voltage detection circuit, the output terminal of the isolation voltage detection circuit is connected to the input terminal of the differential-to-single-ended circuit, and the output terminal of the differential-to-single-ended circuit is connected to the host.

[0009] Furthermore, the host-side voltage divider circuit includes a third resistor, a fourth resistor, and a first capacitor. One end of the third resistor is connected to the voltage divider circuit, and the other end of the third resistor is connected to one end of the fourth resistor, one end of the first capacitor, and the isolation voltage detection circuit, respectively. The other end of the fourth resistor and the other end of the first capacitor are connected to reference ground.

[0010] Furthermore, the isolation voltage detection circuit includes an isolation voltage detection chip, the input terminal of which is connected to the host-side voltage divider circuit, and the output terminal of which is connected to the differential-to-single-ended circuit.

[0011] Furthermore, the differential-to-single-ended circuit includes an operational amplifier, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a second capacitor, and a third capacitor. The fifth resistor is connected between the isolation voltage detection circuit and the non-inverting input of the operational amplifier. The sixth resistor is connected between the isolation voltage detection circuit and the inverting input of the operational amplifier. The seventh resistor is connected between the non-inverting input and reference ground. The eighth resistor is connected between the inverting input and the output of the operational amplifier. The second capacitor is connected in parallel with the seventh resistor, and the third capacitor is connected in parallel with the eighth resistor. The output of the operational amplifier is connected to the host computer.

[0012] Furthermore, the host stores a correspondence between multiple preset voltage ranges and multiple slave addresses, and the multiple preset voltage ranges do not overlap with each other; wherein, the host is used to determine the slave address of the faulty slave according to the preset voltage range to which the detected voltage belongs.

[0013] Secondly, the present invention also provides a communication control method for a multi-unit air conditioning system, used to control the multi-unit air conditioning system described in any of the above claims, the method comprising: The host machine communicates with multiple slave machines via the communication bus. If any of the slave devices fails and no call request is received from the master for that slave device, the slave device controls the corresponding fault feedback circuit to change the voltage at its output terminal. The host obtains the detection voltage generated after the voltage divider circuit through the fault detection circuit. The detection voltage generated when different fault feedback circuits respond to the fault signals of their respective slave devices can be distinguished. The host determines the faulty slave device based on a preset correspondence between the detected voltage and the slave device address; The host adjusts the polling order according to the determined slave address, sends a name request to the faulty slave first through the communication bus, and receives the fault information sent by the slave in response to the name request.

[0014] This invention discloses a multi-split air conditioning system and a communication control method. The multi-split air conditioning system includes a host, multiple slave units, multiple fault feedback circuits, a voltage divider circuit, and a fault detection circuit. The host is connected to the multiple slave units via a communication bus. The multiple fault feedback circuits are respectively configured to correspond to the multiple slave units, with the input terminal of each fault feedback circuit connected to the corresponding slave unit. The voltage divider circuit is located on a fault alarm line and has multiple access terminals respectively connected to the output terminals of the multiple fault feedback circuits. The input terminal of the fault detection circuit is connected to the voltage divider circuit, and its output terminal is connected to the host. The multiple access terminals are located at different positions in the voltage divider circuit, so that when different fault feedback circuits respond to the fault signals of their corresponding slave units, the fault detection circuit outputs a distinguishable detection voltage. The host determines the slave unit that has experienced a fault based on the detection voltage, thereby enabling the differentiation of fault sources through a shared fault alarm line, reducing the reliance on host polling for fault source identification, providing a basis for timely acquisition of fault information, and improving the timeliness of fault detection in the multi-split air conditioning system. Attached Figure Description

[0015] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the following description of the embodiments will be briefly introduced. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0016] Figure 1 This is a block diagram of a multi-unit air conditioning system provided in an embodiment of the present invention; Figure 2 This is a block diagram of a multi-unit air conditioning system provided in another embodiment of the present invention; Figure 3 This is a circuit diagram of a fault feedback circuit provided in an embodiment of the present invention; Figure 4 This is a circuit diagram of a fault detection circuit provided in an embodiment of the present invention; Figure 5 This is a flowchart illustrating a communication control method provided in an embodiment of the present invention; Figure 6 This is a schematic diagram of a sub-process of a communication control method provided in an embodiment of the present invention. Detailed Implementation

[0017] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0018] It should be understood that, when used in this specification and the appended claims, the terms “comprising” and “including” indicate the presence of the described features, integrals, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integrals, operations, elements, components and / or collections thereof.

[0019] It should also be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used in this specification and the appended claims refers to any combination and all possible combinations of one or more of the associated listed items, and includes such combinations.

[0020] Furthermore, the directional terms used in this invention, such as "up," "down," "front," "back," "left," "right," "inner," "outer," and "side," are merely for reference to the accompanying drawings and the product's usage state. Therefore, the directional terms used are for illustrating and understanding this invention, and not for limiting it. Additionally, in the accompanying drawings, structures that are similar or identical are indicated by the same reference numerals.

[0021] See Figures 1 to 4 , Figure 1 This is a block diagram of a multi-unit air conditioning system provided in an embodiment of the present invention; Figure 2 This is a block diagram of a multi-unit air conditioning system provided in another embodiment of the present invention; Figure 3 This is a circuit diagram of a fault feedback circuit provided in an embodiment of the present invention; Figure 4 This is a circuit diagram of a fault detection circuit provided in an embodiment of the present invention. Figure 1 As shown, the present invention provides a multi-split air conditioning system, which includes a host 10, multiple slave units 20, multiple fault feedback circuits 30, a voltage divider circuit 40, and a fault detection circuit 50. The host 10 is connected to the multiple slave units 20 via a communication bus. The multiple fault feedback circuits 30 are respectively configured to correspond to the multiple slave units 20, and the input terminal of each fault feedback circuit 30 is connected to the corresponding slave unit 20. The voltage divider circuit 40 is disposed on the fault alarm line of the communication bus and has multiple access terminals respectively connected to the output terminals of the multiple fault feedback circuits 30. The input terminal of the fault detection circuit 50 is connected to the voltage divider circuit 40, and the output terminal of the fault detection circuit 50 is connected to the host 10. The multiple access terminals are located at different positions in the voltage divider circuit 40 so that when different fault feedback circuits 30 respond to the fault signals of the corresponding slave units 20, the fault detection circuit 50 outputs a distinguishable detection voltage, and the host 10 is used to determine the slave unit 20 that has failed based on the detection voltage.

[0022] Specifically, the host 10 can be the outdoor unit or central controller of a multi-split system, and the slave 20 can be the indoor unit of a multi-split system; in other embodiments, the specific types of the host 10 and slave 20 can be determined according to the system architecture of the multi-split system, and the present invention does not limit them.

[0023] The communication bus is used for data interaction between the host 10 and multiple slave devices 20. In this embodiment, the communication bus is an RS-485 communication bus, which includes a communication line for data interaction and a fault alarm line. The host 10 and multiple slave devices 20 interact with each other through the communication line according to a master-slave polling mechanism. That is, the host 10 sends a name request to each slave device 20 in turn according to the polling order, and the named slave device 20 responds to the name request and returns its status information to the host 10. The fault alarm line is an out-of-band signal line independent of the communication line, used to carry the fault request signal on the slave device 20 side. Specifically, it can be a dedicated wire laid in the same cable as the communication line. This invention does not limit this.

[0024] As described in the background section, under the master-slave polling communication mechanism, slave device 20 only has the opportunity to upload information after being called by master device 10. When slave device 20 malfunctions and has not yet been called, its fault information needs to wait for the polling order to reach slave device 20 before it can be uploaded. To address this, this embodiment adds a fault feedback circuit 30, a voltage divider circuit 40, and a fault detection circuit 50 to the multi-unit system: each slave device 20 is provided with a corresponding fault feedback circuit 30, and the input terminal of the fault feedback circuit 30 is connected to the corresponding slave device 20, specifically to the fault alarm pin of the master control chip of the corresponding slave device 20; the output terminal of each fault feedback circuit 30 is connected to the corresponding input terminal of the voltage divider circuit 40; the voltage divider circuit 40 is set on the fault alarm line, and its side closer to master device 10 is connected to the input terminal of the fault detection circuit 50; the output terminal of the fault detection circuit 50 is connected to the fault detection port of the master control chip of master device 10.

[0025] When slave device 20 malfunctions and has not yet been polled, it changes the voltage at its output terminal through the corresponding fault feedback circuit 30. This voltage change is transmitted to the fault detection circuit 50 via the voltage divider circuit 40 and the fault alarm line. Because each access terminal is positioned differently in the voltage divider circuit 40, the voltage division relationship corresponding to each fault feedback circuit 30's response is different. Therefore, the detection voltage output by the fault detection circuit 50 is distinguishable. The master device 10 can directly determine the faulty slave device 20 based on the detection voltage and prioritize its polling, without waiting for the slave device 20 to be polled. Thus, this embodiment, while retaining the RS-485 master-slave polling communication mechanism, adds an out-of-band fault request channel independent of the communication line for the slave device 20, enabling it to actively request communication in the event of an emergency fault, thus shortening the uploading waiting time for fault information.

[0026] As a further embodiment, the fault feedback circuit 30 includes a switching device U1, a first resistor R1, and a second resistor R2; the input side of the switching device U1 is connected to the corresponding slave device 20 via the first resistor R1, the output side of the switching device U1 is connected to the output terminal of the fault feedback circuit 30, and the second resistor R2 is connected between the output terminal of the fault feedback circuit 30 and the reference ground.

[0027] Among them, see Figure 3 The switching device U1 is an optocoupler, with a light-emitting element on its input side and a light-receiving element on its output side. It transmits the on / off state via optical signals, thereby achieving electrical isolation between the slave device 20's circuitry and the fault alarm line. Specifically, the first end of the light-emitting element is connected to the first power supply +VCC4, and the second end is connected to the corresponding fault alarm pin of the slave device 20 via the first resistor R1. The first end of the light-receiving element is connected to the second power supply +VCC3, and the second end is connected to the output terminal AD-O of the fault feedback circuit 30. The second resistor R2 is connected between the output terminal AD-O and the reference ground GND1. The first resistor R1 limits the current flowing through the light-emitting element and the fault alarm pin of the slave device 20's main control chip, providing current limiting protection. The second resistor R2 is a pull-down resistor, used to definitively pull the potential of the output terminal AD-O to the reference ground when the switching device U1 is turned off, preventing the output terminal from being floating and introducing interference.

[0028] The fault feedback circuit 30 operates as follows: When the corresponding slave device 20 is fault-free, the master control chip of the slave device 20 controls the fault alarm pin to output a high level. There is no driving voltage difference across the light-emitting element, no current flows through the light-emitting element, the switching device U1 is in the off state, and the output terminal AD-O is at a low level due to the pull-down effect of the second resistor R2. When the corresponding slave device 20 malfunctions and priority communication is required, the master control chip of the slave device 20 switches the fault alarm pin from a high level to a low level. Current flows from the first power supply +VCC4 through the light-emitting element and the first resistor R1 into the fault alarm pin. The light-emitting element emits light and turns on the light-receiving element. The switching device U1 changes from the off state to the on state, and the output terminal AD-O is pulled up to a high level by the second power supply +VCC3. Thus, the slave device 20 can control the output terminal AD-O of the fault feedback circuit 30 to switch between low and high levels by changing the level of the fault alarm pin, thereby issuing a fault request signal on the fault alarm line. It is understood that in other embodiments, the switching device U1 can also be a device with controllable switching function, such as a transistor, MOSFET, relay or analog switch, with its input side as the control side and its output side as the switching side, which can also realize the control of the output terminal AD-O level by the slave device 20. The present invention does not limit this.

[0029] As a further embodiment, the voltage divider circuit 40 includes a plurality of access nodes arranged sequentially along the fault alarm line and a voltage divider resistor 41 connected between adjacent access nodes, wherein the plurality of access terminals are respectively arranged at the plurality of access nodes.

[0030] Among them, see Figure 1 The voltage divider circuit 40 includes multiple access nodes and voltage divider resistors 41 that are alternately connected in series along the extension direction of the fault alarm line. The output terminal AD-O of each fault feedback circuit 30 is connected to an access node. The end of the resistor chain near the host 10 is connected to the input terminal of the fault detection circuit 50, thereby forming a series resistor chain distributed sequentially along the fault alarm line.

[0031] Correspondingly, when the slave device 20 fails, the output terminals AD-O of each fault feedback circuit 30 remain at a low level under the pull-down effect of the second resistor R2, the voltage at the input terminal AD-I of the fault detection circuit 50 at the end of the fault alarm line is 0V, and the detection voltage output by the fault detection circuit 50 is 0V accordingly. Because the multiple access points are located at different positions in the voltage divider circuit 40, when a fault feedback circuit 30 responds and pulls its output AD-O high, the voltage division relationship experienced by this high-level voltage when it reaches the input of the fault detection circuit 50 is related to the position of that access point: on the one hand, the number of voltage divider resistors 41 connected in series between the trigger access node and the input of the fault detection circuit 50 varies with the access position, and they form a voltage divider with the input impedance of the fault detection circuit 50; on the other hand, the outputs of the remaining untriggered fault feedback circuits 30 remain at the reference ground potential under the pull-down effect of the second resistor R2, forming a parallel branch grounded through the voltage divider resistors 41 relative to the trigger access node, and the equivalent resistance of this parallel branch also varies with the access position. Therefore, when the fault feedback circuits 30 at different access positions respond individually, the voltage at the end of the fault alarm line, i.e., the input of the fault detection circuit 50, is different from each other, and the fault detection circuit 50 outputs a distinguishable detection voltage accordingly. In general, the closer the trigger access node is to the fault detection circuit 50, the smaller the equivalent series resistance between it and the input terminal of the fault detection circuit 50, the smaller the impact on the parallel branch to ground, and the higher the detection voltage; conversely, the closer the trigger access node is to the fault detection circuit 50, the lower the detection voltage.

[0032] For example, with Figure 1Taking the three slave devices 20 shown as an example, assuming the second power supply +VCC3 is 5V, after design, the voltage detection voltage of the slave device 20 triggered at the access terminal closest to the fault detection circuit 50 is approximately 4.6V, the voltage detection voltage of the slave device 20 triggered at the middle access terminal is approximately 4.3V, and the voltage detection voltage of the slave device 20 triggered at the access terminal furthest from the fault detection circuit 50 is approximately 4.0V. The interval between adjacent detection voltages is approximately 0.3V, making them distinguishable. In practical applications, the resistance values ​​of the voltage divider resistor 41 and the second resistor R2 should be comprehensively designed based on the number of slave devices 20, the second power supply voltage, the input impedance of the fault detection circuit 50, and the sampling accuracy of the host 10. This ensures that the detection voltage generated when each access terminal is triggered individually is unique, and the interval between adjacent detection voltages is greater than a preset discrimination margin, for example, greater than the sum of the voltage deviation caused by the sampling error of the host 10 and the resistance tolerance, to avoid misjudgment.

[0033] As a further embodiment, the fault detection circuit 50 includes a host-side voltage divider circuit 51, an isolation voltage detection circuit 52, and a differential-to-single-ended circuit 53; the input terminal of the host-side voltage divider circuit 51 is connected to the voltage divider circuit 40, the output terminal of the host-side voltage divider circuit 51 is connected to the input terminal of the isolation voltage detection circuit 52, the output terminal of the isolation voltage detection circuit 52 is connected to the input terminal of the differential-to-single-ended circuit 53, and the output terminal of the differential-to-single-ended circuit 53 is connected to the host 10.

[0034] Among them, see Figure 2 The fault detection circuit 50 includes a host-side voltage divider circuit 51, an isolation voltage detection circuit 52, and a differential-to-single-ended circuit 53. The input terminal of the host-side voltage divider circuit 51 is connected to the voltage divider circuit 40 as the input terminal of the fault detection circuit 50, and is used to adjust the voltage at the end of the fault alarm line to the input range of the subsequent circuit. The output terminal of the host-side voltage divider circuit 51 is connected to the input terminal of the isolation voltage detection circuit 52, which is used to convert the input single-ended voltage into an isolated differential voltage signal to achieve electrical isolation between the fault alarm line side and the host 10 side.

[0035] The output of the isolation voltage detection circuit 52 is connected to the input of the differential-to-single-ended circuit 53. The differential-to-single-ended circuit 53 is used to perform subtraction and amplification operations on the differential voltage signal to restore it to the single-ended detection voltage.

[0036] The output of the differential-to-single-ended circuit 53 is connected to the fault detection port of the host 10 as the output of the fault detection circuit 50. This fault detection port is the AD sampling port of the host 10 main control chip.

[0037] Through three-stage processing—voltage division on the host side, isolation voltage detection, and differential-to-single-ended conversion—the voltage on the fault alarm line is converted into a high-precision detection voltage for the host 10 to sample. This not only improves the detection accuracy and anti-interference capability but also achieves electrical isolation between the two circuits, which helps ensure the reliability of the system.

[0038] As a further embodiment, the host-side voltage divider circuit 51 includes a third resistor R3, a fourth resistor R4, and a first capacitor C1. One end of the third resistor R3 is connected to the voltage divider circuit 40, and the other end of the third resistor R3 is connected to one end of the fourth resistor R4, one end of the first capacitor C1, and the isolation voltage detection circuit 52, respectively. The other ends of the fourth resistor R4 and the first capacitor C1 are connected to reference ground.

[0039] Among them, see Figure 4 One end of the third resistor R3 is connected to the input terminal AD-I of the fault detection circuit 50 and is connected to the voltage divider circuit 40. The other end of the third resistor R3 is connected to one end of the fourth resistor R4, one end of the first capacitor C1, and the input terminal VIN of the isolation voltage detection circuit 52. The other ends of the fourth resistor R4 and the first capacitor C1 are connected to the reference ground GND1. The third resistor R3 and the fourth resistor R4 divide the voltage at the end of the fault alarm line and adjust it to a voltage range that matches the input range of the isolation voltage detection chip U2. The input voltage VIN of the isolation voltage detection chip U2 satisfies: VIN=VAD-I×R4 / (R3+R4), where VAD-I is the voltage at the input terminal AD-I of the fault detection circuit 50. The first capacitor C1 and the fourth resistor R4 are connected in parallel to filter out high-frequency interference on the fault alarm line and improve the stability of the detection.

[0040] As a further embodiment, the isolation voltage detection circuit 52 includes an isolation voltage detection chip U2, the input terminal of which is connected to the host-side voltage divider circuit 51, and the output terminal of which is connected to the differential-to-single-ended circuit 53.

[0041] The input terminal VIN of the isolation voltage detection chip U2 is connected to the voltage divider circuit 51 on the host side. The output terminals of the isolation voltage detection chip U2 are differential output terminals OUTP and OUTN, which are connected to the differential-to-single-ended circuit 53. The isolation voltage detection chip U2 converts the input single-ended voltage into a high-precision isolated differential voltage signal output. The power supply terminal VDD1 and ground terminal GND1 on the primary side are electrically isolated from the power supply terminal VDD2 and ground terminal GND2 on the secondary side, thereby achieving electrical isolation between the fault alarm line side and the host 10 side, suppressing the influence of ground potential difference and common-mode interference on the detection results. Optionally, the isolation voltage detection chip U2 also has a turn-off pin SHTDN for chip enable control.

[0042] As a further embodiment, the differential-to-single-ended circuit 53 includes an operational amplifier U3, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a second capacitor C2, and a third capacitor C3. The fifth resistor R5 is connected between the isolation voltage detection circuit 52 and the non-inverting input terminal of the operational amplifier U3. The sixth resistor R6 is connected between the isolation voltage detection circuit 52 and the inverting input terminal of the operational amplifier U3. The seventh resistor R7 is connected between the non-inverting input terminal and the reference ground. The eighth resistor R8 is connected between the inverting input terminal and the output terminal of the operational amplifier U3. The second capacitor C2 is connected in parallel with the seventh resistor R7, and the third capacitor C3 is connected in parallel with the eighth resistor R8. The output terminal of the operational amplifier U3 is connected to the host 10.

[0043] Among them, see Figure 4The fifth resistor R5 is connected between the first output terminal OUTP of the isolation voltage detection circuit 52 and the non-inverting input terminal of the operational amplifier U3; the sixth resistor R6 is connected between the second output terminal OUTN of the isolation voltage detection circuit 52 and the inverting input terminal of the operational amplifier U3; the seventh resistor R7 is connected between the non-inverting input terminal and the reference ground GND2; the eighth resistor R8 is connected between the inverting input terminal and the output terminal of the operational amplifier U3, forming a feedback loop; the second capacitor C2 is connected in parallel with the seventh resistor R7, and the third capacitor C3 is connected in parallel with the eighth resistor R8, used to filter out high-frequency noise in the differential signal. The differential-to-single-ended circuit 53 performs subtraction and amplification operations on the differential voltage signal. When the resistance values ​​of the fifth resistor R5 and the sixth resistor R6 are equal, and the resistance values ​​of the seventh resistor R7 and the eighth resistor R8 are equal, the output voltage Vout of the operational amplifier U3 satisfies: Vout=(R8 / R6)×(VOUTP-VOUTN). In particular, when R8=R6, Vout=VOUTP-VOUTN, that is, the detected voltage is numerically equal to the differential voltage after isolation conversion of the fault alarm line voltage, which facilitates direct comparison between the host 10 and the preset voltage range. In some embodiments, the differential-to-single-ended circuit 53 further includes a ninth resistor R9 and a fourth capacitor C4. The ninth resistor R9 is connected between the output of the operational amplifier U3 and the fault detection port of the host 10, and the fourth capacitor C4 is connected between the fault detection port and the reference ground GND2. The ninth resistor R9 and the fourth capacitor C4 form an RC low-pass filter circuit to further filter the sampling signal input to the host 10, suppress sampling noise, and enable the detection voltage to be input to the fault detection port of the host 10 main control chip in the form of an AD signal for the main control chip to sample and determine.

[0044] As a further embodiment, the host 10 stores a correspondence between multiple preset voltage ranges and multiple slave addresses, and the multiple preset voltage ranges do not overlap with each other; wherein, the host 10 is used to determine the address of the faulty slave 20 according to the preset voltage range to which the detected voltage belongs.

[0045] Each preset voltage range corresponds to the detection voltage range when an access terminal is triggered individually. The boundaries of the range are set based on the nominal detection voltage of the access terminal, with allowances for sampling error and resistance tolerance. For example, the correspondence between preset voltage ranges and slave addresses can be shown in the table below: The host 10 compares the sampled detection voltage with multiple preset voltage ranges to determine the preset voltage range to which the detection voltage belongs, and assigns the slave address corresponding to the preset voltage range as the address of the faulty slave 20. When the detection voltage is 0V or lower than a preset starting threshold, the host 10 determines that no slave 20 has issued a fault request and continues polling communication in the original polling order.

[0046] See Figure 5 The present invention also provides a communication control method for a multi-unit system, used to control the multi-unit system described in any of the above embodiments, the method comprising steps S110-S150.

[0047] S110, the host performs polling communication with multiple slave devices through the communication bus.

[0048] In this embodiment of the invention, the host sends a name-calling request to each slave device in a polling order. The slave device being called responds to the name-calling request and returns its status information to the host, thereby enabling the host to periodically acquire the operating status of each slave device. The polling communication and the sampling of the detection voltage described below can be performed in parallel. That is, the host periodically samples the detection voltage of the fault detection port while conducting polling communication, so as to insert the priority name-calling process in a timely manner after a fault request is detected.

[0049] S120, if any of the slave devices fails and no name call request is received from the master for that slave device, the slave device controls the corresponding fault feedback circuit to change the voltage at its output terminal.

[0050] In this embodiment of the invention, after detecting a fault, the slave device's master control chip switches its fault alarm pin from high to low, causing the switching device in the fault feedback circuit to switch from off to on, and the output to switch from low to high, thus sending a fault request signal on the fault alarm line. Since this process does not rely on the master device's call request, the slave device can proactively request communication even without being polled.

[0051] S130, the host obtains the detection voltage generated after the voltage divider circuit through the fault detection circuit, wherein the detection voltage generated by different fault feedback circuits when responding to the fault signal of the corresponding slave can be distinguished.

[0052] In this embodiment of the invention, the voltage on the fault alarm line is transmitted and converted step by step through a voltage divider circuit, a host-side voltage divider circuit, an isolation voltage detection circuit, and a differential-to-single-ended circuit, and is then input to the host's fault detection port in the form of a detection voltage. Since each access point is located at a different position in the voltage divider circuit, the detection voltage generated when different fault feedback circuits individually respond to the fault signal of their corresponding slave devices is distinguishable. This detection voltage carries the location information of the slave device that issued the fault request.

[0053] S140, the host determines the faulty slave device based on the preset correspondence between the detected voltage and the slave device address.

[0054] In this embodiment of the invention, the host samplees the detection voltage through the fault detection port and compares the sampled detection voltage with the stored preset correspondence to directly identify the faulty slave device without waiting for the polling order to reach the slave device, thereby shortening the identification time of the faulty slave device.

[0055] In some embodiments, such as in this embodiment of the invention, the preset correspondence includes a one-to-one correspondence between multiple preset voltage ranges and multiple slave addresses, wherein the multiple preset voltage ranges do not overlap with each other, such as... Figure 6 As shown, step S140 may include: S141, compare the detected voltage with a plurality of preset voltage ranges to determine the preset voltage range to which the detected voltage belongs; S142, determine the faulty slave device based on the slave device address corresponding to the preset voltage range.

[0056] In this embodiment of the invention, multiple preset voltage ranges do not overlap, ensuring that any detected voltage falls into at most one preset voltage range, thus avoiding ambiguity in judgment. The width of the range is comprehensively set based on the nominal detected voltage, the sampling error of the host, and the tolerances of the voltage divider resistor and the second resistor, with a discrimination margin between adjacent ranges. When the detected voltage is 0V or lower than the preset starting threshold, the host determines that no slave device has issued a fault request and continues polling communication in the original polling order.

[0057] S150, the host adjusts the polling order according to the determined slave address, sends a name request to the faulty slave via the communication bus, and receives the fault information sent by the slave in response to the name request.

[0058] In this embodiment of the invention, the fault information may include fault code, fault location, and fault status. After the host obtains the fault information, it can execute the corresponding fault handling strategy and report the fault information to the host computer for alarm display. After the fault of the slave device is cleared, the slave device's main control chip restores the fault alarm pin to a high level, turns off the switching device, restores the output terminal to a low level, and restores the detection voltage to 0V. After the host detects that the detection voltage has been restored, it resumes the original polling order and continues polling communication.

[0059] In some embodiments, when multiple slave devices fail simultaneously and multiple fault feedback circuits respond simultaneously, the voltage on the fault alarm line is the result of the combined action of multiple trigger branches, and the detected voltage may fall outside any preset voltage range. In this case, the host can determine that the detected voltage indicates a multi-slave failure and sequentially check all slave devices or the slave devices closest to the determination address according to a preset strategy to confirm all faulty slave devices; alternatively, the combined voltage corresponding to several typical simultaneous trigger combinations can be pre-set as an additional preset voltage range, enabling the host to directly identify the situation of multiple slave devices failing simultaneously. This invention does not limit this.

[0060] In some embodiments, when the number of slave devices in a multi-connector system is large, making it difficult to reliably distinguish the detection voltage intervals between adjacent access terminals due to insufficient spacing, multiple fault detection circuits can be added to the master unit. This divides the slave devices into multiple groups. The output of the fault feedback circuit within each group is connected to the corresponding fault detection circuit via its own voltage divider circuit 40. Each fault detection circuit then detects the fault request signal of its respective group. Group detection increases the detection voltage interval between adjacent access terminals within the same voltage divider circuit, improving the system's detection accuracy and response speed.

[0061] The multi-split air conditioning system and communication control method provided in this invention, through the cooperation of a fault feedback circuit, a voltage divider circuit, and a fault detection circuit, while retaining the RS-485 master-slave polling communication mechanism, provides the slave unit with an out-of-band fault request channel independent of the communication line: when a slave unit malfunctions, it can change the voltage on the fault alarm line through the fault feedback circuit 30 without waiting for the slave unit to be identified; the master unit samples the detection voltage through the fault detection circuit and directly locates the faulty slave unit using the preset correspondence between the detection voltage and the slave unit address, thereby prioritizing the identification of the fault information. This solution provides timely feedback, high detection accuracy, accurate identification, simple circuit structure, low cost, good consistency, and strong feasibility, and can significantly improve the response speed and operational safety of the multi-split air conditioning system to emergency faults.

[0062] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present invention, and these modifications or substitutions should all be covered within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A multi-split air conditioning system, characterized in that, include: A host and multiple slave devices, wherein the host is connected to the multiple slave devices via a communication bus; Multiple fault feedback circuits are respectively configured to correspond to multiple slave devices, and the input terminal of each fault feedback circuit is connected to the corresponding slave device; A voltage divider circuit is installed on the fault alarm line of the communication bus and has multiple access terminals that are respectively connected to the output terminals of multiple fault feedback circuits. The fault detection circuit has its input terminal connected to the voltage divider circuit and its output terminal connected to the host computer. The multiple access terminals are located at different positions in the voltage divider circuit, so that when different fault feedback circuits respond to the fault signals of their respective slave devices, the fault detection circuit outputs a distinguishable detection voltage, and the host device uses the detection voltage to determine the slave device that has failed.

2. The multi-unit air conditioning system according to claim 1, characterized in that, The fault feedback circuit includes a switching device, a first resistor, and a second resistor; the input side of the switching device is connected to the corresponding slave device via the first resistor, the output side of the switching device is connected to the output terminal of the fault feedback circuit, and the second resistor is connected between the output terminal of the fault feedback circuit and the reference ground.

3. The multi-unit air conditioning system according to claim 1, characterized in that, The voltage divider circuit includes a plurality of access nodes arranged sequentially along the fault alarm line and a voltage divider resistor connected between adjacent access nodes, wherein the plurality of access terminals are respectively arranged at the plurality of access nodes.

4. The multi-unit air conditioning system according to claim 1, characterized in that, The fault detection circuit includes a host-side voltage divider circuit, an isolation voltage detection circuit, and a differential-to-single-ended circuit. The input terminal of the host-side voltage divider circuit is connected to the voltage divider circuit, the output terminal of the host-side voltage divider circuit is connected to the input terminal of the isolation voltage detection circuit, the output terminal of the isolation voltage detection circuit is connected to the input terminal of the differential-to-single-ended circuit, and the output terminal of the differential-to-single-ended circuit is connected to the host.

5. The multi-unit air conditioning system according to claim 4, characterized in that, The host-side voltage divider circuit includes a third resistor, a fourth resistor, and a first capacitor. One end of the third resistor is connected to the voltage divider circuit, and the other end of the third resistor is connected to one end of the fourth resistor, one end of the first capacitor, and the isolation voltage detection circuit. The other end of the fourth resistor and the other end of the first capacitor are connected to reference ground.

6. The multi-unit air conditioning system according to claim 4, characterized in that, The isolation voltage detection circuit includes an isolation voltage detection chip. The input terminal of the isolation voltage detection chip is connected to the host-side voltage divider circuit, and the output terminal of the isolation voltage detection chip is connected to the differential-to-single-ended circuit.

7. The multi-unit air conditioning system according to claim 4, characterized in that, The differential-to-single-ended circuit includes an operational amplifier, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a second capacitor, and a third capacitor. The fifth resistor is connected between the isolation voltage detection circuit and the non-inverting input of the operational amplifier. The sixth resistor is connected between the isolation voltage detection circuit and the inverting input of the operational amplifier. The seventh resistor is connected between the non-inverting input and reference ground. The eighth resistor is connected between the inverting input and the output of the operational amplifier. The second capacitor is connected in parallel with the seventh resistor, and the third capacitor is connected in parallel with the eighth resistor. The output of the operational amplifier is connected to the host computer.

8. The multi-unit air conditioning system according to claim 1, characterized in that, The host stores a correspondence between multiple preset voltage ranges and multiple slave addresses, and the multiple preset voltage ranges do not overlap with each other; The host is used to determine the address of the slave device that has malfunctioned based on the preset voltage range to which the detected voltage belongs.

9. A communication control method for a multi-unit air conditioning system, characterized in that, The method for controlling a multi-split air conditioning system as described in any one of claims 1 to 8 includes: The host machine communicates with multiple slave machines via the communication bus. If any of the slave devices fails and no call request is received from the master for that slave device, the slave device controls the corresponding fault feedback circuit to change the voltage at its output terminal. The host obtains the detection voltage generated after the voltage divider circuit through the fault detection circuit. The detection voltage generated when different fault feedback circuits respond to the fault signals of their respective slave devices can be distinguished. The host determines the faulty slave device based on a preset correspondence between the detected voltage and the slave device address; The host adjusts the polling order according to the determined slave address, sends a name request to the faulty slave first through the communication bus, and receives the fault information sent by the slave in response to the name request.

10. The method according to claim 9, characterized in that, The preset correspondence includes a one-to-one correspondence between multiple preset voltage ranges and multiple slave addresses, and the multiple preset voltage ranges do not overlap with each other; The host determines the faulty slave device based on a preset correspondence between the detected voltage and the slave device address, including: The detected voltage is compared with multiple preset voltage ranges to determine the preset voltage range to which the detected voltage belongs; The faulty slave device is identified based on the slave device address corresponding to the predetermined preset voltage range.

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