Method of manufacturing a substrate and superconducting quantum chip
By setting a thermally conductive layer and a stabilizer between the substrate and the stage, the problem of unstable via morphology during TSV etching is solved, achieving more efficient heat dissipation and a more stable etching process, and improving the smoothness and consistency of TSV vias.
Patent Information
- Application Number
- CN202510473183.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-16
- Publication Date
- 2026-11-03
AI Technical Summary
In the existing technology, the TSV etching process suffers from unstable internal morphology of the via, which leads to increased signal loss, reduced transmission speed, insufficient heat dissipation, and localized overheating.
A heat-conducting layer and a stabilizer are placed between the substrate and the stage. The heat-conducting layer conducts heat during the etching process, and the stabilizer fixes the substrate to ensure the stability of the etching process, thereby forming regular through holes.
It improves the uniformity and precision of the etching process, reduces microcracks and voids, enhances the heat dissipation performance and structural integrity of the substrate, and ensures the smoothness and consistency of TSV vias.
Smart Images
Figure CN123035939A_ABST
Abstract
Description
Technical Field
[0001] This application belongs to the field of quantum chip manufacturing technology, and in particular relates to a method for preparing a substrate and a superconducting quantum chip. Background Technology
[0002] Through Silicon Via (TSV) is a key technology for achieving three-dimensional integration in semiconductor devices. It enables communication between the top and bottom surfaces of a chip in the vertical direction, significantly improving performance and reducing space requirements.
[0003] Currently, TSVs exhibit unstable internal via morphology (i.e., the final shape does not match the preset shape), which can cause signal reflection or scattering during transmission, thereby increasing signal loss, reducing transmission speed and reliability, and also leading to the formation of areas with high thermal resistance, affecting the overall chip's heat dissipation capacity and causing localized overheating.
[0004] The problems caused by the irregular shape of the vias and the discrepancy with the preset shape have a huge negative impact on chip devices. Therefore, there is an urgent need for a fabrication method to prepare TSV vias with regular internal morphology on the substrate. Summary of the Invention
[0005] The purpose of this application is to provide a substrate preparation method and a superconducting quantum chip to solve the problem of unstable internal morphology of the through-holes prepared in the TSV etching process due to insufficient heat dissipation and insufficient stability in the prior art. It can enhance the heat dissipation performance of the substrate during the etching process and stabilize the substrate on the stage to form through-holes with regular shapes that penetrate the substrate during etching.
[0006] To solve the above-mentioned technical problems, the present invention provides a method for preparing a substrate, comprising:
[0007] A substrate with a thermally conductive layer is stacked on the surface of a stage, and the substrate is fixed to the stage by a stabilizing member, wherein the thermally conductive layer is located between the stage and the substrate.
[0008] The substrate is etched to form a through-hole that penetrates the substrate and has a regular inner wall.
[0009] Preferably, the thermally conductive layer comprises a first thermally conductive layer and a second thermally conductive layer stacked together.
[0010] Preferably, the first thermally conductive layer is a thermally conductive tape, and the second thermally conductive layer is a heat pump oil; the preparation method includes:
[0011] Apply thermally conductive tape to the surface of the substrate facing the stage;
[0012] Heat pump oil is applied to the surface of the heat-conducting tape facing the stage to form a heat pump oil film.
[0013] Preferably, the stabilizing member is a thermally conductive tape, the thermally conductive tape comprising a first region and a second region, and the method for fixing the substrate to the surface of the stage includes:
[0014] The substrate is adhered to the surface of the stage using the thermally conductive tape, wherein a first area is used to adhere the peripheral area of the substrate and a second area is used to adhere the stage.
[0015] Preferably, before or after using the thermally conductive tape to adhere the substrate to the surface of the stage, the method further includes:
[0016] The thermally conductive tape, which serves as a stabilizing element, has penetrating pores formed in the thickness direction.
[0017] Preferably, the fabrication method further includes, prior to etching the substrate:
[0018] The cavity used to house the substrate is evacuated to a vacuum.
[0019] Preferably, the method for etching the substrate to form through holes is dry etching.
[0020] Preferably, the method for etching the substrate to form a through-hole with regular inner walls includes:
[0021] A mask layer with a pattern is formed on the surface of the substrate opposite to the stage;
[0022] The substrate is etched through the pattern until it is completely penetrated.
[0023] Remove the thermal conductive layer and the stabilizing component.
[0024] This application also provides a superconducting quantum chip, characterized in that it comprises: a substrate prepared by the aforementioned preparation method; and
[0025] Quantum devices formed on the surface of the substrate.
[0026] Preferably, the quantum device includes a quantum bit, a resonant cavity, and a readout bus, wherein the two ends of the resonant cavity are coupled to the quantum bit and the readout bus, respectively.
[0027] Compared with the prior art, this application adds a thermally conductive layer between the substrate to be etched and the stage to conduct heat from the substrate through the thermally conductive layer during the etching process, avoiding excessive local temperature and thus reducing the impact of thermal effects on etching uniformity. In addition, a stabilizing component is used to fix the substrate to the surface of the stage to maintain the stability of the position between the substrate and the stage during the etching process, avoiding displacement and ensuring the regularity of the TSV via inner wall. The TSV via internal morphology of the substrate prepared by the above method is neat and smooth. Attached Figure Description
[0028] Figure 1 A schematic diagram illustrating the steps of the substrate preparation method provided in the embodiments of this application;
[0029] Figure 2 A cross-sectional structural diagram showing the presence of a heat-conducting layer and a stabilizing element, provided for an embodiment of this application;
[0030] Figure 3 This is a schematic diagram of the structure of some quantum devices in the superconducting quantum chip provided in the embodiments of this application.
[0031] Explanation of reference numerals in the attached drawings: 1-stage, 2-substrate, 3-first thermal conductive layer, 4-second thermal conductive layer, 5-stabilizing component. Detailed Implementation
[0032] The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.
[0033] The specific embodiments of the present invention will now be described in more detail with reference to the accompanying drawings. The advantages and features of the present invention will become clearer from the following description and claims. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the present invention.
[0034] In the description of this invention, it should be understood that the terms "center", "upper", "lower", "left", "right", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.
[0035] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.
[0036] With the development of quantum computing, the number of qubits in a superconducting quantum chip is constantly increasing. However, the chip area is ultimately limited. Suitable TSV (Transient Voltage Spectrometer) technology can achieve high-density components through three-dimensional integration. Furthermore, superconducting quantum chips may require multi-layer structures to separate control circuitry, readout circuitry, and qubit layers. TSV provides vertical interconnects, enabling efficient connections between these layers. Moreover, quantum computing is highly sensitive to signal transmission delays, and TSV can provide shorter interconnect paths to reduce these delays. Additionally, TSV offers advantages in superconducting quantum chips, including enhanced heat dissipation, simplified packaging and interconnection, multi-layer functional separation, improved scalability, and enhanced mechanical stability at low temperatures.
[0037] During TSV etching of the substrate, poor heat dissipation can lead to problems such as rough inner walls of vias, inconsistent top and bottom apertures, non-circular bottom holes, and non-penetrating holes, which are unacceptable for precision quantum devices. For example, high temperatures may cause deformation of photoresist or other mask materials, affecting the uniformity of etching. Alternatively, during deep reactive ion etching (DRIE), if the heat generated by the plasma cannot be dissipated in time, it may lead to uneven etching rates and the formation of rough hole walls. Furthermore, backsplashing of heat pump oil into the vias can reduce the etching rate of the sidewalls.
[0038] In addition, during the etching process, the substrate may move due to being placed directly on the etching stage. This may cause the substrate to be etched into areas that are not expected, resulting in the vias not meeting expectations.
[0039] To address the aforementioned problems, embodiments of this application provide, as follows: Figure 1 The method for preparing a substrate, as shown, includes the following steps:
[0040] S1: The substrate 2 with a heat-conducting layer is stacked on the surface of the stage 1, and the substrate 2 is fixed to the stage 1 by the stabilizing member 5, wherein the heat-conducting layer is located between the stage 1 and the substrate 2.
[0041] S2: Etch the substrate 2 to form a through hole that penetrates the substrate 2 and has a regular inner wall.
[0042] The thermally conductive layer rapidly conducts the heat generated during etching to the stage 1, preventing the substrate 2 from overheating and reducing the impact of thermal effects on etching uniformity. Furthermore, uniform heat dissipation ensures a consistent etching rate, preventing issues such as deviations from the expected etching shape or rough inner walls caused by heat accumulation. Therefore, effective heat dissipation avoids uneven material removal due to localized high temperatures on the substrate 2 during etching, resulting in a substrate with a smoother and more regular TSV inner wall.
[0043] In addition, the substrate 2 is fixed to the stage 1 by the stabilizing member 5, so that the substrate 2 remains stable during the etching process, which can avoid vibration and displacement and ensure the etching accuracy.
[0044] Through numerous experiments conducted by the inventors of this application, it has been found that the uniform temperature distribution achieved by the above method can at least reduce defects such as microcracks and voids generated during the etching process, and also reduce thermal stress caused by temperature gradients, thereby reducing the risk of substrate 2 deformation or cracking and improving the structural integrity of TSV.
[0045] Specifically, substrate 2 first needs to undergo chemical cleaning (such as RCA cleaning) to remove contaminants and oxide layers from its surface, and then is fixed to the surface of stage 1 by the stabilizer 5. Next, photoresist is formed on at least the surface of substrate 2 facing away from stage 1, and the TSV pattern on the mask is transferred to the photoresist. Finally, the photoresist in the exposed areas is removed, forming windows of the TSV pattern. The fixed substrate 2 is typically etched using deep reactive ion etching (DRIE) to create TSV holes with high aspect ratios.
[0046] Furthermore, besides silicon substrates, sapphire can also be used as a substrate for superconducting quantum chips, and the aforementioned substrate fabrication methods can also be applied to sapphire substrate 2 to form through-holes. Compared to silicon substrate 2, sapphire substrate 2 has higher hardness and stronger chemical stability, making it relatively more difficult to etch. In actual etching operations, sapphire has a low etching rate, requiring the use of high-energy plasma or lasers for etching. Additionally, sapphire has relatively poor thermal conductivity, necessitating more precise temperature control during processing.
[0047] In one embodiment of this application, such as Figure 2As shown, the thermally conductive layer is configured as two stacked layers, including a first thermally conductive layer 3 and a second thermally conductive layer 4. The first thermally conductive layer 3 and the substrate 2 are tightly stacked, the second thermally conductive layer 4 and the first thermally conductive layer 3 are tightly stacked, and the stage 1 and the second thermally conductive layer 4 are tightly stacked. It should be noted that since the thermally conductive layer will be placed in the etching cavity along with the substrate 2 and a vacuum operation will be performed, it is necessary to ensure that there is no air-filled gap between the first thermally conductive layer 3 and the second substrate 2. This is to prevent gaps from forming due to pressure changes in the vacuum environment, which would reduce the heat conduction effect and stability.
[0048] Specifically, the first thermally conductive layer 3 is configured as a thermally conductive tape, and the second thermally conductive layer 4 is configured as a heat pump oil film. Therefore, in the fabrication method of the quantum device, the method of setting a thermally conductive layer on the surface of the substrate 2 includes:
[0049] Step 1: Apply thermally conductive tape to the surface of the substrate 2 facing the stage 1;
[0050] The second step is to apply heat pump oil to the surface of the heat-conducting tape facing the platform 1 to form a heat pump oil film.
[0051] Furthermore, when the thermally conductive tape is applied to the surface of the substrate 2 facing the stage 1, care must be taken to ensure that there are no air bubbles between them. This is to prevent the substrate 2 from being lifted in a vacuum environment, which would affect the etching direction and stability. Therefore, the thermally conductive tape can be pre-configured with multiple pores, or air bubbles can be removed between the thermally conductive tape and the substrate 2 using instruments such as debubblers. Additionally, when applying heat pump oil to the surface of the thermally conductive tape facing the stage 1, it is necessary to ensure that the coating thickness is as uniform as possible. Uneven thickness of heat pump oil may lead to uneven heat conduction, resulting in inconsistent temperatures in different areas of the substrate 2 during etching, resulting in poor etching uniformity and the formation of an irregular TSV structure with irregular inner walls.
[0052] Thermally conductive tapes have good thermal conductivity and can withstand temperatures above 200°C. Tapes containing a polyimide substrate and a silicone adhesive, for example, can conduct away some of the heat generated during the etching process of substrate 2, thereby reducing the etching temperature of substrate 2. Additionally, the thermally conductive tape can protect the back side of substrate 2 during etching, preventing damage or contamination.
[0053] The thermal conductivity of heat pump oil is better than that of air. The heat pump oil film formed can help the heat-conducting tape to conduct heat from the substrate 2 to the outside more effectively. In addition, the heat pump oil film can also help distribute heat to reduce the phenomenon of local overheating of the substrate 2.
[0054] Based on the above reasons, the thermally conductive tape and the heat pump oil film have a good temperature control effect on the substrate 2. That is, good heat conduction can avoid local overheating, reduce thermal stress, and thus improve the smoothness of the inner wall of the through hole of TSV.
[0055] It is important to note that the first thermally conductive layer 3 and the second thermally conductive layer 4 ensure their stability under etching conditions, i.e., no chemical reaction occurs. For example, depending on specific needs and process conditions, graphite sheets, ceramic sheets, metal foils, polyimide films, etc., can be selected to replace thermally conductive tapes; thermal interface materials, silicone grease, liquid metal, thermally conductive gels, etc., can replace heat pump oil films. The selection of suitable alternative materials requires comprehensive consideration of factors such as thermal conductivity, high-temperature resistance, chemical stability, and cost.
[0056] In one embodiment of this application, the stabilizing member 5 is configured as a thermally conductive tape, which is divided into a first region and a second region. Therefore, in the method for fabricating the quantum device, the method of fixing the substrate 2 to the surface of the stage 1 includes:
[0057] The thermally conductive tape is used to adhere the substrate 2 to the surface of the stage 1, wherein the first area is used to adhere the peripheral area of the substrate 2, and the second area is used to adhere the stage 1.
[0058] Furthermore, before or after this, the thermally conductive tape serving as the stabilizing element 5 needs to form penetrating pores in the thickness direction.
[0059] If thermally conductive tape is used to adhere the substrate 2 to the surface of the stage 1, it is difficult to guarantee that there are no air bubbles between the thermally conductive tape and the stage 1. When air bubbles are present and in a natural environment, the thermally conductive tape still exhibits good stability because the air pressure of the bubbles is the same as that of the outside air. However, when the environment is evacuated to a vacuum, the pressure inside the air bubbles will be greater than the vacuum pressure. This will cause the air bubbles to grow larger, reducing the stability of the thermally conductive tape in securing the substrate 2. This may cause the substrate 2 to move during the etching process due to insufficient stability, resulting in an irregular TSV via structure that does not achieve the desired effect. Therefore, it is preferable to form penetrating pores in the thickness direction of the thermally conductive tape to balance the pressure on both sides of the thermally conductive tape. This ensures that the thermally conductive tape provides good stability for the substrate 2 in both natural and vacuum environments, fixing the substrate 2 to the surface of the stage 1 from beginning to end.
[0060] It is worth noting that the central region of substrate 2 is generally the functional region. That is, when substrate 2 is used as the substrate of a superconducting quantum chip, quantum devices such as Josephson junctions, capacitors, readout resonant cavities, and control buses are fabricated in the functional region. Therefore, TSV via structures are also generally fabricated in the central region of substrate 2. Therefore, when using thermally conductive tape or other stabilizing components 5 to fix substrate 2 to stage 1, it is necessary to ensure that the central region of substrate 2 is unobstructed.
[0061] Based on the above steps, TSV etching requires a vacuum environment to ensure controlled reactive gas concentration, improve plasma efficiency, reduce side reactions, optimize thermal management, ensure safety, and improve process repeatability. These factors work together to ensure high quality and high precision in the etching process. Therefore, after all the above steps are completed, the cavity housing the substrate 2 needs to be evacuated to a vacuum before etching.
[0062] Specifically, the method for etching the substrate 2 to form a through hole with a regular inner wall includes:
[0063] Step 1: Form a mask layer with a pattern on the surface of the substrate 2 opposite to the stage 1;
[0064] The second step is to etch the substrate 2 through the pattern until it is completely penetrated.
[0065] Step 3: Remove the heat-conducting layer and the stabilizing component 5.
[0066] First, photoresist is coated onto the surface of a silicon wafer, and a specific pattern is formed using photolithography to serve as an etching mask. Then, substrate 2 is placed in a dry etching apparatus, and reactive gases such as SF6 or C4F8 are introduced. A radio frequency power supply generates plasma, causing the reactive gases to decompose into highly reactive particles. These reactive particles chemically react with atoms on the surface of substrate 2, forming volatile products that are extracted by a vacuum pump. This process achieves the etching of substrate 2, precisely etching a high aspect ratio, vertical, and smooth TSV structure onto the substrate 2, meeting the requirements of integrated circuits and other fields for three-dimensional chip integration.
[0067] In one embodiment of this application, a superconducting quantum chip is also provided, comprising a substrate prepared by the preparation method described in the foregoing embodiments, and a quantum device formed on the surface of the substrate 2.
[0068] Quantum devices include qubits, resonant cavities, and readout buses, wherein the two ends of the resonant cavity are coupled to the qubits and the readout bus, respectively.
[0069] like Figure 3 As shown, the state information of a qubit can be transferred to the resonant cavity through this coupling. For example, in a superconducting quantum circuit, a qubit transition will cause changes in the frequency and other characteristics of the resonant cavity coupled to it. The resonant cavity is also coupled to the readout bus, which is used to transmit signals. The resonant cavity couples the information of the qubit to the readout bus in a specific signal form, which can then be read and processed by subsequent measurement and control systems. This realizes the transfer of the qubit's state information from the qubit to the transmission line.
[0070] Quantum bits typically also need to be connected to pulse modulation lines (xy lines) and flux modulation lines (z lines). Pulse modulation lines are used to apply control pulses to manipulate the state of the qubit, such as rotating it; flux modulation lines are used to adjust the energy levels and other properties of the qubit by changing the magnetic flux, thereby achieving fine control over the state of the qubit.
[0071] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," or "specific example," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments. In addition, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.
[0072] The above description, based on the embodiments shown in the drawings, details the structure, features, and effects of this application. The above description is only a preferred embodiment of this application, but this application does not limit the scope of implementation to what is shown in the drawings. Any changes made in accordance with the concept of this application, or modifications to equivalent embodiments, that do not exceed the spirit covered by the specification and drawings, should be within the protection scope of this application.
Claims
1. A method for preparing a substrate, characterized in that, include: A substrate (2) with a heat-conducting layer is stacked on the surface of a stage (1), and the substrate (2) is fixed to the stage (1) by a stabilizing member (5), wherein the heat-conducting layer is located between the stage (1) and the substrate (2). The substrate (2) is etched to form a through hole that penetrates the substrate (2) and has a regular inner wall.
2. The preparation method according to claim 1, characterized in that, The heat-conducting layer includes a first heat-conducting layer (3) and a second heat-conducting layer (4) stacked together.
3. The preparation method according to claim 2, characterized in that, The first thermally conductive layer (3) is a thermally conductive tape, and the second thermally conductive layer (4) is a heat pump oil film. The preparation method includes: Apply thermally conductive tape to the surface of the substrate (2) facing the stage (1); Heat pump oil is applied to the surface of the heat-conducting tape facing the stage (1) to form a heat pump oil film.
4. The preparation method according to any one of claims 1 to 3, characterized in that, The stabilizing member (5) is a thermally conductive tape, which includes a first region and a second region. The method for fixing the substrate (2) to the surface of the stage (1) includes: The substrate (2) is adhered to the surface of the stage (1) using the thermally conductive tape, wherein a first region is used to adhere the peripheral region of the substrate (2) and a second region is used to adhere the stage (1).
5. The preparation method according to claim 4, characterized in that, Before or after using the thermally conductive tape to adhere the substrate (2) to the surface of the stage (1), the method further includes: The thermally conductive tape, which serves as a stabilizing element (5), is formed with penetrating pores in the thickness direction.
6. The preparation method according to claim 1, characterized in that, The preparation method prior to etching the substrate (2) further includes: The cavity used to house the substrate (2) is evacuated to a vacuum.
7. The preparation method according to claim 6, characterized in that, The method for etching the substrate (2) to form through holes is dry etching.
8. The preparation method according to claim 1, characterized in that, A method for etching the substrate (2) to form a through-hole with regular inner walls includes: A mask layer with a pattern is formed on the surface of the substrate (2) opposite to the stage (1); The substrate (2) is etched through the pattern until it is completely penetrated; Remove the heat-conducting layer and the stabilizing member (5).
9. A superconducting quantum chip, characterized in that, include: The substrate prepared by the preparation method according to any one of claims 1 to 8; as well as A quantum device formed on the surface of the substrate (2).
10. The superconducting quantum chip according to claim 9, characterized in that, The quantum device includes a quantum bit, a resonant cavity, and a readout bus, wherein the two ends of the resonant cavity are coupled to the quantum bit and the readout bus, respectively.