Power lead frame integrated circuit package

Abstract

The present disclosure relates to a power lead frame integrated circuit package including: a lead frame including a lead region and a die pad region separated by a space; an integrated circuit die mounted to an upper surface of the die pad region; a first metal clip having a chip mounting portion mounted to the integrated circuit die, a lead mounting portion mounted to the lead region, and a first residual bridge portion; a second metal clip including a second residual bridge portion mounted to the die pad region; an encapsulation body encapsulating the lead frame, the integrated circuit die, and the first and second metal clips; the encapsulation body has a first peripheral sidewall exposing an end of the first residual bridge portion and a second peripheral sidewall opposite the first peripheral sidewall exposing an end of the second residual bridge portion; sidewalls of the lead region are exposed at a first peripheral sidewall of the encapsulation body, and sidewalls of the die pad region are exposed at a second peripheral sidewall of the encapsulation body; and a plating layer on all sidewalls of the lead region and the die pad region.

Description

Technical Field

[0001] The present disclosure relates generally to semiconductor packages, and more particularly to a power leadframe package having leads with fully solder wettable sidewall surfaces. Background Art

[0002] refer to Figure 1A – Fig. 1I , which shows the steps of a manufacturing process for producing a power lead frame package for an integrated circuit power transistor device.

[0003] Figure 1A - A manufacturer or supplier provides an etched lead frame 12 including a die pad portion 14 and a lead portion 16. The die pad portion 14 and the lead portion 16 are separated from each other by a space defined by a half-etched opening 20 at the bottom of the lead frame and a through hole 22 at the top of the lead frame.

[0004] Figure 1B - An integrated circuit die 24 is mounted to the upper surface of each die pad portion 14. The attachment may be performed, for example, using a suitable die attach mechanism 26. As examples, a die attach film, an adhesive layer or a solder layer may be used for the attachment.

[0005] Figure 1C The bonding pads at the upper surface of the integrated circuit die 24 are electrically connected to the upper surface at the distal ends 30 of the lead portions 16 of the lead frame 12 by bonding wires 28 .

[0006] Figure 1D The assembly of lead frame 12 , integrated circuit die 24 and bond wires 28 is then positioned within an open cavity 34 of a mold 36 .

[0007] Figure 1E A resin encapsulant material is injected into the open cavity 34 and cured to form an encapsulating body 38 that encapsulates the assembly of the lead frame 12 , the integrated circuit die 24 , and the bond wires 28 , including filling the through-holes 22 and the half-etched openings 20 of the lead frame 12 .

[0008] Figure 1F – Removing the encapsulated component from the mold 36 .

[0009] Figure 1GA saw (schematically indicated by arrow 40 ) is used to partially cut through the lead portion 16 of the lead frame 12 to form a channel 42 . The depth of the channel 42 may comprise between 40% and 60% of the total thickness of the lead portion 16 of the lead frame 12 , for example.

[0010] Figure 1H – An electroless plating process is then performed to plate a tin layer 44 on the exposed surfaces of the lead frame 12. These exposed surfaces will include, for example, the lower surface of the die pad portion 14 of the lead frame 12, the lower surface of the lead portion 16 of the lead frame 12, and the sidewalls and bottom of the channel 42 formed in the lead portion 16 of the lead frame 12.

[0011] Fig. 1I A saw (schematically indicated by arrow 46) is used to cut completely through the encapsulated assembly and form separation openings 48. The saw cut is aligned with the location of the saw cut that formed the channel 42. The cutting operation achieves the separation of the encapsulated assembly into a plurality of power leadframe packages 50. The width of the saw cut performed by saw 46 is smaller than the width of the saw cut performed by saw 40.

[0012] Figure 2 4 shows a cross-sectional view of a power leadframe package 50. It should be noted that the flank areas 54 (i.e., their sidewall surfaces) of the leads 52 of the power leadframe package 50 include wettable flank portions 56 (covered by the tin layer 44) and non-wettable flank portions 58 (covered by the tin layer 44). Fig. 1I ). Therefore, the power leadframe package 50 does not present fully wettable sidewalls for the package leads 52.

[0013] There is a need in the art to address this deficiency and provide a power leadframe package having leads with fully solder wettable sidewall surfaces. Utility Model Content

[0014] One object of the utility model is to provide an improved power lead frame integrated circuit package.

[0015] According to one aspect of the present disclosure, a power lead frame integrated circuit package is provided, comprising: a lead frame, which includes a lead area and a die pad area separated by a space; an integrated circuit die mounted to the upper surface of the die pad area; a first metal clip, which has a chip mounting portion mounted to the integrated circuit die, the first metal clip also including a lead mounting portion mounted to the lead area and a first residual bridging portion; a second metal clip, which includes a second residual bridging portion mounted to the die pad area; an encapsulation body, which encapsulates the lead frame, the integrated circuit die, and the first metal clip and the second metal clip; wherein the encapsulation body has a first peripheral side wall at which an end of the first residual bridging portion is exposed, and a second peripheral side wall opposite to the first peripheral side wall at which an end of the second residual bridging portion is exposed; wherein the side wall of the lead area is exposed at the first peripheral side wall of the encapsulation body, and wherein the side wall of the die pad area is exposed at the second peripheral side wall of the encapsulation body; and a plating layer located on all of the side walls of the lead area and all of the side walls of the die pad area.

[0016] In some embodiments, the integrated circuit die includes a power metal oxide semiconductor field effect transistor MOSFET, and wherein the first metal clip provides a high current capacity associated with a source region or a drain region of the MOSFET.

[0017] In some embodiments, the plating layer is a tin layer.

[0018] In some embodiments, the plating further extends over the lower surfaces of the lead region and the die pad region.

[0019] In some embodiments, the second residual bridge portion is a segmented cut-off portion of a first metal clip for another power leadframe integrated circuit package.

[0020] In some embodiments, the first residual bridge portion is a segmented cut-off portion of a second metal clip for another power leadframe integrated circuit package.

[0021] Thus, in some embodiments, an improved power leadframe integrated circuit package is provided.

[0022] In an embodiment, a method includes: providing an etched lead frame including a plurality of frame portions, wherein the frame portions are separated from each other by spaces, and wherein each frame portion includes an intermediate region inserted between a lead region and a die pad region; mounting an integrated circuit die to an upper surface of each frame portion at the die pad region; mounting a chip mounting portion of a metal clip to each integrated circuit die, the metal clip also including a lead mounting portion mounted to the lead region of an adjacent frame portion, and the metal clip also including a bridging portion extending above the intermediate region of the adjacent frame portion and mounted to the die pad region of the adjacent frame portion; performing a first operation to cut through the frame portion of each etched lead frame at the intermediate region to separate the lead region and the die pad region without cutting off the bridging portion of each metal clip; plating a conductive layer on the entire sidewalls of the lead region and the die pad region exposed by the first operation for cutting; and performing a second operation to cut through the bridging portion of each metal clip. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] For a better understanding of the embodiments, reference will now be made, by way of example only, to the accompanying drawings, in which:

[0024] Figure 1A-Figure 1I The steps of a manufacturing process for producing a power lead frame package for an integrated circuit power transistor device are shown;

[0025] Figure 2 Shown by Figure 1A-Figure 1I Power lead frame packages produced by the process;

[0026] Figure 3A-Figure 3I The steps of a manufacturing process for producing a power lead frame package for an integrated circuit power transistor device are shown;

[0027] Figure 4 Shown by Figures 3A-3I Power lead frame packages produced by the process;

[0028] Figure 5A-5D They are shown in Figure 3A , Figure 3B , Figure 3C and Fig. 3I A top view at a stage of the manufacturing process shown at the corresponding step; and

[0029] Figure 6 is with Figure 3C A perspective view of an assembly of a lead frame, integrated circuit die, and clip at a stage in the manufacturing process shown at corresponding steps. DETAILED DESCRIPTION

[0030] This application claims priority to U.S. Provisional Patent Application No. 63 / 444,721 filed on February 10, 2023, the disclosure of which is incorporated herein by reference.

[0031] refer to Figure 3A – Fig. 3I , which shows the steps of a manufacturing process for producing a power lead frame package for an integrated circuit power transistor device.

[0032] Figure 3A – The manufacturer or supplier provides an etched lead frame 112 including a frame portion 114. The frame portions 114 are separated from each other by a space defined by a half-etched opening 120a at the bottom of the lead frame and a through hole 122 at the top of the lead frame. An additional half-etched opening 120b at the bottom of the lead frame is optionally provided at an intermediate region (of each frame portion 114) between the die pad region 115 and the lead region 116 of each frame portion 114. However, it should be noted that the optionally provided additional half-etched opening 120b does not separate the die pad region 115 and the lead region 116. Figure 5A Shown in Figure 3A 1 is a top view of a portion of a lead frame 112 at the stage of the manufacturing process shown in FIG.

[0033] Figure 3B - An integrated circuit die 124 is mounted to the upper surface of each frame portion 114 at the die pad area 115. The attachment may be performed, for example, using a suitable die attach mechanism 126. As examples, a die attach film, an adhesive layer or a solder layer may be used for the attachment. Figure 5B Shown in Figure 3B 1 is a top view of a portion of a lead frame 112 with an attached integrated circuit die 124 at the stage of the manufacturing process shown in .

[0034] Figure 3C– The bonding pads at the upper surface of the integrated circuit die 124 mounted to the die pad region 115 of one frame portion (e.g., portion 114a) of the lead frame 112 are electrically connected to the upper surface at the lead region 116 of the adjacent frame portion (e.g., portion 114b) of the lead frame 112, and further to the die pad region 115 of the adjacent frame portion 114b of the lead frame 112 using a metal clip 128. The metal clip 128 includes a strip of material bent into a shape including a chip mounting portion 128a, a lead mounting portion 128b, and a bridge portion 128c. The chip mounting portion 128a is essentially a flat portion whose lower surface is electrically connected to the bonding pads of the integrated circuit die 124 by a solder material 129. The lead mounting portion 128b is essentially an L-shaped portion having a vertical leg and a horizontal leg; wherein the vertical leg extends downward from the chip mounting portion 128a toward the lead frame 112, and the lower surface of the horizontal leg is electrically connected to the upper surface at the lead region 116 of the adjacent frame portion 114b of the lead frame 112 through the soldering material 129. The bridging portion 128c is essentially an inverted U-shaped portion having a first vertical leg, a horizontal leg, and a second vertical leg; wherein the first vertical leg extends upward from the horizontal leg of the lead mounting portion 128b, the horizontal leg extends from the first vertical leg to bridge over the location of the additional half-etched opening 120b, and the second vertical leg extends downward from the horizontal leg and has an end surface electrically connected to the upper surface at the die pad region 115 of the adjacent frame portion 114b of the lead frame 112 through the soldering material 129. Figure 5C Shown in Figure 3C 1 is a top view of a portion of a lead frame 112 with an attached integrated circuit die 124 and a mounted metal clip 128 at the stage of the manufacturing process shown in FIG. Figure 6 Shown in Figure 3C 1 is a perspective view of an assembly of a lead frame 112 , an integrated circuit die 124 , and a clip 128 at a stage in the manufacturing process shown in .

[0035] It will be noted that the other bonding pads of the integrated circuit die 124 may be bonded by bonding wires (not explicitly shown) or by using, for example, Figure 6 One or more other clips 128 shown in FIG. 1 are electrically connected to the upper surface at the distal end of the lead region 116 of the lead frame 112 .

[0036] Figure 3D The assembly of the lead frame 112 , the integrated circuit die 124 and the clip 128 is then positioned within the open cavity 134 of the mold 136 .

[0037] Figure 3EA resin encapsulant material is injected into the open cavity 134 and cured to form an encapsulation 138 that encapsulates the assembly of the lead frame 112 , the integrated circuit die 124 , and the clip 128 , including filling the through-holes 122 and the half-etched openings 120 a , 120 b of the lead frame 112 .

[0038] Figure 3F – Removing the encapsulated component from the mold 136 .

[0039] Figure 3G - A saw (schematically represented by arrow 140) is used to cut partially into the encapsulated component from the lower surface of the encapsulated component to form a channel 142. The saw cut is aligned with the half-etched opening 120b and completely passes through the lead frame 112 to separate the die pad area 115 and the lead area 116 of each frame portion 114. The depth of the channel 142 formed by the saw cut is sufficient to remove a portion of the cured resin sealant material located between the first and second vertical legs of the bridge portion 128c of the metal clip 128 without severing the horizontal leg extending between the first and second vertical legs. Since the presence of the half-etched opening 120b is optional, it should be understood that in the absence of the half-etched opening 120b to assist in the alignment of the saw 140, other means must be used to ensure that the saw cut is accurately positioned to form the channel 142 at a location between the first and second vertical legs of the bridge portion 128c of the metal clip 128.

[0040] Figure 3H – A plating process is then performed to plate a tin layer 144 on the exposed surfaces of the lead frame 112. These exposed surfaces will include, for example, the lower surface of the die pad area 115, the lower surface of the lead area 116 of each frame portion 114 of the lead frame 12, and the sidewalls of the die pad area 115 and the lead area 116 at the channel 142.

[0041] It should be noted that the metal clip 128 provides electrical connections between all frame portions 114 of the etched lead frame 112. This has the advantage that the combination Figure 3H During the execution of the electroplating process in the manufacturing step, all frame parts 114 may be placed at the same potential to deposit the tin layer 144 .

[0042] Fig. 3IA saw (schematically indicated by arrow 146) is used to completely cut through the encapsulated component from its upper surface and form a separation opening 148. The saw cut is aligned with the position of the saw cut that forms the channel 142. The cutting operation achieves the separation of the encapsulated component into a plurality of power lead frame packages 150. The saw cut is made through the horizontal legs of the bridge portion 128c of the metal clip 128, thereby leaving opposite residual portions 158 of the bridge portion 128c, wherein the cut ends of the horizontal legs of the bridge portion 128c are exposed at the peripheral side surface of each power lead frame package 150. Figure 5D Shown in Fig. 3I A top view of a portion of a lead frame 112 with an attached integrated circuit die 124 and a mounted metal clip 128 (without encapsulant present) at the stage of the manufacturing process shown in FIG.

[0043] Figure 4 1 shows a cross-sectional view of a power leadframe package 150. It should be noted that the side regions 154 of the leads 152 and die pad 153 for the power leadframe package present fully wettable side portions 156 (covered by the tin layer 144). The entire sidewall surface of the package leads 152 and die pad 153 is wetted by the tin layer 144. Figure 3G 144, and the resulting electroplating process covers the entire sidewall surface with a tin layer 144. The power lead frame package 150 accordingly includes fully wettable sidewalls for the package leads 152 and the die pad 153. The cut ends of the horizontal legs of the bridge portion 128c exposed at the peripheral side surface of each power lead frame package 150 provide a clear indication that the horizontal legs of the bridge portion 128c of the metal clip 128 were present during manufacturing and were severed during the singulation process. The lateral offset of the peripheral sidewall of the package relative to the fully wettable sidewalls of the package leads 152 and the die pad 153 provides a clear indication that two separate cuts were used during manufacturing.

[0044] exist Figure 4 In the context of , the included remnants 158 are located (and exposed) at opposite peripheral side surfaces of the encapsulation. One of the remnants 158 is a portion of a (first) metal clip mounted to the integrated circuit die of the illustrated package 150, and another of the remnants 158 is a portion of a (first) metal clip mounted to the illustrated package 150 that was severed from one another during the singulation process (see Fig. 3I ) is a portion of a (second) metal clip of another (not shown) integrated circuit die. Fully wettable sidewalls for package leads 152 and fully wettable sidewalls for die pads 153 are provided at corresponding opposite peripheral side surfaces of the encapsulation.

[0045] In a preferred embodiment, the integrated circuit die 124 is a power metal oxide semiconductor field effect transistor (MOSFET), and the one or more metal clips 128 included in the package 150 support the high current capacity associated with the source / drain region of the MOSFET. In particular, the die pad region 115 severed by the opening 148 provides a current conducting lead (die pad) for the drain terminal of the MOSFET, and the lead region 116 severed by the opening 148, together with the metal clip 128, provides a current conducting lead for the source terminal of the MOSFET. Of course, it should be understood that there will be a lead structure of the lead frame 112 for the gate terminal (see Figure 6 ), and the lead structure can be bonded using conventional wire bonding (such as Figure 1C ) is electrically connected to the gate bonding pad of the integrated circuit die 124. Alternatively, a smaller (eg, narrower) metal clip 128 may be used to electrically connect the gate bonding pad to the lead structure (eg, Figure 6 ).

[0046] refer to Figure 6 , it should also be noted that the clip 128 can include a plurality of chip mounting portions 128 a, lead mounting portions 128 b, and bridge portions 128 c. In this case, for example, the larger chip mounting portion 128 a is configured to connect to the power transistor source / drain region of the integrated circuit die 124, while the smaller chip mounting portion 128 a is configured to connect to the transistor gate region of the integrated circuit die 124.

[0047] Figure 3A-Figure 3I Methods and Figure 4 The advantages of the power lead frame package 150 include at least the following: a) the entire side wall surface of the package lead 152 is solderable and / or solder wettable; b) a more secure solder joint can be formed between the power lead frame package 150 and a supporting substrate (such as a printed circuit board); c) the presence of side solder required for automatic solder inspection is ensured; d) a simple electroplating process is supported to deposit the tin layer, and this is cheaper than using electroless plating; and e) the performance in lead anchoring is improved.

[0048] In an embodiment, a method includes: providing an etched lead frame including a plurality of frame portions, wherein the frame portions are separated from each other by spaces, and wherein each frame portion includes an intermediate region inserted between a lead region and a die pad region; mounting an integrated circuit die to an upper surface of each frame portion at the die pad region; mounting a chip mounting portion of a metal clip to each integrated circuit die, the metal clip also including a lead mounting portion mounted to the lead region of an adjacent frame portion, and the metal clip also including a bridging portion extending above the intermediate region of the adjacent frame portion and mounted to the die pad region of the adjacent frame portion; performing a first operation to cut through the frame portion of each etched lead frame at the intermediate region to separate the lead region and the die pad region without cutting off the bridging portion of each metal clip; plating a conductive layer on the entire sidewalls of the lead region and the die pad region exposed by the first operation for cutting; and performing a second operation to cut through the bridging portion of each metal clip.

[0049] In some embodiments, performing the first operation for cutting includes sawing.

[0050] In some embodiments, performing the second operation for cutting includes sawing.

[0051] In some embodiments, plating the conductive layer includes performing electroplating.

[0052] In some embodiments, electroplating includes applying an electrical potential to the lead areas and the die pad area of ​​all frame portions of the lead frame through electrical connections provided by metal clips.

[0053] In some embodiments, plating the conductive layer further comprises plating the conductive layer on the bottom surface of the lead regions and the die pad region of all frame portions of the lead frame.

[0054] In some embodiments, the method further includes encapsulating the assembly formed of the etched lead frame, the mounted integrated circuit, and the mounted metal clip in an encapsulation material forming an encapsulation body.

[0055] In some embodiments, performing the first operation for cutting further cuts through a portion of the encapsulation material forming the encapsulation body between the bridge portion of each metal clip and the middle region of the frame portion of the lead frame.

[0056] In some embodiments, performing the first operation for cutting includes applying the cutting to the lower surface of the encapsulation at the intermediate region.

[0057] In some embodiments, performing the second operation for cutting further cuts through a portion of the encapsulation material forming the encapsulation body between the bridging portion of each metal clip and the upper surface of the encapsulation body.

[0058] In some embodiments, performing the second operation for cutting includes applying the cutting to the upper surface of the encapsulation.

[0059] In some embodiments, providing an etched lead frame further includes providing a channel at a lower surface of each frame portion at the intermediate region.

[0060] In some embodiments, performing the first operation for cutting includes aligning the first operation for cutting with the channel at the lower surface of each frame portion.

[0061] Although the present disclosure has been illustrated and described in detail in the drawings and the foregoing description, such illustration and description are considered to be illustrative or exemplary rather than restrictive; the present disclosure is not limited to the disclosed embodiments. Other variations of the disclosed embodiments can be understood and implemented by those skilled in the art in practicing the disclosure claimed for protection, by studying the drawings, the disclosure, and the appended claims.

Claims

1. A power lead frame integrated circuit package, characterized in that: include: a lead frame including a lead region and a die pad region separated by a space; an integrated circuit die mounted to the upper surface of the die pad area; a first metal clip having a chip mounting portion mounted to the integrated circuit die, the first metal clip further comprising a lead mounting portion mounted to the lead region and a first residual bridging portion; a second metal clip including a second residual bridging portion mounted to the die pad area; An encapsulation body encapsulating the lead frame, the integrated circuit die, and the first metal clip and the second metal clip; wherein the encapsulation body has a first peripheral sidewall at which an end of the first residual bridging portion is exposed, and has a second peripheral sidewall opposite to the first peripheral sidewall at which an end of the second residual bridging portion is exposed; wherein the sidewalls of the lead region are exposed at the first peripheral sidewall of the encapsulation, and wherein the sidewalls of the die pad region are exposed at the second peripheral sidewall of the encapsulation; as well as The plating layer is located on all of the side walls of the lead area and all of the side walls of the die pad area.

2. The power leadframe integrated circuit package of claim 1 , wherein the integrated circuit die comprises a power metal oxide semiconductor field effect transistor (MOSFET), and wherein the first metal clip provides a high current capacity associated with a source region or a drain region of the MOSFET.

3. The power leadframe integrated circuit package of claim 1, wherein the plating layer is a tin layer.

4. The power leadframe integrated circuit package of claim 1, wherein the plating further extends over the lower surface of the lead region and the die pad region.

5. The power lead frame integrated circuit package of claim 1, wherein the second residual bridge portion is a segmented cut-off portion of a first metal clip for another power lead frame integrated circuit package.

6. The power lead frame integrated circuit package of claim 1, wherein the first residual bridge portion is a segmented cut-off portion of a second metal clip for another power lead frame integrated circuit package.

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