Fine circuit structure

Abstract

The utility model provides a fine line structure, which is arranged above a carrier and comprises a seed layer, and the seed layer is formed on the upper surface of the carrier; the circuit structure body is formed on the upper surface of the seed layer; and the identification structure is formed on the upper half part of the circuit structure body and is used for identifying the distribution range and the distribution state of the circuit structure body. Therefore, the identification structure is formed on the circuit structure body of the fine circuit structure, and the surface character of the identification structure is not easy to change due to etching, so that the distribution range and the distribution state of the circuit structure body can be identified through the identification structure subsequently, and the identification accuracy is improved. The distribution range and the distribution state of the fine line structure can be identified through automatic optical detection, and the probability of line breakage misjudgment in automatic optical detection is reduced.

Description

Technical Field

[0001] The present application relates to the field of semiconductor packaging technology, and in particular to a thin circuit structure. Background Art

[0002] In the production process of fine lines in the redistribution layer (RDL), various parameters and conditions need to be precisely controlled. First, a seed layer is formed on the carrier; then, the patterned photoresist is used as a template to construct the structure of the fine line through electroplating; finally, after the structure of the fine line is completed, the photoresist is removed by wet etching to complete the production process.

[0003] However, during the wet etching process, due to the erosion of the etching solution on the surface of the fine line material, obvious etching will occur on the top. Due to the change in the appearance of the top surface of the fine line, during the automated optical inspection (AOI) process, the fine line structure that is not broken may be misjudged as a broken line, which may cause unnecessary pauses and adjustments on the production line and reduce production efficiency. At this time, if the AOI parameters are readjusted to prevent misjudgment of broken lines, the broken line defect may be missed, affecting the product yield. Utility Model Content

[0004] The present application proposes a thin line structure.

[0005] In a first aspect, the present application provides a fine line structure, wherein the fine line structure is disposed above a carrier, and comprises:

[0006] A seed layer, the seed layer is formed on the upper surface of the carrier;

[0007] A circuit structure body, wherein the circuit structure body is formed on the upper surface of the seed layer;

[0008] An identification structure is formed on the upper part of the circuit structure body and is used to identify the distribution range and distribution state of the circuit structure body.

[0009] As a possible implementation manner, the identification structure has a higher etching resistance than the circuit structure body.

[0010] As a possible implementation manner, the identification structure covers the upper surface and part of the side surface of the circuit structure body.

[0011] As a possible implementation manner, the identification structure covers the upper surface of the circuit structure body.

[0012] As a possible implementation manner, the thin line structure further includes:

[0013] A first strengthening layer covers a portion of a side surface of the circuit structure body.

[0014] As a possible implementation manner, the first reinforcement layer covers at least 1 / 2 of the side surface of the circuit structure body.

[0015] As a possible implementation, the first reinforcement layer covers at most 3 / 4 of the side surface of the circuit structure body.

[0016] As a possible implementation manner, the Young's modulus of the first strengthening layer is greater than that of the circuit structure body.

[0017] As a possible implementation manner, the electromigration effect of the first strengthening layer is smaller than that of the circuit structure body.

[0018] As a possible implementation manner, the first strengthening layer and the identification structure are made of the same material.

[0019] As a possible implementation manner, the width of the circuit structure body covered by the first strengthening layer is greater than that of the circuit structure body not covered by the first strengthening layer.

[0020] As a possible implementation manner, the thin line structure further includes:

[0021] A second strengthening layer is provided, wherein the second strengthening layer covers the side surface of the circuit structure body which is not covered by the first strengthening layer.

[0022] As a possible implementation manner, the thin line structure further includes:

[0023] A second strengthening layer, wherein the second strengthening layer covers the side surface of the circuit structure body not covered by the first strengthening layer, the first strengthening layer and the identification structure.

[0024] As a possible implementation manner, the second strengthening layer is made of the same material as the first strengthening layer.

[0025] As a possible implementation manner, the second strengthening layer and the first strengthening layer are made of different materials.

[0026] As a possible implementation manner, the thickness of the first strengthening layer gradually decreases from top to bottom.

[0027] As a possible implementation manner, the surface roughness of the identification structure is lower than that of the circuit structure body not covered by the identification structure.

[0028] As a possible implementation manner, the Young's modulus of the second strengthening layer is greater than that of the circuit structure body.

[0029] As a possible implementation manner, the electromigration effect of the second strengthening layer is smaller than that of the circuit structure body.

[0030] In order to solve the current problem of misjudgment of broken wires caused by changes in the appearance of the top surface of fine wires, the present application proposes a fine wire structure, by forming an identification structure on the wire structure body of the fine wire structure. Since the identification structure is not easily changed in surface properties due to etching, the distribution range and distribution state of the wire structure body can be identified through the identification structure subsequently, thereby facilitating automatic optical detection to identify the distribution range and distribution state of the fine wire structure and reducing the probability of misjudgment of broken wires by automatic optical detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Other features, objects and advantages of the present application will become more apparent by reading the detailed description of non-limiting embodiments made with reference to the following drawings:

[0032] Figure 1 It is a schematic diagram of a thin line structure in the prior art;

[0033] Figure 2 is a schematic structural diagram of a thin line structure 100 according to an embodiment of the present application;

[0034] Figure 3 is a schematic structural diagram of a thin line structure 200 according to an embodiment of the present application;

[0035] Figure 4 is a schematic structural diagram of a thin line structure 300 according to an embodiment of the present application;

[0036] Figure 5 is a schematic structural diagram of a thin line structure 400 according to an embodiment of the present application;

[0037] Figure 6 is a schematic structural diagram of a thin line structure 500 according to an embodiment of the present application;

[0038] Figure 7 is a dimension marking diagram of a thin line structure 100 according to an embodiment of the present application;

[0039] Figure 8 is a schematic diagram of an area increase of a thin line structure according to an embodiment of the present application;

[0040] Fig. 9 is a graph showing an area increase of a thin line structure according to an embodiment of the present application;

[0041] Fig.10 is a schematic structural diagram of a thin circuit structure 100 at various manufacturing stages according to an embodiment of the present application;

[0042] Fig.11 It is a schematic diagram of the structure of a thin line structure 500 at various manufacturing stages according to an embodiment of the present application.

[0043] Description of reference numerals / symbols:

[0044] 01-carrier; 02-circuit structure body; 101-carrier; 102-seed layer; 103-circuit structure body; 104-identification structure; 105-second strengthening layer; 106-first strengthening layer; 107-photoresist. DETAILED DESCRIPTION

[0045] The specific implementation methods of the present application are described below in conjunction with the accompanying drawings and embodiments. Through the contents recorded in this specification, those skilled in the art can easily understand the technical problems solved by the present application and the technical effects produced. It is understood that the specific embodiments described herein are only used to explain the relevant inventions, rather than to limit the inventions. In addition, for ease of description, only the parts related to the relevant inventions are shown in the accompanying drawings.

[0046] It should be readily understood that the meanings of “on,” “over,” and “over” in this application should be interpreted in the broadest manner, so that “on” not only means “directly on something,” but also means “on something” including the presence of intermediate components or layers therebetween.

[0047] Additionally, for ease of description, spatially relative terms such as "below," "beneath," "lower," "above," "upper," etc. may be used herein to describe the relationship of one element or component to another element or component illustrated in the drawings. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the drawings. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly.

[0048] The term "layer" as used herein refers to a material portion including an area with a certain thickness. The layer can extend over the entire lower or upper structure, or can have a degree less than the range of the lower or upper structure. In addition, the layer can be a region of a homogeneous or inhomogeneous continuous structure, and its thickness is less than the thickness of the continuous structure. For example, the layer can be located between the top surface and the bottom surface of the continuous structure or between any pair of horizontal planes therebetween. The layer can extend horizontally, vertically and / or along a tapered surface. A substrate can be a layer, one or more layers can be included therein, and / or one or more layers can be present thereon, above and / or below. A layer can include multiple layers. For example, a semiconductor layer can include one or more doped or undoped semiconductor layers, and can have the same or different materials.

[0049] The term "substrate" as used herein refers to a material on which subsequent material layers are added. The substrate itself may be patterned. The material added on top of the substrate may be patterned or may remain unpatterned. In addition, the substrate may include a variety of semiconductor materials, such as silicon, silicon carbide, gallium nitride, germanium, gallium arsenide, indium phosphide, etc. Alternatively, the substrate may be made of a non-conductive material, such as glass, plastic, or sapphire wafer, etc. Further alternatively, the substrate may have a semiconductor device or circuit formed therein.

[0050] It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings of the specification are only used to match the contents recorded in the specification for the understanding and reading of those skilled in the art, and are not used to limit the limiting conditions for the implementation of the present application, so they have no substantial technical significance. Any modification of the structure, change in the proportional relationship, or adjustment of the size, without affecting the effects and purposes that can be achieved by the present application, should still fall within the scope of the technical content disclosed in the present application. At the same time, the terms such as "on", "first", "second" and "one" quoted in this specification are only for the convenience of narration, and are not used to limit the scope of the implementation of the present application. The change or adjustment of their relative relationship should also be regarded as the scope of the implementation of the present application without substantially changing the technical content.

[0051] It should also be noted that the longitudinal section corresponding to the embodiment of the present application may be a section corresponding to the front view direction, the transverse section may be a section corresponding to the right view direction, and the horizontal section may be a section corresponding to the top view direction.

[0052] In addition, the embodiments and features in the embodiments of the present application may be combined with each other without conflict. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0053] like Figure 1 As shown, Figure 1It is a schematic diagram of the thin line structure in the prior art. Figure 1 The thin line structure shown includes:

[0054] The carrier 01 has a seed layer and a circuit structure body 02 on top. In order to remove the excess seed layer, it is necessary to Figure 1 The fine line structure shown in (a) is wet etched to obtain Figure 1 The fine line structure shown in (b) in FIG. During the etching process, due to the erosion of the etching liquid on the surface of the fine line material, the top of the fine line will produce obvious etching phenomenon, which makes the appearance of the top surface of the fine line change. Figure 1 (c) to Figure 1 The changes shown in (d) in .

[0055] Under normal circumstances, after etching, automated optical inspection (AOI) is required to determine whether the final fine line structure meets the requirements. During the AOI process, due to uneven etching, the top of the line structure body 02 will become very rough, causing the fine line structure that is not broken to be misjudged as broken, resulting in the need to pause and adjust the production process, affecting production efficiency. At this time, if the AOI parameters are readjusted to prevent misjudgment of broken lines, the broken line defect may be missed, affecting the product yield.

[0056] In addition, the etching liquid first acts on the top surface and the upper half of the circuit structure body 02, and then gradually etches the lower half and the seed layer. This etching sequence causes the top surface of the circuit structure body 02 to be narrower than the bottom. The overall circuit is thinner than expected, increasing the risk of broken wires, and may even cause circuit performance degradation or complete failure, seriously affecting the quality and reliability of the product. In stress simulations, the insufficient cross-area of ​​this trapezoidal profile will cause the thin circuit structure to break during reliability testing.

[0057] In order to solve the above problems, the present application proposes a thin line structure.

[0058] See also Figure 2 , Figure 2 1 is a schematic diagram of a thin line structure 100 according to an embodiment of the present application. The thin line structure 100 is disposed on a carrier 101. The carrier 101 may be any material or polymer thereof such as polyimide, polybenzoxazole, polyphenylene oxide (BCB), etc. The thin line structure 100 includes:

[0059] The seed layer 102 is formed on the upper surface of the carrier 101. The seed layer 102 is used to provide a good foundation for the subsequent formation of the circuit structure body 103. The seed layer 102 can be a layer of thin film material (e.g., metal (such as titanium (Ti), tantalum (Ta), tungsten (W), titanium nitride (TiN), tantalum nitride (TaN) film)) deposited on the surface of the carrier 101 by physical vapor deposition (Physical Vapor Deposition, PVD) or chemical vapor deposition (Chemical Vapor Deposition, CVD) and other technologies.

[0060] The circuit structure body 103 is formed on the upper surface of the seed layer 102. The circuit structure body 103 may be a redistribution layer (RDL) for realizing signal transmission and exchange, ensuring the normal operation of the circuit, reducing the height of the packaging structure, and realizing a more compact design and a higher degree of integration. Optionally, the circuit structure body 103 may be a copper (Cu) fine line structure or a silver (Ag) fine line structure, which is not limited here.

[0061] The identification structure 104 is formed in the upper part of the circuit structure body 103 and is used to identify the distribution range and distribution state of the circuit structure body 103. The material of the identification structure 104 is different from that of the circuit structure body 103, and its etching resistance can be greater than that of the circuit structure body 103. Therefore, after wet etching (the wet etching process is used to etch and remove the seed layer 102), the surface roughness of the identification structure 104 will be lower than that of the circuit structure body 103 not covered by the identification structure 104. For example, the identification structure 104 can be made of a material with high etching resistance, such as cobalt (Co), nickel (Ni), palladium (Pd), etc.

[0062] In this way, during the manufacturing process of the fine line structure 100, the identification structure 104 will not be etched to form a rough surface. Since the identification structure 104 is generated in the upper half of the line structure body 103, the distribution range and distribution state of the line structure body 103 can be obtained by identifying the identification structure 104 during AOI inspection. The fine line structure 100 that is not broken can be clearly identified so as not to be mistakenly judged as a broken line.

[0063] As a possible implementation, the identification structure 104 may only cover the upper surface of the circuit structure body 103 , or may cover the upper surface and part of the side surface of the circuit structure body 103 .

[0064] When the identification structure 104 only covers the upper surface of the circuit structure body 103, as a possible implementation, the fine circuit structure 100 may further include: a first strengthening layer 106, which is used to cover part of the side surface of the circuit structure body 103, protect the circuit structure body 103, and reduce the risk of disconnection caused by the etching solution or electromigration effect. In this way, due to the protection of the first strengthening layer 106, the width of the circuit structure body 103 covered by the first strengthening layer 106 is greater than the circuit structure body 103 not covered by the first strengthening layer 106.

[0065] Preferably, since the first reinforcement layer 106 is intended to prevent line breakage, a material having a Young's modulus (a physical quantity that describes a material's resistance to deformation when subjected to force) greater than the circuit structure body 103 can be used. Through its higher Young's modulus, stress can be effectively transferred and dispersed, stress concentration can be reduced, and the risk of fracture of the circuit structure body 103 can be reduced, thereby effectively enhancing the strength of the circuit structure body 103 and preventing line breakage.

[0066] Preferably, the electromigration effect of the first strengthening layer 106 may be smaller than that of the circuit structure body 103. The smaller the electromigration effect of the first strengthening layer 106, the smaller the possibility of deformation thereof. Therefore, the circuit structure body 103 can be well protected, its strength can be enhanced, and its disconnection can be prevented.

[0067] It should be noted that when the material of the identification structure 104 has the function of enhancing the strength of the circuit structure body 103, the material of the first reinforcement layer 106 can also be the same material as the identification structure 104, that is, the first reinforcement layer 106 can be regarded as a part of the identification structure 104. In this case, the identification structure 104 covers the upper surface of the circuit structure body 103, and at the same time, as the first reinforcement layer 106, it covers part of the side surface of the circuit structure body 103. At this time, the identification structure 104 has two functions: 1. It is used to identify the distribution range and distribution state of the circuit structure body 103; 2. Increase the strength of the circuit structure body 103 to prevent disconnection. Therefore, the material of the first reinforcement layer 106 can be the same as the identification structure 104, or different, and there is no limitation here.

[0068] See also Figure 3 , Figure 3 FIG. 2 is a schematic diagram of a thin line structure 200 according to an embodiment of the present application. The thin line structure 200 is similar to the thin line structure 100, except that:

[0069] First, in the fine line structure 100 , it is not limited whether the material of the first strengthening layer 106 is the same as the material of the identification structure 104 ; in the fine line structure 200 , the material of the first strengthening layer 106 is the same as the material of the identification structure 104 .

[0070] Secondly, the thin circuit structure 200 may further include a second strengthening layer 105 . The second strengthening layer 105 is made of different materials from the first strengthening layer 106 and covers the side surface of the circuit structure body 103 not covered by the first strengthening layer 106 , the first strengthening layer 106 and the identification structure 104 .

[0071] The second strengthening layer 105 is provided to protect the side surface of the circuit structure body 103 not covered by the first strengthening layer 106, further enhance the strength of the circuit structure body 103, and prevent it from breaking. Therefore, similar to the first strengthening layer 106, the Young's modulus of the second strengthening layer 105 can be greater than the Young's modulus of the circuit structure body 103, and the electromigration effect of the second strengthening layer 105 can be less than the electromigration effect of the circuit structure body 103.

[0072] See also Figure 4 , Figure 4 FIG. 3 is a schematic diagram of a thin line structure 300 according to an embodiment of the present application. The thin line structure 300 is similar to the thin line structure 200, except that:

[0073] In the thin circuit structure 200, the second strengthening layer 105 covers the side surface of the circuit structure body 103 not covered by the first strengthening layer 106, the first strengthening layer 106 and the identification structure 104; in the thin circuit structure 300, the second strengthening layer 105 only covers the side surface of the circuit structure body 103 not covered by the first strengthening layer 106. In this way, the side surface of the circuit structure body 103 not covered by the first strengthening layer 106 can be more efficiently protected to prevent it from being broken.

[0074] See also Figure 5 , Figure 5 FIG. 4 is a schematic diagram of a thin line structure 400 according to an embodiment of the present application. The thin line structure 400 is similar to the thin line structure 300, except that:

[0075] In the fine line structure 300 , the second strengthening layer 105 and the first strengthening layer 106 are made of different materials. In the fine line structure 400 , the second strengthening layer 105 and the first strengthening layer 106 are made of the same material. In this case, the identification structure 104 , the first strengthening layer 106 and the second strengthening layer 105 are all made of the same material.

[0076] See also Figure 6 , Figure 6 FIG. 5 is a schematic diagram of a thin line structure 500 according to an embodiment of the present application. The thin line structure 500 is similar to the thin line structure 100, except that:

[0077] First, in the fine line structure 100 , it is not limited whether the material of the first strengthening layer 106 is the same as the material of the identification structure 104 ; in the fine line structure 500 , the material of the first strengthening layer 106 is the same as the material of the identification structure 104 .

[0078] Secondly, in the fine line structure 100, the thickness of the first strengthening layer 106 remains unchanged from top to bottom; in the fine line structure 500, the thickness of the first strengthening layer 106 gradually decreases from top to bottom, and repeated etching is not required during its manufacturing process.

[0079] See also Figure 7 , Figure 7 1 is a dimension marking diagram of a thin line structure according to an embodiment of the present application.

[0080] The top width a of the wiring structure body 103 is 0.5 to 5 μm. As an example, in the fine wiring structure 100 , it is 2 μm.

[0081] The bottom width b of the line structure body 103 is 0.8 to 1.0 times the top width a. As an example, in the thin line structure 100, it is 0.9 times.

[0082] The height d of the wiring structure body 103 is 1 to 5 μm. As an example, in the fine wiring structure 100 , the height d is 4.5 μm.

[0083] The ratio of the height c of the first strengthening layer 106 to the height d of the circuit structure body 103 can be set as required. Preferably, the height c of the first strengthening layer 106 is 0.5 to 0.75 times the height d of the circuit structure body 103. Within this range, the disconnection problem can be better solved. As an example, in the thin circuit structure 100, it is 0.75 times.

[0084] The thickness of the seed layer 102 is 200 to As an example, in the thin line structure 100,

[0085] and Figure 8 contrast, Figure 8 This is a schematic diagram of the area increase of a thin circuit structure according to an embodiment of the present application. When the first strengthening layer 106 is not set, the area of ​​the circuit structure body 103 should be (a+b)×c / 2; after the first strengthening layer 106 is set, the increased area of ​​the circuit structure body 103 is (ab)(2-d / c)d / 2; it can be deduced that the size of the area increase rate is related to the value of d / c. When the value of d / c is changed, the area and area increase rate of the circuit structure body 103 will change, see Table 1 below for details:

[0086]

[0087] Table 1

[0088] Combining Table 1 and Fig. 9 , Fig. 9 According to the area increase curve of the fine line structure of an embodiment of the present application, when d / c exceeds 0.5, the area of ​​the line structure body 103 can be increased by more than 20%. When d / c exceeds 0.75, the increase in the area increase rate will slow down, and the area increase efficiency will gradually decrease. Therefore, in order to ensure the area increase rate and efficiency, it is preferred that the first strengthening layer 106 covers at least 1 / 2 of the side surface of the line structure body 103, and at most covers 3 / 4 of the side surface of the line structure body 103.

[0089] Refer to the following Fig.10 The following are the manufacturing steps of an embodiment of the thin line structure 100 of the present application when the identification structure 104 and the first strengthening layer are made of the same material:

[0090] Step 1: See Fig.10 In step (a), a seed layer 102 is deposited on the carrier 101;

[0091] Step 2: See Fig.10 In step (b), a photoresist 107 is provided on the seed layer 102, and the step of providing the photoresist 107 may include coating, photolithography and development to define a pattern;

[0092] Step 3: See Fig.10 In step (c), based on the pattern defined by the photoresist 107, electroplating is performed between the photoresists 107 to form the circuit structure body 103;

[0093] Step 4: See Fig.10 In step (d), dry etching is used to remove part of the photoresist 107. Due to the uniformity of the dry etching rate, the depth of the removed photoresist 107 is 1 / 2 to 3 / 4, which is feasible and preferred. However, the use of a wet process will remove the entire photoresist 107 and cannot achieve the effect of partial removal. Therefore, dry etching is preferably used here;

[0094] Step 5: See Fig.10 In step (e), an identification structure 104 is formed on the exposed surface of the circuit structure body 103; the identification structure 104 can be formed by electroplating, redox electroless plating, and selective deposition. Among them, electroplating is a relatively mature technology without metal restrictions and requires a seed layer; redox electroless plating can also be selectively deposited without a seed layer, but there are metal restrictions; selective deposition has high uniformity, but there are metal restrictions and there is a risk of high temperature. Therefore, it is preferred to use electroplating to form the identification structure 104;

[0095] Step 6: See Fig.10 In step (f), the remaining photoresist 107 is removed by wet etching;

[0096] Step 7: See Fig.10 In step (g), a wet etching method is used to remove the seed layer 102 that is not covered by the circuit structure body 103;

[0097] Step 8: See Fig.10 In step (h), other packaging operations are performed, which are not limited here.

[0098] Refer to the following Fig.11 The manufacturing steps of an embodiment of the fine line structure 500 of the present application are introduced as follows:

[0099] Step 1: See Fig.11 In step (a), a seed layer 102 is deposited on the carrier 101;

[0100] Step 2: See Fig.11 In step (b), a photoresist 107 is provided on the seed layer 102, and the step of providing the photoresist 107 may include coating, photolithography and development to define a pattern;

[0101] Step 3: See Fig.11 In step (c), based on the pattern defined by the photoresist 107, electroplating is performed between the photoresists 107 to form the circuit structure body 103;

[0102] Step 4: See Fig.11 In step (d), laser removal of a portion of the photoresist 107;

[0103] Step 5: See Fig.11 In step (e), an identification structure 104 is formed on the exposed surface of the circuit structure body 103; the identification structure 104 can be formed by electroplating, redox electroless plating, and selective deposition. Among them, electroplating is a relatively mature technology without metal restrictions and requires a seed layer; redox electroless plating can also be selectively deposited without a seed layer, but there are metal restrictions; selective deposition has high uniformity, but there are metal restrictions and there is a risk of high temperature. Therefore, it is preferred to use electroplating to form the identification structure 104;

[0104] Step 6: See Fig.11 In step (f), the remaining photoresist 107 is removed by wet etching;

[0105] Step 7: See Fig.11 In step (g), the seed layer 102 not covered by the circuit structure body 103 is removed by wet etching.

[0106] As used herein, the terms "substantially," "substantial," "approximately," and "about" are used to indicate and explain minor variations. For example, when used in conjunction with a numerical value, the above terms may refer to a variation range of less than or equal to ±10% of the corresponding numerical value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. As another example, the thickness of a film or layer is "substantially uniform" and may refer to a standard deviation of less than or equal to ±10% of the average thickness of the film or layer, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. The term "substantially coplanar" may refer to two surfaces that are within 50 μm along the same plane, such as within 40 μm, 30 μm, 20 μm, 10 μm, or 1 μm along the same plane. Two components may be considered to be "substantially aligned" if, for example, the two components overlap or overlap within 200 μm, 150 μm, 100 μm, 50 μm, 40 μm, 30 μm, 20 μm, 10 μm, or 1 μm. Two surfaces or components may be considered to be "substantially perpendicular" if the angle between the two surfaces or components is, for example, 90°±10°, such as ±5°, ±4°, ±3°, ±2°, ±1°, ±0.5°, ±0.1°, or ±0.05°. When used in conjunction with an event or situation, the terms "substantially", "substantial", "approximately", and "about" may refer to situations where the event or situation occurs exactly as well as situations where the event or situation occurs very approximately.

Claims

1. A thin line structure, characterized in that: The thin line structure is arranged above the carrier, and includes: A seed layer, the seed layer is formed on the upper surface of the carrier; A circuit structure body, wherein the circuit structure body is formed on the upper surface of the seed layer; An identification structure is formed on the upper part of the circuit structure body and is used to identify the distribution range and distribution state of the circuit structure body.

2. The thin line structure according to claim 1, characterized in that: The identification structure has a higher etching resistance than the circuit structure body.

3. The thin line structure according to claim 1, characterized in that: The identification structure covers the upper surface and a portion of the side surface of the circuit structure body.

4. The thin line structure according to claim 1, characterized in that: The thin line structure further includes: A first strengthening layer covers a portion of a side surface of the circuit structure body.

5. The thin line structure according to claim 4, characterized in that: The first strengthening layer covers at least 1 / 2 of the side surface of the circuit structure body.

6. The thin line structure according to claim 4, characterized in that: The Young's modulus of the first strengthening layer is greater than that of the circuit structure body.

7. The thin line structure according to claim 4, characterized in that: The electromigration effect of the first strengthening layer is smaller than that of the circuit structure body.

8. The thin line structure according to claim 4, characterized in that: The width of the circuit structure body covered by the first strengthening layer is greater than the width of the circuit structure body not covered by the first strengthening layer.

9. The thin line structure according to claim 4, characterized in that: The thin line structure further includes: A second strengthening layer is provided, wherein the second strengthening layer covers the side surface of the circuit structure body which is not covered by the first strengthening layer.

10. The thin line structure according to claim 4, characterized in that: The thickness of the first strengthening layer gradually decreases from top to bottom.

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