Optical fiber gateway unit
By designing the fiber optic gateway unit, using the wavelength division multiplexing coupler and circuit components, the uplink signal and downlink signal are achieved, which solves the problem of missing signal penetration mechanism in the existing technology, and significantly improves signal transmission Visualization and efficiency.
Patent Information
- Application Number
- CN202420445062.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-03-07
- Publication Date
- 2024-12-13
- Estimated Expiration
- 2034-03-07
AI Technical Summary
The prior art has failed to effectively demonstrate how uplink signals and downlink signals can be connected to optical fiber ports through circuits.
A fiber gateway unit is designed, including a wavelength division multiplexing coupler, downlink circuit and uplink circuit. Through components such as fiber detectors, transformers, adjustable attenuators, power amplifiers and attenuation chips, the signal is ensured to be in The connection between the circuit and the optical fiber port.
It clearly shows how the uplink signal and downlink signal can be connected to the optical fiber port through the circuit, solving the problem of missing signal penetration mechanism in the prior art.
Smart Images

Figure CN222169818U_ABST
Abstract
Description
Technical Field
[0001] The utility model belongs to the field of gateways, and in particular relates to an optical fiber gateway unit. Background Art
[0002] The publication number is CN216662080U, the subject name is a utility model patent based on gateway intelligent optical fiber transmission equipment, its IPC classification number is B65H75 / 04, B65H75 / 18, and its technical solution discloses "including an equipment body, the front surface of the equipment body is provided with a box cover, the top of the equipment body is provided with a wire tube, the inner cavity of the equipment body is provided with a transmission device body, the bottom of the inner cavity of the equipment body is provided with a wiring groove, the wiring groove is provided with a wire clamp, and the bottom of the equipment body is provided with a wire tube; a control box, the control box is provided on the front surface of the box cover, the front surface of the control box is respectively provided with a display screen, a buzzer, a humidity sensor and a temperature sensor, the inner cavity of the control box is provided with a processor and a transmission module, and the processor is electrically input connected to the temperature sensor and the humidity sensor".
[0003] However, the above utility model patent, see its attached Figure 1 -4, its disclosed technical solution does not extend further to the main circuit structure, and cannot reflect how the uplink signal and the downlink signal are connected through the uplink and downlink circuits and the optical fiber port. Utility Model Content
[0004] The utility model aims at the status of the prior art, overcomes the above defects and provides a fiber optic gateway unit.
[0005] The utility model adopts the following technical solution, and the optical fiber gateway unit includes:
[0006] Wavelength division multiplexing coupler P1, end 1 of the wavelength division multiplexing coupler P1 is connected to the optical fiber port;
[0007] Downlink circuit, terminal 2 of the wavelength division multiplexing coupler P1 is connected to the input terminal of the optical fiber detector U3 of the downlink circuit, the output terminal of the optical fiber detector U3 is connected to terminal 2 of the adjustable attenuator U2 via the mutual inductor B1, terminal 1 of the adjustable attenuator U2 is connected to terminal 3 of the power amplifier U1 via the capacitor C5, and terminal 1 of the power amplifier U1 is connected to the transmitting terminal via the capacitor C4, the inductor L3, the inductor L2, the inductor L1 and the capacitor C1;
[0008] In the uplink circuit, terminal 3 of the wavelength division multiplexing coupler P1 is connected to the input terminal of the photodetector U6 of the uplink circuit, the output terminal of the optical fiber detector U6 is connected to terminal 3 of the attenuation chip D1 via the power amplifier U5, terminal 1 of the attenuation chip D1 is connected to terminal 3 of the power amplifier U4 via capacitor C17, and terminal 1 of the power amplifier U4 is connected to the receiving end via capacitor C16, inductor L13, capacitor C15, inductor L12, capacitor C14 and inductor L11.
[0009] As a further preferred technical solution of the above technical solution, terminal 1 of the photodetector U3 is connected to terminal 2 of the wavelength division multiplexing coupler P1, terminal 3 of the photodetector U3 is grounded via resistor R1, and terminal 4 of the photodetector U3 is connected to terminal 1 of the transformer B1 via capacitor C7.
[0010] As a further preferred technical solution of the above technical solution, terminal 2 of the mutual inductor B1 is grounded via resistor R3, terminal 3 of the mutual inductor B1 is grounded via resistor R2, the common end of terminal 3 of the mutual inductor B1 and resistor R2 is connected to one end of resistor R4, the other end of resistor R4 is grounded via resistor R5, and the common end of resistor R4 and resistor R5 is connected to terminal 1 of RF port F1.
[0011] As a further preferred technical solution of the above technical solution, terminal 1 of the photodetector U6 is connected to terminal 3 of the wavelength division multiplexing coupler P1, terminal 3 of the photodetector U6 is connected to one end of the resistor R11 via the inductor L21, and terminal 4 of the photodetector U6 is connected to terminal 3 of the power amplifier U5 via the inductor L14 and the capacitor C19.
[0012] As a further preferred technical solution of the above technical solution, the common end of the inductor L21 and the resistor R11 is further connected to one end of the capacitor C29, and the common end of the inductor L21 and the resistor R11 is further connected to one end of the resistor R13.
[0013] As a further preferred technical solution of the above technical solution, terminal 1 of the attenuation chip D1 and the common end of the capacitor C17 are connected to one end of the resistor R7, terminal 2 of the attenuation chip D1 is connected to one end of the inductor L10, terminal 3 of the attenuation chip D1 and the common end of the capacitor C18 are connected to one end of the resistor R8, terminal 4 of the attenuation chip D1 is connected to one end of the resistor R10, terminal 5 of the attenuation chip D1 is connected to one end of the resistor R9, the common end of the resistor R9 and the resistor R10 is connected to one end of the resistor R12, and the other end of the resistor R12 is connected to the VCC power supply via the resistor R15.
[0014] The optical fiber gateway unit disclosed by the utility model has the beneficial effect of clearly showing how the uplink signal and the downlink signal are connected through the circuit and the optical fiber port. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] Figure 1 It is a schematic diagram of the main circuit structure of this application.
[0016] Reference numerals: 101 - downlink circuit; 102 - uplink circuit. DETAILED DESCRIPTION
[0017] The utility model discloses an optical fiber gateway unit. The specific implementation manner of the utility model is further described below in conjunction with a preferred embodiment (embodiment 1).
[0018] See attached figure Figure 1 , Figure 1 The main circuit structure of the optical fiber gateway unit is shown.
[0019] Example 1.
[0020] See attached figure Figure 1 Preferably, the optical fiber gateway unit comprises:
[0021] Wavelength division multiplexing coupler P1, end 1 of the wavelength division multiplexing coupler P1 is connected to the optical fiber port (Optical);
[0022] Downlink circuit 101, terminal 2 of wavelength division multiplexing coupler P1 is connected to the input terminal of optical fiber detector U3 of downlink circuit 101, the output terminal of optical fiber detector U3 is connected to terminal 2 of adjustable attenuator U2 via mutual inductor B1, terminal 1 of adjustable attenuator U2 is connected to terminal 3 of power amplifier U1 via capacitor C5, terminal 1 of power amplifier U1 is connected to transmitting terminal (RF Tx) via capacitor C4, inductor L3, inductor L2, inductor L1 and capacitor C1;
[0023] In the uplink circuit 102, terminal 3 of the wavelength division multiplexing coupler P1 is connected to the input terminal of the photodetector U6 of the uplink circuit 102, the output terminal of the optical fiber detector U6 is connected to terminal 3 of the attenuation chip D1 via the power amplifier U5, terminal 1 of the attenuation chip D1 is connected to terminal 3 of the power amplifier U4 via capacitor C17, and terminal 1 of the power amplifier U4 is connected to the receiving end (RF Rx) via capacitor C16, inductor L13, capacitor C15, inductor L12, capacitor C14 and inductor L11.
[0024] Specifically, terminal 1 of the photodetector U3 is connected to terminal 2 of the wavelength division multiplexing coupler P1, terminal 3 of the photodetector U3 is grounded via resistor R1, and terminal 4 of the photodetector U3 is connected to terminal 1 of the transformer B1 via capacitor C7.
[0025] Specifically, terminal 2 of transformer B1 is grounded via resistor R3, terminal 3 of transformer B1 is grounded via resistor R2, the common end of terminal 3 of transformer B1 and resistor R2 is connected to one end of resistor R4, the other end of resistor R4 is grounded via resistor R5, and the common end of resistor R4 and resistor R5 is connected to terminal 1 of RF port F1.
[0026] Specifically, the common end of capacitor C4 and inductor L3 is connected to one end of inductor L9, and the other end of inductor L9 is grounded via capacitor C13; the common end of capacitor C4 and inductor L3 is connected to one end of inductor L8, and the other end of inductor L8 is grounded via capacitor C12.
[0027] Specifically, the common end of capacitor C3 and inductor L2 is connected to one end of inductor L7, and the other end of inductor L7 is grounded via capacitor C11; the common end of capacitor C3 and inductor L2 is connected to one end of inductor L6, and the other end of inductor L6 is grounded via capacitor C10.
[0028] Specifically, the common end of capacitor C2 and inductor L1 is connected to one end of inductor L5, and the other end of inductor L5 is grounded via capacitor C9; the common end of capacitor C2 and inductor L1 is connected to one end of inductor L4, and the other end of inductor L4 is grounded via capacitor C8.
[0029] Specifically, terminal 1 of the photodetector U6 is connected to terminal 3 of the wavelength division multiplexing coupler P1, terminal 3 of the photodetector U6 is connected to one end of the resistor R11 via the inductor L21, and terminal 4 of the photodetector U6 is connected to terminal 3 of the power amplifier U5 via the inductor L14 and the capacitor C19.
[0030] Specifically, a common end of the inductor L21 and the resistor R11 is also connected to one end of the capacitor C29 , and a common end of the inductor L21 and the resistor R11 is also connected to one end of the resistor R13 .
[0031] Specifically, terminal 1 of the attenuation chip D1 and the common end of the capacitor C17 are connected to one end of the resistor R7, terminal 2 of the attenuation chip D1 is connected to one end of the inductor L10, terminal 3 of the attenuation chip D1 and the common end of the capacitor C18 are connected to one end of the resistor R8, terminal 4 of the attenuation chip D1 is connected to one end of the resistor R10, terminal 5 of the attenuation chip D1 is connected to one end of the resistor R9, the common end of the resistors R9 and R10 is connected to one end of the resistor R12, and the other end of the resistor R12 is connected to the VCC power supply via the resistor R15.
[0032] Specifically, the common end of the inductor L13 and the capacitor C16 is connected to one end of the inductor L19, and the other end of the inductor L19 is grounded via the capacitor C26; the common end of the inductor L13 and the capacitor C16 is connected to one end of the inductor L20, and the other end of the inductor L20 is grounded via the capacitor C27.
[0033] Specifically, the common end of the inductor L12 and the capacitor C15 is connected to one end of the inductor L17, and the other end of the inductor L17 is grounded via the capacitor C24; the common end of the inductor L12 and the capacitor C15 is connected to one end of the inductor L18, and the other end of the inductor L18 is grounded via the capacitor C25.
[0034] Specifically, the common end of the inductor L11 and the capacitor C14 is connected to one end of the inductor L15, and the other end of the inductor L15 is grounded via the capacitor C22; the common end of the inductor L11 and the capacitor C14 is connected to one end of the inductor L16, and the other end of the inductor L16 is grounded via the capacitor C23.
[0035] It is worth mentioning that according to the fiber optic gateway unit disclosed in this embodiment, the uplink signal is introduced from the receiving end (RF Rx), and passes through the uplink circuit 102 such as the power amplifier U4, the attenuation chip D1 and the power amplifier U5 in sequence, until the uplink signal is sent to the terminal 3 of the wavelength division multiplexing coupler P1, and then sent to the optical fiber port by the wavelength division multiplexing coupler P1; the downlink signal is led out from the terminal 2 of the wavelength division multiplexing coupler P1, and passes through the downlink circuit 101 such as the mutual inductor B1, the adjustable attenuator U2, the power amplifier U1 in sequence, until the downlink signal is sent to the transmitting end (RF Tx).
[0036] It is worth mentioning that the technical features such as the parameters of the adjustable attenuator U2 involved in this utility model patent application should be regarded as the prior art. The specific structure, working principle and possible control method and spatial layout method of these technical features can be selected by conventional methods in the field and should not be regarded as the inventive point of this utility model patent. This utility model patent will not be further elaborated.
[0037] For those skilled in the art, it is still possible to modify the technical solutions described in the aforementioned embodiments, or to make equivalent substitutions for some of the technical features therein. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present utility model should be included in the protection scope of the present utility model.
Claims
1. A fiber optic gateway unit, characterized in that: include: Wavelength division multiplexing coupler P1, end 1 of the wavelength division multiplexing coupler P1 is connected to the optical fiber port; Downlink circuit, terminal 2 of the wavelength division multiplexing coupler P1 is connected to the input terminal of the optical fiber detector U3 of the downlink circuit, the output terminal of the optical fiber detector U3 is connected to terminal 2 of the adjustable attenuator U2 via the mutual inductor B1, terminal 1 of the adjustable attenuator U2 is connected to terminal 3 of the power amplifier U1 via the capacitor C5, and terminal 1 of the power amplifier U1 is connected to the transmitting terminal via the capacitor C4, the inductor L3, the inductor L2, the inductor L1 and the capacitor C1; In the uplink circuit, terminal 3 of the wavelength division multiplexing coupler P1 is connected to the input terminal of the photodetector U6 of the uplink circuit, the output terminal of the optical fiber detector U6 is connected to terminal 3 of the attenuation chip D1 via the power amplifier U5, terminal 1 of the attenuation chip D1 is connected to terminal 3 of the power amplifier U4 via capacitor C17, and terminal 1 of the power amplifier U4 is connected to the receiving end via capacitor C16, inductor L13, capacitor C15, inductor L12, capacitor C14 and inductor L11.
2. The optical fiber gateway unit according to claim 1, characterized in that: Terminal 1 of the photodetector U3 is connected to terminal 2 of the wavelength division multiplexing coupler P1, terminal 3 of the photodetector U3 is grounded via resistor R1, and terminal 4 of the photodetector U3 is connected to terminal 1 of the transformer B1 via capacitor C7.
3. The optical fiber gateway unit according to claim 2, characterized in that: Terminal 2 of the transformer B1 is grounded via resistor R3, terminal 3 of the transformer B1 is grounded via resistor R2, the common end of terminal 3 of the transformer B1 and resistor R2 is connected to one end of resistor R4, the other end of resistor R4 is grounded via resistor R5, and the common end of resistor R4 and resistor R5 is connected to terminal 1 of RF port F1.
4. The optical fiber gateway unit according to claim 1, characterized in that: Terminal 1 of the photodetector U6 is connected to terminal 3 of the wavelength division multiplexing coupler P1, terminal 3 of the photodetector U6 is connected to one end of the resistor R11 via the inductor L21, and terminal 4 of the photodetector U6 is connected to terminal 3 of the power amplifier U5 via the inductor L14 and the capacitor C19.
5. The optical fiber gateway unit according to claim 4, characterized in that: A common end of the inductor L21 and the resistor R11 is also connected to one end of the capacitor C29 , and a common end of the inductor L21 and the resistor R11 is also connected to one end of the resistor R13 .
6. The optical fiber gateway unit according to claim 4, characterized in that: Terminal 1 of the attenuation chip D1 and the common end of the capacitor C17 are connected to one end of the resistor R7, terminal 2 of the attenuation chip D1 is connected to one end of the inductor L10, terminal 3 of the attenuation chip D1 and the common end of the capacitor C18 are connected to one end of the resistor R8, terminal 4 of the attenuation chip D1 is connected to one end of the resistor R10, terminal 5 of the attenuation chip D1 is connected to one end of the resistor R9, the common end of the resistor R9 and the resistor R10 is connected to one end of the resistor R12, and the other end of the resistor R12 is connected to the VCC power supply via the resistor R15.
