Clock reference circuit module
By using high-precision passive crystal oscillator and I2C bus communication of the clock chip PT7C4337UEX in the microprocessor clock module, the problem of insufficient accuracy and stability of the clock module in the existing technology is solved, and a high-precision and low-power clock reference is realized The module ensures the stability and accuracy of the clock signal.
Patent Information
- Application Number
- CN202420933800.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-30
- Publication Date
- 2024-12-17
- Estimated Expiration
- 2034-04-30
AI Technical Summary
The existing microprocessor clock modules have shortcomings in accuracy and stability and low power consumption. The internal reference frequency is greatly affected by load and system pressure, and the lack of effective calibration and self-feedback adjustment, resulting in a reduced clock signal accuracy.
A clock reference circuit module is designed, using a high-precision 32.768Khz passive crystal oscillator and compensates its frequency through the first and second capacitors. The clock chip PT7C4337UEX communicates with the MCU controller in real time through the I2C bus to realize data transmission and control. , has interrupt output and square wave clock signal output, can feedback and adjust clock data in real time to ensure the accuracy and stability of the signal.
Improve the accuracy and stability of the clock signal, reduce the dependence on power supply stability, realize low power consumption and high precision clock reference module, suitable for various electronic devices that require high-precision clock signals, and improve the system's Reliability and operational efficiency.
Smart Images
Figure CN222189777U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the field of clock circuits, in particular to a clock reference circuit module. Background Art
[0002] With the continuous development of science and technology, the requirements of microprocessors for the stability, accuracy and low power consumption of clock signals are increasing day by day. As an important part of the electronic product circuit, the performance of the clock reference module directly affects the stability and operating efficiency of the equipment. Although the clock reference module of the microprocessor on the market can meet the basic clock reference requirements, it still needs to be improved in terms of accuracy, stability and low power consumption.
[0003] Microprocessor clock modules in the prior art mostly use an internal reference frequency as a reference. The operation of the internal reference frequency is greatly affected by the load and system operating pressure, and the power supply stability also affects the internal reference frequency of the clock IC. At the same time, the microprocessor clock reference module is missing or passive in calibration and self-feedback adjustment, and is affected by the quality and stability of hardware elements such as crystal oscillator stability, capacitance, inductance, load, system pressure, temperature and environmental changes, resulting in a reduction in the accuracy of the clock signal. Summary of the invention
[0004] In order to solve the above-mentioned technical problems, the utility model provides a clock reference circuit module.
[0005] The technical solution of the utility model is achieved in this way:
[0006] A clock reference circuit module comprises a clock chip, wherein the clock chip is connected to a level conversion circuit via a bidirectional input / output interface, the level conversion circuit is bidirectionally connected to an MCU controller, the clock chip is connected to a DC power supply via a battery interface for providing power, the clock chip is connected to a timing interrupt output receiving end via RTC_INT_LL, and the clock chip is also connected to a square wave clock output receiving end via CLK_32K_OUT; the bidirectional input / output interface is I2C0_SCL and I2C0_SDA, the clock chip adopts PT7C4337UEX, and also has an interrupt output function RTC_INT_LL, and a square wave clock signal output CLK_32K_OUT signal, which is used for other ICs as a reference clock, and the microprocessor MCU controller reads and feeds back the clock signal in real time via an I2C bus, and adjusts the real-time output clock data according to the clock chip data.
[0007] Further, the first pin of the clock chip is connected to one end of the passive crystal oscillator Y1, one end of the passive crystal oscillator Y1 is connected to one end of the second capacitor C50 through the first capacitor C40, one end of the second capacitor C50 is also connected to the ground, the second pin of the clock chip is connected to the other end of the passive crystal oscillator Y1, the other end of the passive crystal oscillator Y1 is also connected to the other end of the second capacitor C50, the third pin of the clock chip is connected to VCC1V8_PMU through the first resistor R9979, one end of the third pin of the clock chip is also connected to RTC_INT_LL, the fourth pin of the clock chip is connected to the ground, the fifth pin of the clock chip is connected to I2C0_SDA, the sixth pin of the clock chip is connected to I2C0_SCL, the seventh pin of the clock chip is connected to CLK_32K_OUT, and is also connected to VCC1V8_PMU through the second resistor R3, and the eighth pin of the clock chip is connected to a DC power supply.
[0008] Further, the DC power supply includes a battery holder, a first pin of the battery holder is connected to the ground, a second pin of the battery holder is connected to the TP-SMT through a first diode D8050, one end of the first diode D8050 is connected to one end of the third resistor R9981, the other end of the first diode D8050 is connected to the other end of the third resistor R9981, the TP-SMT is also connected to VCC_3V6 through a second diode D8051, and the TP-SMT is also connected to the ground through a third capacitor C51, wherein the TP-SMT is a connection point in the DC power supply for connecting and transmitting signals.
[0009] Further, the level conversion circuit includes clock signal transmission and data signal transmission, the clock signal transmission includes a first NMOS tube Q9517, the drain of the first NMOS tube Q9517 is connected to VCC_3V6 through a fourth resistor R9888, and the drain of the first NMOS tube Q9517 is also connected to a clock chip through I2C0_SCL, the source of the first NMOS tube Q9517 is connected to the gate of the first NMOS tube Q9517 through a fifth resistor R9887, the source of the first NMOS tube Q9517 is also connected to the microprocessor MCU controller through I2C0_SCL_P, and the gate of the first NMOS tube Q9517 is also connected to VCC 3V3_SYS.
[0010] Further, the data signal transmission includes a second NMOS tube Q9522, a drain of the second NMOS tube Q9522 is connected to VCC_3V6 through a sixth resistor R9914, and the drain of the second NMOS tube Q9522 is also connected to the clock chip through I2C0_SDA, the source of the second NMOS tube Q9522 is connected to the gate of the second NMOS tube Q9522 through a seventh resistor R9913, the source of the second NMOS tube Q9522 is also connected to the microprocessor MCU controller through I2C0_SDA_P, and the gate of the second NMOS tube Q9522 is also connected to VCC 3V3_SYS.
[0011] Furthermore, the first capacitor C40 and the second capacitor C50 are both 12 pF, and the passive crystal oscillator Y1 is 32.768 Khz.
[0012] Beneficial effects:
[0013] The utility model adopts a high-precision 32.768Khz passive crystal oscillator Y1. At the same time, two 12PF capacitors, namely a first capacitor C40 and a second capacitor C52, compensate for the stability of the passive crystal oscillator output frequency, so that the passive crystal oscillator output is more stable. The unstable power supply has no effect on the passive crystal oscillator output. The clock chip PT7C4337UEX communicates with the microprocessor MCU controller in real time through the I2C bus to realize data transmission and control. The microprocessor performs internal data analysis and comparison processing on the received clock signal through the I2C protocol to determine whether the accuracy and stability are correct. The clock chip has a feedback function inside, which can feedback and fine-tune the output data in real time, so that the data output by the clock reference module is more accurate.
[0014] It is also powered by an optional battery or a DC power supply. When the battery voltage is lower than the DC power supply voltage minus the forward conduction voltage of the second diode D8051 (VCC_3V6-Vd8051), the battery is charged. The third resistor R9981 limits the excessive charging current and protects the battery. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] Figure 1 It is a schematic diagram of the system block diagram structure of the utility model;
[0016] Figure 2 The circuit design of the utility model Figure 1 ;
[0017] Figure 3 The circuit design of the utility model Figure 2 . DETAILED DESCRIPTION
[0018] like Figure 1-Figure 3 As shown, the utility model provides a clock reference circuit module, including a clock chip, wherein the clock chip is connected to a level conversion circuit through a bidirectional input and output interface, the level conversion circuit is bidirectionally connected to an MCU controller, the clock chip is connected to a DC power supply through a battery interface for providing power, the clock chip is connected to a timing interrupt output receiving end through RTC_INT_LL, and the clock chip is also connected to a square wave clock output receiving end through CLK_32K_OUT; the bidirectional input and output interfaces are I2C0_SCL and I2C0_SDA, the clock chip adopts PT7C4337UEX, and has high precision, high stability, and ultra-low power consumption characteristics; it also has an interrupt output function RTC_INT_LL, and a square wave clock signal output CLK_32K_OUT signal, which is used for other ICs as a reference clock, and the microprocessor MCU controller reads and feeds back the clock signal in real time through the I2C bus, and adjusts the real-time output clock data according to the clock chip data.
[0019] Among them, I2C0_SCL and I2C0_SDA are two key signal lines in the I2C bus. I2C0_SCL represents the clock signal line of the I2C bus. The I2C0_SCL signal is used to synchronize the timing of data transmission, mainly used to indicate when data can be read or written. I2C0_SDA represents the data signal line of the I2C bus, which is used to transmit data. The data transmission on the I2C0_SDA signal line is bidirectional and is used to send and receive data. These two signal lines together constitute the basic communication structure of the I2C bus. In I2C communication, the clock signal line SCL controls the timing of data transmission, while the data signal line SDA transmits the actual data information.
[0020] Furthermore, if Figure 2As shown, the first pin of the clock chip is connected to one end of the passive crystal oscillator Y1 to provide clock signal input and stable oscillation, one end of the passive crystal oscillator Y1 is connected to one end of the second capacitor C50 through the first capacitor C40, and one end of the second capacitor C50 is also connected to the ground, the second pin of the clock chip is connected to the other end of the passive crystal oscillator Y1, and the other end of the passive crystal oscillator Y1 is also connected to the other end of the second capacitor C50, the third pin of the clock chip is connected to VCC1V8_PMU through the first resistor R9979, and is used to communicate and control with the power supply and real-time clock module; one end of the third pin of the clock chip is also connected to RTC_INT_LL, the fourth pin of the clock chip is connected to the ground, the fifth pin of the clock chip is connected to I2C0_SDA, the sixth pin of the clock chip is connected to I2C0_SCL, the seventh pin of the clock chip is connected to CLK_32K_OUT, and is also connected to VCC1V8_PMU through the second resistor R3, and the eighth pin of the clock chip is connected to the DC power supply.
[0021] Furthermore, the DC power supply includes a battery holder, a first pin of the battery holder is connected to the ground, a second pin of the battery holder is connected to the TP-SMT through a first diode D8050, one end of the first diode D8050 is connected to one end of the third resistor R9981, the other end of the first diode D8050 is connected to the other end of the third resistor R9981, the TP-SMT is also connected to VCC_3V6 through a second diode D8051, and the TP-SMT is also connected to the ground through a third capacitor C51, thereby realizing signal transmission and reception; wherein the TP-SMT is a connection point in the DC power supply for connecting and transmitting signals.
[0022] The circuit connection method of the DC power supply can effectively realize the functions of power supply and signal transmission, and ensure the stability and reliability of the circuit.
[0023] Furthermore, if Figure 3As shown, the level conversion circuit includes clock signal transmission and data signal transmission, the clock signal transmission includes a first NMOS tube Q9517, the drain of the first NMOS tube Q9517 is connected to VCC_3V6 through a fourth resistor R9888, and the drain of the first NMOS tube Q9517 is also connected to the clock chip through I2C0_SCL, the source of the first NMOS tube Q9517 is connected to the gate of the first NMOS tube Q9517 through a fifth resistor R9887, the source of the first NMOS tube Q9517 is also connected to the microprocessor MCU controller through I2C0_SCL_P, and the gate of the first NMOS tube Q9517 is also connected to VCC 3V3_SYS. The level conversion circuit connection of the clock signal transmission can effectively realize the transmission of the clock signal, and ensure the stability and reliability of the clock signal transmission in the system.
[0024] Further, the data signal transmission includes a second NMOS tube Q9522, a drain of the second NMOS tube Q9522 is connected to VCC_3V6 through a sixth resistor R9914, and the drain of the second NMOS tube Q9522 is also connected to the clock chip through I2C0_SDA, the source of the second NMOS tube Q9522 is connected to the gate of the second NMOS tube Q9522 through a seventh resistor R9913, the source of the second NMOS tube Q9522 is also connected to the microprocessor MCU controller through I2C0_SDA_P, and the gate of the second NMOS tube Q9522 is also connected to VCC 3V3_SYS.
[0025] Furthermore, the first capacitor C40 and the second capacitor C50 are both 12 pF, and the passive crystal oscillator Y1 is 32.768 Khz.
[0026] The utility model adopts a high-precision 32.768Khz passive crystal oscillator Y1. At the same time, the first capacitor C40 and the second capacitor C52, which are two 12PF capacitors, compensate for the stability of the passive crystal oscillator output frequency, so that the passive crystal oscillator output is more stable; the unstable power supply has no effect on the passive crystal oscillator output, wherein the clock chip PT7C4337UEX communicates with the microprocessor MCU controller in real time through the I2C bus to realize data transmission and control, adopts the I2C bus for bidirectional input and output interface connection, realizes bidirectional communication with the level conversion circuit and the MCU controller, and transmits data through the I2C0_SCL and I2C0_SDA signal lines to ensure the synchronization of the clock signal and the accuracy of data transmission; the microprocessor performs internal data analysis and comparison processing on the received clock signal through the I2C protocol to judge its accuracy and stability. Is this correct? The clock chip has a feedback function inside, which can provide real-time feedback and fine-tune its output data, making the data output by the clock reference module more accurate. It is also powered by an optional battery or a DC power supply. When the battery voltage is lower than the DC power supply voltage minus the forward conduction voltage of the second diode D8051 (VCC_3V6-Vd8051), the battery is charged. The third resistor R9981 limits the excessive charging current and protects the battery. A level conversion circuit is designed, including clock signal transmission and data signal transmission parts, which effectively realizes the stable transmission of clock signals and data signals, and ensures the stability and reliability of clock signal transmission in the system. The overall design meets the requirements of low power consumption, high precision and stability, and realizes stable supply, precise transmission and real-time control of clock signals, providing accurate clock reference for the equipment, ensuring the normal operation of the equipment and the accuracy of data transmission.
[0027] The communication circuit of the microprocessor clock reference module of the utility model adopts a level conversion circuit design, wherein the first NMOS tube Q9517 and the second NMOS tube Q9522 play the role of communication level conversion, which makes the application range of the clock reference module wider and can be applied to a wider voltage range. The microprocessor clock reference module has the characteristics of high precision, high stability, low power consumption, and wide voltage communication, and can monitor and adjust the clock signal in real time to ensure the stable operation of the system. Compared with the traditional clock reference module, the utility model has higher performance and lower power consumption, and is suitable for various electronic devices that require high-precision clock signals. At the same time, it improves the clock accuracy and stability of electronic equipment, reduces the failure rate, and improves the reliability of the system.
Claims
1. A clock reference circuit module, characterized in that: The invention comprises a clock chip, wherein the clock chip is connected to a level conversion circuit via a bidirectional input / output interface, the level conversion circuit is bidirectionally connected to an MCU controller, the clock chip is connected to a DC power supply via a battery interface for providing power, the clock chip is connected to a timing interrupt output receiving end via RTC_INT_LL, and the clock chip is also connected to a square wave clock output receiving end via CLK_32K_OUT; the bidirectional input / output interface is I2C0_SCL and I2C0_SDA, the clock chip adopts PT7C4337UEX, and also has an interrupt output function RTC_INT_LL, and a square wave clock signal output CLK_32K_OUT signal, which is used for other ICs as a reference clock, and the microprocessor MCU controller reads and feeds back the clock signal in real time via an I2C bus, and adjusts the real-time output clock data according to the clock chip data.
2. A clock reference circuit module according to claim 1, characterized in that: The first pin of the clock chip is connected to one end of the passive crystal oscillator Y1, one end of the passive crystal oscillator Y1 is connected to one end of the second capacitor C50 through the first capacitor C40, one end of the second capacitor C50 is also connected to the ground, the second pin of the clock chip is connected to the other end of the passive crystal oscillator Y1, the other end of the passive crystal oscillator Y1 is also connected to the other end of the second capacitor C50, the third pin of the clock chip is connected to VCC1V8_PMU through the first resistor R9979, one end of the third pin of the clock chip is also connected to RTC_INT_LL, the fourth pin of the clock chip is connected to the ground, the fifth pin of the clock chip is connected to I2C0_SDA, the sixth pin of the clock chip is connected to I2C0_SCL, the seventh pin of the clock chip is connected to CLK_32K_OUT, and is also connected to VCC1V8_PMU through the second resistor R3, and the eighth pin of the clock chip is connected to a DC power supply.
3. A clock reference circuit module according to claim 2, characterized in that: The DC power supply includes a battery holder, a first pin of the battery holder is connected to the ground, a second pin of the battery holder is connected to the TP-SMT through a first diode D8050, one end of the first diode D8050 is connected to one end of a third resistor R9981, and the other end of the first diode D8050 is connected to the other end of the third resistor R9981. The TP-SMT is also connected to VCC_3V6 through a second diode D8051, and the TP-SMT is also connected to the ground through a third capacitor C51, wherein the TP-SMT is a connection point in the DC power supply for connecting and transmitting signals.
4. A clock reference circuit module according to claim 1, characterized in that: The level conversion circuit includes clock signal transmission and data signal transmission. The clock signal transmission includes a first NMOS tube Q9517. The drain of the first NMOS tube Q9517 is connected to VCC_3V6 through a fourth resistor R9888, and the drain of the first NMOS tube Q9517 is also connected to a clock chip through I2C0_SCL. The source of the first NMOS tube Q9517 is connected to the gate of the first NMOS tube Q9517 through a fifth resistor R9887. The source of the first NMOS tube Q9517 is also connected to the microprocessor MCU controller through I2C0_SCL_P, and the gate of the first NMOS tube Q9517 is also connected to VCC 3V3_SYS.
5. A clock reference circuit module according to claim 4, characterized in that: The data signal transmission includes a second NMOS tube Q9522, a drain of the second NMOS tube Q9522 is connected to VCC_3V6 through a sixth resistor R9914, and the drain of the second NMOS tube Q9522 is also connected to the clock chip through I2C0_SDA, the source of the second NMOS tube Q9522 is connected to the gate of the second NMOS tube Q9522 through a seventh resistor R9913, the source of the second NMOS tube Q9522 is also connected to the microprocessor MCU controller through I2C0_SDA_P, and the gate of the second NMOS tube Q9522 is also connected to VCC 3V3_SYS.
6. A clock reference circuit module according to claim 2, characterized in that: The first capacitor C40 and the second capacitor C50 are both 12pF, and the passive crystal oscillator Y1 is 32.768Khz.