Radio frequency front-end module

Abstract

The utility model provides a radio frequency front-end module comprising a substrate which comprises a first metal layer and a second metal layer and is provided with a power supply port; the first radio frequency chip is arranged on the substrate; the first matching circuit is arranged in the first area of the substrate and is connected with the first radio frequency chip; the choke inductor is arranged in the second area of the substrate and is respectively connected with the power supply port and the first radio frequency chip; wherein the choke inductor comprises a first coil arranged on the first metal layer and a second coil arranged on the second metal layer, and the first coil and the second coil are connected through a first conductive via hole. The choke inductor and the first matching circuit are arranged in different areas, so that the choke inductor is prevented from being coupled with an inductance element in the first matching circuit, the choke inductor is prevented from being interfered, and the performance of the radio frequency front-end module is improved.

Description

Technical Field

[0001] The present application relates to the field of radio frequency technology, and in particular to a radio frequency front-end module. Background Art

[0002] In the field of radio frequency technology, a choke inductor is usually provided between a power supply and a radio frequency circuit to prevent the radio frequency signal from leaking into the power supply system.

[0003] In order to allow the DC power signal to pass through with lower loss, the required inductance of the choke inductor is large, which requires the choke inductor to have a sufficiently long routing. Therefore, the choke inductor is usually set around other components during layout. However, this will cause the choke inductor to easily couple with other inductor components, causing interference between them and reducing the performance of the RF system. Utility Model Content

[0004] The present application proposes a radio frequency front-end module, which can avoid coupling between the choke inductor and the inductor in the matching circuit, thereby protecting the choke inductor from interference and improving the performance of the radio frequency front-end module.

[0005] The present application provides a radio frequency front-end module, which includes:

[0006] A substrate, the substrate comprising a first metal layer and a second metal layer, and provided with a power supply port;

[0007] A first radio frequency chip is disposed on the substrate;

[0008] A first matching circuit is disposed in a first area of ​​the substrate and connected to the first radio frequency chip;

[0009] A choke inductor is arranged in the second area of ​​the substrate and is respectively connected to the power supply port and the first RF chip; wherein the choke inductor includes a first coil arranged on the first metal layer and a second coil arranged on the second metal layer, and the first coil and the second coil are connected through a first conductive via.

[0010] Optionally, the first matching circuit includes a first matching inductor, the first matching inductor is connected to the choke inductor, and a connection between the first matching inductor and the choke inductor is connected to the first radio frequency chip via a bonding wire;

[0011] The first region includes a first sub-region connected to the second region, and the first matching inductor is arranged in the first sub-region.

[0012] Optionally, the first matching circuit further includes at least one capacitor connected to the first matching inductor, and the first matching inductor is at least partially arranged around the capacitor.

[0013] Optionally, the first matching circuit further includes a second matching inductor, and the second matching inductor is connected to at least one of the capacitors;

[0014] The first region further includes a second sub-region spaced apart from the second region, and the second matching inductor is disposed in the second sub-region.

[0015] Optionally, a first power amplifier circuit and a second power amplifier circuit are provided in the first radio frequency chip, and the first matching circuit and the choke inductor are respectively connected to the first power amplifier circuit;

[0016] The RF front-end module also includes a second matching circuit, which is arranged in the third area of ​​the substrate and connected to the second power amplifier circuit.

[0017] Optionally, the substrate includes a first edge and a second edge intersecting each other, the first RF chip includes a third edge and a fourth edge intersecting each other, and the third edge is parallel to the first edge, and the fourth edge is parallel to the second edge;

[0018] The first area is arranged between the first edge and the third edge, and the third area is arranged between the second edge and the fourth edge.

[0019] Optionally, the second power amplifier circuit is further connected to the power supply port, the power supply port is arranged at the second edge, and the second area is arranged adjacent to the second edge and the third area.

[0020] Optionally, the second matching circuit includes a first balun, the first balun includes a third coil arranged on the first metal layer and a fourth coil arranged on the second metal layer, and the third coil and the fourth coil are coupled to each other.

[0021] Optionally, the substrate further includes a third metal layer and a fourth metal layer, the first metal layer, the second metal layer, the third metal layer and the fourth metal layer are stacked in sequence, a wiring is provided on the third metal layer, and the fourth metal layer is used for grounding.

[0022] Optionally, the third metal layer is provided with a power supply line, one end of the power supply line is connected to the power supply port, and the other end of the power supply line is connected to the second coil through a second conductive via.

[0023] Optionally, the RF front-end module further includes a first switch chip, and the first switch chip is arranged adjacent to the first edge and the second edge;

[0024] A first switch circuit and a second switch circuit are provided in the first switch chip. The first switch circuit is connected to the first matching circuit, and the second switch circuit is connected to the second matching circuit.

[0025] Optionally, the RF front-end module further includes a second RF chip and a third matching circuit, the second RF chip is integrated with a third power amplifier circuit, and the third power amplifier circuit is connected to the third matching circuit;

[0026] The second RF chip and the third matching circuit are arranged in a fourth area of ​​the substrate, the fourth area is located on a first side of the first RF chip, the first area and the second area are located on a second side of the first RF chip, and the first side and the second side are opposite sides.

[0027] Optionally, the RF front-end module also includes a second switch chip, which is connected to the third matching circuit; the second switch chip is arranged in the fourth area and is located on a side of the third matching circuit away from the second RF chip.

[0028] Optionally, the RF front-end module also includes a control chip, which is arranged between the first RF chip and the fourth region and is connected to the first RF chip and the second RF chip respectively.

[0029] The above-mentioned RF front-end module provided by the present application arranges the coils of the choke inductor in layers on multiple metal layers, and superimposes the inductance of at least two coils to achieve the inductance required for choking, which can shorten the routing length of the choke inductor in a single metal layer. The choke inductor does not need to be arranged around the first matching circuit to increase the routing length, so that the choke inductor and the first matching circuit can be arranged in different areas to avoid coupling between the choke inductor and the inductor element in the first matching circuit. In this way, the choke inductor can be free from interference from the first matching circuit, thereby improving the performance of the RF front-end module. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0031] Figure 1 A structural schematic diagram of a radio frequency front-end module provided in an embodiment of the present application is shown.

[0032] Figure 2A structural schematic diagram of a choke inductor provided in an embodiment of the present application is shown.

[0033] Figure 3 Another structural schematic diagram of the RF front-end module provided in an embodiment of the present application is shown.

[0034] Figure 4 Another structural schematic diagram of the RF front-end module provided in an embodiment of the present application is shown.

[0035] Figure 5 Another structural schematic diagram of the RF front-end module provided in an embodiment of the present application is shown.

[0036] Figure 6 Another structural schematic diagram of the choke inductor provided in an embodiment of the present application is shown.

[0037] Figure 7 Another structural schematic diagram of the RF front-end module provided in an embodiment of the present application is shown.

[0038] Figure 8 Another structural schematic diagram of the RF front-end module provided in an embodiment of the present application is shown.

[0039] Fig. 9 Another structural schematic diagram of the RF front-end module provided in an embodiment of the present application is shown. DETAILED DESCRIPTION

[0040] In order to enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present application.

[0041] The terms "first", "second", etc. in this application are used to distinguish different objects, rather than to describe a specific order. The term "plurality" refers to two or more. The term "and / or" refers to at least one of the multiple objects listed. For example, "A and / or B" can be any of the following three situations: including A but not B, including B but not A, and including both A and B.

[0042] In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device comprising a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products or devices.

[0043] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0044] With the development of the fifth generation mobile communication technology (5G), compared with the previous 4G or 3G technology, it is necessary to adopt a radio frequency front end with higher frequency, larger bandwidth, and higher order QAM modulation, which puts forward more stringent requirements on various performance indicators such as power amplifier efficiency, power consumption, and isolation in the radio frequency front end. However, in the relevant technology, in order to make the choke inductor have a long enough routing, the choke inductor is usually arranged around the matching circuit in the module when it is laid out. Since there is a matching inductor in the matching circuit, the matching inductor will have a certain degree of coupling with the choke inductor, thereby affecting the performance of the choke inductor and the matching circuit.

[0045] In order to solve this problem, the present application provides a radio frequency front-end module, which can avoid coupling between the choke inductor and the inductor in the matching circuit, protect the choke inductor from interference, and improve the performance of the radio frequency front-end module. The following will be described in detail with reference to the accompanying drawings.

[0046] Please refer to Figure 1 , Figure 1 The schematic diagram of the structure of the RF front-end module provided by an embodiment of the present application is shown. The RF front-end module is a component that integrates two or more discrete devices such as RF switches, low-noise amplifiers, filters, duplexers, power amplifiers, etc. into an independent module, which can improve the integration and hardware performance and miniaturize the volume. Specifically, the RF front-end module can be applied to 4G and 5G communication devices such as smart phones, tablets, and smart watches.

[0047] like Figure 1 As shown, the RF front-end module 10 includes a substrate 11, a first RF chip 12, a first matching circuit 13 and a choke inductor 14. The first RF chip 12, the first matching circuit 13 and the choke inductor 14 are all arranged on the substrate 11, and the first matching circuit 13 and the choke inductor 14 are connected to the first RF chip 12 respectively.

[0048] The substrate 11 is roughly rectangular and is used to fix and support the components in the RF front-end module (for example, the first RF chip 12, the first matching circuit 13, the choke inductor 14, etc.). Exemplarily, the substrate 11 can be a copper-clad laminate, and a circuit can be printed on the surface of the substrate 10 by processing the copper-clad laminate with holes, chemical copper plating, electroplating copper, etching, etc.

[0049] In this embodiment, the substrate 11 is provided with a power supply port Vcc1, and the power supply port Vcc1 is used to connect an external power supply, and the external power supply supplies power to the components on the substrate 11 through the power supply port Vcc1, for example, supplies power to the first RF chip 12. The external power supply can provide a power supply voltage VCC1 through the power supply port Vcc1, and the power supply voltage VCC1 can be 3.3V, 5V, 12V, etc., which is not specifically limited in this embodiment.

[0050] Among them, the power supply voltage required by the RF front-end module is a DC signal. In order to suppress the AC noise signal entering the power supply port Vcc1 along with the power supply voltage VCC1, a choke inductor 14 is set between the power supply port Vcc1 and the first RF chip 12. The characteristics of inductance that blocks AC and passes DC can prevent the AC noise signal from being transmitted to the first RF chip 12. However, in order to achieve a better noise suppression effect, the inductance value of the choke inductor 14 is required to be large, and the routing of the choke inductor 14 needs to be long enough. Therefore, in the related art, the choke inductor is usually set around other components in the module to extend the routing length of the choke inductor, but this will introduce coupling interference.

[0051] In order to avoid coupling interference, the embodiment of the present application sets the choke inductor 14 in an independent area. Specifically, the choke inductor 14 is set in the second area A2 of the substrate. Figure 2 , Figure 2 FIG. 1 is a schematic diagram of the structure of the choke inductor 14. Figure 2 As shown, the substrate 11 includes a first metal layer M1 and a second metal layer M2, and the choke inductor 14 is layered in the second area A2 of the substrate. Specifically, the choke inductor 14 includes a first coil 141 and a second coil 142, the first coil 141 is arranged in the first metal layer M1, and the second coil 142 is arranged in the second metal layer M2, and one end of the first coil 141 is connected to one end of the second coil 142 through a conductive via 143 that penetrates the first metal layer M1 and the second metal layer M2, thereby realizing the series connection of the first coil 141 and the second coil 142. In this way, the inductance of the choke inductor 14 is the superposition of the inductance of the first coil 141 and the inductance of the second coil 142, which can meet the inductance requirements of the choke coil. Optionally, the line width of the first coil 141 and the line width of the second coil 142 can be the same or different.

[0052] The first RF chip 12 is disposed on the substrate 11 and is used to amplify the power of the input RF signal. Optionally, the first RF chip can be attached to the substrate 11, inserted into the substrate 11, or welded to the substrate 11 by welding (for example, soldering).

[0053] In order to match the input port of the first RF chip 12 with the impedance of the previous stage circuit, or to match the output port of the first RF chip 12 with the impedance of the subsequent stage circuit, the embodiment of the present application further provides a first matching circuit 13. Specifically, the first matching circuit 13 is provided in the first area A1 of the substrate and connected to the first RF chip 12, and is used to convert the impedance of the input port or output port of the first RF chip 12, so that the impedance of the input port or output port of the first RF chip 12 matches the impedance of the previous stage circuit or the subsequent stage circuit, thereby reducing the loss of the RF signal during transmission. Among them, the factors affecting the impedance value include resistance, inductance and capacitance. For RF signals, the inductance of the inductor has a greater impact on the impedance value. Therefore, as an embodiment, the first matching circuit 13 includes at least one inductor, which can affect the impedance value by changing the inductance. Since the first matching circuit 13 and the choke inductor 14 are located in different areas of the substrate, the inductor in the first matching circuit 13 is not easy to couple with the choke inductor 14, thereby avoiding interference with the choke inductor 14.

[0054] In the embodiment of the present application, the coils of the choke inductor 14 are arranged in layers on the first metal layer M1 and the second metal layer M2, and the inductance of at least two coils is superimposed to achieve the inductance required for choking, which can shorten the routing length of the choke inductor in a single metal layer. The choke inductor 14 does not need to be arranged around the first matching circuit 13 to increase the routing length, so that the choke inductor 14 and the first matching circuit 13 can be arranged in different areas to avoid coupling between the choke inductor 14 and the inductance element in the first matching circuit 13. In this way, the choke inductor 14 can be free from interference from the first matching circuit 13, thereby improving the performance of the RF front-end module.

[0055] In some embodiments, the first RF chip 12 is used to power amplify the RF signal, and a first power amplifier circuit is integrated therein, and the first power amplifier circuit includes one or more parallel amplifier transistors. Optionally, the amplifier transistor can be a MOS tube (Metal Oxide Semiconductor Field Effect Transistor) or an HBT (Heterojunction bipolar transistor). Among them, the gate of the MOS tube or the base of the HBT is the input end of the first power amplifier circuit, which is used to receive the RF input signal. The source / drain of the MOS tube or the collector of the HBT is the output end of the first power amplifier circuit, which is used to output the amplified RF signal.

[0056] In the embodiment of the present application, the source / drain of the MOS tube or the collector of the HBT is also used to receive the power supply voltage VCC1, that is, the choke inductor 14 is connected to the source / drain of the MOS tube or the collector of the HBT. When the first matching circuit 13 is used as the output impedance matching circuit of the first RF chip, the first matching circuit 13 is connected to the output port of the first RF chip 12, that is, it is also connected to the source / drain of each MOS tube or the collector of each HBT in the first power amplifier circuit. Therefore, the first matching circuit 13 and the choke inductor 14 need to be connected to the same port of the first RF chip.

[0057] As an implementation method, Figure 3 As shown, the first matching circuit 13 includes a first matching inductor L1, wherein one end of the first matching inductor L1 is connected to the output end of the first RF chip 12, and the other end of the first matching inductor L1 is connected to other components in the first matching circuit 13 or to a subsequent circuit.

[0058] Among them, considering that the first matching inductor L1 and the choke inductor 14 need to be connected to the same port of the first RF chip, the embodiment of the present application sets the first matching inductor L1 in the first sub-area A11 connected to the second area A2 in the first area A1, so that the first matching inductor L1 and the choke inductor 14 are connected, and the connection between the two is connected to the first RF chip through a bonding wire. In other words, the wiring of the first matching inductor L1 on the substrate and the wiring of the choke inductor 14 on the substrate are connected to each other, and when the first RF chip is bonded to the substrate, the bonding wire is set at the connection between the first matching inductor L1 and the choke inductor 14. This can reduce the processing difficulty of installing the first RF chip on the substrate, reduce the number of bonding wires, and save production costs.

[0059] As an implementation mode, the first matching circuit further includes at least one capacitor connected to the first matching inductor L1, such as capacitor C1. Optionally, capacitor C1 can be connected in series between the other end of the first matching inductor L1 and other circuits, or can be connected between the other end of the first matching inductor L1 and the ground terminal, which can be specifically set according to the impedance matching requirements, and this application does not limit this.

[0060] Among them, by adding the capacitor C1 to participate in the impedance matching of the first RF chip 12 together with the first matching inductor L1 and the capacitor C1, the impedance of the output end of the first RF chip 12 can be adjusted more accurately to achieve a better matching effect.

[0061] Optionally, in addition to the first matching inductor L1 and capacitor C1, the first matching circuit 13 may also include other inductors and / or capacitors, and the inductors / capacitors may be connected in series or in parallel according to impedance matching requirements, which is not limited in the present application.

[0062] As an implementation mode, the first matching inductor L1 is at least partially arranged around the capacitor C1. When the first matching circuit 13 includes more capacitors, the first matching inductor L1 can also completely or partially surround other capacitors. In this way, the layout of the first matching circuit 13 can be more compact, the substrate area occupied by the first matching circuit 13 can be reduced, and other components can be laid out more reasonably.

[0063] As an implementation method, Figure 4 As shown, the first matching circuit 13 also includes a second matching inductor L2, and the second matching inductor L2 is connected to at least one capacitor. Exemplarily, the second matching inductor L2 is connected in series with the first matching inductor L1 through the capacitor C2. Among them, the first area A1 of the substrate 11 also includes a second sub-area A12 spaced apart from the second area A2, and the second matching inductor L2 is arranged in the second sub-area A12, that is, it has a certain interval with the first matching inductor L1 and the choke inductor 14, so that the second matching inductor L2 can be prevented from coupling with the first matching inductor L1 or the choke inductor 14, thereby avoiding interference caused by coupling.

[0064] As an implementation mode, at least one inductor and at least one capacitor in the first matching circuit 13 can also form an LC resonant network. While achieving impedance matching, it can also suppress harmonic signals carried in the output signal of the first RF chip 12 that are close to the resonant frequency of the LC resonant network, thereby improving the working efficiency of the first RF chip 12.

[0065] In some embodiments, Figure 5As shown, the first radio frequency chip is integrated with a first power amplifier circuit 121 and a second power amplifier circuit 122, wherein the first power amplifier circuit 121 and the second power amplifier circuit 122 can be used to power amplify radio frequency signals of different frequency bands. Exemplarily, the first power amplifier circuit 121 is used to power amplify low-frequency (for example, a frequency less than 300kHz) radio frequency signals, and the second power amplifier circuit 122 is used to power amplify intermediate-frequency (for example, a frequency greater than 3MHz and less than 30MHz) radio frequency signals. By integrating the first power amplifier circuit 121 and the second power amplifier circuit 122 in the same chip, the chip integration can be improved and the area of ​​the radio frequency front-end module can be reduced.

[0066] In this embodiment, in addition to the first matching circuit 13, the RF front-end module also includes a second matching circuit 15, wherein the first matching circuit 13 is connected to the first power amplifier circuit 121 to convert the output impedance of the first power amplifier circuit 121 so that it matches the impedance of the subsequent circuit. The second matching circuit 15 is connected to the second power amplifier circuit 122 to convert the output impedance of the second power amplifier circuit 122 so that it matches the impedance of the subsequent circuit. Since the first power amplifier circuit 121 and the second power amplifier circuit 122 have different operating frequency bands, the circuit parameters required for impedance matching are different. The present application provides independent matching circuits for the first power amplifier circuit 121 and the second power amplifier circuit 122, respectively, so that the two can obtain better impedance matching effects. Among them, the second matching circuit 15 also includes one or more coils or windings. The second matching circuit 15 is set in the third area A3 of the substrate, which is located in a different area from the first matching circuit 13 and the choke inductor A2. This can avoid coupling between the coil or winding in the second matching circuit 15 and the choke inductor A2 or the inductor in the first matching circuit 13, thereby avoiding interference caused by coupling and improving the performance of the RF front-end module.

[0067] The first power amplifier circuit 121 is powered by the power supply port Vcc1 , and the choke inductor 14 is connected to the first power amplifier circuit 121 to suppress the AC interference signal carried in the power supply voltage VCC1 from entering the first power amplifier circuit 121 .

[0068] As an implementation mode, the power supply voltage required by the second power amplifier circuit 122 is the same as that of the first power amplifier circuit 121, and the second power amplifier circuit 122 is also powered by the power supply port Vcc1. At this time, the second power amplifier circuit 122 can be connected to the power supply port Vcc1 through other choke inductors to suppress the AC interference signal carried in the power supply voltage VCC1 from entering the second power amplifier circuit 122.

[0069] As an implementation mode, the power supply voltage required by the second power amplifier circuit 122 is the same as or different from that of the first power amplifier circuit 121. The second power amplifier circuit 122 can receive the power supply voltage through other power supply ports. At this time, the second power amplifier circuit 122 can be connected to other power supply ports through other choke inductors to suppress AC interference signals from entering the second power amplifier circuit 122.

[0070] As an implementation method, Figure 5 As shown, the substrate 11 includes a first edge E1 and a second edge E2 intersecting each other, and the first RF chip 12 includes a third edge E3 and a fourth edge E4 intersecting each other, and the third edge E3 is parallel to the first edge E1, and the fourth edge E4 is parallel to the second edge E2; wherein the first area A1 is arranged between the first edge E1 and the third edge E3, and the third area A3 is arranged between the second edge E2 and the fourth edge E4. That is, the first area A1 and the third area A3 are arranged on different sides of the first RF chip 12, and both are close to the edge of the first RF chip 12 and are approximately diagonally related. Such a design is not only more compact and neat, but also facilitates the connection of the first matching circuit 13 and the second matching circuit 15 to the first RF chip 12, respectively.

[0071] As an implementation mode, when the second power amplifier circuit 122 is also powered by the power supply port Vcc1, the second power amplifier circuit 122 is connected to the power supply port Vcc1, the power supply port Vcc1 is set at the second edge E2 of the substrate 11, and the second area A2 is set at a position adjacent to the second edge E2 and the third area A3, which can facilitate the connection of the choke inductor 14 and the second power amplifier circuit 122 to the power supply port Vcc1 respectively.

[0072] As an implementation mode, the second power amplifier circuit 122 is a differential power amplifier circuit, and the subsequent circuit of the second power amplifier circuit 122 is a single-ended input circuit, then the second matching circuit 15 is also used to convert the balanced RF signal output by the second power amplifier circuit 122 into an unbalanced RF signal. Specifically, the second matching circuit 15 includes a first balun, and the first balun includes a primary coil and a secondary coil coupled to each other, wherein the two ends of the primary coil are respectively connected to the differential output end of the second power amplifier circuit 122, and are used to receive the balanced RF signal output by the second power amplifier circuit 122; one end of the secondary coil is grounded, and the other end is connected to the subsequent circuit, and is used to output the unbalanced RF signal generated based on the coupling with the primary coil to the subsequent circuit. Based on the first balun, the second matching circuit 15 can simultaneously realize the impedance matching and balanced-unbalanced conversion of the output signal of the second power amplifier circuit 122 with a smaller area, effectively saving the cost of the RF front-end module.

[0073] Optionally, the primary coil and the secondary coil of the first balun may be located in the same metal layer, for example, both are arranged in the first metal layer of the substrate, or both are arranged in the second metal layer of the substrate; the primary coil and the secondary coil of the first balun may also be located in different metal layers, for example, one is located in the first metal layer of the substrate, and the other is located in the second metal layer of the substrate.

[0074] Exemplarily, the first balun includes a third coil disposed on the first metal layer and a fourth coil disposed on the second metal layer, and the third coil and the fourth coil are coupled to each other. Among them, one of the third coil and the fourth coil is a primary coil, and the other is a secondary coil. For example, the third coil is a primary coil and the fourth coil is a secondary coil; or, the third coil is a secondary coil and the fourth coil is a primary coil. By disposing the primary coil and the secondary coil of the first balun on different metal layers, the substrate area occupied by the first balun can be saved, which is convenient for the layout of other circuits.

[0075] As an implementation method, the primary coil of the first balun is also connected to the power supply port Vcc1 through a wiring, that is, the power supply port Vcc1 supplies power to the second power amplifier circuit 122 through the primary coil of the first balun. In this way, the inductance characteristics of the balun primary coil are utilized and reused as a choke between the second power amplifier circuit 122 and the power supply port Vcc1, which can suppress the AC interference signal of the external power supply from entering the second power amplifier circuit 122 without adding additional circuits, thereby improving the performance of the RF front-end module. Exemplarily, connecting the midpoint of the first balun primary coil to the power supply port Vcc1 can improve the balance of the second power amplifier circuit 122.

[0076] In some embodiments, in addition to the first balun, the second matching circuit may further include other circuit elements, such as at least one inductor and / or at least one capacitor. By having at least one inductor and / or at least one capacitor participate in the impedance matching of the second power amplifier circuit together with the first balun, the impedance matching result can be made more accurate, further improving the performance of the RF front-end module.

[0077] In some embodiments, in addition to the first metal layer and the second metal layer, the substrate further includes a third metal layer and a fourth metal layer, and the first metal layer, the second metal layer, the third metal layer and the fourth metal layer are stacked in sequence, wherein the third metal layer is provided with wiring, and the fourth metal layer is used for grounding. Generally speaking, the metal area of ​​the grounding layer is large and is easy to couple with other layers, while the present application sets a third metal layer between the first metal layer, the second metal layer and the fourth metal layer used for grounding, increases the spacing between the first metal layer, the second metal layer and the fourth metal layer, and can effectively weaken the coupling between the components in the first metal layer and the second metal layer and the fourth metal layer, and avoids the fourth metal layer from affecting the first matching circuit, the second matching circuit, the choke inductor and other circuits / components. By setting some wiring in the third metal layer, it is also convenient to layout and connect the first matching circuit, the second matching circuit, the choke inductor and other circuits / components.

[0078] As an implementation method, Figure 6 As shown, the third metal layer M3 is provided with a power supply trace 144, one end of the power supply trace 144 is connected to the power supply port Vcc1, and the other end of the power supply trace 144 is connected to the second coil 142 of the choke inductor 14 through a second conductive via 145 that runs through the third metal layer M3 and the second metal layer M2. Since the trace also has a certain inductance value, the power supply trace 144 can play a choke role together with the choke inductor 14. In this embodiment, the power supply trace 144 can also be regarded as a part of the choke inductor 14. Exemplarily, the line width of the power supply trace 144 is the same as or similar to the line width of the first coil 141 or the second coil 142.

[0079] In some embodiments, Figure 7 As shown, the RF front-end module also includes a first switch chip 16 , in which a first switch circuit 161 and a second switch circuit 162 are provided. The first switch circuit 161 is connected to the first matching circuit 13 , and the second switch circuit 162 is connected to the second matching circuit 15 .

[0080] Specifically, the first switch circuit 161 and the second switch circuit 162 are respectively used to connect to the antenna outside the RF front-end module through the corresponding output ports on the substrate. For example, the first switch circuit 161 is used to connect to the first antenna through the first output port LB, and the second switch circuit 162 is used to connect to the second antenna through the second output port MB. When the first switch circuit 161 conducts the path between the first matching circuit 13 and the first antenna, the RF signal after power amplification by the first power amplifier circuit 121 will be transmitted to the first antenna through the first matching circuit 13, the first switch circuit 161 and the first output port LB in sequence, and transmitted through the first antenna. When the second switch circuit 162 conducts the path between the second matching circuit 15 and the second antenna, the RF signal after power amplification by the second power amplifier circuit 122 will be transmitted to the second antenna through the second matching circuit 15, the second switch circuit 162 and the second output port MB in sequence, and transmitted through the second antenna. By integrating the first switch circuit 161 and the second switch circuit 162 in the same chip, the integration of the RF front-end module can be improved, and the volume of the RF front-end module can be more miniaturized.

[0081] The first switch chip 16 is disposed near the first edge E1 and the second edge E2 of the substrate, that is, the first switch chip 16 is disposed at a corner formed by the intersection of the first edge E1 and the second edge E2 of the substrate. In this way, the first matching circuit 13 and the second matching circuit 15 can be connected to the first switch chip 16 respectively.

[0082] Optionally, since the first switch chip 16 has an insulating package shell, it has almost no effect on other circuits / components on the substrate, such as the first matching circuit and the second matching circuit, so the layout area of ​​the first switch chip 16 can partially overlap with the second area and / or the first area to further save the substrate area. In addition, this can shorten the transmission distance of the RF signal from the first RF chip 12 to the first switch chip 16, reduce the insertion loss and interference during the transmission of the RF signal, and improve the output quality of the RF signal.

[0083] In some embodiments, Figure 8 As shown, the RF front-end module also includes a second RF chip 17 and a third matching circuit 18. The second RF chip 17 is integrated with a third power amplifier circuit, and the third power amplifier circuit is connected to the third matching circuit 18. Exemplarily, the third power amplifier circuit can be used to amplify the power of a high-frequency (for example, a frequency greater than 300MHz) RF signal, and the third matching circuit 18 is used to convert the output impedance of the third power amplifier circuit to match it with the impedance of the subsequent circuit, thereby reducing the loss during the transmission of the RF signal.

[0084] In this embodiment, the second RF chip 17 and the third matching circuit 18 are arranged in the fourth area A4 of the substrate, the fourth area A4 is located on the first side of the first RF chip 12, the first area A1 and the second area A2 are located on the second side of the first RF chip 12, and the first side and the second side are opposite sides. By integrating the third power amplifier circuit with a higher working frequency band and being more susceptible to interference into a single chip and spacing it from the first area A1 and the second area A2, it can effectively avoid interference caused by signals in the medium and low frequency bands, and improve the signal output quality of the third power amplifier circuit.

[0085] As an implementation mode, the third matching circuit 18 may include a second balun, and the implementation mode of the second balun is similar to that of the first balun, which will not be described in detail here. Optionally, the third matching circuit 18 may also include at least one inductor and / or at least one capacitor. By having at least one inductor and / or at least one capacitor participate in the impedance matching of the third power amplifier circuit together with the second balun, the impedance matching result can be made more accurate, further improving the performance of the RF front-end module.

[0086] As an implementation mode, the second RF chip 17 receives the power supply voltage through the port Vcc2. An additional choke inductor can be set between the second RF chip 17 and the port Vcc2 to suppress the AC interference signal carried by the external power supply from entering the second RF chip 17; alternatively, the coil in the second balun can be reused as a choke.

[0087] As an implementation method, the RF front-end module also includes a second switch chip 19, which is connected to the third matching circuit 19; the second switch chip 19 is also used to connect to the third antenna through a corresponding output port on the substrate, such as the third output port HB. When the second switch chip 19 turns on the path between the third matching circuit 18 and the third antenna, the RF signal after power amplification by the third power amplifier circuit will be transmitted to the third antenna through the third matching circuit 18, the second switch chip 19 and the third output port HB in sequence, and transmitted through the third antenna. Among them, the second switch chip 19 is arranged in the fourth area A4 and is located on the side of the third matching circuit 18 away from the second RF chip 17, so that the transmission distance of the RF signal from the second RF chip 17 to the second switch chip 19 can be shortened, the insertion loss and interference during the transmission of the RF signal can be reduced, and the output quality of the RF signal can be improved.

[0088] In some embodiments, Fig. 9As shown, the RF front-end module also includes a control chip 20, which is arranged between the first RF chip 12 and the fourth area A4, and is connected to the first RF chip 12 and the second RF chip 17 respectively. Specifically, the control chip 20 can be connected to one or more control ports on the substrate, receive control instructions sent from the outside through the control port, and control the working states of the first RF chip 11, the first switch chip 16, the second RF chip 17 and the second switch chip 19 based on the control instructions. Arranging the control chip 20 between the first RF chip 12 and the fourth area A4 can facilitate the connection of the first RF chip 12 and the second RF chip 17 with the control chip 20 respectively, making the layout of the RF front-end module more compact.

[0089] According to the embodiment of the present application, the RF front-end module arranges the coils of the choke inductor 14 in layers on multiple metal layers, and superimposes the inductance of at least two coils to achieve the inductance required for choking, which can shorten the routing length of the choke inductor in a single metal layer. The choke inductor 14 does not need to be arranged around the first matching circuit 13 to increase the routing length, so that the choke inductor 14 and the first matching circuit 13 can be arranged in different areas to avoid coupling between the choke inductor 14 and the inductance element in the first matching circuit 13. In this way, the choke inductor 14 can be free from interference from the first matching circuit 13, thereby improving the performance of the RF front-end module.

[0090] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it. Although the present application has been described in detail with reference to the aforementioned embodiments, a person skilled in the art should understand that the technical solutions described in the aforementioned embodiments can still be modified, or some of the technical features can be replaced by equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A radio frequency front-end module, characterized in that: include: A substrate, the substrate comprising a first metal layer and a second metal layer, and provided with a power supply port; A first radio frequency chip is disposed on the substrate; A first matching circuit is disposed in a first area of ​​the substrate and connected to the first radio frequency chip; A choke inductor is arranged in the second area of ​​the substrate and is respectively connected to the power supply port and the first RF chip; wherein the choke inductor includes a first coil arranged on the first metal layer and a second coil arranged on the second metal layer, and the first coil and the second coil are connected through a first conductive via.

2. The RF front-end module according to claim 1, characterized in that: The first matching circuit includes a first matching inductor, the first matching inductor is connected to the choke inductor, and the connection between the first matching inductor and the choke inductor is connected to the first radio frequency chip through a bonding wire; The first region includes a first sub-region connected to the second region, and the first matching inductor is arranged in the first sub-region.

3. The RF front-end module according to claim 2, characterized in that: The first matching circuit further includes at least one capacitor connected to the first matching inductor, and the first matching inductor is at least partially arranged around the capacitor.

4. The RF front-end module according to claim 3, characterized in that: The first matching circuit further includes a second matching inductor, and the second matching inductor is connected to at least one of the capacitors; The first region further includes a second sub-region spaced apart from the second region, and the second matching inductor is disposed in the second sub-region.

5. The RF front-end module according to claim 1, characterized in that: The first radio frequency chip is provided with a first power amplifier circuit and a second power amplifier circuit, and the first matching circuit and the choke inductor are respectively connected to the first power amplifier circuit; The RF front-end module also includes a second matching circuit, which is arranged in the third area of ​​the substrate and connected to the second power amplifier circuit.

6. The RF front-end module according to claim 5, characterized in that: The substrate includes a first edge and a second edge intersecting each other, the first RF chip includes a third edge and a fourth edge intersecting each other, the third edge is parallel to the first edge, and the fourth edge is parallel to the second edge; The first area is arranged between the first edge and the third edge, and the third area is arranged between the second edge and the fourth edge.

7. The RF front-end module according to claim 6, characterized in that: The second power amplifier circuit is also connected to the power supply port, the power supply port is arranged at the second edge, and the second area is arranged adjacent to the second edge and the third area.

8. The RF front-end module according to claim 5, characterized in that: The second matching circuit includes a first balun, the first balun includes a third coil disposed on the first metal layer and a fourth coil disposed on the second metal layer, and the third coil and the fourth coil are coupled to each other.

9. The RF front-end module according to any one of claims 1 to 8, characterized in that: The substrate further includes a third metal layer and a fourth metal layer. The first metal layer, the second metal layer, the third metal layer and the fourth metal layer are stacked in sequence. A wiring is arranged on the third metal layer. The fourth metal layer is used for grounding.

10. The RF front-end module according to claim 9, characterized in that: The third metal layer is provided with a power supply line, one end of the power supply line is connected to the power supply port, and the other end of the power supply line is connected to the second coil through a second conductive via.

11. The RF front-end module according to claim 6, characterized in that: The RF front-end module further includes a first switch chip, and the first switch chip is arranged adjacent to the first edge and the second edge; A first switch circuit and a second switch circuit are provided in the first switch chip. The first switch circuit is connected to the first matching circuit, and the second switch circuit is connected to the second matching circuit.

12. The RF front-end module according to claim 1, characterized in that: The RF front-end module further includes a second RF chip and a third matching circuit, wherein the second RF chip is integrated with a third power amplifier circuit, and the third power amplifier circuit is connected to the third matching circuit; The second RF chip and the third matching circuit are arranged in a fourth area of ​​the substrate, the fourth area is located on a first side of the first RF chip, the first area and the second area are located on a second side of the first RF chip, and the first side and the second side are opposite sides.

13. The RF front-end module according to claim 12, characterized in that: The RF front-end module further includes a second switch chip, and the second switch chip is connected to the third matching circuit; The second switch chip is disposed in the fourth area and is located on a side of the third matching circuit away from the second radio frequency chip.

14. The RF front-end module according to claim 12, characterized in that: The RF front-end module also includes a control chip, which is arranged between the first RF chip and the fourth area and is connected to the first RF chip and the second RF chip respectively.

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