Coding and decoding integrated equipment and distributed control system
By designing integrated codec equipment and integrating codec, network, video input and output modules, the problem of increasing the number of encoding and decoding devices in distributed systems is solved, and the multiple input and output functions are realized, reducing the difficulty and cost of wiring. Improves system flexibility and scalability.
Patent Information
- Application Number
- CN202420828270.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-19
- Publication Date
- 2024-12-31
- Estimated Expiration
- 2034-04-19
AI Technical Summary
In distributed systems, independent encoding and decoding devices require repurchase when the number of devices increases, resulting in waste of costs and time. In addition, the encoding devices only support single-channel input, and the decoding devices only support single-channel output, which adds to the system's Difficulty of wiring.
A codec integrated device is designed, integrating codec modules, network modules, multiple video input modules and multiple video output modules, which can encode and decode multiple video source signals and transmit them through network modules. It supports multiple encoding input and multiple decoding output, reducing the number of devices and reducing wiring difficulty.
The integration of encoding equipment and decoding equipment is realized, reducing the number of equipment needs, saving costs and time, reducing the wiring complexity of the system, and improving the flexibility and scalability of the system.
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Figure CN222283341U_ABST
Abstract
Description
Technical Field
[0001] The present application belongs to the field of audio and video processing technology, and in particular, relates to an integrated codec device and a distributed control system. Background Art
[0002] The distributed system is an implementation scheme for audio and video IP (Internet Protocol). The system includes encoding equipment, decoding equipment, switches and host computers. It uses the transmission method of IP network. When the system is expanded, it only needs to connect each component to the network. It has good scalability and maintainability, convenient and fast modular replacement, simple disassembly and expansion, long service life, and easy daily maintenance. However, in project design and implementation, independent encoding equipment and decoding equipment have brought many inconveniences. For example, when the number of encoding equipment or decoding equipment required increases, it is necessary to re-purchase encoding equipment or decoding equipment, resulting in a waste of cost and time. In addition, the encoding equipment only supports single-channel encoding input, and the decoding equipment only supports single-channel decoding output, resulting in an excessive number of encoding equipment and decoding equipment in the distributed system, which greatly increases the difficulty of system wiring. Utility Model Content
[0003] The embodiments of the present application provide an integrated encoding and decoding device and a distributed control system, which solve the many inconveniences caused by independent encoding and decoding in a distributed control system.
[0004] In a first aspect, an embodiment of the present application provides a codec integrated device, including a codec module, a network module, multiple video input modules and multiple first video output modules, wherein the codec module is electrically connected to the network module, the multiple video input modules and the multiple first video output modules respectively;
[0005] Each of the video input modules is used to transmit the received first video source signal to the codec module; the codec module is used to encode the multiple first video source signals respectively, and transmit the encoded multiple first video source signals through the network module; or, the network module is used to transmit the received multiple second video source signals to the codec module; the codec module is also used to decode the multiple second video source signals respectively, and output the decoded multiple second video source signals through the first video output module.
[0006] In a possible implementation manner of the first aspect, the codec module includes a codec chip, and the codec chip is electrically connected to the network module, the plurality of video input modules, and the plurality of first video output modules respectively.
[0007] In a possible implementation manner of the first aspect, the video input module includes a video input interface and a video processing chip, and the video processing chip is electrically connected to the video input interface and the codec module respectively;
[0008] The video input interface is used to transmit the received first video source signal to the video processing chip; the video processing chip is used to convert the first video source signal and transmit the converted first video source signal to the codec module.
[0009] In a possible implementation manner of the first aspect, the video input module includes a video input interface, and the video input interface is electrically connected to the codec module;
[0010] The video input interface is used to transmit the received first video source signal to the encoding and decoding module.
[0011] In a possible implementation of the first aspect, the network module includes an optical fiber interface and / or a network interface, and a PHY chip, the optical fiber interface is electrically connected to the codec module through the PHY chip, and the network interface is electrically connected to the codec module through the PHY chip.
[0012] In a possible implementation manner of the first aspect, the codec integrated device further includes a second video output module, the second video output module includes a network interface, a PHY chip, and a signal conversion chip, the network interface is electrically connected to the signal conversion chip through the PHY chip, and the signal conversion chip is electrically connected to the codec module;
[0013] The signal conversion chip is used to convert the decoded second video source signal output by the codec module into a signal that can be transmitted through a network cable.
[0014] In a possible implementation manner of the first aspect, the integrated codec device further includes an audio input and output module, and the audio input and output module is electrically connected to the codec module;
[0015] The audio input and output module is used to transmit at least one first audio signal received to the codec module; the codec module is also used to encode each of the first audio signals and transmit the encoded first audio signals through the network module; or, the network module is also used to transmit at least one second audio signal received to the codec module; the codec module is also used to decode each of the second audio signals and output the decoded second audio signals through the audio input and output module.
[0016] In a possible implementation manner of the first aspect, the integrated codec device further includes a USB interface module, and the USB interface module is electrically connected to the codec module;
[0017] When the integrated codec device is used as an encoding device, the USB interface module is used to be electrically connected to a USB flash drive to transmit data in the USB flash drive;
[0018] When the integrated codec device is used as a decoding device, the USB interface module is used to be electrically connected to an external device and to receive instructions input by the external device.
[0019] In a possible implementation manner of the first aspect, the codec integrated device further includes an OTG interface module, and the OTG interface module is electrically connected to the codec module;
[0020] When the integrated codec device is used as an encoding device, the OTG interface module is used to be electrically connected to a video source device to control the video source device.
[0021] In a second aspect, an embodiment of the present application provides a distributed control system, comprising an encoding device, a decoding device, a switch, a video source device, and a display module, wherein the encoding device is connected to the video source device via a video input module, the switch is connected to the network modules in the encoding device and the decoding device, respectively, and the decoding device is connected to the display module via a first video output module; wherein the encoding device and / or the decoding device is an integrated encoding and decoding device as described in any one of the first aspects.
[0022] Compared with the prior art, the embodiments of the present invention have the following beneficial effects:
[0023] An embodiment of the present application provides an integrated codec device, including a codec module, a network module, multiple video input modules and multiple first video output modules, and the codec module is electrically connected to the network module, multiple video input modules and multiple first video output modules respectively.
[0024] When the codec integrated device is used as the coding device, each video input module is used to transmit the received first video source signal to the codec module. The codec module is used to encode multiple first video source signals respectively and transmit the encoded multiple first video source signals through the network module.
[0025] Alternatively, when the codec integrated device is used as a decoding device, the network module is used to transmit the received multiple second video source signals to the codec module. The codec module is also used to decode the multiple second video source signals respectively, and output the decoded multiple second video source signals through multiple first video output modules.
[0026] As can be seen from the above, the integrated coding and decoding device proposed in this application integrates the coding device and the decoding device into one, and can be used as a coding and decoding device to realize the coding function, and can also be used as a decoding device to realize the decoding function. When the number of coding devices and decoding devices required increases, the integrated coding and decoding device can be used as a coding device or a decoding device according to the actual situation, without the need to re-purchase the coding device or the decoding device, saving cost and time.
[0027] In addition to the above, the integrated codec device provided in the embodiment of the present application can support multi-channel encoding input and multi-channel decoding output by setting multiple video input modules and multiple first video output modules. This can reduce the number of integrated codec devices in the distributed system. After the number of integrated codec devices is reduced, the wiring difficulty of the system can be reduced.
[0028] It can be understood that the beneficial effects of the second aspect mentioned above can be found in the relevant description of the first aspect mentioned above, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS
[0029] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.
[0030] Figure 1 This is a principle block diagram of a codec integrated device provided by an embodiment of the present application;
[0031] Figure 2 It is a principle block diagram of a codec integrated device provided by another embodiment of the present application;
[0032] Figure 3 It is a principle block diagram of a codec integrated device provided by another embodiment of the present application;
[0033] Figure 4 It is a principle block diagram of a codec integrated device provided by another embodiment of the present application;
[0034] Figure 5 It is a principle block diagram of a codec integrated device provided by another embodiment of the present application;
[0035] Figure 6 It is a principle block diagram of a codec integrated device provided by another embodiment of the present application;
[0036] Figure 7 It is a principle block diagram of a codec integrated device provided by another embodiment of the present application;
[0037] Figure 8 It is a principle block diagram of a codec integrated device provided by another embodiment of the present application;
[0038] Fig. 9 is a principle block diagram of an audio interactive system provided by an embodiment of the present application;
[0039] Fig.10 It is a structural block diagram of an audio interactive system provided in another embodiment of the present application.
[0040] In the figure: 10, codec integrated device; 11, codec module; 111, codec chip; 12, video input module; 13, first video output module; 14, network module; 141, optical fiber interface; 142, network interface; 143, PHY chip; 15, second video output module; 151, signal conversion chip; 16, audio input and output module; 161, audio input interface; 162, audio processing chip; 163, audio output interface; 17, USB interface module; 171, USB interface; 172, USB HUB chip; 18, OTG interface module; 181, OTG interface; 101, video input interface; 102, video processing chip; 103, video output interface; 20, video source device; 30, switch; 40, display module; 50, encoding device; 60, decoding device; 70, audio source device; 80, display screen; 90, peripherals; 100, playback module. DETAILED DESCRIPTION
[0041] In the following description, specific details such as specific system structures, technologies, etc. are provided for the purpose of illustration rather than limitation, so as to provide a thorough understanding of the embodiments of the present application. However, it should be clear to those skilled in the art that the present application may also be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to prevent unnecessary details from obstructing the description of the present application.
[0042] It should be understood that when used in the present specification and the appended claims, the term "comprising" indicates the presence of described features, wholes, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or combinations thereof.
[0043] As used in the specification and appended claims of this application, the term "if" can be interpreted as "when" or "uponce" or "in response to determining" or "in response to detecting", depending on the context. Similarly, the phrase "if it is determined" or "if [described condition or event] is detected" can be interpreted as meaning "uponce it is determined" or "in response to determining" or "uponce [described condition or event] is detected" or "in response to detecting [described condition or event]", depending on the context.
[0044] In addition, in the description of the present application specification and the appended claims, the terms "first", "second", "third", etc. are only used to distinguish the descriptions and cannot be understood as indicating or implying relative importance.
[0045] References to "one embodiment" or "some embodiments" etc. described in the specification of this application mean that one or more embodiments of the present application include specific features, structures or characteristics described in conjunction with the embodiment. Therefore, the statements "in one embodiment", "in some embodiments", "in some other embodiments", "in some other embodiments", etc. that appear in different places in this specification do not necessarily refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways. The terms "including", "comprising", "having" and their variations all mean "including but not limited to", unless otherwise specifically emphasized in other ways.
[0046] The encoding device and decoding device in the distributed system are two independent devices. In the project design and implementation, independent encoding and decoding bring a lot of inconvenience. For example, when the number of encoding devices and decoding devices required increases, it is necessary to re-purchase encoding devices and decoding devices, resulting in a waste of cost and time. In addition, the encoding device only supports single-channel encoding input, and the decoding device only supports single-channel decoding output, resulting in an excessive number of encoding devices and decoding devices in the distributed system, which greatly increases the difficulty of system wiring.
[0047] In view of the above problems, the present application provides an integrated coding and decoding device, such as Figure 1 As shown, the codec integrated device 10 includes a codec module 11, a network module 14, multiple video input modules 12 and multiple first video output modules 13. The codec module 11 is electrically connected to the network module 14, multiple video input modules 12 and multiple first video output modules 13 respectively.
[0048] In the embodiment of the present application, when the codec integrated device 10 is used as a coding device, each video input module 12 is used to transmit the received first video source signal to the codec module 11. The codec module 11 is used to encode multiple first video source signals respectively, and transmit the encoded first video source signals through the network module 14.
[0049] Alternatively, when the codec integrated device 10 is used as a decoding device, the network module 14 is used to transmit the received multiple second video source signals to the codec module 11. The codec module 11 is also used to decode the multiple second video source signals respectively, and output the decoded multiple second video source signals through the first video output module 13. It should be noted that the decoded multiple video source signals can be output through multiple first video output modules 13 respectively, or can be output through one first video output module 13, and the output mode can be selected according to the actual situation.
[0050] As can be seen from the above, the integrated codec device 10 proposed in the present application integrates the coding device and the decoding device, and can be used as a coding and decoding device to implement the coding function, and can also be used as a decoding device to implement the decoding function. When the number of coding devices and decoding devices required increases, the integrated codec device 10 can be used as a coding device or a decoding device according to the actual situation, without the need to re-purchase a coding device or a decoding device, saving cost and time.
[0051] In addition to the above, the integrated codec device 10 provided in the embodiment of the present application can support multi-channel encoding input and multi-channel decoding output by setting multiple video input modules 12 and multiple first video output modules 13. This can reduce the number of integrated codec devices 10 in the distributed system. After the number of integrated codec devices 10 is reduced, the wiring difficulty of the system can be reduced.
[0052] Exemplarily, the number of video input modules 12 is 2, and the number of first video output modules 13 is 2, then the integrated codec device 10 supports dual-channel encoding input and dual-channel decoding output, which can reduce the number of integrated codec devices 10 in the distributed system. After the number of integrated codec devices is reduced, the wiring difficulty of the system can be reduced.
[0053] For the convenience of description, this application will take the example of two video input modules 12 and two first video output modules 13 to illustrate the structure and function of each module in the integrated codec device 10, but this does not limit the scope of protection claimed by this application.
[0054] like Figure 2As shown, the codec module 11 includes a codec chip 111. The codec chip 111 is electrically connected to the network module 14, the two video input modules 12 and the two first video output modules 13. For the functions implemented by the codec chip 111, please refer to the above functional description of the codec module 11, which will not be repeated here.
[0055] In an embodiment of the present application, the codec chip 111 may be an ARM (Advanced RISC Machines) chip, an FPGA (Field-Programmable Gate Array) chip, an integrated processor SoC (System on a Chip) or FPGA+ARM / MCU. When the codec chip 111 is an ARM chip, the ARM chip performs both processing and control. When the codec chip 111 is an FPGA chip, the FPGA chip performs both processing and control. When the codec chip 111 is an integrated processor SoC, the integrated processor SoC performs both processing and control. When the codec chip 111 is an FPGA+ARM / MCU, the FPGA is used for processing and the ARM / MCU is used for control.
[0056] like Figure 2 As shown, the video input module 12 includes a video input interface 101 and a video processing chip 102. The video processing chip 102 is electrically connected to the video input interface 101 and the codec chip 111 in the codec module 11 respectively.
[0057] In the embodiment of the present application, the video input interface 101 is used to receive a first video source signal and transmit the first video source signal to the video processing chip 102. The video processing chip 102 is used to convert the first video source signal and transmit the converted first video source signal to the codec chip 111. It should be noted that the conversion of the first video source signal by the video processing chip 102 mainly includes the conversion of the signal protocol format / level standard. For example, when the codec chip 111 is an integrated processor SoC and the first video source signal is an HDMI (High-Definition Multimedia Interface) signal, the video processing chip 102 is used to convert the first video source signal into a MIPI signal (Mobile Industry Processor Interface); when the codec chip 111 is an FPGA chip and the first video source signal is an HDMI signal, the video processing chip 102 is used to convert the first video source signal into an LVDS (Low-Voltage Differential Signaling) signal; or, the video processing chip 102 can also perform color space conversion, such as converting YUV444 to YUV422.
[0058] Exemplarily, the video input interface 101 includes a video interface such as an HDMI interface or a DVI (Digital Visual Interface) interface.
[0059] It should be noted that the two video input interfaces 101 are independent of each other, and the data processing capability of each video input interface 101 is related to the data processing capability of the codec chip 111 and the type of interface. For example, when the video input interface 101 is HDMI2.0, the video input interface 101 supports a maximum of 4K@60Hz encoding input.
[0060] Figure 2 The video input module 12 shown is suitable for scenarios where the codec chip 111 cannot directly support the signal input by the video input interface 101. For example, when the codec chip 111 is an FPGA chip and the video input interface 101 is an HDMI interface, a video processing chip 102 needs to be set, and the signal input by the video input interface 101 needs to be converted by the video processing chip 102 before it can be transmitted to the FPGA chip for processing.
[0061] like Figure 2 As shown, the first video output module 13 includes a video output interface 103 and a video processing chip 102. The video processing chip 102 is electrically connected to the video output interface 103 and the codec chip 111 in the codec module 11 respectively.
[0062] In the embodiment of the present application, the video processing chip 102 is used to receive the decoded second video source signal output by the codec chip 111, and convert the decoded second video source signal, and the converted signal is output through the video output interface 103. It should be noted that the conversion of the second video source signal by the video processing chip 102 mainly includes the conversion of the signal protocol format / level standard, for example: when the codec chip 111 is an integrated processor SoC and the video output interface 103 supports the HDMI signal, the video processing chip 102 is used to convert the decoded second video source signal (such as a MIPI signal) into an HDMI signal; when the codec chip 111 is an FPGA chip and the video output interface 103 supports the HDMI signal, the video processing chip 102 is used to convert the decoded second video source signal (such as an LVDS signal) into an HDMI signal.
[0063] Exemplarily, the video output interface 103 includes a video interface such as an HDMI interface or a DVI interface.
[0064] It should be noted that the two video output interfaces 103 are independent of each other, and the data processing capability of the video output interface 103 is related to the data processing capability of the codec chip 111 and the type of interface. For example, when the video output interface 103 is HDMI2.0, and the two video output interfaces 103 are respectively connected to two display modules, the two video input interfaces 101 each support a maximum decoding output of 4K@60Hz; when the video output interface 103 is HDMI2.0, and only one of the two video output interfaces 103 is connected to the display module, then the video output interface 103 connected to the display module supports a maximum decoding output of 8K@60Hz.
[0065] Figure 2 The first video output module 13 shown is suitable for scenarios where the codec chip 111 cannot directly output a signal supported by the video output interface 103. For example, when the codec chip 111 is an FPGA chip and the video output interface 103 is an HDMI interface, a video processing chip 102 needs to be set, and the signal output by the FPGA chip needs to be converted by the video processing chip 102 before it can be output through the video output interface 103.
[0066] like Figure 3 As shown, the video input module 12 includes a video input interface 101 , and the video input interface 101 is electrically connected to a codec chip 111 in the codec module 11 .
[0067] In the embodiment of the present application, the video input interface 101 is used to receive a first video source signal and transmit the first video source signal to the codec module 11 .
[0068] Exemplarily, the video input interface 101 includes a video interface such as an HDMI interface or a DVI interface.
[0069] Figure 3 The video input module 12 shown is suitable for scenarios where the codec chip 111 directly supports the signal input by the video input interface 101. For example, when the codec chip 111 is an ARM chip and the video input interface 101 is an HDMI interface, the signal input by the video input interface 101 can be directly transmitted to the ARM chip for processing.
[0070] like Figure 3 As shown, the first video output module 13 includes a video output interface 103 , and the video output interface 103 is electrically connected to the codec chip 111 in the codec module 11 .
[0071] In the embodiment of the present application, the codec chip 111 is used to output the decoded second video source signal through the video output interface 103 .
[0072] Exemplarily, the video output interface 103 includes a video interface such as an HDMI interface or a DVI interface.
[0073] Figure 3 The first video output module 13 shown is suitable for scenarios where the codec chip 111 can directly output signals supported by the video output interface 103. For example, when the codec chip 111 is an ARM chip and the video output interface 103 is an HDMI interface, the signal output by the ARM chip can be directly output through the video output interface 103.
[0074] The network module 14 includes an optical fiber interface 141 and / or a network interface 142, and a PHY (Physical Layer chip) chip 143. The optical fiber interface 141 is electrically connected to the codec chip 111 in the codec module 11, and the network interface 142 is electrically connected to the codec chip 111 in the codec module 11 through the PHY chip 143.
[0075] For example, Figure 2 As shown, the number of optical fiber interfaces 141 is 2, the number of network interfaces 142 is 2, and the number of PHY chips 143 is 2.
[0076] In the embodiment of the present application, the signal output by the codec chip 111 can be directly transmitted through the optical fiber interface 141, and the signal output by the codec chip 111 needs to be converted by the PHY chip 143 before being transmitted through the network interface 142. The PHY chip 143 mainly performs signal conversion.
[0077] The application scenarios of the above embodiments are related to the selection of the codec chip 111 in the codec module 11. For example, when the codec chip 111 is an FPGA chip, the optical fiber interface 141 can communicate directly with the FPGA chip, while the network interface 142 needs to communicate with the FPGA chip through the PHY chip 143.
[0078] The network module 14 includes an optical fiber interface 141 and / or a network interface 142, and a PHY (Physical Layer chip) chip 143. The optical fiber interface 141 is electrically connected to the codec chip 111 in the codec module 11 through the PHY chip 143, and the network interface 142 is electrically connected to the codec chip 111 in the codec module 11 through the PHY chip 143.
[0079] For example, Figure 3 As shown, the number of optical fiber interfaces 141 is 2, the number of network interfaces 142 is 2, and the number of PHY chips 143 is 4.
[0080] In the embodiment of the present application, the signal output by the codec chip 111 needs to be converted by the PHY chip 143 before being transmitted through the network interface 142 or the optical fiber interface 141 .
[0081] The application scenarios of the above embodiments are related to the selection of the codec chip 111 in the codec module 11. For example, when the codec chip 111 is an ARM chip, the optical fiber interface 141 needs to communicate with the ARM chip through the PHY chip 143, and the network interface 142 needs to communicate with the ARM chip through the PHY chip 143.
[0082] It should be noted that when the network module 14 is required to perform signal transmission, the optical fiber interface 141 or the network interface 142 may be designated to perform signal transmission.
[0083] It should be noted that the four interfaces in the network module 14 can be used in a mixed manner and can be backed up with each other. For example, the network interface 142 can back up the optical fiber interface 141, the network interface 142 can back up another network interface 142, the optical fiber interface 141 can back up the network interface 142, and the optical fiber interface 141 can back up another optical fiber interface 141. When any one of the four interfaces is connected, it means that the system in which the codec integrated device 10 is located can be used normally.
[0084] The integrated codec device 10 also includes a second video output module 15, which includes a network interface 142, a PHY chip 143 and a signal conversion chip 151. The network interface 142 is electrically connected to the signal conversion chip 151 through the PHY chip 143, and the signal conversion chip 151 is electrically connected to the codec chip 111 in the codec module 11.
[0085] For example, Figure 4 As shown, the number of network interfaces 142 is 2, and the number of PHY chips is 2.
[0086] In the embodiment of the present application, the signal conversion chip 151 is used to convert the decoded second video source signal output by the codec chip 111 into a signal (i.e., a network port signal) that can be transmitted through a network cable. For example, the signal conversion chip can also perform image segmentation first, and then perform signal conversion, and finally obtain a signal that can be transmitted through a network cable. The PHY chip 143 is used to implement the physical layer conversion of the network port signal, and output the converted network port signal through the network interface 142.
[0087] The above embodiment provides another way of outputting the video source device signal. The video source device signal output by the codec chip 111 can be output through the first video output module 13 or the second video output module 15 .
[0088] The second video output module 15 further includes an optical fiber interface 141 , which is electrically connected to the signal conversion chip 151 via the PHY chip 143 .
[0089] For example, Figure 5 As shown, the number of the optical fiber interfaces 141 is 2, and the number of the PHY chips 143 is 4.
[0090] In the embodiment of the present application, the network port signal output by the PHY chip 143 can also be output through the optical fiber interface 141 .
[0091] It should be noted that when the second video output module 15 is used for output, if the optical fiber interface 141 is finally used for output, it is necessary to set a photoelectric converter at the next level of the optical fiber interface 141. The signal output by the optical fiber interface 141 must be converted into a network port signal by the photoelectric converter before it can be transmitted to the receiving card in the display module.
[0092] like Figure 6 As shown, the integrated codec device 10 further includes an audio input and output module 16 , and the audio input and output module 16 is electrically connected to the codec module 11 .
[0093] In the embodiment of the present application, the audio input and output module 16 is used to transmit the received at least one first audio signal to the codec module 11. The codec module 11 is also used to encode each first audio signal, and transmit the encoded multiple first audio signals through the network module 14. Alternatively, the network module 14 is also used to transmit the received at least one second audio signal to the codec module 11. The codec module 11 is also used to decode each second audio signal, and output the decoded multiple second audio signals through the audio input and output module 16.
[0094] like Figure 7 As shown, the audio input and output module 16 includes multiple audio processing chips 162, multiple audio input interfaces 161 and multiple audio output interfaces 163. Each audio processing chip 162 is electrically connected to the codec chip 111, the audio input interface 161 and the audio output interface 163 in the codec module 11 respectively.
[0095] In the embodiment of the present application, the audio processing chip 162 is used to process the audio signal accordingly according to the type of the audio input interface 161 .
[0096] Exemplarily, the audio input interface 161 includes an audio interface such as an Audio interface or a LINE interface, and specifically a 3.5 mm audio jack can be selected.
[0097] Exemplarily, when the audio input interface 161 is an Audio interface, the audio processing chip 162 amplifies the audio signal. When the audio input interface 161 is a LINE interface, the audio processing chip 162 does not amplify the audio signal.
[0098] Exemplarily, the audio output interface 163 includes an audio interface such as an Audio interface or a LINE interface, and specifically a 3.5 mm audio jack can be selected.
[0099] like Figure 6 As shown, the integrated codec device 10 further includes a USB (Universal Serial Bus) interface module 17 , and the USB interface module 17 is electrically connected to the codec module 11 .
[0100] In the embodiment of the present application, when the codec integrated device 10 is used as an encoding device, the codec integrated device 10 is electrically connected to the USB flash drive through the USB interface module 17 to transfer data in the USB flash drive. When the codec integrated device 10 is used as a decoding device, the codec integrated device 10 is electrically connected to the peripheral device through the USB interface module 17 and receives instructions input by the peripheral device, such as a keyboard and a mouse.
[0101] like Figure 7As shown, the USB interface module 17 includes a plurality of USB interfaces 171, and the plurality of USB interfaces 171 are electrically connected to the codec chip 111 in the codec module 11. The number of the USB interfaces 171 depends on the type of the codec chip 111 in the codec module 11.
[0102] like Figure 8 As shown, the USB interface module 17 includes a plurality of USB interfaces 171 and a USB HUB (HUB, network hub device) chip 172 , and the plurality of USB interfaces 171 are electrically connected to the codec chip 111 in the codec module 11 through the USB HUB chip 172 .
[0103] In the embodiment of the present application, the USB HUB chip 172 is used to implement the expansion function of the USB interface 171. When the number of USB pins of the codec chip 111 is insufficient, the USB HUB chip 172 is used to implement the increase in the number of USB interfaces 171.
[0104] like Figure 6 As shown, the integrated codec device 10 further includes an OTG (On-The-Go, plug and play) interface module 18 , and the OTG interface module 18 is electrically connected to the codec module 11 .
[0105] In the embodiment of the present application, when the codec-integrated device 10 is used as an encoding device, the codec-integrated device 10 is electrically connected to the video source device through the OTG interface module 18 to achieve control of the video source device. For example, when the decoding device receives an instruction input by a peripheral device, the decoding device transmits the instruction input by the peripheral device to the codec-integrated device 10 as an encoding device through the switch to remotely control the video source device.
[0106] like Figure 7 As shown, the OTG interface module 18 includes two OTG interfaces 181. Each OTG interface 181 is electrically connected to the codec chip 111 in the codec module 11.
[0107] The present application also provides a distributed control system. Fig. 9 As shown, the distributed control system includes an encoding device 50, a decoding device 60, a switch 30, a video source device 20 and a display module 40. The encoding device 50 is connected to the video source device 20 through a video input module, the switch 30 is connected to the network modules in the encoding device 50 and the decoding device 60 respectively, and the decoding device 60 is connected to the display module 40 through a first video output module. The encoding device 50 and / or the decoding device 60 is the above-mentioned encoding and decoding integrated device 10.
[0108] Here's how it works:
[0109] Coding mode: The video source device 20 can output multiple first video source signals to the encoding device 50 through the video input module. The encoding device 50 encodes the multiple first video source signals and transmits the encoded first video source signals to the switch 30 through the network module. The switch 30 transmits the encoded first video source signals to the decoding device 60 through the network module.
[0110] Among them, the multiple first video output modules in the encoding device 50 can be connected or not connected to other devices / displays. When connected to other devices, they can serve as the input of the next encoding input node (i.e., LOOP implementation). When connected to a display, they can be previewed and monitored on the display.
[0111] Decoding mode: The decoding device 60 decodes the encoded first video source signal, and the decoded video source signal is transmitted to the display module 40 through the first video output module for display.
[0112] For the convenience of description, this application will take the example of the integrated codec device 10 supporting dual-channel encoding input and dual-channel decoding output to illustrate the subsequent content, but this does not limit the scope of protection required by this application.
[0113] like Fig.10 As shown, the distributed control system includes two video source devices 20, an encoding device 50, a switch 30, a decoding device 60(1), a decoding device 60(2), three audio source devices 70, two peripheral devices 90, two playback modules 100 and a display screen 80. The two video source devices 20 are electrically connected to the encoding device 50 through a video input module, respectively. The encoding device 50 is electrically connected to the two video source devices 20 through an OTG interface module, respectively. The encoding device 50 is electrically connected to the three audio source devices 70 through an audio input and output module, respectively. The encoding device 50 is electrically connected to the three audio source devices 70 through a network module. The decoding device 60(1) is electrically connected to the switch 30 through a network module. The decoding device 60(1) is electrically connected to two peripheral devices 90 through USB interface modules. The decoding device 60(1) is electrically connected to two playback modules 100 through audio input and output modules. The decoding device 60(1) is electrically connected to two display modules 40 through two first video output modules. The decoding device 60(2) is electrically connected to a display screen 80 through a first video output module. The decoding device 60(2) is electrically connected to the switch 30 through a network module.
[0114] Here's how it works:
[0115] Coding mode: Each video source device 20 outputs a first video source signal to the encoding device 50 through a video input module. The encoding device 50 encodes the two first video source signals respectively, and transmits the encoded two first video source signals to the switch 30 through a network module. The switch 30 transmits the encoded two first video source signals to the decoding device 60 (1) and the decoding device 60 (2) respectively through the network module.
[0116] Each audio source device 50 (e.g., a microphone) outputs a first audio signal to the encoding device 50 through an audio input / output module. The encoding device 50 encodes the three first audio signals respectively and transmits the encoded three first audio signals to the switch 30 through a network module. The switch 30 transmits the encoded three first audio signals to the decoding device 60 (1) and the decoding device 60 (2) respectively through the network module.
[0117] The audio output interface in the encoding device 50 may be connected to other devices or not, and when connected to other devices, it may be used as the input of the next encoding input node (ie, LOOP implementation).
[0118] Decoding mode:
[0119] The decoding device 60(1) decodes the two encoded first video source signals respectively, and the two decoded video source signals are transmitted to the two display modules 40 for display through the first video output module respectively. The signal size of each output of the decoding device 60(1) is 4K@60Hz. The decoding device 60(2) decodes the two encoded first video source signals respectively, and transmits the two decoded video source signals to the display screen 80 through a first video output module for display. The signal size of one output of the decoding device 60(2) connected to the display screen 80 is 8K@60Hz. The decoding device 60(1) also decodes the three encoded first audio signals respectively, and the decoded three audio signals can be transmitted to the playback module 100 (such as a speaker) for playback. The decoding device 60(2) also decodes the three encoded first audio signals respectively, and the decoded audio signals can be output or not according to user needs.
[0120] The decoding device 60 (1) is also used to receive instructions input by the peripheral device 90 (such as a mouse and keyboard), and transmit the instructions to the switch 30 through the network module. The switch 30 then transmits the instructions to the encoding device 50 through the network module, and finally realizes remote control of the video source device 20 through the OTG interface module in the encoding device 50.
[0121] Since the distributed control system provided in the embodiment of the present application adopts the above-mentioned integrated codec device 10, the integrated codec device 10 supports multi-channel encoding input and multi-channel decoding output, which can reduce the number of integrated codec devices 10 in the distributed control system. After the number of integrated codec devices 10 is reduced, the wiring difficulty of the distributed control can be reduced. Therefore, the distributed control system provided in the embodiment of the present application has the advantages of simple structure and simple wiring.
[0122] The embodiments described above are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, a person skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.
Claims
1. A codec integrated device, characterized in that: It includes a codec module, a network module, a plurality of video input modules and a plurality of first video output modules, wherein the codec module is electrically connected to the network module, the plurality of video input modules and the plurality of first video output modules respectively; Each of the video input modules is used to transmit the received first video source signal to the codec module; the codec module is used to encode the multiple first video source signals respectively, and output the encoded multiple first video source signals through the network module; or, the network module is used to transmit the received multiple second video source signals to the codec module; the codec module is also used to decode the multiple second video source signals respectively, and output the decoded multiple second video source signals through the first video output module.
2. The integrated codec device according to claim 1, characterized in that: The codec module includes a codec chip, and the codec chip is electrically connected to the network module, the plurality of video input modules and the plurality of the first video output modules respectively.
3. The integrated codec device according to claim 1, characterized in that: The video input module comprises a video input interface and a video processing chip, and the video processing chip is electrically connected to the video input interface and the codec module respectively; The video input interface is used to transmit the received first video source signal to the video processing chip; The video processing chip is used to convert the first video source signal and transmit the converted first video source signal to the encoding and decoding module.
4. The integrated codec device according to claim 1, characterized in that: The video input module comprises a video input interface, and the video input interface is electrically connected to the codec module; The video input interface is used to transmit the received first video source signal to the encoding and decoding module.
5. The integrated codec device according to claim 1, characterized in that: The network module includes an optical fiber interface and / or a network interface, and a PHY chip. The optical fiber interface is electrically connected to the codec module through the PHY chip, and the network interface is electrically connected to the codec module through the PHY chip.
6. The integrated codec device according to any one of claims 1 to 5, characterized in that: The codec integrated device further includes a second video output module, the second video output module includes a network interface, a PHY chip and a signal conversion chip, the network interface is electrically connected to the signal conversion chip through the PHY chip, and the signal conversion chip is electrically connected to the codec module; The signal conversion chip is used to convert the decoded second video source signal output by the codec module into a signal that can be transmitted through a network cable.
7. The integrated codec device according to any one of claims 1 to 5, characterized in that: The integrated codec device further comprises an audio input and output module, wherein the audio input and output module is electrically connected to the codec module; The audio input and output module is used to transmit at least one first audio signal received to the codec module; the codec module is also used to encode each of the first audio signals and transmit the encoded first audio signals through the network module; or, the network module is also used to transmit at least one second audio signal received to the codec module; the codec module is also used to decode each of the second audio signals and output the decoded second audio signals through the audio input and output module.
8. The integrated codec device according to any one of claims 1 to 5, characterized in that: The codec integrated device further comprises a USB interface module, and the USB interface module is electrically connected to the codec module; When the integrated codec device is used as an encoding device, the USB interface module is used to be electrically connected to a USB flash drive to transmit data in the USB flash drive; When the integrated codec device is used as a decoding device, the USB interface module is used to be electrically connected to an external device and to receive instructions input by the external device.
9. The integrated codec device according to any one of claims 1 to 5, characterized in that: The codec integrated device further comprises an OTG interface module, and the OTG interface module is electrically connected to the codec module; When the integrated codec device is used as an encoding device, the OTG interface module is used to be electrically connected to a video source device to control the video source device.
10. A distributed control system, characterized in that: It includes an encoding device, a decoding device, a switch, a video source device, and a display module. The encoding device is connected to the video source device via a video input module, the switch is connected to the network modules in the encoding device and the decoding device respectively, and the decoding device is connected to the display module via a first video output module; wherein the encoding device and / or the decoding device is the integrated encoding and decoding device as described in claims 1-9.