Driving circuit and driving device

Abstract

The utility model discloses a driving circuit and a driving device, and the driving circuit comprises at least one stage of sub-driving circuit, and the sub-driving circuit is used for driving a corresponding semiconductor switching device. In the sub-driving circuit, the first switching circuit receives the control signal, and the first switching circuit is connected with the semiconductor switching device. The second switching circuit receives the control signal and the comparison signal, and is also connected with the semiconductor switching device. The first switching circuit and the second switching circuit are controlled to be switched on through the control signal and the comparison signal to drive the semiconductor switching device, so that the switching loss of the semiconductor switching device is ensured, and the resistance value of a resistor connected with the semiconductor switching device is reduced as the first switching circuit and the second switching circuit are switched on and connected in parallel at the same time; the EMC of the semiconductor switching device is also considered, and the operation efficiency and stability of the semiconductor switching device are improved.

Description

Technical Field

[0001] The present application relates to the field of power electronics technology, and in particular to a drive circuit and a drive device. Background Art

[0002] In the field of power electronic converters, the efficiency and performance indicators of semiconductor switch modules are very important, and semiconductor switch module driving is the key technology for controlling semiconductor switch modules. The traditional semiconductor switch module driving form is to use the same driving resistor with high or low level to turn the semiconductor switch on or off.

[0003] Among them, in the prior art of semiconductor switch modules, the resistance of the driving resistor is constant. If a driving resistor with a larger resistance is used, the semiconductor switch module has a larger turn-on loss and a lower efficiency, but a better EMC (Electro Magnetic Compatibility). If a driving resistor with a smaller resistance is used, the semiconductor switch module has a smaller turn-on loss and a higher efficiency, but a worse EMC. The prior art cannot take into account both the turn-on loss and EMC of the semiconductor switch module. Utility Model Content

[0004] The present application provides a driving circuit to solve the above technical problems. The driving circuit includes at least one sub-driving circuit, the sub-driving circuit is used to drive the corresponding semiconductor switch device, and the sub-driving circuit includes:

[0005] a first switch circuit, wherein a first input terminal of the first switch circuit receives a control signal, a first output terminal of the first switch circuit is connected to a first terminal of the semiconductor switch device, and a second output terminal of the first switch circuit is connected to a second terminal of the semiconductor switch device;

[0006] a second switch circuit, wherein a first input terminal of the second switch circuit receives the control signal, a second input terminal of the second switch circuit receives the comparison signal, a first output terminal of the second switch circuit is connected to a first terminal of the semiconductor switch device, and a second output terminal of the second switch circuit is connected to a second terminal of the semiconductor switch device;

[0007] When the control signal is at a first level and the comparison signal is at a second level, the first switch circuit and the second switch circuit are turned on to drive the semiconductor switch device together through the first switch circuit and the second switch circuit.

[0008] When the control signal is at the second level and the comparison signal is at the first level, the first switch circuit is turned on and the second switch circuit is turned off, so as to drive the semiconductor switch device through the first switch circuit.

[0009] The first switching circuit includes a first isolation device, a first capacitor and a second capacitor, the first end of the first isolation device receives the control signal, the second end of the first isolation device is grounded, the third end of the first isolation device is connected to the second end of the semiconductor switching device through the first capacitor, and the fourth end of the first isolation device is connected to the second end of the semiconductor switching device through the second capacitor.

[0010] The first switch circuit further includes a first resistor, and the fifth end of the first isolation device is connected to the first end of the semiconductor switch device through the first resistor.

[0011] The second switch circuit includes a second isolation device, a third capacitor and a fourth capacitor, the first end of the second isolation device receives the control signal, the second end of the second isolation device receives the comparison signal, the third end of the second isolation device is connected to the second end of the semiconductor switch device through the third capacitor, and the fourth end of the second isolation device is connected to the second end of the semiconductor switch device through the fourth capacitor.

[0012] The second switch circuit further includes a second resistor and a diode, the fifth end of the second isolation device is connected to the anode of the diode, and the cathode of the diode is connected to the first end of the semiconductor switch device through the second resistor.

[0013] Wherein, the driving circuit comprises multiple levels of sub-driving circuits and an interlocking circuit, and the interlocking circuit is respectively connected to the multiple levels of sub-driving circuits.

[0014] Wherein, the multi-stage sub-driving circuit comprises a first-stage sub-driving circuit and a second-stage sub-driving circuit, and the interlocking circuit comprises a first port;

[0015] The first port is connected to the first input end of the first switch circuit of the first-level sub-driving circuit, the first port is connected to the first input end of the second switch circuit of the first-level sub-driving circuit, the first port is connected to the second input end of the first switch circuit of the second-level sub-driving circuit, and the first port is connected to the second input end of the second switch circuit of the second-level sub-driving circuit.

[0016] Wherein, the interlocking circuit further comprises a switch device and a second port;

[0017] The second port is connected to the second input terminal of the first switching circuit of the first-level sub-driving circuit, the second port is connected to the second input terminal of the second switching circuit of the first-level sub-driving circuit through the switching device, the second port is connected to the first input terminal of the first switching circuit of the second-level sub-driving circuit, and the second port is connected to the first input terminal of the second switching circuit of the second-level sub-driving circuit through the switching device.

[0018] In order to solve the above technical problems, the present application also provides a driving device, which includes the driving circuit as described above.

[0019] Beneficial effects of the present application: Different from the prior art, the driving circuit of the present application includes at least one sub-driving circuit, and the sub-driving circuit is used to drive the corresponding semiconductor switch device. Among them, the sub-driving circuit includes a first switch circuit and a second switch circuit, the first input end of the first switch circuit receives a control signal, the first output end of the first switch circuit is connected to the first end of the semiconductor switch device, and the second output end of the first switch circuit is connected to the second end of the semiconductor switch device. The first input end of the second switch circuit receives a control signal, the second input end of the second switch circuit receives a comparison signal, the first output end of the second switch circuit is connected to the first end of the semiconductor switch device, and the second output end of the second switch circuit is connected to the second end of the semiconductor switch device. The first switch circuit and the second switch circuit are controlled to be turned on by the control signal and the comparison signal to drive the semiconductor switch device. While ensuring the turn-on loss of the semiconductor switch device, since the first switch circuit and the second switch circuit are turned on in parallel at the same time, the resistance value of the resistor connected to the semiconductor switch device is reduced, and the EMC of the semiconductor switch device is also taken into account, thereby improving the operating efficiency and stability of the semiconductor switch device. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0021] in:

[0022] Figure 1 is a schematic structural diagram of a first embodiment of a driving circuit of the present application;

[0023] Figure 2 It is a structural schematic diagram of the second embodiment of the driving circuit of the present application.

[0024] Reference numerals: driving circuit 1 ; first switch circuit 11 ; second switch circuit 12 ; first-stage sub-driving circuit 13 ; second-stage sub-driving circuit 14 . DETAILED DESCRIPTION

[0025] The scheme of the embodiment of the present application is described in detail below in conjunction with the drawings of the specification.

[0026] In the following description, for the purpose of explanation rather than limitation, specific details such as specific system structures, interfaces, and technologies are provided to facilitate a thorough understanding of the present application.

[0027] Reference to "embodiments" in this application means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0028] The term "and / or" in this application is only a description of the association relationship of associated objects, indicating that there may be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the objects associated before and after are in an "or" relationship. In addition, "many" in this article means two or more than two. In addition, the term "at least one" in this article means any combination of at least two of any one or more of a plurality of, for example, including at least one of A, B, and C, and can mean including any one or more elements selected from the set consisting of A, B, and C. In addition, the terms "first", "second", and "third" in this application are used for descriptive purposes only and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features.

[0029] See also Figure 1 , Figure 1 The driving circuit 1 provided in the embodiment of the present application includes at least one stage of sub-driving circuits, wherein the sub-driving circuits are used to drive the corresponding semiconductor switch device Q1, including a first switch circuit 11 and a second switch circuit 12.

[0030] The first input terminal of the first switch circuit 11 receives the control signal PWM_in, the first output terminal of the first switch circuit 11 is connected to the first terminal of the semiconductor switch device Q1, the first output terminal of the first switch circuit 11 is connected to the first terminal of the semiconductor switch device Q1, and the second output terminal of the first switch circuit 11 is connected to the second terminal of the semiconductor switch device Q1. The first input terminal of the second switch circuit 12 receives the control signal PWM_in, the second input terminal of the second switch circuit 12 receives the comparison signal PWM_en, the first output terminal of the second switch circuit is connected to the first terminal of the semiconductor switch device Q1, and the second output terminal of the second switch circuit 12 is connected to the second terminal of the semiconductor switch device Q1.

[0031] When the control signal PWM_in is at the first level and the comparison signal PWM_en is at the second level, the first switch circuit 11 and the second switch circuit 12 are turned on to drive the semiconductor switch device Q1 through the first switch circuit 11 and the second switch circuit 12 .

[0032] When the control signal PWM_in is at the second level and the comparison signal PWM_en is at the first level, the first switch circuit 11 is turned on and the second switch circuit 12 is turned off, so that the semiconductor switch device Q1 is driven by the first switch circuit 11 .

[0033] The first switch circuit 11 and the second switch circuit 12 are controlled to be turned on by controlling the control signal PWM_in and the comparison signal PWM_en to drive the semiconductor switch device Q1. While ensuring the turn-on loss of the semiconductor switch device Q1, since the first switch circuit 11 and the second switch circuit 12 are turned on in parallel at the same time, the resistance value of the resistor connected to the semiconductor switch device Q1 is reduced, and the EMC of the semiconductor switch device Q1 is also taken into account, thereby improving the operating efficiency and stability of the semiconductor switch device Q1.

[0034] Alternatively, if Figure 1 As shown, the first switch circuit 11 includes a first isolation device U1, a first capacitor C1, a second capacitor C2 and a first resistor R1. The first isolation device U1 can be a driving optical coupler.

[0035] The first end of the first isolation device U1 receives the control signal PWM_in, the second end of the first isolation device U1 is grounded, the third end of the first isolation device U1 is connected to the second end of the semiconductor switch device Q1 through the first capacitor C1, the fourth end of the first isolation device U1 is connected to the second end of the semiconductor switch device Q1 through the second capacitor C2, and the fifth end of the first isolation device U1 is connected to the first end of the semiconductor switch Q1 through the first resistor R1. The third end of the semiconductor switch device Q1 is connected to the power supply Vbus.

[0036] Furthermore, after the first isolation device U1 receives the control signal PWM_in, if the control signal PWM_in is at a first level, wherein the first level may be a high level, the first level may flow through the first end of the first isolation device U1 to the second end of the first isolation device U1, the first isolation device U1 is turned on, and the fifth end of the first isolation device U1 outputs a high level to control the semiconductor switch device Q1 to turn on, and the resistance value of the first resistor R1 is the resistance value of the driving resistor of the semiconductor switch device Q1 described above.

[0037] In another embodiment, if the control signal PWM_in is at a second level, wherein the second level may be a low level, since the second end of the first isolation device U1 is grounded, the second level may still flow through the first end of the first isolation device U1 to the second end of the first isolation device U1, and the first isolation device U1 is turned on.

[0038] The first capacitor C1 and the second capacitor C2 play a filtering role to improve the stability of the current loop in the first switch circuit 11 and improve the safety of the first switch circuit 11 .

[0039] Furthermore, the second switch circuit 12 includes a second isolation device U2, a third capacitor C3, a fourth capacitor C4, a second resistor R2 and a diode D1.

[0040] Among them, the first end of the second isolation device U2 receives the control signal PWM_in, the second end of the second isolation device U2 receives the comparison signal PWM_en, the third end of the second isolation device U2 is connected to the second end of the semiconductor switching device Q1 through the third capacitor C3, the fourth end of the second isolation device U2 is connected to the second end of the semiconductor switching device Q1 through the fourth capacitor C4, the fifth end of the second isolation device U2 is connected to the entire diode D1, and the cathode of the diode D1 is connected to the first end of the semiconductor switching device Q1 through the second resistor R2.

[0041] The third capacitor C3 and the fourth capacitor C4 play a filtering role to improve the stability of the current loop in the second switch circuit 12 and improve the safety of the second switch circuit 12.

[0042] Furthermore, when the control signal PWM_in received at the first end of the second isolation device U2 is at the first level, and the comparison signal PWM_en received at the second end of the second isolation device U2 is at the second level, the level of the first end of the second isolation device U2 is higher than the level of the second end of the second isolation device U2, there is a current flowing from the first end of the second isolation device U2 to the second end of the second isolation device U2, the second isolation device U2 is turned on, and then the fifth end of the second isolation device U2 outputs a high level to the first end of the semiconductor switch device Q1. At this time, the resistance value of the driving resistor of the semiconductor switch device Q1 is the parallel resistance value of the first resistor R1 and the second resistor R2.

[0043] When the control signal PWM_in received at the first end of the second isolation device U2 is at the second level, and the comparison signal PWM_en received at the second end of the second isolation device U2 is at the first level, the level at the first end of the second isolation device U2 is lower than the level at the second end of the second isolation device U2, and no current can flow from the first end of the second isolation device U2 to the second end of the second isolation device U2. The second isolation device U2 is cut off, and the second isolation device U2 cannot generate a level to the first end of the semiconductor switch device Q1. At this time, it is equivalent to the second switch circuit 12 being disconnected, and the resistance value of the driving resistor of the semiconductor switch device Q1 is the resistance value of the first resistor R1.

[0044] Furthermore, when the second isolation device U2 is cut off, the diode D1 is used to prevent the voltage level at the fifth end of the first isolation device U1 from flowing back through the second resistor R2 and the diode D1, thereby improving the safety of the driving circuit 1.

[0045] In one embodiment, the second end of the second isolation device U2 may be connected to a power supply, and the power supply provides a fixed preset current for the second end of the second isolation device U2, and the specific current value of the preset current can be set by the user. The first end of the first isolation device U1 and the first end of the second isolation device U2 are connected to the output end of the inverter, and then when the output current of the inverter is greater than the preset current, the control signal PWM_in is set to the first level and the comparison signal PWM_en is set to the second level. When the output current of the inverter is less than the preset current, the control signal PWM_in is set to the second level and the comparison signal PWM_en is set to the first level. That is, the high and low levels of the control signal PWM_in and the comparison signal PWM_en are relative, not absolute.

[0046] Thereby, it is possible to change the resistance of the driving resistor of the semiconductor switch device Q1 according to the magnitude of the current output by the inverter, thereby controlling the turn-on loss and EMC of the semiconductor switch device Q1.

[0047] When the current output by the inverter is small, the first switch circuit 11 is turned on and the second switch circuit 12 is turned off. The resistance value of the driving resistor of the semiconductor switch device Q1 is large, and the output voltage change rate of the semiconductor switch device Q1 is small. The EMC of the semiconductor switch device Q1 is good and the efficiency is high. Since the current is small, the turn-on loss of the semiconductor switch device Q1 is almost not increased, thereby taking into account the turn-on loss and EMC of the semiconductor switch device Q1, improving the reliability and safety of the drive circuit 1, and improving the user experience of the drive circuit 1.

[0048] When the current output by the inverter is large, the first switch circuit 11 and the second switch circuit 12 are both in the on state, and the resistance value of the driving resistor of the semiconductor switch device Q1 is the parallel resistance value of the first resistor R1 and the second resistor R2. The resistance value of the driving resistor of the semiconductor switch device Q1 becomes smaller, and the output voltage change rate of the semiconductor switch device Q1 will not increase too much (because the output voltage change rate shows a decreasing trend as the current increases), and the turn-on loss of the semiconductor switch device Q1 is relatively small, which can effectively reduce the loss of the semiconductor switch device Q1 and improve the inverter efficiency.

[0049] In summary, by coordinating the control signal PWM_in and the comparison signal PWM_en, the driving circuit 1 controls the resistance values ​​of different driving resistors to drive the semiconductor switching device Q1 under different output currents, thereby taking into account the turn-on loss and EMC of the semiconductor switching device Q1, improving the reliability and safety of the driving circuit 1, and enhancing the stability of the semiconductor switching device Q1.

[0050] Optionally, see Figure 2 , Figure 2 1 is a schematic diagram of the structure of the second embodiment of the driving circuit of the present application. The driving circuit 1 includes a multi-stage sub-driving circuit and an interlocking circuit. The interlocking circuit is connected to the multi-stage sub-driving circuit respectively.

[0051] The multi-stage sub-driving circuit includes a first-stage sub-driving circuit 13 and a second-stage sub-driving circuit 14 , and the interlocking circuit includes a first port, a second port and a switch device S1 .

[0052] The first port is connected to the first input end of the first switch circuit 11 of the first-stage sub-drive circuit 13, the first port is connected to the first input end of the second switch circuit 12 of the first-stage sub-drive circuit 13, the first port is connected to the second input end of the first switch circuit 11 of the second-stage sub-drive circuit 14, and the first port is connected to the second input end of the second switch circuit 12 of the second-stage sub-drive circuit 14. Furthermore, the first input end of the first switch circuit 11 of the first-stage sub-drive circuit 13, the first input end of the second switch circuit 12 of the first-stage sub-drive circuit 13, the second input end of the first switch circuit 11 of the second-stage sub-drive circuit 14, and the second input end of the second switch circuit 12 of the second-stage sub-drive circuit 14 all receive the first control signal PWM_in1 output by the interlocking circuit through the first port.

[0053] The second port is connected to the second input end of the first switch circuit 11 of the first-level sub-drive circuit 13, and the second port is connected to the second input end of the second switch circuit 12 of the first-level sub-drive circuit 13 through the switch device S1. The second port is connected to the first input end of the first switch circuit 11 of the second-level sub-drive circuit 14, and the second port is connected to the first input end of the second switch circuit 12 of the second-level sub-drive circuit 14 through the switch device S1. Thus, the second input end of the first switch circuit 11 of the first-level sub-drive circuit 13, the second input end of the second switch circuit 12 of the first-level sub-drive circuit 13, the first input end of the first switch circuit 11 of the second-level sub-drive circuit 14, and the first input end of the second switch circuit 12 of the second-level sub-drive circuit 14 all receive the third control signal PWM_in2 output by the interlocking circuit through the second port.

[0054] Specifically, when the output current of the interlock circuit is relatively large (specifically, it can be compared with the preset current as described above, which will not be described in detail here), the comparison signal PWM_en can control the switch device S1 to be connected.

[0055] In one embodiment, when the current of the first port is greater than the current of the second port, that is, when the first control signal PWM_in1 is at a high level and the second control signal PWM_in2 is at a low level, the level of the first input terminal of the first switch circuit 11 of the first-stage sub-driving circuit 13 is higher than the level of the second input terminal of the first switch circuit 11 of the first-stage sub-driving circuit 13, and the level of the first input terminal of the second switch circuit 12 of the first-stage sub-driving circuit 13 is higher than the level of the second input terminal of the second switch circuit 12 of the first-stage sub-driving circuit 13; the level of the first input terminal of the first switch circuit 11 of the second-stage sub-driving circuit 14 is lower than the level of the second input terminal of the first switch circuit 11 of the second-stage sub-driving circuit 14, and the level of the first input terminal of the second switch circuit 12 of the second-stage sub-driving circuit 14 is lower than the level of the second input terminal of the second switch circuit 12 of the second-stage sub-driving circuit 14, then the first switch circuit 11 and the second switch circuit 12 of the first-stage sub-driving circuit 13 are turned on, and the first switch circuit 11 and the second switch circuit 12 of the second-stage sub-driving circuit 14 are turned off. The first stage sub-driving circuit 13 drives the first semiconductor switch device Q1 . At this time, the resistance value of the driving resistor of the first semiconductor switch device Q1 is the parallel resistance value of the first resistor R1 and the second resistor R2 .

[0056] In another embodiment, when the current of the first port is less than the current of the second port, that is, when the first control signal PWM_in1 is at a low level and the second control signal PWM_in2 is at a high level, the level of the first input terminal of the first switch circuit 11 of the first-stage sub-driving circuit 13 is lower than the level of the second input terminal of the first switch circuit 11 of the first-stage sub-driving circuit 13, and the level of the first input terminal of the second switch circuit 12 of the first-stage sub-driving circuit 13 is lower than the level of the second input terminal of the second switch circuit 12 of the first-stage sub-driving circuit 13; the level of the first input terminal of the first switch circuit 11 of the second-stage sub-driving circuit 14 is higher than the level of the second input terminal of the first switch circuit 11 of the second-stage sub-driving circuit 14, and the level of the first input terminal of the second switch circuit 12 of the second-stage sub-driving circuit 14 is higher than the level of the second input terminal of the second switch circuit 12 of the second-stage sub-driving circuit 14, then the first switch circuit 11 and the second switch circuit 12 of the first-stage sub-driving circuit 13 are disconnected, and the first switch circuit 11 and the second switch circuit 12 of the second-stage sub-driving circuit 14 are turned on. The second stage sub-driving circuit 14 drives the second semiconductor switch device Q2 . At this time, the resistance value of the driving resistor of the second semiconductor switch device Q2 is the parallel resistance value of the third resistor R3 and the fourth resistor R4 .

[0057] By controlling the first-stage sub-drive circuit 13 and the second-stage sub-drive circuit 14 through the first control signal PWM_in1 and the second control signal PWM_in2, it is possible to drive only the first semiconductor switch device Q1 or the second semiconductor switch device Q2, thereby realizing the interlocking function of the drive circuit 1, avoiding damage to the circuit caused by the first semiconductor switch device Q1 and the second semiconductor switch device Q2 being turned on at the same time, and improving the safety of the drive circuit 1.

[0058] It can be understood that the high and low levels of the first control signal PWM_in1 and the second control signal PWM_in2 are also relative, not absolute.

[0059] Furthermore, when the current output by the first port and the second port is small, the comparison signal PWM_en can control the switching device S1 to disconnect, thereby disconnecting the second input terminal of the second switching circuit 12 of the first-level sub-driving circuit 13 and the first input terminal of the second switching circuit 12 of the second-level sub-driving circuit 14, and the second switching circuit 12 of the first-level sub-driving circuit 13 and the second switching circuit 12 of the second-level sub-driving circuit 14 are disconnected.

[0060] In one embodiment, when the current of the first port is greater than the current of the second port, that is, when the first control signal PWM_in1 is at a high level and the second control signal PWM_in2 is at a low level, the level of the first input terminal of the first switch circuit 11 of the first-stage sub-driving circuit 13 is higher than the level of the second input terminal of the first switch circuit 11 of the first-stage sub-driving circuit 13; the level of the first input terminal of the first switch circuit 11 of the second-stage sub-driving circuit 14 is lower than the level of the second input terminal of the first switch circuit 11 of the second-stage sub-driving circuit 14, then the first switch circuit 11 of the first-stage sub-driving circuit 13 is turned on, and the first switch circuit 11 of the second-stage sub-driving circuit 14. The first switch circuit 11 of the first-stage sub-driving circuit 13 drives the first semiconductor switch device Q1, and at this time, the resistance value of the driving resistor of the first semiconductor switch device Q1 is the resistance value of the first resistor R1.

[0061] In another embodiment, when the current of the first port is less than the current of the second port, that is, when the first control signal PWM_in1 is at a low level and the second control signal PWM_in2 is at a high level, the level of the first input terminal of the first switch circuit 11 of the first-stage sub-driving circuit 13 is lower than the level of the second input terminal of the first switch circuit 11 of the first-stage sub-driving circuit 13; the level of the first input terminal of the first switch circuit 11 of the second-stage sub-driving circuit 14 is higher than the level of the second input terminal of the first switch circuit 11 of the second-stage sub-driving circuit 14, then the first switch circuit 11 of the first-stage sub-driving circuit 13 is disconnected, and the first switch circuit 11 of the second-stage sub-driving circuit 14 is turned on. The first switch circuit 11 of the second-stage sub-driving circuit 14 drives the second semiconductor switch device Q2, and at this time, the resistance value of the driving resistor of the second semiconductor switch device Q2 is the resistance value of the third resistor R3.

[0062] In summary, the driving circuit 1 provided in the present application controls the resistance value of the driving resistor that drives the semiconductor switching device Q1 based on the size of the current input at the input end while realizing the interlocking function, thereby taking into account the turn-on loss and EMC of the semiconductor switching device Q1, improving the stability of the semiconductor switching device Q1, and improving the reliability and safety of the driving circuit 1.

[0063] The present application also provides a driving device (not shown), which includes the driving circuit 1 as described above, and is used to drive the semiconductor switching device Q1.

[0064] The above description is only an implementation method of the present application, and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly used in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A driving circuit, characterized in that: It includes at least one sub-driving circuit, and the sub-driving circuit is used to drive the corresponding semiconductor switch device, and the sub-driving circuit includes: a first switch circuit, wherein a first input terminal of the first switch circuit receives a control signal, a first output terminal of the first switch circuit is connected to a first terminal of the semiconductor switch device, and a second output terminal of the first switch circuit is connected to a second terminal of the semiconductor switch device; a second switch circuit, wherein a first input terminal of the second switch circuit receives the control signal, a second input terminal of the second switch circuit receives the comparison signal, a first output terminal of the second switch circuit is connected to a first terminal of the semiconductor switch device, and a second output terminal of the second switch circuit is connected to a second terminal of the semiconductor switch device; When the control signal is at a first level and the comparison signal is at a second level, the first switch circuit and the second switch circuit are turned on to drive the semiconductor switch device together through the first switch circuit and the second switch circuit.

2. The driving circuit according to claim 1, characterized in that: When the control signal is at the second level and the comparison signal is at the first level, the first switch circuit is turned on and the second switch circuit is turned off, so that the semiconductor switch device is driven by the first switch circuit.

3. The driving circuit according to claim 2, characterized in that: The first switching circuit includes a first isolation device, a first capacitor and a second capacitor. The first end of the first isolation device receives the control signal, the second end of the first isolation device is grounded, the third end of the first isolation device is connected to the second end of the semiconductor switch device through the first capacitor, and the fourth end of the first isolation device is connected to the second end of the semiconductor switch device through the second capacitor.

4. The driving circuit according to claim 3, characterized in that: The first switch circuit further includes a first resistor, and the fifth end of the first isolation device is connected to the first end of the semiconductor switch device through the first resistor.

5. The driving circuit according to claim 2, characterized in that: The second switch circuit includes a second isolation device, a third capacitor and a fourth capacitor, the first end of the second isolation device receives the control signal, the second end of the second isolation device receives the comparison signal, the third end of the second isolation device is connected to the second end of the semiconductor switch device through the third capacitor, and the fourth end of the second isolation device is connected to the second end of the semiconductor switch device through the fourth capacitor.

6. The driving circuit according to claim 5, characterized in that: The second switch circuit further includes a second resistor and a diode, the fifth end of the second isolation device is connected to the anode of the diode, and the cathode of the diode is connected to the first end of the semiconductor switch device through the second resistor.

7. The driving circuit according to claim 1, characterized in that: The driving circuit comprises a plurality of sub-driving circuits and an interlocking circuit, and the interlocking circuit is respectively connected to the plurality of sub-driving circuits.

8. The driving circuit according to claim 7, characterized in that: The multi-stage sub-driving circuit includes a first-stage sub-driving circuit and a second-stage sub-driving circuit, and the interlocking circuit includes a first port; The first port is connected to the first input end of the first switch circuit of the first-level sub-driving circuit, the first port is connected to the first input end of the second switch circuit of the first-level sub-driving circuit, the first port is connected to the second input end of the first switch circuit of the second-level sub-driving circuit, and the first port is connected to the second input end of the second switch circuit of the second-level sub-driving circuit.

9. The driving circuit according to claim 8, characterized in that: The interlock circuit also includes a switch device and a second port; The second port is connected to the second input terminal of the first switching circuit of the first-level sub-driving circuit, the second port is connected to the second input terminal of the second switching circuit of the first-level sub-driving circuit through the switching device, the second port is connected to the first input terminal of the first switching circuit of the second-level sub-driving circuit, and the second port is connected to the first input terminal of the second switching circuit of the second-level sub-driving circuit through the switching device.

10. A driving device, characterized in that: The driving device comprises a driving circuit as claimed in any one of claims 1 to 9.

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