Bias voltage adaptive control circuit of single-photon detector

Abstract

The utility model provides a bias voltage self-adaptation control circuit of a single photon detector, including controller, bias voltage generation circuit and first bias voltage detection circuit, said bias voltage generation circuit includes DAC1 and bias voltage chip, controller passes through DAC1 and bias voltage chip, bias voltage chip output terminal connects APD, and the first bias voltage detection circuit passes through the first bias voltage detection circuit. The input end of the first bias detection circuit is connected with the bias chip, and the output end is connected with the controller. According to the scheme, the situation that the bias voltage amplitude loaded at the two ends of the APD needs to be limited under the abnormal working temperature condition is considered, the situation that the APD is damaged due to overvoltage under the abnormal condition can be avoided, and therefore the detection efficiency of the detector is improved.

Description

Technical Field

[0001] The present invention relates to the field of detection, and more specifically, to a bias voltage adaptive control circuit for a single-photon detector. Background Art

[0002] A single-photon detector is an ultra-sensitive detector that reaches the limit of weak light detection. It can capture and convert light energy at the level of a single photon. It is widely used in "high-end" scientific and technological fields. It is not only a key component of quantum communication systems, but also a key component of systems in the fields of quantum measurement, lidar, fluorescence lifetime detection, and space exploration.

[0003] Since the near-infrared band is eye-safe, quantum key distribution (QKD) systems generally use near-infrared wavelengths as communication wavelengths, and fields such as quantum lidar also use near-infrared bands as detection wavelengths. Currently, single-photon detectors in the near-infrared band mainly include superconducting detectors, frequency up-conversion detectors, and semiconductor avalanche diode detectors. Superconducting detectors and frequency up-conversion detectors are large in size, high in cost, and not very practical; semiconductor avalanche diode detectors are small in size and low in cost, and are currently the main development direction for practical application.

[0004] Semiconductor avalanche diode detectors mostly use avalanche photodiodes (APDs) to achieve single-photon detection. APDs work in Geiger mode to obtain sufficiently high gain. When a photon is detected, an avalanche current will be generated in the APD and continue spontaneously. Being in an avalanche state for a long time will affect the service life and stability of the APD. Therefore, after triggering an avalanche, the reverse bias voltage of the APD needs to be reduced to below the avalanche breakdown voltage by active or passive means to exit the Geiger mode and quench the avalanche current.

[0005] The detection efficiency stability of the single-photon detector is directly related to the bias voltage loaded at both ends of the APD and the operating temperature of the APD. Specifically, the greater the bias voltage, the higher the detection efficiency, but too high a bias voltage will also cause overcurrent damage to the APD. At the same time, the avalanche breakdown voltage value loaded by the APD is also related to the operating temperature of the APD. The lower the temperature, the lower the avalanche breakdown voltage. Therefore, whether the bias voltage loaded by the APD is appropriate also determines the working reliability and detection efficiency stability of the single-photon detector.

[0006] In the patent "A DC bias circuit system for a single-photon detector of an avalanche diode" with application number CN202222573232.9, it is proposed to use a boost converter and a high-temperature linear voltage regulator in the DC bias circuit, so that the DC bias circuit can generate a more stable bias voltage into the avalanche diode, reduce the bias ripple coefficient and improve the adjustment accuracy.

[0007] Existing single-photon detectors generally have temperature stabilization measures for temperature control. In the patent "A Single-Photon Detector TEC Temperature Control Method and Device" with application number CN202010187242.1, TEC cooling control measures in single-photon detectors are given. The TEC temperature control algorithm is embedded in the main control unit. Without the need for a TEC cooling driver chip, the problems of insufficient voltage or current output of the TEC cooling chip and poor parameter consistency of the TEC cooling hardware platform can be solved.

[0008] The existing single-photon detectors take into account the way the bias is generated and improve the accuracy of the voltage generated by the bias as much as possible, but do not consider the change in the bias value caused by environmental changes in the bias generating circuit, which will eventually change the detection efficiency of the single-photon detector. At the same time, the existing technology also considers the problem of TEC temperature control of the single-photon detector, but the existing bias control measures do not consider the requirement that the bias value needs to change with the APD operating temperature, and do not consider the need to take bias limitation when the APD is attacked by strong light and overcurrent occurs, so as to avoid overcurrent damage to the APD. Utility Model Content

[0009] The technical problem to be solved by the utility model is how to solve the change of the bias value of the bias generating circuit caused by the environmental change, so as to improve the detection efficiency of the detector.

[0010] The utility model solves the above technical problems through the following technical means: a bias voltage adaptive control circuit of a single photon detector includes a controller, a bias generating circuit and a first bias detection circuit, the bias generating circuit includes a DAC1 and a bias chip, the controller is connected to the bias chip through the DAC1, the output end of the bias chip is connected to the APD, the input end of the first bias detection circuit is connected to the bias chip, and the output end is connected to the controller.

[0011] As a further optimized technical solution, the first bias detection circuit includes ADC1, a first low temperature drift amplifier circuit and a first voltage divider circuit. The first voltage divider circuit is arranged between the bias output terminal and the ground. The input terminal of the first low temperature drift amplifier circuit is connected to the first voltage divider circuit, and the output terminal is connected to the controller through ADC1.

[0012] As a further optimized technical solution, the first voltage divider circuit includes voltage divider resistors R1 and R2, and the voltage divider resistors R1 and R2 are arranged in series between the bias output terminal and the ground. The input terminal of the first low temperature drift amplifier circuit is connected to the node between the resistors R1 and R2.

[0013] As a further optimized technical solution, the bias voltage adaptive control circuit of the single photon detector further includes an APD operating temperature detection circuit, and the APD operating temperature detection circuit is connected between the TEC of the APD and the controller.

[0014] As a further optimized technical solution, the APD working temperature detection circuit includes an NTC resistor, a second low temperature drift amplifier circuit, ADC2 and a temperature controller. The NTC resistor is placed on the TEC, and the output end of the NTC resistor is connected to the controller via the second low temperature drift amplifier circuit and ADC2. The controller is connected to the TEC via the temperature controller.

[0015] As a further optimized technical solution, the NTC resistor and the APD are placed close to each other and are both placed on the cold side of the same TEC.

[0016] As a further optimized technical solution, a resistor R3 is connected in series to the output end of the bias chip and a second bias detection circuit is added between the resistor R3 and the controller.

[0017] As a further optimized technical solution, the second bias detection circuit includes ADC3, a third low temperature drift amplifier circuit and a second voltage divider circuit, the input end of the third low temperature drift amplifier circuit is connected to the second voltage divider circuit, and the output end is connected to the controller through ADC3.

[0018] As a further optimized technical solution, the second voltage divider circuit includes voltage divider resistors R4 and R5, which are connected in series between the output end of the bias chip and the ground, and the input end of the third low temperature drift amplifier circuit is connected to the node between the resistors R4 and R5.

[0019] As a further optimized technical solution, the DAC adopts: reference voltage 4.096V, 16 bits; the ADC adopts: reference voltage 4.096V, 16 bits.

[0020] The advantages of the utility model are:

[0021] 1. This solution takes into account the need to limit the bias voltage amplitude loaded on both ends of the APD under abnormal operating temperature conditions, which can avoid overvoltage damage to the APD under abnormal conditions, thereby improving the detection efficiency of the detector;

[0022] 2. This solution uses high-precision DAC and ADC to design the working circuit, making the control more accurate;

[0023] 3. This solution has the ability to maintain bias voltage stability, which can ensure that the bias voltage at both ends of the APD is maintained at the expected level under normal working conditions, thereby maintaining the stability of the single-photon detector detection efficiency;

[0024] 4. This solution has the function of APD working current detection, which can identify strong light attack behavior and protect APD from overcurrent damage;

[0025] 5. In the circuit design of this scheme, conventional electronic devices (op amp, NTC resistor, ADC, DAC, etc.) are selected. The devices are highly available, the circuit structure is simple, the process is simple, and the hardware is easy to implement;

[0026] 6. This scheme is easy to implement in engineering and is applicable to single-photon detectors of various material types, which improves the working safety of single-photon detectors without reducing the performance of single-photon detectors;

[0027] 7. This solution is applicable to single-photon detectors operating in free-running mode and gated mode. For single-photon detectors operating in gated mode, the minimum amplitude requirement of the loaded reverse bias is taken into consideration. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 It is a principle block diagram of a single photon detector with bias voltage self-adaptation capability in an embodiment of the utility model;

[0029] Figure 2 This is a flowchart of the APD bias voltage self-adaptation process in the embodiment of the utility model;

[0030] Figure 3 It is a principle block diagram of a single-photon detector capable of detecting strong light blinding attacks in an embodiment of the utility model;

[0031] Figure 4 It is a flowchart of the strong light attack detection process in the embodiment of the utility model. DETAILED DESCRIPTION

[0032] In order to make the purpose, technical solution and advantages of the embodiments of the utility model clearer, the technical solution in the embodiments of the utility model will be clearly and completely described below in combination with the embodiments of the utility model. Obviously, the described embodiments are part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0033] The ordinal numbers used in the specification and claims, such as "first", "second", "third", etc., to modify the corresponding elements, do not themselves mean that the elements have any ordinal numbers, nor do they represent the order of one element and another element, or the order in the manufacturing method. The use of these ordinal numbers is only used to clearly distinguish a component with a certain name from another component with the same name.

[0034] Embodiment 1

[0035] See also Figure 1 The bias voltage adaptive control circuit of the single photon detector in the embodiment of the utility model includes a controller, a bias voltage generating circuit and a bias voltage detecting circuit.

[0036] Bias voltage generation circuit: includes high-precision DAC1 (reference voltage 4.096V, 16bit) and bias chip. The controller sets the bias voltage control value through DAC1, and after amplification by the bias chip (e.g. SGM41285A), the bias voltage is output to the APD at point A. The bias voltage amplitude range of the bias chip is 10V-70V, and the step value is less than 10mV. When the bias chip uses external voltage control, the maximum control voltage is 1.2V. When the external input exceeds 1.2V, the bias chip will force the use of the internal 1.2V reference voltage to protect the bias output maximum value of 70V.

[0037] The bias detection circuit includes a high-precision ADC1 (the reference voltage is 4.096V, 16bit), a first low-temperature drift amplifier circuit, and voltage-dividing resistors R1 and R2. The voltage-dividing resistors R1 and R2 are added between the bias output terminal A and the ground. The node between the resistors R1 and R2 is used as the sampling point B. The output bias voltage (10V-70V) of the bias chip is sampled by resistor voltage division. As a specific embodiment, the resistance value of the voltage-dividing resistor R1 is selected as 590KΩ, the resistance value of the voltage-dividing resistor R2 is selected as 10KΩ, and the DC voltage range of the sampling point B is about 0.2V to 1.2V. The voltage of the sampling point is amplified by the first low-temperature drift amplifier circuit and then enters the ADC1 for digital sampling. The sampled voltage value is read in real time by the controller.

[0038] As described above, when the working environment of the bias generating circuit changes, the voltage at the sampling point B changes, and the change is transmitted to the controller through the first low temperature drift amplifier circuit and ADC1. The controller senses the bias change according to the voltage value sampled in real time by ADC1, and uses the PID algorithm to adjust the output of DAC1, thereby controlling the output bias of the bias chip to remain stable.

[0039] Embodiment 2

[0040] On the basis of Example 1, the single-photon detector with bias voltage adaptive capability of the utility model also includes an APD operating temperature detection circuit, which includes an NTC resistor (Negative Temperature Coefficient thermistor), a second low temperature drift amplifier circuit, a high-precision ADC2 (the reference voltage is 4.096V, 16bit) and a temperature controller.

[0041] The NTC resistor is placed close to the APD, both on the cold side of the same TEC, and can feed back the temperature of the APD to the controller in real time. The temperature detection output terminal C of the NTC resistor is amplified by the second low temperature drift amplifier circuit and then enters ADC2 for digital sampling. The controller reads the sampled data in real time and adjusts the APD operating temperature through the temperature controller.

[0042] Bias voltage adaptive strategy: The NTC resistor provides real-time feedback on the temperature of the APD. The controller automatically adjusts the output bias voltage of the DAC1 control bias chip based on the relationship between the pre-calibrated target bias voltage and the APD operating temperature to ensure that the appropriate bias voltage is loaded at both ends of the APD.

[0043] The specific strategies are as follows:

[0044] 1) The controller controls the cooling of the TEC through the temperature controller. When the APD operating temperature detection circuit identifies that the APD operating temperature does not reach the target cooling temperature range (for example, within ±10°C of the target cooling temperature), the controller loads a default bias voltage (for example, 40V, which can be set);

[0045] 2) When the APD operating temperature detection circuit identifies that the APD operating temperature reaches the target cooling temperature range (for example, the target cooling temperature is within ±10°C, which can be set), the controller loads the target bias. The correlation between the target bias and the APD operating temperature can be realized by discretizing the self-calibrated lookup table, or by fitting the functional relationship after calibrating the temperature coefficient of the APD. This solution adopts the following functional relationship between the target bias and temperature:

[0046] y=p+(t1-t)*γ

[0047] In the formula, the meanings of the variables are as follows: y is the target bias voltage, in V; p is the calibrated bias voltage, in V, that is, the bias value calibrated at the target cooling temperature; t1 is the current TEC cooling temperature value, in °C; t is the TEC target cooling temperature value, in °C; γ is the calibrated APD avalanche breakdown voltage temperature coefficient, in V / °C;

[0048] 3) When the APD operating temperature detection circuit recognizes that the APD operating temperature has reached the target cooling temperature (e.g. -40°C), the controller loads the calibrated bias voltage p and starts the bias voltage stabilization function. When the device is started, the internal temperature will rise or when the device is in a temperature change environment, the working environment of the bias voltage generation circuit will change. At this time, ADC1 in the bias voltage detection circuit senses the bias voltage change in real time, and the controller uses the PID algorithm to adjust the output of DAC1, which can output the bias voltage to the target value in a shorter time, thereby controlling the output bias voltage of the bias chip to remain stable.

[0049] See also Figure 2,The main workflow of bias adaptation is as follows:

[0050] Step S1, single photon detector is turned on;

[0051] Step S2: The controller sends a default bias voltage to the bias voltage generating circuit, so that the APD operates in a low-sensitivity linear mode;

[0052] Step S3, the APD operating temperature detection circuit collects the APD operating temperature;

[0053] Step S4: When it is detected that the APD operating temperature enters the target range, proceed to step S5, otherwise return to step S2;

[0054] Step S5: the controller sends the target bias voltage to the bias voltage generating circuit;

[0055] Step S6: When it is detected that the APD operating temperature reaches the target cooling temperature, proceed to step S7, otherwise return to step S3;

[0056] Step S7: The controller sends a calibrated bias voltage to the bias voltage generating circuit, and the bias voltage detecting circuit collects an actual bias voltage value;

[0057] Step S8: Maintain the bias voltage and enter the normal detection state.

[0058] Embodiment 3

[0059] See also Figure 3 As shown, based on the first or second embodiment, this embodiment connects a resistor R3 (1 kΩ) in series to the APD bias output channel and adds a bias detection circuit. The original bias detection circuit is defined as the first bias detection circuit, and the added bias detection circuit is defined as the second bias detection circuit. The resistor R3 is arranged between the APD bias output channel and the connection point of the first bias detection circuit and the connection point of the second bias detection circuit.

[0060] The second bias detection circuit includes a high-precision ADC3 (the reference voltage is 4.096V, 16bit), a third low-temperature drift amplifier circuit, and voltage-dividing resistors R4 and R5. The bias chip output bias voltage through the resistor R3 is sampled by resistor voltage division. As a specific embodiment, the resistance value of the voltage-dividing resistor R4 is selected as 590KΩ, the resistance value of the voltage-dividing resistor R5 is selected as 10KΩ, and the DC voltage range of the sampling point between the voltage-dividing resistors R4 and R5 is approximately 0.2V to 1.2V. The voltage of the sampling point is amplified by the third low-temperature drift amplifier circuit and then enters ADC3 for digital sampling, and the sampled voltage value is read in real time by the controller.

[0061] Furthermore, an APD working current detection circuit is formed to detect the strong light injection behavior and to resist the strong light blinding attack on the detection end. The specific scheme is as follows:

[0062] When the device is powered on and the detector is loaded with a suitable bias voltage, it enters a normal working state. When a strong light signal is injected, the APD generates a photocurrent, the current flowing through the resistor R3 increases, and the voltage drop across the resistor R3 increases, and the difference between the ADC1 and ADC3 sampling increases. The controller determines the APD operating current size based on the difference between the ADC1 and ADC3 sampling results and identifies whether there is an overcurrent behavior. When the difference exceeds the preset threshold, a strong light attack alarm message is issued.

[0063] When an abnormal current appears on the resistor R3, the controller controls the alarm and reduces the bias voltage through the bias generating circuit, so that the voltage loaded on both ends of the APD is lower than the avalanche breakdown voltage (settable), and the APD enters the linear mode to avoid overcurrent damage.

[0064] The main workflow of strong light blinding attack detection is as follows:

[0065] Step S10: At the initial moment, the detector is in a normal working state, and the controller reads the sampling values ​​of ADC1 and ADC3;

[0066] Step S20: The controller calculates the difference between the sampling results of ADC1 and ADC3. When the difference exceeds a preset threshold, the controller generates a strong light attack alarm.

[0067] Step S30: The controller reduces the current bias value (for example, reduces the current bias value by 20V) and then sends it down, so that the APD enters the linear mode, thereby reducing the detection sensitivity of the APD to avoid overcurrent damage to the APD.

[0068] It should be noted in the above three embodiments that for the gated detector, the influence of the amplitude of the sinusoidal gated signal needs to be considered. The sinusoidal gated signal is sent after the bias signal takes effect. At the same time, the minimum bias amplitude must be greater than the maximum sinusoidal gated signal amplitude. This ensures that the APD is in a reverse bias state under any "bias-gating" combination conditions and will not be forward-biased.

[0069] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A bias voltage adaptive control circuit for a single photon detector, characterized in that: It includes a controller, a bias generating circuit and a first bias detecting circuit. The bias generating circuit includes a DAC1 and a bias chip. The controller is connected to the bias chip through the DAC1. The output end of the bias chip is connected to the APD. The input end of the first bias detecting circuit is connected to the bias chip, and the output end is connected to the controller.

2. The bias voltage adaptive control circuit of a single photon detector according to claim 1, characterized in that: The first bias detection circuit includes ADC1, a first low temperature drift amplifier circuit and a first voltage divider circuit. The first voltage divider circuit is arranged between the bias output terminal and the ground. The input terminal of the first low temperature drift amplifier circuit is connected to the first voltage divider circuit, and the output terminal is connected to the controller through ADC1.

3. The bias voltage adaptive control circuit of the single photon detector according to claim 2, characterized in that: The first voltage divider circuit includes voltage divider resistors R1 and R2, which are connected in series between the bias output terminal and the ground. The input terminal of the first low temperature drift amplifier circuit is connected to the node between the resistors R1 and R2.

4. The bias voltage adaptive control circuit of a single photon detector as claimed in claim 1, characterized in that: The invention also comprises an APD working temperature detection circuit, which is connected between the TEC of the APD and the controller.

5. The bias voltage adaptive control circuit of the single photon detector according to claim 4, characterized in that: The APD working temperature detection circuit includes an NTC resistor, a second low temperature drift amplifier circuit, ADC2 and a temperature controller. The NTC resistor is placed on the TEC, and the output end of the NTC resistor is connected to the controller via the second low temperature drift amplifier circuit and ADC2. The controller is connected to the TEC via the temperature controller.

6. The bias voltage adaptive control circuit of the single photon detector according to claim 5, characterized in that: The NTC resistor and APD are placed close to each other and are both placed on the cold side of the same TEC.

7. The bias voltage adaptive control circuit of a single photon detector as claimed in claim 2, characterized in that: A resistor R3 is connected in series to the output end of the bias chip, and a second bias detection circuit is added between the resistor R3 and the controller.

8. The bias voltage adaptive control circuit of the single photon detector according to claim 7, characterized in that: The second bias detection circuit includes ADC3, a third low temperature drift amplifier circuit and a second voltage divider circuit. The input end of the third low temperature drift amplifier circuit is connected to the second voltage divider circuit, and the output end is connected to the controller through ADC3.

9. The bias voltage adaptive control circuit of a single photon detector as claimed in claim 8, characterized in that: The second voltage divider circuit includes voltage divider resistors R4 and R5, which are connected in series between the output terminal of the bias chip and the ground. The input terminal of the third low temperature drift amplifier circuit is connected to the node between the resistors R4 and R5.

10. The bias voltage adaptive control circuit of a single photon detector according to any one of claims 2 to 9, characterized in that: The DAC uses: reference voltage 4.096V, 16bit; the ADC uses: reference voltage 4.096V, 16bit.

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