LED chip structure
By using the patterned first transparent conductive layer and the third transparent conductive layer deposited by electron beam evaporation in the LED chip structure, the interdigital electrode and dual current expansion layer structure are formed, and the problems of LED chip current expansion and light occlusion are solved. Achieve higher luminous efficiency.
Patent Information
- Application Number
- CN202420255372.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-02-02
- Publication Date
- 2025-02-07
- Estimated Expiration
- 2034-02-02
AI Technical Summary
In the LED chip structure, as the chip size increases, the traditional ITO transparent conductive layer cannot effectively expand the large area of current, resulting in uneven current distribution. At the same time, the increased electrode fingers will block the luminous area of the LED chip and limit the chip brightness.
Using a patterned first transparent conductive layer, indium tin oxide bumps are formed by wet etching to form a plurality of transparent interdigital electrodes, instead of the conventional electrode fingers, and depositing the third transparent conductive layer by electron beam evaporation to particles Grows on the surface of the second transparent conductive layer in a shape, forming a dual current expansion layer structure.
It improves the current expansion capability of the LED chip, solves the problems of uneven current distribution and luminous occlusion, reduces the chance of total reflection, and improves the luminous efficiency of the LED chip.
Smart Images
Figure CN222442211U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the field of semiconductors, and in particular to an LED chip structure. Background Art
[0002] As a solid-state active light source, LED has the advantages of energy saving and environmental protection, high efficiency, long life, high brightness, high color purity, low energy consumption, and fast response time. It can usually achieve higher durability, more compact size and higher design flexibility, and is widely used in lighting, display, backlight, automotive and other fields.
[0003] At present, in the field of LED chip structure technology, direct electrical contact between the P-type semiconductor layer and the P-type ohmic metal electrode will cause high contact resistance and low transmittance between the two, resulting in increased operating voltage of the LED chip, energy loss, and reduced reliability. Therefore, a transparent conductive layer is generally provided on the P-type semiconductor layer to form an electrical connection between the P-type semiconductor layer and the P-type ohmic metal electrode. However, as the size of the LED chip increases, the expansion capacity of ITO (indium tin oxide) is limited, and large-area and long-distance current expansion cannot be achieved. Therefore, electrode fingers are designed on the surface of larger-sized core particles to further increase the uniformity of current expansion.
[0004] However, the increase in electrode fingers can alleviate the current crowding effect, but it brings the problem of blocking the light-emitting area of the LED chip. From the perspective of current expansion, the more electrodes are expanded, the more uniform the current distribution is. However, since the electrode fingers are usually made of opaque metal, the corresponding blocking of the light emission of the LED chip will be more serious, limiting the brightness of the chip. Utility Model Content
[0005] Based on this, the purpose of the utility model is to provide an LED chip structure, aiming to solve the problem that the increase in the number of electrode fingers currently leads to a higher degree of obstruction of the light emission of the LED chip.
[0006] To achieve the above object, the utility model is implemented through the following technical solutions: an LED chip structure, including a substrate and an epitaxial layer deposited on the substrate;
[0007] The epitaxial layer includes a GaN layer, an N-type electrode, a transparent conductive stack and a P-type electrode sequentially deposited on the substrate, the transparent conductive stack includes a first transparent conductive layer deposited by sputtering, a second transparent conductive layer deposited by sputtering and stacked on the first transparent conductive layer, and a third transparent conductive layer deposited on the second transparent conductive layer by electron beam evaporation;
[0008] The first transparent conductive layer is formed into a plurality of patterned indium tin oxide bumps by wet etching, the second transparent conductive layer is used to form an indium tin oxide layer, and the third transparent conductive layer is grown in a granular form on the surface of the second transparent conductive layer.
[0009] In summary, according to the LED chip structure proposed by the utility model, through the guidance of the graphical first transparent conductive layer, it is equivalent to adding multiple transparent interdigital electrodes to the existing LED chip, replacing the traditional electrode fingers, so that the current expansion capacity is greatly improved while solving the problem of blocking the light emission of the LED chip. The first transparent conductive layer and the second transparent conductive layer are concave and convex, forming a double current expansion layer structure. Since the concave and convex surface can increase the side light emission of the transparent conductive layer structure and reduce the probability of total reflection, the reflection and absorption inside the LED chip are reduced, and the luminous efficiency is improved. The third transparent conductive layer is deposited on the surface of the second transparent conductive layer in a granular form by electron beam evaporation to enhance the luminous efficiency. The thickness is relatively thin and plays a coarsening role. The purpose is also to reduce total reflection, thereby achieving the purpose of improving the luminous efficiency. By stacking the first transparent conductive layer, the second transparent conductive layer and the third transparent conductive layer on the GaN layer in sequence, while improving the current expansion capacity, the problem of blocking the light emission of the LED chip is solved, the probability of total reflection is reduced, and the luminous efficiency of the LED chip is improved.
[0010] Furthermore, the indium tin oxide bumps are arranged in an array, and the thickness range is
[0011] Furthermore, the thickness of the second transparent conductive layer is in the range of
[0012] Furthermore, the thickness of the third transparent conductive layer is in the range of
[0013] Further, the transparent conductive layer includes one or a combination of indium tin oxide layer, zinc oxide layer, zinc indium tin oxide layer, indium zinc oxide layer, zinc tin oxide layer, gallium indium tin oxide layer, gallium indium oxide layer, gallium zinc oxide layer, aluminum-doped zinc oxide layer or fluorine-doped tin oxide layer.
[0014] Furthermore, the GaN layer includes an N-type GaN layer, a MQW layer, and a P-type GaN layer sequentially grown on the surface of the substrate, and the P-type GaN layer is disposed between the MQW layer and the first transparent conductive layer.
[0015] Furthermore, the N-type GaN etching depth is 1um-1.5um.
[0016] Furthermore, the P-type electrode is formed at a through hole of the third transparent conductive layer on the surface of the P-type GaN, and the N-type electrode is arranged on the surface of the N-type GaN.
[0017] Furthermore, the P-type electrode and the N-type electrode are both multi-layer metal stacked structures, including any combination of two or more of Cr, Al, Ti, Ni, Pt, Au, and Cu.
[0018] Furthermore, the thickness of the P-type electrode and the N-type electrode are both 1um-3um.
[0019] Additional aspects and advantages of the present invention will be given in part in the following description, and in part will become apparent from the following description, or will be learned through the practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] The above and / or additional aspects and advantages of the present invention will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:
[0021] Figure 1 This is a cross-sectional view of the LED chip structure in one embodiment of the utility model;
[0022] Figure 2 It is a top view of the LED chip structure in one embodiment of the utility model.
[0023] Component symbol description:
[0024] Substrate 100 , GaN layer 200 , N-type GaN layer 210 , MQW layer 220 , P-type GaN layer 230 , transparent conductive stack 300 , first transparent conductive layer 310 , second transparent conductive layer 320 , third transparent conductive layer 330 , P-type electrode 400 , N-type electrode 500 , passivation layer 600 . DETAILED DESCRIPTION
[0025] In order to make the purpose, features and advantages of the utility model more obvious and easy to understand, the specific implementation methods of the utility model are described in detail below in conjunction with the accompanying drawings. Several embodiments of the utility model are given in the accompanying drawings. However, the utility model can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the utility model more thorough and comprehensive.
[0026] It should be noted that when an element is referred to as being "fixed on" another element, it may be directly on the other element or there may also be a central element. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. The terms "vertical", "horizontal", "left", "right", "upper", "lower" and similar expressions used herein are for illustrative purposes only and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present utility model.
[0027] In the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be internal communication between two components. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to the specific circumstances. The term "and / or" used herein includes any and all combinations of one or more related listed items.
[0028] See also Figure 1-Figure 2 , which is a schematic diagram of an LED chip structure provided in an embodiment of the present utility model, includes a substrate 100 and an epitaxial layer structure grown on the substrate 100, wherein:
[0029] In the current field of LED chip structure technology, direct electrical contact between the P-type semiconductor layer and the P-type ohmic metal electrode will cause high contact resistance and low transmittance between the two, thereby increasing the operating voltage of the LED chip, resulting in energy loss and reduced reliability. In order to avoid the above problems, an epitaxial structure is grown on the substrate 100. The epitaxial structure includes a GaN layer 200 disposed on the surface of the substrate 100, an N-type electrode 500 and a transparent conductive stack 300 disposed on the side of the GaN layer 200 away from the substrate 100, and a P-type electrode 400 disposed on the transparent conductive stack 300.
[0030] In this embodiment, the GaN layer 200 includes an N-type GaN layer 210200, an MQW layer 220, and a P-type GaN layer 230200 sequentially grown on the surface of the substrate 100, and the P-type GaN layer 230200 is disposed between the MQW layer 220 and the first transparent conductive layer 310. The epitaxial layer structure is exposed by ICP dry etching, and the etching depth is 1um-1.5um, so as to grow the MQW layer 220 (multi-quantum well layer) on the N-type GaN layer 210200, so as to limit the movement of electrons and holes in three-dimensional space, so that the carriers move in the plane of quantum confinement, increase the charge binding effect, thereby improving the luminous efficiency of the excitons, and further improving the luminous efficiency of the LED chip.
[0031] In order to improve the uniformity of current expansion and avoid blocking the light-emitting area of the LED chip, a transparent conductive stack 300 is grown on the surface of the P-type GaN layer 230200. The transparent conductive stack 300 includes a first transparent conductive layer 310 deposited by sputtering, a second transparent conductive layer 320 deposited by sputtering and stacked on the first transparent conductive layer 310, and a third transparent conductive layer 330 deposited on the second transparent conductive layer 320 by electron beam evaporation. The first transparent conductive layer 310 forms a number of patterned ITO (indium tin oxide) bumps on the surface of the P-type GaN layer 230200 by wet etching, and they are arranged in an array, which is equivalent to adding a plurality of transparent interdigital electrodes to the existing LED chip, replacing the traditional electrode fingers. And because the interdigital electrodes are made of transparent material, compared with the electrode fingers made of opaque metal, they avoid blocking the light-emitting area of the LED, and also have the effect of increasing the uniformity of current expansion, greatly improving the light-emitting efficiency of the LED. The first transparent conductive layer 310 in this embodiment is a material with high transparency, high conductivity and low contact resistance, and is prepared by sputtering process with a thickness in the range of
[0032] Further, a second transparent conductive layer is deposited on the surface of the first transparent conductive layer 310 by sputtering to form a whole surface of ITO, which is also prepared by sputtering process, and is consistent with the process of the first transparent conductive layer 310, and its thickness ranges from
[0033] Furthermore, a third transparent conductive layer 330 with a relatively thin thickness is deposited on the surface of the second transparent conductive layer 320 by electron beam evaporation deposition process, and the thickness range is The particles are distributed on the surface of the second transparent conductive layer 320 to enhance the luminous efficiency. Since the electron beam evaporation process produces a rough film, it can reduce total reflection and play a coarsening role. When depositing the third transparent conductive layer 330, the above method is used to improve the luminous efficiency.
[0034] In the process of forming the first transparent conductive layer 310, the second transparent conductive layer 320 and the third transparent conductive layer 330, the transparent conductive layer includes one or a combination of indium tin oxide layer, zinc oxide layer, zinc indium tin oxide layer, indium zinc oxide layer, zinc tin oxide layer, gallium indium tin oxide layer, gallium indium oxide layer, gallium zinc oxide layer, aluminum-doped zinc oxide layer or fluorine-doped tin oxide layer to achieve the purpose of light transmission and avoid blocking the light-emitting area of the LED chip.
[0035] It is worth noting that through holes are formed on both the N-type GaN layer 210200 and the P-type GaN layer 230200 by a wet etching process, so that the P-type electrode 400 is connected to the P-type GaN layer 230200, and an N-type electrode 500 is prepared on the surface of the N-type GaN and connected to the N-type GaN. A PV passivation layer 600 is made, and a through hole of the passivation layer 600 is formed above the P-type electrode 400 and the N-type electrode 500, and then it is thinned and split to separate it into independent LED chips. Among them, the passivation layer 600 is a protective layer, which prevents the surface of the chip from being corroded by oxygen in the air, and also plays an anti-corrosion role, increases the stability of the electrode structure, and prolongs the service life of the chip. It should be emphasized that the passivation layer 600 forms a through hole on the passivation layer 600 above the P-type electrode 400 and the N-type electrode 500 through a photolithography process and a corrosion process / etching process. In this embodiment, the passivation layer 600 is prepared by PECVD deposition at a deposition temperature of 230-250° C. The annular insulating layer material includes one or a combination of silicon dioxide, silicon nitride, and aluminum oxide. The thickness of the annular insulating layer is 1.0-3.0 um, and the height of the annular insulating layer is the same as or slightly higher than the height of the contact electrode.
[0036] In this embodiment, the P-type electrode 400 and the N-type electrode 500 are prepared by electron beam evaporation. More specifically, the electrodes can be made by evaporation technology. Both are multi-layer structures composed of multiple layers of metal stacked together, including any combination of two or more of Cr, Al, Ti, Ni, Pt, Au, and Cu, and the thickness of the P-type electrode 400 and the N-type electrode 500 is 1um-3um.
[0037] In summary, according to the LED chip structure proposed by the utility model, through the guidance of the graphical first transparent conductive layer, it is equivalent to adding multiple transparent interdigital electrodes to the existing LED chip, replacing the traditional electrode fingers, so that the current expansion capacity is greatly improved while solving the problem of blocking the light emission of the LED chip. The first transparent conductive layer and the second transparent conductive layer are concave and convex, forming a double current expansion layer structure. Since the concave and convex surface can increase the side light emission of the transparent conductive layer structure and reduce the probability of total reflection, the reflection and absorption inside the LED chip are reduced, and the luminous efficiency is improved. The third transparent conductive layer is deposited on the surface of the second transparent conductive layer in a granular form by electron beam evaporation to enhance the luminous efficiency. The thickness is relatively thin and plays a coarsening role. The purpose is also to reduce total reflection, thereby achieving the purpose of improving the luminous efficiency. By stacking the first transparent conductive layer, the second transparent conductive layer and the third transparent conductive layer on the GaN layer in sequence, while improving the current expansion capacity, the problem of blocking the light emission of the LED chip is solved, the probability of total reflection is reduced, and the luminous efficiency of the LED chip is improved.
[0038] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the utility model. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.
[0039] The above-mentioned embodiments only express several implementation methods of the utility model, and the descriptions are relatively specific and detailed, but they cannot be understood as limiting the scope of the utility model patent. It should be pointed out that for ordinary technicians in this field, several modifications and improvements can be made without departing from the concept of the utility model, which all belong to the protection scope of the utility model. Therefore, the protection scope of the utility model patent shall be based on the attached claims.
Claims
1. An LED chip structure, characterized in that: comprising a substrate and an epitaxial layer deposited on the substrate; The epitaxial layer includes a GaN layer, an N-type electrode, a transparent conductive stack and a P-type electrode sequentially deposited on the substrate, the transparent conductive stack includes a first transparent conductive layer deposited by sputtering, a second transparent conductive layer deposited by sputtering and stacked on the first transparent conductive layer, and a third transparent conductive layer deposited on the second transparent conductive layer by electron beam evaporation; The first transparent conductive layer is formed into a plurality of patterned indium tin oxide bumps by wet etching, the second transparent conductive layer is used to form an indium tin oxide layer, and the third transparent conductive layer is grown in a granular form on the surface of the second transparent conductive layer.
2. The LED chip structure according to claim 1, characterized in that: The indium tin oxide bumps are arranged in an array, and the thickness range is 3. The LED chip structure according to claim 1, characterized in that: The thickness of the second transparent conductive layer is in the range of 4. The LED chip structure according to claim 1, characterized in that: The thickness range of the third transparent conductive layer is 5. The LED chip structure according to claim 1, characterized in that: The transparent conductive layer includes one or a combination of indium tin oxide layer, zinc oxide layer, zinc indium tin oxide layer, indium zinc oxide layer, zinc tin oxide layer, gallium indium tin oxide layer, gallium indium oxide layer, gallium zinc oxide layer, aluminum-doped zinc oxide layer or fluorine-doped tin oxide layer.
6. The LED chip structure according to claim 1, characterized in that: The GaN layer includes an N-type GaN layer, an MQW layer, and a P-type GaN layer sequentially grown on the surface of the substrate, and the P-type GaN layer is arranged between the MQW layer and the first transparent conductive layer.
7. The LED chip structure according to claim 6, characterized in that: The N-type GaN etching depth is 1um-1.5um.
8. The LED chip structure according to claim 7, characterized in that: The P-type electrode is formed at the through hole of the third transparent conductive layer on the surface of the P-type GaN, and the N-type electrode is arranged on the surface of the N-type GaN.
9. The LED chip structure according to claim 1, characterized in that: The P-type electrode and the N-type electrode are both multi-layer metal stacked structures, including any combination of two or more of Cr, Al, Ti, Ni, Pt, Au, and Cu.
10. The LED chip structure according to claim 9, characterized in that: The thickness of the P-type electrode and the N-type electrode are both 1um-3um.