Bonding packaging impedance matching device of superconducting quantum chip and quantum processor
By setting pad to ground capacitance in superconducting quantum chips and PCB boards to form a C-L-C structure, the reflection problem caused by the inductive impedance of bonded lines is solved, and better signal transmission and bit reading performance is achieved.
Patent Information
- Application Number
- CN202411521411.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-29
- Publication Date
- 2025-02-18
- Estimated Expiration
- 2044-10-29
AI Technical Summary
In superconducting quantum computing, the inductive impedance of the bonding wire causes reflection problems at the chip package, affecting the transmission of signals and the reading of superconducting qubits.
By setting pad to ground capacitors in the chip and PCB board, a C-L-C structure is formed, and the bonding line forms a low-pass filter as an inductor and a capacitor to reduce the reflectance.
It effectively solves the reflection problem at the chip package, reduces the fluctuation and signal distortion of the reading cavity, improves the reading performance of superconducting qubits, and saves space on the chip and PCB board.
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Figure CN119485901A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of superconducting quantum technology, and in particular to a bonding package impedance matching device for a superconducting quantum chip and a quantum processor. Background Art
[0002] In superconducting quantum computing, in order to achieve fan-in and fan-out of signals, 1-2mm long and 25 micron diameter aluminum bonding wires are usually used to transmit signals from printed circuit board (PCB) / chip to chip / PCB.
[0003] However, since the binding wire itself has an inductance of 1nH / mm, it will cause intra-chip reflection of about -10dB, thereby affecting the performance of the entire microwave system.
[0004] For the read control line: the impedance mismatch at the package will form a standing wave on the chip, resulting in different load impedances of the read cavities at different positions looking outward, which in turn causes the energy dissipation rate (kappa) of the read cavity to deviate from the designed value, resulting in large fluctuations and affecting the reading of superconducting quantum bits in the experiment.
[0005] For XYZ control lines: reflections at the package will cause amplitude and phase distortion of the bit control pulse, affecting the fidelity of the bit gate.
[0006] Therefore, the larger inductive impedance of the binding wire is the fundamental reason for the impedance matching at the package. How to solve this fundamental reason is the main research direction for solving impedance matching, and it is also a difficult problem to solve. Summary of the invention
[0007] Based on the technical problems existing in the background technology, the present invention proposes a bonding package impedance matching device and a quantum processor for a superconducting quantum chip, which solves the reflection problem at the chip packaging; at the same time, there is no need to introduce external chip capacitors and additional matching lines, thereby greatly saving chip and PCB board space.
[0008] The present invention provides a bonding package impedance matching device for a superconducting quantum chip, comprising a PCB board, a bonding wire and a chip, wherein pad-to-ground capacitance is provided in both the PCB board and the chip; The transmission line of the PCB board is connected to the transmission line of the chip through a bonding wire. The bonding wire acts as an inductor and forms a low-pass filter with the capacitance of the two pads to the ground to reduce the reflectivity at the bonding wire.
[0009] Furthermore, the capacitances of the two pads to ground are independently set, and the capacitances are adjusted by changing the shapes of the pads.
[0010] Further, when the bonding wire has 1 nH / mm as an inductor, the transmission line of the chip has 50 ohm impedance, and the transmission line of the PCB board has 50 ohm impedance, the capacitance of the two pads to ground is set to 0.1 pF to 0.3 pF.
[0011] A quantum processor comprises the bonding package impedance matching device of the superconducting quantum chip as described above.
[0012] The advantages of the bonded package impedance matching device and quantum processor of a superconducting quantum chip provided by the present invention are as follows: the bonded package impedance matching device and quantum processor of a superconducting quantum chip provided in the structure of the present invention fundamentally solve the reflection problem at the chip package by adjusting the pad-to-ground capacitance in the design; at the same time, there is no need to introduce external chip capacitors and add additional matching lines, thereby greatly saving chip and PCB board space; the design is flexible, and the pad shape can be flexibly changed according to changes in demand; the result is robust and is insensitive to fluctuations in binding line parameters within a range of 3 times the standard deviation. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] Figure 1 It is a structural schematic diagram of the present invention; Figure 2 Schematic diagram of the CLC structure for superconducting quantum package impedance matching; Figure 3 ADS lumped element modeling schematic to verify the impedance matching effect of the CLC structure; Figure 4 for Figure 3 Schematic diagram of simulation results corresponding to ADS lumped element modeling; Figure 5 This is a schematic diagram of the chip pad-to-ground capacitance and the ground distance; Figure 6 To fix the gap in the center of the PCB board, the corresponding simulation curve graph after adjusting the gap in the center of the chip; Among them, 1- chip, 2- bonding wire, 3- PCB board, 4- chip pad to ground capacitance, 5- PCB pad to ground capacitance. DETAILED DESCRIPTION
[0014] Below, the technical solution of the present invention is described in detail through specific embodiments. Many specific details are set forth in the following description to facilitate a full understanding of the present invention. However, the present invention can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present invention. Therefore, the present invention is not limited to the specific implementation disclosed below.
[0015] like Figures 1 to 6As shown, the present invention proposes a superconducting quantum chip bonding package impedance matching device and quantum processor, including a chip 1, a bonding wire 2 and a PCB board 3, wherein pad-to-ground capacitors are respectively arranged in the chip 1 and the PCB board 3, and the pads of the chip 1 are connected to the pads of the PCB board 3 through the bonding wire 2, and the bonding wire 2 acts as an inductor and forms a low-pass filter with two pad-to-ground capacitors (CLC structure) to reduce the reflectivity caused by the bonding wire 2. Among them, the pad-to-ground capacitor is specifically a chip pad-to-ground capacitor 4 and a PCB pad-to-ground capacitor 5, that is, the chip pad-to-ground capacitor 4, the bonding wire 2, and the PCB pad-to-ground capacitor 5 form a CLC structure, as shown in FIG. Figure 2 shown.
[0016] like Figure 4 As shown, the mainstream packaging method in the current superconducting quantum computing field is to use two or more bonding wires to connect the transmission line of the chip with 50 ohm impedance to the transmission line of the PCB board. The large inductive impedance of the bonding wire is the fundamental reason for the impedance matching at the packaging. Therefore, this embodiment achieves impedance matching of the bonding wire 2 and the chip 1 and the PCB board 3 by setting the pad-to-ground capacitance, reducing the reflectivity at the bonding point, reducing the fluctuation of the reading cavity and reducing the impact of signal distortion, thereby ensuring the reading of superconducting quantum bits.
[0017] like Figure 2 As shown, in the lumped circuit, by setting appropriate capacitance C and inductance L, a low-pass filter with a low reflection coefficient S11 can be obtained, as shown in Figure 3 As shown. Inspired by this, Figure 2 and 3 , using the bonding wire 2 as an inductor, the appropriate pad-to-ground capacitance (4 and 5) of the chip 1 and the PCB board 3 in the superconducting quantum processor can be set according to different values of the bonding inductor to achieve an effect similar to a low-pass filter at 6-8GHz, thereby reducing the reflectivity.
[0018] Taking into account the microwave parasitic effects at high frequencies of 6-8 GHz, the pad-to-ground capacitance of the superconducting quantum computing chip 1 is increased from nearly 0 f F to more than tens of f F. At the same time, an automatic bonding machine is used to determine the morphological parameters of the bonding wire 2. The pad shape and pad-to-ground capacitance of the chip 1 and the PCB board 3 are optimized and determined through HFSS simulation software, so that the on-chip reflectivity is reduced to -20 dB or lower.
[0019] Explore the effect of changing the chip pad to ground capacitance 4 on 4-8GHz microwave impedance matching: The non-line part is defined as the ground, e.g. Figure 5 As shown, when the bonding wire 2 and the PCB pad to ground capacitance 5 are fixed, by changing the pad on the chip 1 ( Figure 5The gap between the pad and the ground changes the chip pad to ground capacitance by 4, thus obtaining the HFSS simulation result diagram ( Figure 6 ), where the pad on the PCB board 3 is circular, with a pad diameter of 0.26mm, and the isolation hole diameter of the pad on the ground layer is 0.6mm. The distance between the two solder points of the bonding wire 2 and the pad is 1mm, and the double bonding wires 2 with a spacing of 90um are trapezoidal and 131um high. The angle between the bonding wire 2 and the chip 1 is 28°, and the angle with the PCB board 3 is 11°. The excitation is applied to the coplanar waveguide (CPW) with an impedance of 50 ohms on both sides of the chip 1 and the PCB board 3, and the on-chip reflection coefficient dB(S11) at the chip 1 end that changes with the spacing gap is obtained. In this example, the PCB pad-to-ground capacitance 5 and the bonding wire 2 are not changed. Only the change in the chip pad-to-ground capacitance 4 caused by the change in the spacing gap in the chip 1 is used to illustrate the effect of changing the pad-to-ground capacitance on the 4-8GHz microwave impedance matching. From Figure 6 From the simulation results, we can see that in this example, as the gap gradually increases, the chip pad-to-ground capacitance 4 (see Table 1) gradually decreases, the low-pass effect gradually deteriorates, the on-chip reflectivity increases, and the impedance matching effect gradually deteriorates.
[0020] Table 1 Results of chip pad to ground capacitance under different gaps in the chip
[0021] To explore the influence of changing the PCB pad-to-ground capacitance 5 on 4-8GHz microwave impedance matching, we analogously explore the influence of changing the chip pad-to-ground capacitance 4 on 4-8GHz microwave impedance matching. The process is basically the same. At this time, when the bonding wire 2 and the chip pad-to-ground capacitance 4 are fixed, the PCB pad-to-ground capacitance 5 is changed by changing the gap between the pad on the PCB board 3 and the ground, thereby obtaining the HFSS simulation result.
[0022] This embodiment fundamentally solves the reflection problem at the chip package by setting pad-to-ground capacitance in both the chip 1 and the PCB board 3; at the same time, there is no need to introduce external chip capacitors and additional matching lines, thus greatly saving chip and PCB board space; the design is flexible and the pad shape can be flexibly changed according to changes in demand; the result is robust and is insensitive to fluctuations in binding line parameters within 3 times the standard deviation.
[0023] In addition, there are some other impedance matching methods, such as branch matchers and impedance transformers that need to determine the impedance value of the binding wire. However, the impedance value of the binding wire is not easy to determine, which affects the implementation of this matching method. Another common way to reduce the on-chip reflectivity is to wrap the signal line with a cross ground wire to reduce the size of the loop inductance formed between the binding wire and the ground, thereby reducing the on-chip reflectivity. The closer the ground wire is to the signal line, the smaller the loop area formed and the smaller the loop inductance. However, the disadvantage of this method is that the ground wire is easy to contact the signal line. In the superconducting quantum processor, since the signal line and the ground wire are both made of aluminum wire, the dense oxide layer structure on the surface of the superconducting aluminum will form a Josephson junction when the ground wire contacts the signal line at extremely low temperatures, thereby affecting the microwave performance of the circuit.
[0024] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes according to the technical scheme and inventive concept of the present invention within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.
Claims
1. A bonding package impedance matching device for a superconducting quantum chip, characterized in that: It comprises a PCB board (1), bonding wires (2) and a chip (3), wherein pad-to-ground capacitance is provided in both the PCB board (1) and the chip (3); The transmission line of the PCB board (1) and the transmission line of the chip (3) are connected via a bonding wire (2). The bonding wire (2) acts as an inductor and forms a low-pass filter with the capacitance of the two pads to the ground, so as to reduce the reflectivity at the bonding wire (2).
2. The bonding package impedance matching device of the superconducting quantum chip according to claim 1, characterized in that: The capacitances of the two pads to ground are independently set, and the capacitances are adjusted by changing the shapes of the pads.
3. The bonding package impedance matching device of the superconducting quantum chip according to claim 1, characterized in that: When the bonding wire (2) has an inductance of 1 nH / mm, the transmission line of the chip (1) has an impedance of 50 ohms, and the transmission line of the PCB board (3) has an impedance of 50 ohms, the capacitance between the two pads and the ground is set to 0.1 pF to 0.3 pF.
4. A quantum processor, characterized in that: A bonding package impedance matching device comprising a superconducting quantum chip as claimed in any one of claims 1 to 3.
Citation Information
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