Solar cell and photovoltaic module

Abstract

A solar cell includes a silicon substrate, a first passivation film, and a second passivation film. The silicon substrate includes a first surface, a second surface opposite to the first surface, and a side surface connecting the first surface and the second surface. The first passivation film is located on the first surface and completely covers the first surface. The second passivation film is located on the second surface and partially covers the second surface. The second passivation film extends from the periphery of the silicon substrate to the center of the silicon substrate to form an irregular ring. The passivation film is deposited on the first surface of the silicon substrate and is plated on the edge area of the second surface in a winding manner, and the problems of color difference of the back surface appearance, blackening of the EL edge and the like during preparation of the battery can be well solved by subsequently superposing the anti-reflection film on the second surface; meanwhile, the passivation film deposited on the second surface passivates defects such as holes and over etching on the edge of the second surface, so that the performance of the battery is improved. The utility model also provides a photovoltaic module comprising the solar cell.

Description

Technical Field

[0001] The present application relates to the field of photovoltaic technology, and more specifically, to a solar cell and a photovoltaic module including the solar cell. Background Art

[0002] Cells that fail the electroluminescence (EL) test will be judged as defective and will be downgraded or treated as waste. Among them, black spots and black blocks on monocrystalline cells have always been the top three causes of poor EL detection of cells in the industry. Cells are more likely to introduce various defects during the manufacturing process, and black spots and black blocks are one of them. These defects are mostly distributed at the edge of the cell, which seriously affects the production yield, efficiency and overall EL of the cell. Although this problem can be solved by depositing aluminum oxide on both the front and back sides as a passivation film, this method usually only places a single silicon wafer in a silicon wafer storage slot, which will cause the battery manufacturing capacity to be halved, reduce production efficiency, and increase production costs. Utility Model Content

[0003] In view of this, the present application provides a solar cell, comprising:

[0004] A silicon substrate comprising a first surface, a second surface opposite to the first surface, and a side surface connecting the first surface and the second surface;

[0005] A first passivation film, located on the first surface and completely covering the first surface;

[0006] The second passivation film is located on the second surface and partially covers the second surface. The second passivation film extends from the periphery of the silicon substrate to the center of the silicon substrate to form an irregular ring.

[0007] The aluminum oxide passivation film deposited on the second surface passivates the defects caused by the holes at the edge of the second surface and excessive etching, thereby improving the battery performance. The defects caused by the holes at the edge of the second surface of the battery cell and excessive etching are distributed irregularly, so the second passivation film set on the second surface of the battery cell adopts an irregular ring shape for passivation.

[0008] In some embodiments, the side surface is further covered with a side passivation film, and the side passivation film completely covers the side surface.

[0009] In some embodiments, the thickness of the first passivation film and the side passivation film is in the range of 3 nm to 6 nm.

[0010] In some embodiments, the thickness of the first passivation film is greater than or equal to the thickness of the side passivation film; and / or,

[0011] The thickness of the passivation film at the connection position between the first passivation film and the side passivation film is smaller than the thickness of the first passivation film; and / or,

[0012] The thickness of the passivation film at the connection position between the first passivation film and the side passivation film is less than the thickness of the side passivation film near the second surface. The passivation film at the connection position between the first passivation film and the side passivation film refers to the passivation film at the corner where the first surface and the side are connected.

[0013] In some embodiments, the thickness of the second passivation film decreases from the periphery of the silicon substrate toward the center of the silicon substrate until it reaches zero.

[0014] In some embodiments, the second passivation film includes a first region and a second region divided according to different thicknesses, the first region surrounds and connects the second region, and an average thickness of the first region is greater than an average thickness of the second region.

[0015] In some embodiments, the width of the first region extending from the periphery of the silicon substrate to the center of the silicon substrate is 0.1 mm-45 mm, and the thickness range of the first region is 3 nm-6 nm; the width of the second region extending from the first region to the center of the silicon substrate is ≤20 mm, and the thickness range of the second region is 0-3 nm.

[0016] The first region is closer to the periphery of the silicon substrate than the second region. The closer to the periphery of the silicon substrate, the more defects caused by edge holes and over-etching exist. A thicker passivation film in the first region is conducive to better passivation. However, it is necessary to control the thickness range of the second passivation film. Within the above thickness range, it can not only meet the passivation requirements for holes or defects in the first region and the second region, but also avoid the color difference of the back appearance and the blackening of the EL edge caused by the increase in the overall thickness of the second passivation film. Different passivation film thicknesses present different colors or different shades of color. Generally, the thicker the passivation film thickness, the darker the color, but the better the passivation effect. Therefore, controlling the passivation film within the above range is conducive to reducing color difference. The color difference is small, and the subsequent process is covered with an anti-reflection film, which can effectively avoid the color difference of the appearance of the battery cell. The thickness setting of the sub-region is also to minimize the setting area of ​​the first region while meeting the passivation requirements.

[0017] In some embodiments, the width of the first region in a direction extending from the periphery of the silicon substrate to the center of the silicon substrate is 1-2 times the width of the second region.

[0018] In some embodiments, the thickness of the first region decreases along the periphery of the silicon substrate toward the center of the silicon substrate;

[0019] The thickness of the second region decreases along the periphery of the silicon substrate toward the center of the silicon substrate until it becomes zero.

[0020] In some embodiments, the silicon substrate is an N-type silicon substrate, and the solar cell further includes a P-type doping layer, wherein the P-type doping layer is located between the silicon substrate and the first passivation film;

[0021] The solar cell further comprises a tunneling oxide layer, an N-type doped polysilicon layer, and an anti-reflection film, wherein the tunneling oxide layer, the N-type doped polysilicon layer, and the second passivation film are sequentially located on the second surface from the inside to the outside, and the anti-reflection film covers the surface of the first passivation film away from the silicon substrate, and the surface of the second passivation film and the N-type doped polysilicon layer away from the silicon substrate;

[0022] Alternatively, the silicon substrate is a P-type silicon substrate, and the solar cell further comprises an N-type doping layer, wherein the N-type doping layer is located between the silicon substrate and the first passivation film;

[0023] The solar cell also includes a tunneling oxide layer, a P-type doped polysilicon layer, and an anti-reflection film. The tunneling oxide layer, the P-type doped polysilicon layer, and the second passivation film are sequentially located on the second surface from the inside to the outside, and the anti-reflection film covers the surface of the first passivation film away from the silicon substrate, and the surface of the second passivation film and the P-type doped polysilicon layer away from the silicon substrate.

[0024] The present application also provides a photovoltaic assembly, comprising at least one solar cell as described above. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 This is an enlarged schematic diagram of the second surface of the solar cell after the second surface plating is removed according to the embodiment of the present application. Figure 1 .

[0026] Figure 2 This is an enlarged schematic diagram of the second surface of the solar cell after the second surface plating is removed according to the embodiment of the present application. Figure 2 .

[0027] Figure 3 This is a schematic diagram of the placement of the solar cell during the preparation process of the embodiment of the present application.

[0028] Figure 4 is a schematic cross-sectional view of a solar cell according to an embodiment of the present application.

[0029] Figure 5 Schematic top view of the first passivation film of the solar cell according to an embodiment of the present application.

[0030] Figure 6 is a schematic diagram of the second surface of a solar cell.

[0031] Description of main component symbols:

[0032] Solar cell 100

[0033] Silicon substrate 10

[0034] P-type doped layer 20

[0035] First passivation film 30A

[0036] Tunneling oxide layer 40

[0037] N-type doped polysilicon layer 50

[0038] Second passivation film 30B

[0039] First surface 11

[0040] Second surface 12

[0041] Side surface 13

[0042] Side passivation film 30C

[0043] Passivation film 30D

[0044] First Area 31

[0045] Second area 32

[0046] Anti-reflection film 60

[0047] Vehicle 200 DETAILED DESCRIPTION

[0048] The present application provides a method for preparing a solar cell, in particular, a method for preparing a TOPCon solar cell, which adopts an atomic layer deposition method, and by changing the placement method of a silicon wafer in a coating chamber, not only can a layer of aluminum oxide with uniform thickness be deposited on the front of the cell, but also the thickness and size of the aluminum oxide plated on the side surface of the cell and the back side near the edge area can be controlled, and a back anti-reflection film is superimposed, which can well solve the problems of color difference in the back appearance and blackening of the EL edge when making TOPCon cells. At the same time, the aluminum oxide film deposited on the back passivates the back edge holes, defects caused by over-engraving and the side surface, thereby improving the battery performance.

[0049] The method for preparing the solar cell comprises the following steps S1 to S10. In the method for preparing the solar cell, steps S1 to S7, S9 and S10 are all conventional steps, and the present application mainly improves step S8.

[0050] S1: Cleaning and texturing the silicon substrate.

[0051] The silicon substrate is an N-type silicon substrate, and the silicon substrate includes a first surface, a second surface opposite to the first surface, and a side surface connecting the first surface and the second surface. In the embodiment of the present application, the first surface is the front side of the silicon substrate, and the second surface is the back side of the silicon substrate. The N-type silicon substrate is doped with an N-type doping element, and the N-type doping element can be at least one of the five group elements such as phosphorus (P), bismuth (Bi), antimony (Sb), and arsenic (As).

[0052] The purpose of texturing on the surface of the silicon substrate is to remove the mechanical damage layer on the surface of the silicon substrate, remove surface oil and impurity particles, form an undulating velvet structure, increase the surface area of ​​the silicon substrate, increase the absorption of sunlight, and reduce the reflection of sunlight.

[0053] In the embodiment of the present application, the first surface (front) is a velvet surface with a velvet height of 0-3 μm and a reflectivity of 7.0%-10.5%; the second surface (back) is a polished surface with a back polishing reflectivity of ≥41%. The height of the tower base on the back is 0.10 μm-0.25 μm, and the lateral size of the tower base on the back is 6 μm-12 μm.

[0054] S2: Boron diffusion into the silicon substrate.

[0055] The impurity element boron is diffused on the side where the first surface of the silicon substrate is located. The boron source can be selected from one or more precursors such as BCl3, BBr3, B2H6, trimethyl boron, etc. During the boron diffusion process, a P-type doping layer (boron diffusion layer) is formed at a certain depth inward on the surface of the silicon substrate (including the first surface, the second surface and the side surface), and a borosilicate glass (BSG) layer is formed on the outermost side of the silicon substrate due to the high concentration of boron.

[0056] S3: Use laser to process the position where the gate line is to be formed later to form a selective emitter.

[0057] The purpose of step S3 is to perform high-concentration doping at the contact point between the subsequent metal gate line and the silicon substrate and its vicinity to reduce the contact resistance between the metal electrode and the silicon substrate; and to perform low-concentration doping in the area outside the electrode to reduce the recombination of the diffusion layer. By optimizing the emitter, the output current and voltage of the solar cell are increased, thereby increasing the photoelectric conversion efficiency.

[0058] S4: performing oxidation treatment on the silicon substrate.

[0059] The function of step S2 is that the boron diffusion is controlled to be performed within a first temperature range, and the oxidation treatment is controlled to be performed within a second temperature range, and the second temperature range is greater than the first temperature range. In some embodiments, the first temperature range is 700°C-900°C, and the second temperature range is 950°C-1050°C.

[0060] S5: removing the boron-doped diffusion layer and the borosilicate glass (BSG) layer on the second surface and the side surface of the silicon substrate.

[0061] S6: forming a tunneling oxide layer and a doped polysilicon layer on the second surface of the silicon substrate.

[0062] In some embodiments, a tunneling oxide layer and an intrinsic amorphous silicon layer are first formed sequentially from the inside to the outside on the side where the second surface is located, and then phosphorus diffusion is performed on the side where the second surface is located, so that the intrinsic amorphous silicon layer is converted into a doped polysilicon layer. Since the silicon substrate is an N-type silicon substrate, the doping element in the doped polysilicon layer can be an N-type doping element, for example, the doping element is phosphorus. The tunneling oxide layer is silicon oxide.

[0063] When LPCVD is performed on the side where the second surface is located, an intrinsic amorphous silicon layer will be generated on the first surface and the side surface. When phosphorus diffusion is performed on one side of the second surface, at least a portion of the intrinsic amorphous silicon layer will be converted into a polycrystalline silicon layer doped with phosphorus on the first surface and the side surface. In addition, the polycrystalline silicon layer on the first surface and the side surface and the outermost side of the doped polycrystalline silicon layer on the second surface will form a phosphosilicate glass (PSG) layer due to the high phosphorus content.

[0064] S7: remove the polysilicon and BSG coated on the first surface and the PSG on the second surface.

[0065] This step can be performed by etching using a tank machine containing an etching solution to remove the polysilicon and BSG on the first surface and the PSG on the second surface.

[0066] After step S7 is completed, Figure 1 As shown, a perforation defect occurs in the region near the edge of the second surface of the silicon substrate ( Figure 1 The black dotted area) Figure 2 As shown, over-etching defects occur in the corner areas of the second surface.

[0067] S8: The silicon substrates are placed back to back to deposit a passivation film.

[0068] In step S8, a passivation film is deposited by atomic layer deposition, and the passivation film is aluminum oxide.

[0069] Step S8 specifically includes: providing a carrier 200 for loading a silicon substrate, such as Figure 3As shown, a plurality of receiving grooves (not shown) are provided on the carrier 200, and a pair of silicon substrates 10 with the second surfaces 12 relatively fitted (back to back) are placed in each receiving groove, so that the first surface 11 of the silicon substrate 10 is relatively exposed; the carrier is pushed into the cavity of atomic layer deposition, and reaction gas and dilution gas are introduced into the cavity so that the reaction gas reacts to form aluminum oxide deposited on the surface of the silicon substrate. The reaction gas is evenly distributed in the cavity under the carrying of the dilution gas. An air inlet and an air exhaust port are provided in the cavity, the air inlet is used to pass gas, and the air outlet is used to extract gas. During the deposition process, while the reaction gas and dilution gas are introduced into the air inlet, the gas needs to be extracted through the air outlet.

[0070] The carrier 200 may be a metal boat or a graphite boat. The silicon substrates 10 are placed back to back, with each receiving slot containing a pair of back to back silicon substrates 10. Since the silicon substrates 10 are arranged back to back, most of the aluminum oxide will be deposited on the first surface (front), and only the edge area of ​​the second surface (back) will have aluminum oxide deposited. The reaction gas may be O3, H2O, and trimethylaluminum (TMA). The diluent gas may be nitrogen, an inert gas, etc.

[0071] The passivation film formed on the first surface side is evenly distributed on the entire first surface, that is, it completely covers the first surface, and the thickness of the passivation film on the first surface is uniform and is 2nm-6nm. The passivation film formed on the second surface side extends a certain width along the periphery of the silicon substrate toward the center of the silicon substrate to form an irregular ring, that is, the passivation film on the second surface partially covers the second surface and has an uneven thickness.

[0072] S9: Depositing an anti-reflection film on both the first surface and the second surface.

[0073] Anti-reflection film has the function of reducing reflection and increasing transmission.

[0074] In some embodiments, the step of depositing an anti-reflection film sequentially deposits a first layer of silicon nitride film with a high refractive index, a second layer of silicon nitride film with a low refractive index, and a third layer with a refractive index lower than that of the second layer on a silicon substrate, wherein the third layer comprises at least one of a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer. The refractive index of the first layer of silicon nitride film is 2.15-2.30, and the film thickness is 15nm-30nm. The refractive index of the second layer of back silicon nitride film is 2.0-2.25, and the film thickness is 25nm-45nm. The refractive index of the third layer is 1.40-2.05, and the film thickness is 5nm-25nm.

[0075] In some embodiments, after completing step S9 and before performing step S9, that is, after the passivation film is deposited, the second surface of the silicon substrate may be pretreated with ammonia to reduce the defect state on the surface of the silicon substrate. Ammonia pretreatment method: introduce ammonia into the chamber at a flow rate of 1000sccm-6000sccm, a power of 1000w-8000w, and a time of less than or equal to 8min. Ammonia pretreatment passivates the back surface, making the appearance color of the back composite film darker and blacker, and the back film color is uniform without obvious color difference.

[0076] S10: forming metal grid lines on the first surface and the second surface of the silicon substrate to form a solar cell.

[0077] The surface gate line position of the silicon substrate is the electrode position, the contact part between the electrode and the silicon substrate is a heavily doped p++ region, and the area between the electrodes is a lightly doped p+ layer.

[0078] In some embodiments, step S10 includes printing a conductive metal paste on both the first surface and the second surface, curing the conductive metal paste by sintering to form a metal grid line, and making the metal atoms in the conductive metal paste contact the silicon substrate. It can be understood that the conductive metal paste can be cured by sintering to form a metal grid line combined with the silicon substrate. The conductive metal paste is printed on the anti-reflection film, and the metal atoms in the conductive metal paste will pass through the passivation film and the anti-reflection film and contact the silicon substrate during the sintering process. The conductive metal paste can be silver paste, copper paste, etc., but is not limited to this. In some embodiments, a plurality of conductive metals are mixed in the conductive metal paste. The printing method of the conductive metal paste can be screen printing or laser pattern transfer, etc., but is not limited to this.

[0079] The present application provides a solar cell obtained by the above-mentioned preparation method. The solar cell is a TOPCon solar cell. Figure 4 , the solar cell 100 includes a silicon substrate 10 , a first passivation film 30A and a second passivation film 30B.

[0080] The silicon substrate 10 includes a first surface 11, a second surface 12 opposite to the first surface 11, and a side surface 13 connecting the first surface 11 and the second surface 12. Figure 4 Not shown, the first surface 11 is actually a relatively uneven velvet surface. The first passivation film 30A is located on the first surface 11 and completely covers the first surface 11. The second passivation film 30B is located on the second surface 12 and partially covers the second surface.

[0081] The silicon substrate 10 is an N-type silicon substrate, and the solar cell 100 further includes a P-type doped layer 20, a tunneling oxide layer 40, and an N-type doped polysilicon layer 50. The P-type doped layer 20 is located on the first surface 11. The P-type doped layer 20 and the first passivation film 30A are located on the first surface 11 from the inside to the outside, and the first passivation film 30A is located on the side of the P-type doped layer 20 away from the silicon substrate 10. That is, the P-type doped layer 20 is located between the silicon substrate 10 and the first passivation film 30A. The tunneling oxide layer 40, the N-type doped polysilicon layer 50, and the second passivation film 30B are located on the second surface 12 from the inside to the outside. The second passivation film 30B partially covers the surface of the N-type doped polysilicon layer 50 away from the silicon substrate 10. The N-type doped polysilicon layer 50 is located between the tunneling oxide layer 40 and the second passivation film 30B. The side surface 13 is covered with a side passivation film 30C. The side passivation film 30C completely covers the side surface 13. The side passivation film 30C connects the first passivation film 30A and the second passivation film 30B.

[0082] In the embodiment of the present application, the element doped in the P-type doped layer 20 is boron. The element doped in the N-type doped polysilicon layer 50 is phosphorus. The first passivation film 30A, the second passivation film 30B and the side passivation film 30C are all made of aluminum oxide.

[0083] like Figure 6 As shown, the second passivation film 30B extends from the periphery of the silicon substrate 10 to the center of the silicon substrate 10 to a certain width to form an irregular ring, and the second passivation film 30B has an uneven thickness. The thickness of the second passivation film 30B decreases along the periphery of the silicon substrate 10 pointing to the center of the silicon substrate 10 until the thickness is zero. The thickness of the first passivation film 30A and the side passivation film 30C are substantially uniform, and the thickness range is 3nm-6nm, for example, 3.0nm, 3.5nm, 4.0nm, 4.5nm, 5.0nm, 5.5nm, 6.0nm. Further, in some embodiments, the thickness of the first passivation film 30A and the side passivation film 30C is 3.5nm-4.5nm, for example, 4nm.

[0084] In some embodiments, the thickness of the first passivation film 30A is greater than or equal to the thickness of the side passivation film 30C. The first passivation film 30A needs to meet the passivation requirements and requires uniformity of the film layer, but the side passivation film 30C has a weaker passivation requirement than the first passivation film 30A, so its thickness is usually lower than that of the first passivation film 30A, and the thickness of the side passivation film 30C will also bring a certain color difference, affecting the appearance.

[0085] In some embodiments, the thickness of the passivation film at the intersection of the first passivation film 30A and the side passivation film 30C on the side surface 13 is less than the thickness of the first passivation film 30A; and / or, the thickness of the passivation film at the intersection of the first passivation film 30A and the side passivation film 30C is less than the thickness of the side passivation film 30C near the second surface 12. The thickness of the film layer can be detected by general means, such as detection using an ellipsometer. The thickness of the passivation film at the connection position of the first passivation film 30A and the side passivation film 30C is usually set to be smaller than the thickness of the first passivation film 30A and the side passivation film 30C, in order to avoid the difficulties in process implementation caused by the excessive thickness of the passivation film at the corner, and also to avoid color difference in appearance. In the present application, if Figure 4 As shown in FIG. 1 , the passivation film 30D at the connection position between the first passivation film 30A and the side passivation film 30C refers to the passivation film 30D at the corner position where the first surface 11 and the side surface 13 are connected. Figure 5 As shown, the passivation film 30D is at least a portion of the first passivation film 30A extending beyond the first surface 11 , and is also at least a portion of the side passivation film 30C extending beyond the side surface 13 .

[0086] like Figure 6 As shown, the second passivation film 30B includes a first region 31 and a second region 32 divided according to different thicknesses. The first region 31 surrounds and connects the second region 32. The average thickness of the first region 31 is greater than the average thickness of the second region 32. The first region 31 is closer to the periphery of the silicon substrate 10 than the second region 32. The closer to the periphery of the silicon substrate 10, the more defects caused by edge holes and over-etching exist. The thicker the passivation film of the first region 31 is, the better the passivation. The average thickness can be obtained by taking multiple measurement points that are not on a straight line, obtaining the passivation film thickness corresponding to each measurement point, and then taking the average value.

[0087] In some embodiments, the width of the first region 31 in the direction extending from the periphery of the silicon substrate 10 to the center of the silicon substrate 10 is 1-2 times the width of the second region 32 .

[0088] In some embodiments, the width of the first region 31 extending from the periphery of the silicon substrate 10 to the center of the silicon substrate 10 is 0.1 mm-45 mm (for example, 0.5 mm, 1.5 mm, 5 mm, 10 mm, 15 mm, 20 mm, 25 mm, 30 mm, 40 mm, 45 mm), and the thickness of the first region 31 ranges from 3 nm to 6 nm (for example, 3.0 nm, 3.5 nm, 4.0 nm, 4.5 nm, 5.0 nm, 5.5 nm, 6.0 nm), and the thickness of the first region 31 decreases from the periphery of the silicon substrate 10 toward the center of the silicon substrate 10.

[0089] The width of the second region 32 extending from the first region 31 to the center of the silicon substrate 10 is ≤20 mm (e.g., 0.5 mm, 1.5 mm, 5 mm, 10 mm, 12 mm, 15 mm, 18 mm), and the thickness of the second region 32 is in the range of 0-3 nm (e.g., 0.5 nm, 1.0 nm, 1.3 nm, 1.8 nm, 2.1 nm, 2.5 nm, 3.0 nm). The thickness of the second region 32 decreases along the periphery of the silicon substrate 10 toward the center of the silicon substrate 10 until it is zero. The boundary line between the first region 31 and the second region 32 is an irregular curve, and the boundary line of the second region 32 close to the center of the silicon substrate 10 may also be an irregular curve.

[0090] The solar cell 100 further includes an anti-reflection film 60 located on the first surface 11 and the second surface 12. The anti-reflection film 60 covers the surface of the first passivation film 30A away from the silicon substrate 10, the second passivation film 30B and the surface of the N-type doped polysilicon layer 50 away from the silicon substrate 10.

[0091] Although not shown, the solar cell 100 further includes other components, such as electrodes formed of a conductive paste.

[0092] The preparation process of the solar cell 100 includes the steps of sequentially depositing a tunneling oxide layer and a doped polysilicon layer on the second surface 12 of the silicon substrate 10, and sequentially removing the polysilicon and BSG coated on the first surface 11 and the PSG on the second surface 12. Due to the limitations of the existing process, in the step of removing the PSG on the second surface 12, defects such as perforations and over-etching of the corners of the second surface 12 are more likely to occur.

[0093] The present application utilizes the step of depositing a passivation film of uniform thickness on the first surface 11, and through the improvement of the process steps, allows a specific area of ​​the second surface 12 to also form an irregularly shaped second passivation film 30B. The second passivation film 30B can completely cover the defective parts of the second surface 12 of the silicon substrate 10, and the thickness of the second passivation film 30B can meet the requirements of passivation defects, thereby reducing the recombination of carriers in the battery cell and effectively improving the conversion efficiency of the battery.

[0094] In addition, in the process of forming the metal gate line, the corrosion resistance of the passivation film on the second surface 12 (back side) to the slurry can be utilized. The passivation film can inhibit corrosion to a certain extent, thereby controlling the corrosion depth of the high-concentration doped area at the edge to not be too deep. This can ensure good ohmic contact and reduce metal recombination, thereby ensuring that the battery has a higher efficiency.

[0095] In the step of depositing the passivation film of the present application, a pair of silicon substrates 10 are placed back-to-back in a receiving groove, so that the passivation film is deposited on the entire front side and partially on the back side, with simple process, large production capacity and low equipment investment. The passivation film can be obtained by placing a pair of silicon substrates back-to-back in a receiving groove and performing atomic layer deposition, and the process can be adjusted, such as adjusting the deposition time; or changing the placement of the silicon wafer in the coating chamber, such as adjusting the tightness of the silicon substrate, and a baffle with irregular edges can be set between the back-to-back silicon substrates to achieve not only a uniform thickness of aluminum oxide passivation film deposited on the first surface (front) of the silicon substrate, but also the thickness and size of aluminum oxide around the edge of the second surface (back) of the coating can be controlled.

[0096] In addition, when the silicon nitride anti-reflection film 60 is deposited on the first surface 11 , the second surface 12 will contact with graphite. Due to the presence of the passivation film in the edge area of ​​the second surface 12 , the influence of graphite boat marks and black edges is reduced, thereby improving the yield of the solar cell 100 .

[0097] It is understandable that the silicon substrate 10 is not limited to an N-type silicon substrate. In some embodiments, the silicon substrate 10 can be replaced with a P-type silicon substrate, then the P-type doped layer 20 needs to be replaced with an N-type doped layer, and the N-type doped polysilicon layer 50 needs to be replaced with a P-type doped polysilicon layer. The N-type doped layer is located between the silicon substrate 10 and the first passivation film 30A. The tunneling oxide layer 40, the P-type doped polysilicon layer and the second passivation film 30B are sequentially located on the second surface 12 from the inside to the outside. The anti-reflection film 60 covers the surface of the first passivation film 30A away from the silicon substrate 10, the second passivation film 30B and the surface of the P-type doped polysilicon layer away from the silicon substrate 10.

[0098] The present application also provides a photovoltaic module (not shown) including at least one of the above-mentioned solar cells 100 , for example, including at least two of the above-mentioned solar cells 100 spliced ​​to each other.

[0099] Defects on the edge area of ​​the second surface 12 and the side surface 13 will affect the passivation effect of the cell, resulting in a decrease in the opening voltage. At the same time, the non-uniformity of the film layer will also make it match the metal paste worse, resulting in a decrease in the short-circuit current and fill factor of the solar cell, thereby reducing the conversion efficiency of the cell. The method of depositing a passivation film for a solar cell of the present application doubles the production volume by placing a pair of silicon substrates with the second surface relatively bonded (back-to-back arrangement) in the receiving groove of the carrier; simultaneously completes the edge passivation of the first surface, the side surface and the second surface; improves the black spot and black block pollution of the tubular single-sided aluminum oxide, reduces the EL defect of the solar cell, and improves the yield rate of the cell production.

[0100] The above implementation modes are only used to illustrate the technical solutions of the present application and are not intended to limit the present application. Although the present application has been described in detail with reference to the above preferred implementation modes, a person skilled in the art should understand that the technical solutions of the present application may be modified or replaced by equivalents without departing from the spirit and scope of the technical solutions of the present application.

Claims

1. A solar cell, characterized in that: include: A silicon substrate comprising a first surface, a second surface opposite to the first surface, and a side surface connecting the first surface and the second surface; A first passivation film, located on the first surface and completely covering the first surface; The second passivation film is located on the second surface and partially covers the second surface. The second passivation film extends from the periphery of the silicon substrate to the center of the silicon substrate to form an irregular ring.

2. The solar cell according to claim 1, characterized in that: The side surface is also covered with a side passivation film, and the side passivation film completely covers the side surface.

3. The solar cell according to claim 2, characterized in that: The thickness of the first passivation film is greater than or equal to the thickness of the side passivation film; and / or, The thickness of the passivation film at the connection position between the first passivation film and the side passivation film is smaller than the thickness of the first passivation film; and / or, The thickness of the passivation film at a position where the first passivation film and the side passivation film are connected is smaller than the thickness of the side passivation film at a position close to the second surface.

4. The solar cell according to claim 2, characterized in that: The thickness of the first passivation film and the side passivation film is in the range of 3nm-6nm.

5. The solar cell according to claim 1, characterized in that: The thickness of the second passivation film decreases from the periphery of the silicon substrate toward the center of the silicon substrate until it reaches zero.

6. The solar cell according to claim 1, characterized in that The second passivation film includes a first region and a second region divided according to different thicknesses, the first region surrounds and connects the second region, and an average thickness of the first region is greater than an average thickness of the second region.

7. The solar cell according to claim 6, characterized in that: The thickness of the first region decreases along the periphery of the silicon substrate toward the center of the silicon substrate; The thickness of the second region decreases along the periphery of the silicon substrate toward the center of the silicon substrate until it becomes zero.

8. The solar cell according to claim 6, characterized in that: The width of the first region extending from the periphery of the silicon substrate to the center of the silicon substrate is 0.1mm-45mm, and the thickness range of the first region is 3nm-6nm; the width of the second region extending from the first region to the center of the silicon substrate is ≤20mm, and the thickness range of the second region is 0-3nm.

9. The solar cell according to any one of claims 1 to 8, characterized in that The silicon substrate is an N-type silicon substrate, and the solar cell further includes a P-type doping layer, wherein the P-type doping layer is located between the silicon substrate and the first passivation film; The solar cell further comprises a tunneling oxide layer, an N-type doped polysilicon layer, and an anti-reflection film, wherein the tunneling oxide layer, the N-type doped polysilicon layer, and the second passivation film are sequentially located on the second surface from the inside to the outside, and the anti-reflection film covers the surface of the first passivation film away from the silicon substrate, and the surface of the second passivation film and the N-type doped polysilicon layer away from the silicon substrate; Alternatively, the silicon substrate is a P-type silicon substrate, and the solar cell further comprises an N-type doping layer, wherein the N-type doping layer is located between the silicon substrate and the first passivation film; The solar cell also includes a tunneling oxide layer, a P-type doped polysilicon layer, and an anti-reflection film. The tunneling oxide layer, the P-type doped polysilicon layer, and the second passivation film are sequentially located on the second surface from the inside to the outside, and the anti-reflection film covers the surface of the first passivation film away from the silicon substrate, and the surface of the second passivation film and the P-type doped polysilicon layer away from the silicon substrate.

10. A photovoltaic module, characterized in that: Comprising at least one solar cell according to any one of claims 1 to 9.

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