Starting-up self-locking circuit

Abstract

The embodiment of the utility model discloses a power-on self-locking circuit which is used for realizing self-locking and avoiding the problem of false triggering. The self-locking device comprises a power supply, a self-locking module and a control module, the positive electrode of the power supply is connected with the self-locking module, and the negative electrode of the power supply is grounded; the self-locking module is connected with the control module, so that an input signal is provided for the control module by using electric energy provided by the power supply under the condition that a user performs startup operation on the self-locking module, and the control module feeds back a self-locking signal to the self-locking module according to the input signal; therefore, power-on self-locking is realized according to the obtained self-locking signal.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of circuits, and in particular to a power-on self-locking circuit. Background Art

[0002] With the continuous development of science and technology, people's living and production standards are also constantly improving. Among them, instruments and electronic products have been widely used in various scenarios. The way to turn on and off instruments and electronic products is generally to turn the switch to the on side when the instrument or electronic product is needed, and to turn the switch to the off side when the instrument or electronic product is not needed, so as to turn the product on and off.

[0003] However, in the existing solutions, the switch is either turned to the power on side or to the power off side. Due to external interference factors, the switch is more likely to be triggered or turned off by mistake, resulting in abnormal startup or shutdown of the circuit, thereby affecting the stability of the circuit and bringing a poor experience to the user. Utility Model Content

[0004] The embodiment of the present application provides a power-on self-locking circuit for achieving self-locking and avoiding the problem of false triggering.

[0005] A first aspect of an embodiment of the present application provides a power-on self-locking circuit, comprising: a power supply, a self-locking module and a control module;

[0006] The positive pole of the power supply is connected to the self-locking module, and the negative pole of the power supply is grounded;

[0007] The self-locking module is connected to the control module so that when the user turns on the self-locking module, the power provided by the power supply is used to provide an input signal to the control module, so that the control module feeds back a self-locking signal to the self-locking module according to the input signal, thereby realizing self-locking at power-on according to the obtained self-locking signal.

[0008] Optionally, the self-locking module includes: a Pmos tube, a second switch tube, a first resistor, a second resistor, a third resistor, a first diode, a second diode, a third diode and a switch;

[0009] The positive electrode of the power supply is respectively connected to the first end of the first resistor and the source of the Pmos tube, the gate of the Pmos tube is respectively connected to the second end of the first resistor, the third end of the second switch tube and the anode of the first diode, the drain of the Pmos tube is respectively connected to the control module and the first end of the second resistor, the second end of the second resistor is respectively connected to the control module and the anode of the third diode, the cathode of the third diode is respectively connected to the cathode of the first diode and the second end of the switch, and the first end of the switch is grounded;

[0010] The second end of the second switch tube is grounded, the first end of the second switch tube is connected to the first end of the third resistor, the second end of the third resistor is connected to the cathode of the second diode, and the anode of the second diode is connected to the control module.

[0011] Optionally, the second switch tube is an NPN tube, the base of the NPN tube is the first end of the second switch tube, the emitter of the NPN tube is the second end of the second switch tube, and the collector of the NPN tube is the third end of the second switch tube;

[0012] or,

[0013] The second switch tube is an Nmos tube, the gate of the Nmos tube is the first end of the second switch tube, the source of the Nmos tube is the second end of the second switch tube, and the drain of the Nmos tube is the third end of the second switch tube.

[0014] Optionally, the self-locking module further includes: a first chip;

[0015] The first chip is arranged between the drain of the Pmos tube and the first end of the second resistor, the drain of the Pmos tube is connected to the input end of the first chip, the ground end of the first chip is grounded, the first output end and the second output end of the first chip are both connected to the first end of the second resistor, and the first end of the second resistor is also connected to the control module.

[0016] Optionally, the power-on self-locking circuit further includes: a fifth resistor and a sixth resistor;

[0017] The first end of the fifth resistor is connected to the positive electrode of the power supply, the second end of the fifth resistor is connected to the first end of the sixth resistor and the control module respectively, and the second end of the sixth resistor is grounded.

[0018] Optionally, the power-on self-locking circuit further includes: a fourth resistor, a first connector and a charging unit;

[0019] The first end of the fourth resistor is connected to the first end of the third resistor, the second end of the fourth resistor is connected to the VBUS end of the first connector, the E1 end, the E2 end and the GND end of the first connector are all grounded, and the VBUS end of the first connector is connected to the positive electrode of the power supply via the charging unit.

[0020] Optionally, the self-locking module includes: an Nmos tube, a seventh resistor, an eighth resistor, a ninth resistor, a fourth diode, a fifth diode, a switch and an NPN tube;

[0021] The positive electrode of the power supply is respectively connected to the first end of the seventh resistor and the drain of the Nmos tube, the second end of the seventh resistor is connected to the second end of the switch, the first end of the switch is respectively connected to the anode of the fourth diode and the base of the NPN tube, the cathode of the fourth diode is respectively connected to the gate of the Nmos tube, the cathode of the fifth diode and the first end of the eighth resistor, the second end of the eighth resistor is grounded, the source of the Nmos tube is respectively connected to the control module and the first end of the ninth resistor, the anode of the fifth diode is connected to the control module, the second end of the ninth resistor is respectively connected to the control module and the collector of the NPN tube, and the emitter of the NPN tube is grounded.

[0022] Optionally, the self-locking module further includes: a second chip;

[0023] The second chip is arranged between the source of the Nmos tube and the first end of the ninth resistor, the source of the Nmos tube is connected to the input end of the second chip, the ground end of the second chip is grounded, the first output end and the second output end of the second chip are both connected to the first end of the ninth resistor, and the first end of the ninth resistor is also connected to the control module.

[0024] Optionally, the power-on self-locking circuit further includes: an eleventh resistor and a twelfth resistor;

[0025] The first end of the eleventh resistor is connected to the positive electrode of the power supply, the second end of the eleventh resistor is connected to the first end of the twelfth resistor and the control module respectively, and the second end of the twelfth resistor is grounded.

[0026] Optionally, the power-on self-locking circuit further includes: a tenth resistor, a second connector and a charging unit;

[0027] The first end of the tenth resistor is connected to the first end of the eighth resistor, the second end of the tenth resistor is connected to the VBUS end of the second connector, the E1 end, the E2 end and the GND end of the second connector are all grounded, and the VBUS end of the second connector is connected to the positive electrode of the power supply via the charging unit.

[0028] It can be seen from the above technical solutions that the embodiments of the present application have the following advantages:

[0029] The power supply provides power to the self-locking module and the control module. When the user turns on the power, the self-locking module inputs the input signal to the control module, and the control module then feeds back the self-locking signal to the self-locking module, so that the self-locking module can start the self-locking function based on the self-locking signal. The self-locking function can avoid the problem of easy false triggering of the switch, and will not affect the opening or closing of the circuit, thereby ensuring the stability of the circuit and bringing a better experience to the user. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 A schematic diagram of an embodiment of a power-on self-locking circuit disclosed in this application;

[0031] Figure 2 A schematic diagram of another embodiment of a power-on self-locking circuit disclosed in this application;

[0032] Figure 3 This is a schematic diagram of another embodiment of a power-on self-locking circuit disclosed in this application. DETAILED DESCRIPTION

[0033] The present application is further described in detail below in conjunction with the accompanying drawings.

[0034] The embodiment of the present application provides a power-on self-locking circuit for achieving self-locking and avoiding the problem of false triggering.

[0035] Electronic products have been integrated into people's production and life. In existing electronic products, switches are used to turn the product on or off. Turning the switch to the power-on side turns it on, and turning the switch to the power-off side turns it off. However, such switches are prone to false triggering, which brings inconvenience to users. In order to solve the above problem, the present application provides a power-on self-locking circuit, in which the self-locking module is used to realize circuit self-locking, avoid false triggering of the switch, and thus bring greater convenience to users.

[0036] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0037] The terms "first", "second", "third", "fourth", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments described herein can be implemented in an order other than that illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0038] The following is a description of a power-on self-locking circuit of the present application. Figure 1 , an embodiment of a power-on self-locking circuit of the present application includes: a power supply 101, a self-locking module 102 and a control module 103;

[0039] The positive pole of the power supply 101 is connected to the self-locking module 102, and the negative pole of the power supply 101 is grounded;

[0040] The self-locking module 102 is connected to the control module 103 so that when the user turns on the self-locking module 102, the power provided by the power supply 101 is used to provide an input signal to the control module 103, so that the control module 103 feeds back the self-locking signal to the self-locking module 102 according to the input signal, thereby realizing self-locking when turned on according to the obtained self-locking signal.

[0041] In the embodiment of the present application, the power supply 101 provides power to the self-locking module 102 and the control module 103. When the user turns on the device, the self-locking module 102 inputs an input signal to the control module 103, and the control module 103 then feeds back a self-locking signal to the self-locking module 102, so that the self-locking module 102 can start the self-locking function based on the self-locking signal. The self-locking function can avoid the problem of easy mis-triggering of the switch, and will not affect the opening or closing of the circuit, thereby ensuring the stability of the circuit and bringing a better experience to the user.

[0042] See also Figure 2 , another embodiment of a power-on self-locking circuit of the present application includes: a power supply V1, a self-locking module and a control module;

[0043] The positive pole of the power supply V1 is connected to the self-locking module, and the negative pole of the power supply V1 is grounded;

[0044] The self-locking module is connected to the control module so that when the user turns on the self-locking module, the power provided by the power supply V1 is used to provide an input signal to the control module, so that the control module feeds back the self-locking signal to the self-locking module according to the input signal, thereby realizing self-locking when turned on according to the obtained self-locking signal.

[0045] Specifically, the self-locking module includes: a Pmos tube Q1, a second switch tube, a first resistor R1, a second resistor R2, a third resistor R3, a first diode D1, a second diode D2, a third diode D3, a switch and a first chip U1, and the power-on self-locking circuit also includes: a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a first connector J1 and a charging unit;

[0046] The positive electrode of the power supply V1 is respectively connected to the first end of the first resistor R1 and the source of the Pmos tube Q1, the gate of the Pmos tube Q1 is respectively connected to the second end of the first resistor R1, the third end of the second switch tube and the anode of the first diode D1, the drain of the Pmos tube Q1 is respectively connected to the control module and the first end of the second resistor R2, the second end of the second resistor R2 is respectively connected to the control module and the anode of the third diode D3, the cathode of the third diode D3 is respectively connected to the cathode of the first diode D1 and the second end of the switch, and the first end of the switch is grounded;

[0047] The second end of the second switch tube is grounded, the first end of the second switch tube is connected to the first end of the third resistor R3, the second end of the third resistor R3 is connected to the cathode of the second diode D2, and the anode of the second diode D2 is connected to the control module.

[0048] The second switch tube can be an NPN tube, an Nmos tube, or other types, which are not limited here. When the second switch tube is an NPN tube, the base of the NPN tube is the first end of the second switch tube, the emitter of the NPN tube is the second end of the second switch tube, and the collector of the NPN tube is the third end of the second switch tube; when the second switch tube is an Nmos tube, the gate of the Nmos tube is the first end of the second switch tube, the source of the Nmos tube is the second end of the second switch tube, and the drain of the Nmos tube is the third end of the second switch tube. In this embodiment, the second switch tube is an NPN tube Q2 for illustration. Then in Figure 2 Specifically, the base of the NPN tube Q2 is connected to the first end of the third resistor R3, the emitter of the NPN tube Q2 is grounded, and the collector of the NPN tube Q2 is connected to the second end of the first resistor R1.

[0049] In general, the voltage of the power supply V1 will be higher than the normal working voltage of the control module. In order to make the control module work normally, the voltage must be reduced by the first chip U1. The first chip U1 is arranged between the drain of the Pmos tube Q1 and the first end of the second resistor R2. Specifically, the drain of the Pmos tube Q1 is connected to the input end of the first chip U1, the ground end of the first chip U1 is grounded, the first output end and the second output end of the first chip U1 are both connected to the first end of the second resistor R2, and the first end of the second resistor R2 is also connected to the control module.

[0050] In order to detect the voltage of the battery in real time and monitor the voltage of the battery and the control module, a fifth resistor R5 and a sixth resistor R6 are provided. The first end of the fifth resistor R5 is connected to the positive electrode of the power source V1, the second end of the fifth resistor R5 is connected to the first end of the sixth resistor R6 and the control module respectively, and the second end of the sixth resistor R6 is grounded. By allocating the resistance ratio of the fifth resistor R5 and the sixth resistor R6, the battery voltage can be calculated when the voltage across the sixth resistor R6 is known, so as to achieve monitoring.

[0051] In order to realize the charging function, a fourth resistor R4, a first connector J1 and a charging unit are provided. The first end of the fourth resistor R4 is connected to the first end of the third resistor R3, the second end of the fourth resistor R4 is connected to the VBUS end of the first connector J1, the E1 end, the E2 end and the GND end of the first connector J1 are all grounded, and the VBUS end of the first connector J1 is connected to the positive electrode of the power supply V1 through the charging unit. Among them, the first connector J1 can be a USB connector or other types, which are not specifically limited here.

[0052] The circuit working principle of this embodiment is as follows:

[0053] The power-on self-locking circuit has three states, namely, charging state, shutdown state and power-on state. When the power-on self-locking circuit is in the shutdown state (i.e., the first connector J1 is not connected to the charger and the switch is disconnected), the gate-source voltage of the Pmos tube Q1 is less than the turn-on voltage, and the Pmos tube Q1 is in a cut-off non-conducting state, and Vdd is 0 at this time. When the charger is inserted, the power-on self-locking circuit is in the charging state (i.e., the first connector J1 is connected to the charger and the switch is disconnected). At this time, there is a voltage output at the VBUS end of the first connector J1, and the voltage reaches the base of the NPN tube Q2 through the fourth resistor R4. Since the base of the NPN tube Q2 is at a high level, the NPN tube Q2 is turned on. After the NPN tube Q2 is turned on, the current generated by the power supply V1 flows through the first resistor R1 and the NPN tube Q2 to the ground. At this time, the source voltage of the Pmos tube Q1 is greater than the gate voltage, and the voltage difference between the two voltages is greater than the turn-on voltage, then the Pmos tube Q1 is turned on, and the current generated by the power supply V1 flows through the Pmos tube Q1 to the input end of the first chip U1, and is output to the control module after the voltage reduction processing of the first chip U1 to power the control module. The control module is initialized and started. On the one hand, it will detect the voltage of the BAT_ADC pin to determine the battery voltage and power, and on the other hand, it will detect the signal of the POWER_KEY pin. Since the switch is disconnected, the signal at the POWER_KEY is high, and the control module enters the low power mode. When the charger is unplugged (i.e., the first connector J1 is not connected to the charger), the voltage at the VBUS end of the first connector J1 drops to 0, and the base voltage of the NPN tube Q2 drops to 0, which is a low level. The NPN tube Q2 is in the cut-off state, and the voltage difference between the source voltage and the gate voltage of the Pmos tube Q1 drops rapidly, which is less than the turn-on voltage of the Pmos tube Q1. The Pmos tube Q1 is cut off and does not conduct, the control module has no input signal, and the power-on self-locking circuit is in the shutdown state.

[0054] When the power-on self-locking circuit is in the off state, close the switch, and the current generated by the power supply V1 flows through the first resistor R1, the first diode D1 and the switch to the ground. The voltage difference between the source voltage and the gate voltage of the Pmos tube Q1 becomes larger and greater than the turn-on voltage, then the Pmos tube Q1 is in the on state, and the current generated by the power supply V1 flows through the Pmos tube Q1 and the first chip U1 to reach the control module. At the same time, in another circuit branch, the current generated by the power supply V1 flows through the Pmos tube Q1, the first chip U1, the second resistor R2, the third diode D3 and the switch to the ground. At this time, the signal of the POWER_KEY pin is a low-level signal. The control module continues to detect the signal of the POWER_KEY pin for a certain period of time. If it is low level during this period, the control module keeps the signal of the POWER_HOLD pin at a high level. The high-level signal flows through the second diode D2 and the third resistor R3 to the base of the NPN tube Q2, and the NPN tube Q2 is turned on. At this time, even if the switch is turned off, the current generated by the power supply V1 can still flow through the first resistor R1 and the NPN tube Q2 to the ground, and the gate voltage of the Pmos tube Q1 is still pulled down to close to 0, which is a low level state, while the source of the Pmos tube Q1 is at a high level, and the voltage difference is still greater than the turn-on voltage. The Pmos tube Q1 is still turned on and not cut off, forming a self-locking state. In addition, since the switch is turned off, the level of the POWER_KEY pin is pulled to a high level at this time.

[0055] When the power-on self-locking circuit is in the power-on state (i.e., the first connector J1 is not connected to the charger and the circuit is self-locking), the POWER_KEY pin is at a high level. At this time, the switch is closed, and the POWER_KEY pin changes from a high level to a low level. The control module continuously detects the signal of the POWER_KEY pin for a certain period of time. If it is at a low level for a certain period of time, the control module keeps the POWER_HOLD signal at a low level, and the base of the NPN tube Q2 is at a low level, which is in a cut-off non-conducting state. At this time, if the switch is disconnected, the voltage difference between the source voltage and the gate voltage of the Pmos tube Q1 becomes smaller, which is less than the turn-on voltage, and the Pmos tube Q1 is cut off and non-conducting. The control module has no input signal and stops working, and the power-on self-locking circuit is in the shutdown state.

[0056] In this embodiment, the power supply V1 provides power to the self-locking module and the control module. When the user turns on the device, the self-locking module inputs the input signal to the control module, and the control module then feeds back the self-locking signal to the self-locking module, so that the self-locking module can start the self-locking function based on the self-locking signal. The self-locking function can avoid the problem of easy mis-triggering of the switch, and will not affect the opening or closing of the circuit, thereby ensuring the stability of the circuit and bringing a better experience to the user.

[0057] See also Figure 3, another embodiment of a power-on self-locking circuit of the embodiment of the present application includes: a power supply V1, a self-locking module and a control module;

[0058] The positive pole of the power supply V1 is connected to the self-locking module, and the negative pole of the power supply V1 is grounded;

[0059] The self-locking module is connected to the control module so that when the user turns on the self-locking module, the power provided by the power supply V1 is used to provide an input signal to the control module, so that the control module feeds back the self-locking signal to the self-locking module according to the input signal, thereby realizing self-locking when turned on according to the obtained self-locking signal.

[0060] Specifically, the self-locking module includes: Nmos tube Q3, seventh resistor R7, eighth resistor R8, ninth resistor R9, fourth diode D4, fifth diode D5, switch, NPN tube Q4 and second chip U2. The power-on self-locking circuit also includes: eleventh resistor R11, twelfth resistor R12, tenth resistor R10, second connector J2 and charging unit;

[0061] The positive electrode of the power supply V1 is respectively connected to the first end of the seventh resistor R7 and the drain of the Nmos tube Q3, the second end of the seventh resistor R7 is connected to the second end of the switch, the first end of the switch is respectively connected to the anode of the fourth diode D4 and the base of the NPN tube Q4, the cathode of the fourth diode D4 is respectively connected to the gate of the Nmos tube Q3, the cathode of the fifth diode D5 and the first end of the eighth resistor R8, the second end of the eighth resistor R8 is grounded, the source of the Nmos tube Q3 is respectively connected to the control module and the first end of the ninth resistor R9, the anode of the fifth diode D5 is connected to the control module, the second end of the ninth resistor R9 is respectively connected to the control module and the collector of the NPN tube Q4, and the emitter of the NPN tube Q4 is grounded.

[0062] The second chip U2 is arranged between the source of the Nmos tube Q3 and the first end of the ninth resistor R9, the source of the Nmos tube Q3 is connected to the input end of the second chip U2, the ground end of the second chip U2 is grounded, the first output end and the second output end of the second chip U2 are both connected to the first end of the ninth resistor R9, and the first end of the ninth resistor R9 is also connected to the control module.

[0063] A first end of the eleventh resistor R11 is connected to the positive electrode of the power source V1 , a second end of the eleventh resistor R11 is respectively connected to a first end of the twelfth resistor R12 and the control module, and a second end of the twelfth resistor R12 is grounded.

[0064] The first end of the tenth resistor R10 is connected to the first end of the eighth resistor R8, the second end of the tenth resistor R10 is connected to the VBUS end of the second connector J2, the E1 end, the E2 end and the GND end of the second connector J2 are all grounded, and the VBUS end of the second connector J2 is connected to the positive electrode of the power supply V1 through the charging unit.

[0065] The circuit working principle of this embodiment is as follows:

[0066] The power-on self-locking circuit has three states, namely, charging state, shutdown state and power-on state. When the power-on self-locking circuit is in the shutdown state (i.e., the second connector J2 is not connected to the charger and the switch is disconnected), the gate voltage of the Nmos tube Q3 is 0, the gate voltage of the Nmos tube Q3 is less than the turn-on voltage, and the Nmos tube Q3 is in a cut-off non-conducting state, and Vdd is 0 at this time. When the charger is inserted, the power-on self-locking circuit is in the charging state (i.e., the second connector J2 is connected to the charger and the switch is disconnected), and at this time, there is a voltage output at the VBUS end of the second connector J2, and the current generated by the voltage passes through the tenth resistor R10 and the eighth resistor R8 to the ground. At this time, the gate voltage of the Nmos tube Q3 is the voltage across the eighth resistor R8, which is a high level, and the gate voltage of the Nmos tube Q3 is greater than the turn-on voltage, then the Nmos tube Q3 is turned on, and the current generated by the power supply V1 flows through the Nmos tube Q3 to the input end of the second chip U2, and is output to the control module after the voltage reduction processing of the second chip U2, so as to power the control module. The control module is initialized and started. On the one hand, it detects the voltage of the BAT_ADC pin to determine the battery voltage and power. On the other hand, it detects the signal of the POWER_KEY pin. Since the switch is disconnected, the NPN tube Q4 is turned off, so the signal at POWER_KEY is high, and the control module enters the low power mode. When the charger is unplugged (that is, the second connector J2 is not connected to the charger), the VBUS terminal voltage of the second connector J2 drops to 0, and the voltage of the eighth resistor R8 drops to 0, then the gate voltage of the Nmos tube Q3 is 0, and the gate voltage of the Nmos tube Q3 is less than the turn-on voltage, then the Nmos tube Q3 is turned off and not conducting, the control module has no input signal, and the power-on self-locking circuit is in the shutdown state.

[0067] When the power-on self-locking circuit is in the off state, close the switch, and the current generated by the power supply V1 flows through the seventh resistor R7, the switch, the fourth diode D4 and the eighth resistor R8 to the ground. The gate of the Nmos tube Q3 is at a high level, and the gate voltage of the Nmos tube Q3 is greater than the turn-on voltage, then the Nmos tube Q3 is in the on state. At the same time, due to the closure of the switch, the anode of the fourth diode D4 is at a high level, that is, the base of the NPN tube Q4 is at a high level, and the NPN tube Q4 is turned on. The current generated by the power supply V1 flows through the Nmos tube Q3 and the second chip U2 to reach the control module. At the same time, in another circuit branch, the current generated by the power supply V1 flows through the Nmos tube Q3, the second chip U2, the ninth resistor R9 and the NPN tube Q4 to the ground, and the signal of the POWER_KEY pin at this time is pulled down to a low level signal. The control module continues to detect the signal of the POWER_KEY pin for a certain period of time. If it is low level during this period, the control module keeps the signal of the POWER_HOLD pin at a high level. The high-level signal flows through the fifth diode D5 to the gate of the Nmos tube Q3, and the Nmos tube Q3 is turned on. At this time, even if the switch is turned off, since the POWER_HOLD pin continues to be at a high level, the gate of the Nmos tube Q3 remains at a high level, and the Nmos tube Q3 is still turned on and not turned off, forming a self-locking state. In addition, since the switch is turned off, the NPN tube Q4 is turned off and not turned on, and the level of the POWER_KEY pin is pulled to a high level.

[0068] When the power-on self-locking circuit is in the power-on state (i.e., the second connector J2 is not connected to the charger and the circuit is self-locking), the POWER_KEY pin is at a high level. At this time, the switch is closed, the NPN tube Q4 is turned on, and the POWER_KEY pin is changed from a high level to a low level. The control module continues to detect the signal of the POWER_KEY pin for a certain period of time. If it is a low level for a certain period of time, the control module keeps the POWER_HOLD signal set to a low level. At this time, the current generated by the power supply V1 flows through the seventh resistor R7, the switch, the fourth diode D4 and the eighth resistor R8 to the ground, and the Nmos tube Q3 is still turned on. Next, the switch is turned off, and the gate voltage of the Nmos tube Q3 is less than the turn-on voltage, the Nmos tube Q3 is turned off and not turned on, and the NPN tube Q4 is also turned off and not turned on. The control module has no input signal and stops working, and the power-on self-locking circuit is in the shutdown state.

[0069] In this embodiment, the power supply V1 provides power to the self-locking module and the control module. When the user turns on the device, the self-locking module inputs the input signal to the control module, and the control module then feeds back the self-locking signal to the self-locking module, so that the self-locking module can start the self-locking function based on the self-locking signal. The self-locking function can avoid the problem of easy mis-triggering of the switch, and will not affect the opening or closing of the circuit, thereby ensuring the stability of the circuit and bringing a better experience to the user.

[0070] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the circuits, modules and units described above can refer to the corresponding processes in the aforementioned embodiments and will not be repeated here.

[0071] In the several embodiments provided in the present application, it should be understood that the disclosed circuits, modules and units can be implemented in other ways. For example, the embodiments described above are only schematic, for example, the division of units is only a logical function division, and there may be other division methods in actual implementation, for example, multiple units or components can be combined or integrated into another module, or some features can be ignored or not executed.

[0072] In addition, each functional unit in each embodiment of the present application may be integrated into one module, or each unit may exist separately, or two or more units may be integrated into one module.

Claims

1. A power-on self-locking circuit, characterized in that: include: Power supply, self-locking module and control module; The positive pole of the power supply is connected to the self-locking module, and the negative pole of the power supply is grounded; The self-locking module is connected to the control module so that when the user turns on the self-locking module, the power provided by the power supply is used to provide an input signal to the control module, so that the control module feeds back a self-locking signal to the self-locking module according to the input signal, thereby realizing self-locking at power-on according to the obtained self-locking signal.

2. The power-on self-locking circuit according to claim 1, characterized in that: The self-locking module includes: a Pmos tube, a second switch tube, a first resistor, a second resistor, a third resistor, a first diode, a second diode, a third diode and a switch; The positive electrode of the power supply is respectively connected to the first end of the first resistor and the source of the Pmos tube, the gate of the Pmos tube is respectively connected to the second end of the first resistor, the third end of the second switch tube and the anode of the first diode, the drain of the Pmos tube is respectively connected to the control module and the first end of the second resistor, the second end of the second resistor is respectively connected to the control module and the anode of the third diode, the cathode of the third diode is respectively connected to the cathode of the first diode and the second end of the switch, and the first end of the switch is grounded; The second end of the second switch tube is grounded, the first end of the second switch tube is connected to the first end of the third resistor, the second end of the third resistor is connected to the cathode of the second diode, and the anode of the second diode is connected to the control module.

3. The power-on self-locking circuit according to claim 2, characterized in that: The second switch tube is an NPN tube, the base of the NPN tube is the first end of the second switch tube, the emitter of the NPN tube is the second end of the second switch tube, and the collector of the NPN tube is the third end of the second switch tube; or, The second switch tube is an Nmos tube, the gate of the Nmos tube is the first end of the second switch tube, the source of the Nmos tube is the second end of the second switch tube, and the drain of the Nmos tube is the third end of the second switch tube.

4. The power-on self-locking circuit according to claim 2, characterized in that: The self-locking module further includes: a first chip; The first chip is arranged between the drain of the Pmos tube and the first end of the second resistor, the drain of the Pmos tube is connected to the input end of the first chip, the ground end of the first chip is grounded, the first output end and the second output end of the first chip are both connected to the first end of the second resistor, and the first end of the second resistor is also connected to the control module.

5. The power-on self-locking circuit according to claim 2, characterized in that: The power-on self-locking circuit further includes: a fifth resistor and a sixth resistor; The first end of the fifth resistor is connected to the positive electrode of the power supply, the second end of the fifth resistor is connected to the first end of the sixth resistor and the control module respectively, and the second end of the sixth resistor is grounded.

6. The power-on self-locking circuit according to claim 2, characterized in that: The power-on self-locking circuit further includes: a fourth resistor, a first connector and a charging unit; The first end of the fourth resistor is connected to the first end of the third resistor, the second end of the fourth resistor is connected to the VBUS end of the first connector, the E1 end, the E2 end and the GND end of the first connector are all grounded, and the VBUS end of the first connector is connected to the positive electrode of the power supply via the charging unit.

7. The power-on self-locking circuit according to claim 1, characterized in that: The self-locking module includes: an NMOS tube, a seventh resistor, an eighth resistor, a ninth resistor, a fourth diode, a fifth diode, a switch and an NPN tube; The positive electrode of the power supply is respectively connected to the first end of the seventh resistor and the drain of the Nmos tube, the second end of the seventh resistor is connected to the second end of the switch, the first end of the switch is respectively connected to the anode of the fourth diode and the base of the NPN tube, the cathode of the fourth diode is respectively connected to the gate of the Nmos tube, the cathode of the fifth diode and the first end of the eighth resistor, the second end of the eighth resistor is grounded, the source of the Nmos tube is respectively connected to the control module and the first end of the ninth resistor, the anode of the fifth diode is connected to the control module, the second end of the ninth resistor is respectively connected to the control module and the collector of the NPN tube, and the emitter of the NPN tube is grounded.

8. The power-on self-locking circuit according to claim 7, characterized in that: The self-locking module further includes: a second chip; The second chip is arranged between the source of the Nmos tube and the first end of the ninth resistor, the source of the Nmos tube is connected to the input end of the second chip, the ground end of the second chip is grounded, the first output end and the second output end of the second chip are both connected to the first end of the ninth resistor, and the first end of the ninth resistor is also connected to the control module.

9. The power-on self-locking circuit according to claim 7, characterized in that: The power-on self-locking circuit further includes: an eleventh resistor and a twelfth resistor; The first end of the eleventh resistor is connected to the positive electrode of the power supply, the second end of the eleventh resistor is connected to the first end of the twelfth resistor and the control module respectively, and the second end of the twelfth resistor is grounded.

10. The power-on self-locking circuit according to claim 7, characterized in that: The power-on self-locking circuit further includes: a tenth resistor, a second connector and a charging unit; The first end of the tenth resistor is connected to the first end of the eighth resistor, the second end of the tenth resistor is connected to the VBUS end of the second connector, the E1 end, the E2 end and the GND end of the second connector are all grounded, and the VBUS end of the second connector is connected to the positive electrode of the power supply via the charging unit.

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